Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a high-reliability passive switch on-off state detection circuit, which solves the problems in the prior art.
In order to achieve the above purpose, the invention is realized by the following technical scheme: the high-reliability passive switch on-off state detection circuit comprises a voltage comparator U1, resistors R3, R4, R5, R6, R7 and R8, capacitors C1, C2, C3, C4 and C5, diodes D2, Z1 and Z2 and a switch K2, wherein the IN-end of the voltage comparator U1 is connected IN series with the C2 and then is divided into two paths, one path is grounded, and the other path is connected IN series with the C1 and then is connected with an input voltage VCC; the anode of the diode D2 is connected with the input voltage VCC, the cathode is connected IN series with the R3 and the port CNT1, and then is connected with one end of the switch K2, and the other end of the switch K2 is connected IN series with the ports CNT2 and R7, and then is connected with the IN+ end of the U1; one end of the resistor R4 is connected with the negative electrode of the D2, and the other end is connected with the IN-end of the U1; one end of the resistor R5 is connected with the IN-end of the U1, and the other end of the resistor R is grounded; the positive electrode of the diode Z1 is grounded, and the negative electrode is connected with the IN-end of the U1; one end of the resistor R8 is connected with the IN+ end of the U1, and the other end of the resistor R is grounded; the positive electrode of the diode Z2 is grounded, and the negative electrode is connected with the IN+ end of the U1; one end of the capacitor C5 is connected with the IN+ end of the U1, and the other end of the capacitor C is connected with the ground; the VCC of U1 is connected with an input voltage VCC; GND of U1 is grounded; the OUT end of U1 is connected in series with R6 and then connected with an output port CntDet; one end of the capacitor C3 is connected with the input voltage VCC, and the other end of the capacitor C is grounded; one end of the capacitor C4 is connected with the output port CntDet, and the other end of the capacitor C is grounded.
Preferably, the voltage comparator U1 is a full-amplitude comparator.
Preferably, the capacitors C1, C2, C3, and C5 are filter capacitors.
Preferably, the diode D2 is a high voltage input preventing diode, and the diodes Z1 and Z2 are protection zener diodes.
Preferably, the resistor R6 and the capacitor C4 form a voltage comparator output RC filter circuit.
The invention provides a high-reliability passive switch on-off state detection circuit, which has the following beneficial effects: when the CNT1 and CNT2 ports are immersed or doped with foreign matters with lower insulativity by accident, the switch is not detected to be turned on by mistake, and the rear-end microprocessor or circuit is not caused to malfunction; when the CNT1 and/or CNT2 ports are in misconnection with a power ground wire or high voltage (exceeding the withstand voltage of a rear-end microprocessor or a circuit), any damage on devices or circuits can not be caused, and the misconnection is not limited in time, so that the device and the circuit can be subjected to the misconnection for a long time (the normal life time of an electronic component or a key switch) in a lossless manner.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments.
As shown in fig. 1, the present invention provides a technical solution: the high-reliability passive switch on-off state detection circuit comprises a voltage comparator U1, resistors R3, R4, R5, R6, R7 and R8, capacitors C1, C2, C3, C4 and C5, diodes D2, Z1 and Z2 and a switch K2, wherein the IN-end of the voltage comparator U1 is connected IN series with the C2 and then is divided into two paths, one path is grounded, and the other path is connected IN series with the C1 and then is connected with an input voltage VCC; the anode of the diode D2 is connected with the input voltage VCC, the cathode is connected IN series with the R3 and the port CNT1, and then is connected with one end of the switch K2, and the other end of the switch K2 is connected IN series with the ports CNT2 and R7, and then is connected with the IN+ end of the U1; one end of the resistor R4 is connected with the negative electrode of the D2, and the other end is connected with the IN-end of the U1; one end of the resistor R5 is connected with the IN-end of the U1, and the other end of the resistor R is grounded; the positive electrode of the diode Z1 is grounded, and the negative electrode is connected with the IN-end of the U1; one end of the resistor R8 is connected with the IN+ end of the U1, and the other end of the resistor R is grounded; the positive electrode of the diode Z2 is grounded, and the negative electrode is connected with the IN+ end of the U1; one end of the capacitor C5 is connected with the IN+ end of the U1, and the other end of the capacitor C is connected with the ground; the VCC of U1 is connected with an input voltage VCC; GND of U1 is grounded; the OUT end of U1 is connected in series with R6 and then connected with an output port CntDet; one end of the capacitor C3 is connected with the input voltage VCC, and the other end of the capacitor C is grounded; one end of the capacitor C4 is connected with the output port CntDet, and the other end of the capacitor C is grounded.
In the invention, U1 is a full-width voltage comparator; the resistors R3 and R7 are current limiting resistors, and the resistors R4, R5 and R8 are voltage dividing resistors; d2 is a high voltage-proof input diode, and Z1 and Z2 are protective zener diodes; r4 is a current limiting resistor; the capacitors C1, C2, C3 and C5 are filter capacitors; r6 and C4 form a voltage comparator output RC filter circuit.
The current is divided into two paths from the power VCC through the diode D2, and one path is divided by R4 and R5 and then enters the inverting input end IN-end of the voltage comparator U1, and the voltage U is at the pointIN- The method comprises the steps of carrying out a first treatment on the surface of the The other path passes through R3 and a switch (equivalent resistance RSW ) Dividing the voltage of R7 and R8, and then entering the non-inverting input end IN+ end of the voltage comparator, wherein the voltage U is the pointIN+ . Voltage comparator U1 detunes voltage UOS Comparator non-inverting input terminal voltage UIN+ And an inverting input terminal voltage UIN- The result of the subtraction is larger than the offset voltage U of the comparatorOS Comparator U1 outputs voltage UCntDet Is the power supply VCC voltage.
When the CNT1 and/or CNT2 ports overlap with high voltage (voltage higher than VCC) due to dust, water immersion or misconnection, D2 is used for reversely cutting off the high voltage and entering the VCC power supply circuit, R3 can limit reverse leakage current of D2, reliability of D2 reverse high voltage reverse filling is enhanced, R3, R4 and R5 are connected in series and then voltage division and amplitude limiting are carried out, and the voltage of the voltage-stabilizing diode Z1 can also limit the voltage entering the reverse input end of the voltage comparator U1 to be within safe voltage. R7 and R8 are connected in series and then divided and limited, and the voltage of the homodromous input end of the comparator U1 can be limited to be within safe voltage by the voltage stabilizing diode Z2.
UIN- And UIN+ The calculation method of (2) is as follows:
the CntDet port output voltage VCC condition:
UIN+ -UIN ->UOS ;
substitution UIN- And UIN+ The deduction is as follows:
the CntDet port outputs a voltage 0V condition:
UIN+ -UIN -<UOS ;
substitution UIN- And UIN+ The deduction is as follows:
example 1:
if UVCC Take the value of 3.3V, UD2 0.6V, 100K for R3, 200K for R4, 100K for R5, 100K for R7, 103.9K for R8, UOS The value of 2mV is taken into consideration, influence factors such as hysteresis and input paranoid current of the comparator U1 are temporarily not considered, and the method can be calculated according to a formula:
the CntDet port output voltage VCC condition:
RSW <7.01K。
the CntDet port outputs a voltage 0V condition:
RSW >7.01K。
if the reverse withstand voltage of the diode D2 takes 100V, the voltage stabilizing values of the zener diodes Z1 and Z2 take 3.0V, the withstand voltages of the inverting input terminal and the non-inverting input terminal of u1 are 3.3V, and the CNT1 port is connected to a voltage of 60V:
voltage comparator U1 has an inverting input voltage UIN- =3.0v (voltage stabilizing value of zener diode Z1), non-inverting input terminal voltage UIN- The voltage at the inverting input terminal and the non-inverting input terminal exceeds the withstand voltage value of the diode (zener diode Z2), and the device and the back-end circuit are not damaged even if the voltage continues for a long time.
The foregoing is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art, who is within the scope of the present invention, should make equivalent substitutions or modifications according to the technical scheme of the present invention and the inventive concept thereof, and should be covered by the scope of the present invention.