in the formula, V_I-A1The output voltage of thefilter circuit 10 is boosted for the first-stage operational amplifier; v_R1The voltage at two ends of theresistance unit 7 is sampled; after matching, the first stage operational amplifier boosts the output voltage V of thefilter circuit 10_I-A1The voltage of the output voltage is approximately equal to the voltage of the two ends of thesampling resistance unit 7, which is equivalent to that the output voltage is boosted and filtered by the first-stage operational amplifier boosting andfiltering circuit 10 and then follows the input sampling voltage.

In this embodiment, the megohm-level resistor R5A is configured at the positive-phase input terminal of the operational amplifier U1B of the first-stage operational amplifier boostingfilter circuit 10 to raise the voltage of the positive-phase input terminal of the operational amplifier U1B, so that the first-stage operational amplifier boostingfilter circuit 10 plays key roles of boosting the voltage, filtering, improving the anti-interference capability, and the like.

When the secondary side rated current of the current is sampled, the output voltage signal of the operational amplifier U1B is about 2V.

As shown in fig. 3, in the preferred embodiment of the present application, the second stage operational amplifier andoutput unit 3 includes:

the input end of the second-stage operationalamplifier conditioning circuit 11 is electrically connected with the output ends of the CT secondarycurrent sampling unit 2 and the current sampling referencepower supply unit 4 respectively, and is used for performing superposition and operational amplification on a secondary current sampling signal output by the CT secondarycurrent sampling unit 2 and a power supply reference signal output by the current sampling referencepower supply unit 4, so that the amplitude range of the secondary current sampling signal converted into a voltage signal is converted from-1.65V- +1.65V to 0-3.3V, and the amplitude processing range of the algorithm DSP digital control andcommunication unit 5 is met;

and the voltage amplitude limiting protection andoutput circuit 12 is electrically connected with the output end of the second-stage operationalamplifier conditioning circuit 11 and is used for limiting the signal input to the algorithm DSP digital control andcommunication unit 5 not to exceed 3.3V.

Wherein, the second stage operationalamplifier conditioning circuit 11 includes:

one end of the resistor R7 is electrically connected to the output end of the first-stage operational amplifier voltage boostingfilter circuit 10, and the other end of the resistor R7 is electrically connected to the inverting input end of the operational amplifier U1A, so as to convert the secondary current sampling signal into a current signal;

resistors R11A and R10 connected in series, one end of each resistor being electrically connected to thereference voltage terminal 29, and the other end of each resistor being electrically connected to the inverting input terminal of the operational amplifier U1A, for converting the reference power supply circuit operational amplifier output voltage outputted from thereference voltage terminal 29 into a current signal;

one end of the resistor R12 is electrically connected with the output end of the operational amplifier U1A, and the other end is electrically connected with the input end of the voltage amplitude limiting protection andoutput circuit 12;

wherein, the voltage slice protection andoutput circuit 12 includes:

the resistor R15, one end of the resistor R15 is electrically connected with the resistor R12, and the other end is electrically connected with the I _R terminal 23;

In this embodiment, the second stage operational amplifier andoutput unit 3 mainly includes a second stage operationalamplifier conditioning circuit 11 and a voltage amplitude limiting protection andoutput circuit 12.

The reference voltage of the second-stage operationalamplifier conditioning circuit 11 is a 3.3V voltage outputted from a 3.3V reference voltage terminal, and is converted into a current signal by the input resistors R11A and R10 after being conditioned by the operational amplifier U2A of the second-stage operational amplifier current sampling referencepower supply unit 20 of the current sampling referencepower supply unit 4 through the high-low frequency two-stagecapacitive filtering unit 28 and the three-stage capacitive filtering, and then inputted to the inverting input terminal of the operational amplifier U1A.

When the secondary current sampling signal is sent to the second stage operationalamplifier conditioning circuit 11, the current signal is first converted into a current signal from the I-a1 terminal 22 of the first stage operational amplifier voltage boostingfilter circuit 10 through the resistor R7, and then flows into the inverting input terminal of the operational amplifier U1A. After matching and testing, in this embodiment, the reference power supply circuit operational amplifier output voltage V input to the inverting input terminal of the operational amplifier U1A_EF1The formula is as follows:

in the formula, V_EF1Outputting voltage for the operational amplifier of the reference power supply circuit; v_3.3VREF1Converting the reference voltage value for DSP analog-to-digital; - (R34/R32) is the amplification factor of the operational amplifier U2A, and generally, after matching, V is allowed_EF1＝-3.3V。

In this embodiment, the sampling reference power supply of the second-stage operationalamplifier conditioning circuit 11 has high precision. Wherein, the output voltage of the reference power supply circuit operational amplifier is converted into a current signal by resistors R11A and R10Then to the inverting input of operational amplifier U1A; the secondary current sampling signal is converted into a current signal through the resistor R7 and then transmitted to the inverting input terminal of the operational amplifier U1A, and the secondary current sampling signal is superposed with the output voltage of the operational amplifier of the reference power circuit, so that the output voltage V of the I _ R terminal 23_I-RAs actual values of the secondary current sampling signal:

in the formula, V_I-ROutputting voltage for the second-stage operational amplifier; v_EF1The operational amplifier output voltage of the reference power supply circuit; v_I-A1The output voltage of the first-stage operational amplifier is obtained, and the rest are the resistance values of the corresponding resistors.

Generally, after the secondary current sampling signal is processed by the second-stage operationalamplifier conditioning circuit 11 and the voltage limiting protection andoutput circuit 12, when the secondary side current is rated as 1A, the I _R terminal 23 outputs a voltage signal normally ranging from 2.2V to 2.4V.

In this embodiment, two paths of signals are superimposed on the second-stage operationalamplifier conditioning circuit 11 for the purpose of increasing the output voltage, so that the amplitude range of the actual secondary current sine wave sampling signal is converted from-1.65V- +1.65V to 0-3.3V, otherwise, the arithmetic DSP digital control andcommunication unit 5 treats the-1.65 to 0 negative half-axis signal in the sine wave of the secondary current sampling signal as a zero voltage for processing, and after the superposition and operational amplification processing, the actual value of the secondary current sampling signal is in accordance with the processing range of the arithmetic DSP digital control andcommunication unit 5, thereby improving the reliability and stability of data sampling and processing.

Meanwhile, in the voltage amplitude limiting protection andoutput circuit 12 of the present embodiment, the second-stage operational amplifier andoutput unit 3 outputs the actual current sampling signal to the ADC analog-to-digital conversion unit 13 in the algorithm DSP digital control andcommunication unit 5 in a voltage signal manner; the voltage amplitude limiting protection is a special case, if the output signal of the second-stage operationalamplifier conditioning circuit 11 is larger than the positive/negative 3.3V range of the signal that can be processed by the algorithm DSP digital control andcommunication unit 5, the amplitude limiting protection is performed, so that the signal input to the algorithm DSP digital control andcommunication unit 5 does not exceed 3.3V to protect the algorithm DSP digital control andcommunication unit 5.

As shown in fig. 4, in the preferred embodiment of the present application, the current sampling referencepower supply unit 4 includes:

the algorithm DSP referencepower supply unit 19 is used for providing a +3.3V current sampling reference power supply signal and transmitting the signal to the algorithm DSP digital control andcommunication unit 5;

and the second-stage operational amplifier current sampling referencepower supply unit 20 is electrically connected with the output end of the algorithm DSP referencepower supply unit 19 and is used for converting the +3.3V current sampling reference power supply signal into-3.3V reference power supply circuit operational amplifier output voltage and transmitting the output voltage to the input ends of the second-stage operational amplifier and theoutput unit 3.

Specifically, the algorithm DSP referencepower supply unit 19 includes:

avoltage source 24 for providing a voltage source;

the shunt voltage-dividingresistor 25 is electrically connected with thevoltage source 24 and is used for shunting and dividing the voltage of the voltage source;

the filtering, voltage stabilizing and current limitingcircuit 27 is connected with the output end circuit of theshunt divider resistor 25 and is used for carrying out capacitance filtering and voltage stabilizing and resistance current limiting on a voltage source after shunt voltage division to obtain a current sampling reference power supply signal of +3.3V and transmitting the current sampling reference power supply signal to the algorithm DSP digital control andcommunication unit 5;

the high-low frequency two-stagecapacitor filtering unit 28 is used for carrying out high-low frequency two-stage filtering on the +3.3V current sampling reference power supply signal and transmitting the signal to the second-stage operational amplifier current sampling referencepower supply unit 20;

and the 3.3Vreference voltage terminal 26 is used for transmitting a +3.3V current sampling reference power supply signal to the algorithm DSP digital control andcommunication unit 5.

Specifically, the second-stage operational amplifier current sampling referencepower supply unit 20 includes:

one end of the resistor R32 is connected with the high-frequency and low-frequency two-stagecapacitor filtering unit 28;

and areference voltage terminal 29, which is led out from one end of a resistor R35 connected with capacitors C14, C15 and C16 arranged in parallel, and is used for transmitting the output voltage of the operational amplifier of the reference power supply circuit of-3.3V to the input end of the second-stage operational amplifier andoutput unit 3.

The current sampling referencepower supply unit 4 in this embodiment is a two-way current sampling reference power supply, each way includes an algorithm DSP referencepower supply unit 19 and a second-stage operational amplifier current sampling referencepower supply unit 20, and fig. 4 shows a specific circuit diagram of one way, where a reference voltage output by a 3.3Vreference voltage terminal 26 of the algorithm DSP referencepower supply unit 19 is +3.3V _ REF1, and a reference voltage output by areference voltage terminal 29 of the second-stage operational amplifier current sampling referencepower supply unit 20 is-VEF 1.

Similarly, the reference voltages respectively output by the other current sampling reference power supply are +3.3V _ REF2 and-VEF 2, and are used as the reference signals of the second analog-to-digital conversion power supply of the algorithm DSP digital control andcommunication unit 5. The circuits of the two current sampling reference power supplies are the same, and therefore the description is omitted.

The reference voltage output by the 3.3Vreference voltage terminal 26 is divided and divided by avoltage source 24 with a voltage of + V1 through a dividing and dividingresistor 25, and then is output with +3.3V after being subjected to the capacitor filtering of the filtering, voltage stabilizing and current limitingcircuit 27 and the voltage stabilizing and current limiting of the voltage stabilizing tube, and then is directly input to the ADC analog-to-digital conversion unit 13 of the algorithm DSP digital control andcommunication unit 5 to be used as a first power reference signal for sampling a secondary current sampling signal for the algorithm DSP digital control andcommunication unit 5.

In addition, the reference voltage-VEF 1 supplied to the second-stage operationalamplifier conditioning circuit 11 has high power supply accuracy. It is obtained by processing the reference voltage +3.3V _ REF1 output by the 3.3Vreference voltage terminal 26 by the second stage operational amplifier current sampling referencepower supply unit 20.

As shown in fig. 5, in the preferred embodiment of the present application, the algorithm DSP digital control andcommunication unit 5 includes:

the ADC analog-to-digital conversion unit 13 is electrically connected to the output ends of the two sets of algorithm DSP referencepower supply units 19 and the output ends of the three sets of second-stage operational amplifiers andoutput unit 3, respectively, and is configured to obtain analog-to-digital conversion digital values of the two sets of current sampling reference power supply signals and analog-to-digital conversion digital values of the three sets of secondary current sampling signals;

acontrol algorithm unit 14, electrically connected to the output end of the ADC analog-to-digital conversion unit 13, configured to calculate a secondary current effective value and a peak value according to a reference calibration value of analog-to-digital conversion and a secondary current sampling signal instantaneous value to give a data control word, and give an internal protection control word, and then obtain a protection fixed value and a transformation ratio by combining a protection calculation and protection rechecking calculation mathematical model with theintelligent device terminal 21, if the transformation ratio meets the requirement, continuously and normally work and output secondary current data, otherwise, invoke an automatic correction link, perform automatic matching/manually set transformation ratio parameters to meet the requirement, and obtain a secondary current value after the transformation ratio is adjusted;

and thedata communication unit 15 is electrically connected with the output end of thecontrol algorithm unit 14 and is used for selecting a communication protocol according to requirements to realize data communication with theintelligent device terminal 21.

Specifically, theintelligent device terminal 21 includes amicrocomputer protection device 210, a measuringinstrument 211, and a human-computer interface 212, and thedata communication unit 15 includes: anRS485 communication module 16 which realizes communication with the human-computer interface 212, anRS232 communication module 17 which realizes communication with the measuringinstrument 211, and aCAN communication module 18 which realizes communication with themicrocomputer protection device 210.

Thedata communication unit 15 of this embodiment includes anRS485 communication module 16, anRS232 communication module 17, and aCAN communication module 18, and sets a communication protocol through software to complete a communication function, and CAN select the communication protocol according to external requirements, thereby realizing friendly and harmonious communication with the externalmicrocomputer protection device 210, themeasurement instrument 211, and the human-computer interface 212.

The algorithm DSP digital control andcommunication unit 5 of this embodiment includes an ADC analog-to-digital conversion unit 13, acontrol algorithm unit 14, and adata communication unit 15, wherein:

if theADC unit 13 has a high precision requirement, a dedicated 16-bit ADC chip may be used, and in this embodiment, a 12-bit ADC unit provided in the 2812 chip of the DSP is used to perform the ADC conversion of the secondary current sampling signal with a precision of 1/4095.

In the present embodiment, five analog input signals are input to the ADC analog-to-digital conversion unit 13, wherein three analog input signals are three-phase analog input signals based on the secondary current of the three-phasecurrent transformer 1, and two analog input signals are current sampling reference power signals.

The three-phase analog input signals based on the secondary current of the three-phasecurrent transformer 1 are signals from the CT secondarycurrent sampling unit 2 to the second-stage operational amplifier andoutput unit 3, and are actual secondary current sampling signals of the three-phasecurrent transformer 1, the three-phase analog input signals based on the secondary current of the three-phasecurrent transformer 1 are input to analog-to-digital conversion pins corresponding to the ADC analog-to-digital conversion unit 13 through the I _R terminal 23 and the I _ S terminal, and the I _ T terminal.

Here, the terminal number of the secondary current sampling signal of the a phase input to the ADC analog-to-digital conversion unit 13 is I-R, and since the second stage operational amplifier of the B phase and the C phase is the same as theoutput unit 3 in the a phase, and the output terminals corresponding to B and C are I-S and I-T, the description of the present application is omitted.

The two paths of current sampling reference power signals are used as ADC sampling reference power calibration signals and comprise a first path of power reference signal +3.3V-REF1 and a second path of power reference signal +3.3V-REF2, and the two paths of current sampling reference power signals obtained by V1 through resistance conversion shunting, capacitance filtering and voltage stabilization of a voltage stabilizing tube are used as current sampling reference power analog input signals and are connected to analog-to-digital conversion pins corresponding to an ADC analog-to-digital conversion unit 13 of the algorithm DSP.

As shown in fig. 6, in the preferred embodiment of the present application, thecontrol algorithm unit 14 is specifically configured to perform the following steps:

s1, initializing an algorithm DSP digital controller;

s2, obtaining an analog-to-digital conversion digital value of the current sampling reference power signal, and obtaining a reference calibration value of the analog-to-digital conversion by software filtering and storing the reference calibration value in a register, specifically, in this embodiment, obtaining an analog-to-digital conversion digital value of the current sampling reference power signal, and obtaining calibration value data of the analog-to-digital conversion of 3.3V by software filtering, and storing the calibration value data in the register;

s3, obtaining an analog-to-digital conversion digital value of the secondary current sampling signal, filtering the obtained secondary current sampling instantaneous value by software, and storing the obtained secondary current sampling instantaneous value in a register, specifically, in this embodiment, obtaining the analog-to-digital conversion digital value of the secondary current sampling signal by using a 12-bit analog-to-digital conversion unit provided in the 2812 chip, filtering the obtained secondary current sampling instantaneous value by software, and storing the obtained secondary current sampling instantaneous value in the register;

s4, calculating to obtain an effective value and a peak value of the secondary current sampling signal, and thereby obtain data of the secondary current sampling signal and a fault alarm control word, specifically, in this embodiment, by a calculation formula and a protection requirement of an internal controller, data such as the effective value and the peak value of the secondary current sampling signal and the internal fault alarm control word are obtained, so as to provide an internal protection function of the variable ratio digital controller, and the data such as the effective value and the peak value of the secondary current sampling signal and the internal fault alarm control word may be transmitted to the externalsmart device terminal 21 for use through thedata communication unit 15;

s5, performing communication data interaction according to a communication protocol to obtain internal parameters such as an input threshold value, a maximum limit value, a measuring range and precision, a transformation ratio and the like of theintelligent equipment terminal 21 including themicrocomputer protection device 210, the measuringinstrument 211 and the human-computer interface 212, and storing the internal parameters into a register;

s8, if the requirements are met, the normal work is continued, and then secondary current sampling signals after the CT transformation ratio is adjusted are obtained and output data are transmitted through communication;

s9, if the requirement is not satisfied, calling an automatic checking and detecting link, and manually setting or automatically adjusting the CT transformation ratio to achieve the requirement, wherein the automatically adjusting the CT transformation ratio specifically comprises the following steps: the value detected by the measuring instrument is input into an automatic correction detection link of thecontrol algorithm unit 14 through the HMI interface of the machine or through background debugging software, and the CT transformation ratio parameter is automatically matched, so that the detection parameter or precision reaches the specification requirement; the manual setting is to manually set the CT transformation ratio parameter through the human-computer interface 212, so that the detection parameter or accuracy meets the specification requirement.

To sum up, the adjustable CT transformation ratio digital controller based on secondary current sampling comprises an external current transformer input, an internal hardware circuit, software control, intelligent equipment terminal communication and the like. The three-phase current transformer comprises a three-phasecurrent transformer 1, three groups of CT secondarycurrent sampling units 2, three groups of second-stage operational amplifiers andoutput units 3, two groups of current sampling referencepower supply units 4, an algorithm DSP digital control andcommunication unit 5 and anintelligent device terminal 21.

The software control is based on the secondary current sampling signal of the three-phasecurrent transformer 1 and the current sampling referencepower supply unit 4 as input, the ADC analog-to-digital conversion unit 13, thecontrol algorithm unit 14 and thedata communication unit 15 in the algorithm DSP digital control andcommunication unit 5 are used for filtering the current acquisition value by the control algorithm software of the algorithm DSP digital control andcommunication unit 5 to obtain the secondary current sampling instantaneous value and calculate the secondary current parameters such as an effective value, a peak value and the like. Meanwhile, the algorithm DSP digital control andcommunication unit 5 can obtain parameters such as threshold value, upper and lower limit range parameters, precision control and the like from theintelligent device terminal 21, and also comprises a comprehensive protection device for obtaining current and voltage parameters and the like. The algorithm DSP digital control andcommunication unit 5 can calculate and obtain an adjustable CT transformation ratio according to the requirements of theintelligent device terminal 21 and current sampling parameters and the requirements of protection, measurement and display function parameters of theintelligent device terminal 21 and a mathematical model of protection calculation and protection recheck calculation, and set the required CT transformation ratio parameters through an automatic detection and adjustment link of the CT transformation ratio and a human-computer interface so as to obtain an adjusted secondary current value. The regulated secondary current is subjected to data transmission interaction with theintelligent equipment terminal 21 through a communication protocol, and then themicrocomputer protection device 210 and the measuringinstrument 211 are used for data acquisition, display on a human-computer interface 212 and the like to realize various protection control functions. Therefore, the replacement, disassembly and assembly work is reduced, the multiple high-voltage tests after disassembly and assembly are avoided, the construction period is shortened, and the cost is reduced. The CT transformation ratio can be adjusted through automatic adjustment and manual setting, the setting is convenient, the communication control is flexible and simple, the control precision is high, and the dynamic response is fast.

The above description is only for the purpose of illustrating the preferred embodiments of the present application and is not to be construed as limiting the present application, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present application should be included in the scope of the present application.