Disclosure of Invention
Accordingly, the present application is directed to a method, apparatus, device and medium for extracting a PCB model, which can improve accuracy of simulation parameters, thereby improving accuracy of model extraction and accuracy of link design evaluation. The specific scheme is as follows:
in a first aspect, the present application provides a PCB model extraction method, including:
Determining a correction link corresponding to a target PCB link, wherein the correction link does not contain a target device in the target PCB link, and the target device is a device capable of causing nonlinear influence on the link;
Performing model extraction on the correction link based on dissipation factor parameters to obtain a corresponding model extraction result;
Correcting the dissipation factor parameter based on the model extraction result to obtain a corrected dissipation factor parameter;
and performing model extraction on the target PCB link based on the corrected dissipation factor parameter.
Optionally, the correcting the dissipation factor parameter based on the model extraction result to obtain a corrected dissipation factor parameter includes:
determining a simulation link loss value based on the model extraction result;
Comparing the simulated link loss value with the actual link loss value of the correction link to obtain a comparison result, wherein the comparison result comprises a magnitude relation and a difference value between the simulated link loss value and the actual link loss value;
and if the difference value is larger than a preset threshold value, adjusting the dissipation factor parameter based on the size relation and the difference value, and performing model extraction on the correction link again based on the adjusted dissipation factor parameter until the difference value is smaller than or equal to the preset threshold value, and determining the current dissipation factor parameter as the corrected dissipation factor parameter.
Optionally, said adjusting said dissipation factor parameter based on said magnitude relation and said difference comprises:
If the magnitude relation is that the simulated link loss value is larger than the actual link loss value, the dissipation factor parameter is regulated down based on the difference value;
and if the magnitude relation is that the simulated link loss value is smaller than the actual link loss value, the dissipation factor parameter is adjusted to be higher based on the difference value.
Optionally, the determining the correction link corresponding to the target PCB link includes:
And removing the target device from the target PCB link to obtain the correction link.
Optionally, the determining the correction link corresponding to the target PCB link includes:
Determining a correction link corresponding to the target PCB link from the existing PCB links;
The electronic components connected with the target device in the target PCB link are directly connected with the correction link through signal wires, and the other electronic components and wires in the target PCB link are consistent with the correction link.
Optionally, the determining the simulated link loss value based on the model extraction result includes:
And determining a simulation link loss value corresponding to the target key frequency point based on the model extraction result.
Optionally, the target device includes a capacitor and an electrostatic resistor.
In a second aspect, the present application discloses a PCB model extraction apparatus, comprising:
the correction link determining module is used for determining a correction link corresponding to a target PCB link, wherein the correction link does not contain a target device in the target PCB link, and the target device is a device capable of causing nonlinear influence on the link;
the correction link model extraction module is used for carrying out model extraction on the correction link based on dissipation factor parameters to obtain a corresponding model extraction result;
The dissipation factor parameter correction module is used for correcting the dissipation factor parameter based on the model extraction result to obtain a corrected dissipation factor parameter;
And the target link model extraction module is used for carrying out model extraction on the target PCB link based on the corrected dissipation factor parameter.
In a third aspect, the present application discloses an electronic device, comprising:
a memory for storing a computer program;
And the processor is used for executing the computer program to realize the PCB model extraction method.
In a fourth aspect, the present application discloses a computer readable storage medium storing a computer program which, when executed by a processor, implements the aforementioned PCB model extraction method.
The method comprises the steps of determining a correction link corresponding to a target PCB link, wherein the correction link does not comprise a target device in the target PCB link, the target device is a device capable of causing nonlinear influence on the link, performing model extraction on the correction link based on dissipation factor parameters to obtain a corresponding model extraction result, correcting the dissipation factor parameters based on the model extraction result to obtain corrected dissipation factor parameters, and performing model extraction on the target PCB link based on the corrected dissipation factor parameters. That is, the method and the device for correcting the PCB link of the application firstly determine the correction link corresponding to the target PCB link, the correction link does not comprise a device which can cause nonlinear influence on the link, the correction link is subjected to model extraction, and the corrected dissipation factor parameter is based on the correction, and finally the target PCB link is subjected to model extraction based on the corrected dissipation factor parameter, wherein the dissipation factor parameter is a key parameter in simulation parameters, so that the accuracy of the simulation parameters can be improved, and the accuracy of model extraction and the accuracy of link design evaluation can be improved.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
At present, when a PCB wiring model is extracted, simulation parameters are usually set according to empirical values, then the extracted model is compared with test data of an actual PCB, and if the electrical characteristics of the extracted model are close to actual results, the simulation parameters are reasonably set. If the deviation between the electrical characteristics of the extracted model and the actual results is large, the parameters need to be corrected until the model characteristics are matched with the actual PCB characteristics. However, when the link is complex, errors are easily generated during parameter correction, so that parameter setting of engineers can be misled, and system evaluation risk is increased. Therefore, the application provides a PCB model extraction scheme which can improve the accuracy of simulation parameters, thereby improving the accuracy of model extraction and the accuracy of link design evaluation.
Referring to fig. 1, the embodiment of the application discloses a method for extracting a PCB model, which comprises the following steps:
And step S11, determining a correction link corresponding to the target PCB link, wherein the correction link does not contain a target device in the target PCB link, and the target device is a device capable of causing nonlinear influence on the link.
In a specific embodiment, a correction link corresponding to the target PCB link may be determined from existing PCB links, where electronic components connected to a target device in the target PCB link are directly connected to the correction link through signal lines, and remaining electronic components and traces in the target PCB link are consistent with the correction link.
In another specific embodiment, the target device may be removed from the target PCB link to obtain the correction link.
Wherein the target device may include, but is not limited to, a capacitor and an electrostatic impeder.
That is, a PCB link similar to the target PCB link to be emulated may be selected from existing PCB links, but that link does not contain a target device, such as a capacitive device. If the system does not have the link, the capacitor can be deleted on the basis of the target PCB link for parameter correction, and after the parameter correction is completed, model extraction is performed on the basis of the original target PCB link.
And step S12, carrying out model extraction on the correction link based on the dissipation factor parameter to obtain a corresponding model extraction result.
And step S13, correcting the dissipation factor parameter based on the model extraction result to obtain a corrected dissipation factor parameter.
It will be appreciated that the dissipation factor parameter is a parameter that has a greater impact on the link loss value. Devices such as capacitors or electrostatic impedances can have a nonlinear effect on the link and thus affect the correction of this parameter. Eliminating the capacitance or electrostatic impedance device can avoid error in correcting the parameter.
And step S14, extracting a model of the target PCB link based on the corrected dissipation factor parameter.
It can be seen that, in the embodiment of the present application, a correction link corresponding to a target PCB link is first determined, where the correction link does not include a target device in the target PCB link, and the target device is a device capable of causing a nonlinear effect on the link, and then model extraction is performed on the correction link based on dissipation factor parameters to obtain a corresponding model extraction result, and the dissipation factor parameters are corrected based on the model extraction result to obtain corrected dissipation factor parameters, and finally model extraction is performed on the target PCB link based on the corrected dissipation factor parameters. That is, the method and the device for correcting the PCB link of the application firstly determine the correction link corresponding to the target PCB link, the correction link does not comprise a device which can cause nonlinear influence on the link, the correction link is subjected to model extraction, and the corrected dissipation factor parameter is based on the correction, and finally the target PCB link is subjected to model extraction based on the corrected dissipation factor parameter, wherein the dissipation factor parameter is a key parameter in simulation parameters, so that the accuracy of the simulation parameters can be improved, and the accuracy of model extraction and the accuracy of link design evaluation can be improved.
Referring to fig. 2, the embodiment of the application discloses a specific PCB model extraction method, which includes:
And step S21, determining a correction link corresponding to the target PCB link, wherein the correction link does not contain a target device in the target PCB link, and the target device is a device capable of causing nonlinear influence on the link.
And S22, carrying out model extraction on the correction link based on the dissipation factor parameter to obtain a corresponding model extraction result.
And S23, determining a simulation link loss value based on the model extraction result.
In a specific embodiment, a simulated link loss value corresponding to the target key frequency point may be determined based on the model extraction result.
And S24, comparing the simulated link loss value with the actual link loss value of the correction link to obtain a comparison result, wherein the comparison result comprises a magnitude relation and a difference value between the simulated link loss value and the actual link loss value.
And S25, if the difference value is larger than a preset threshold value, adjusting the dissipation factor parameter based on the size relation and the difference value, and performing model extraction on the correction link again based on the adjusted dissipation factor parameter until the difference value is smaller than or equal to the preset threshold value, and determining the current dissipation factor parameter as the corrected dissipation factor parameter.
That is, if the difference is greater than the preset threshold, the dissipation factor parameter is adjusted based on the magnitude relation and the difference, and then step S23 is skipped until the difference is less than or equal to the preset threshold, and the current dissipation factor parameter is determined as the corrected dissipation factor parameter.
In a specific embodiment, the dissipation factor parameter may be adjusted down based on the difference if the magnitude relation is that the simulated link loss value is greater than the actual link loss value, and the dissipation factor parameter may be adjusted up based on the difference if the magnitude relation is that the simulated link loss value is less than the actual link loss value.
Specifically, based on the difference, how much to turn up or down is determined empirically, or based on a preset mapping relationship.
And S26, extracting a model of the target PCB link based on the corrected dissipation factor parameter.
For example, referring to fig. 3, fig. 3 is a schematic diagram of a specific target PCB link according to an embodiment of the present application. The signal line is led out from the CPU0 and then is changed to the inner layer L16 layer, and is connected with the capacitor device from the topological middle bit replacement layer to the surface layer, and then is changed to the L16 layer until being interconnected with the CPU 1. When the link is extracted, whether the loss characteristic of the extracted model is matched with the actual loss characteristic of the link or not needs to be considered, and when the simulation data deviate from the actual data, the simulation parameters need to be corrected to finally enable the simulation data to be matched with the actual data. The measured loss data of the link corresponding to the PCB laminate is first found, and the data is generally tested by a PCB factory based on a test board, wherein the type of a signal line on the test board is consistent with that of the CPU interconnection signal line, but the data does not contain a capacitor device. Referring to the measured loss values of the CPU interconnect signal lines as shown in fig. 4, fig. 4 is a schematic diagram of actual link loss according to an embodiment of the present application.
One important parameter affecting link loss when extracting the link model is the Df (i.e., dissipation factor) value, a characteristic of the loss of material to signal that is proportional to PCB loss. When the simulation link loss value of the extracted model is larger than the actual link loss value, the DF value can be adjusted to be smaller when the model is extracted, when the simulation link loss value of the extracted model is smaller than the actual link loss value, the DF value can be adjusted to be larger when the model is extracted, the simulation link loss value of the extracted model is finally matched with the actual link loss value, and specifically, the difference value of the key frequency points is smaller than a preset threshold value and is smaller than or equal to 0.5 db. During model extraction, a relatively reasonable Df value is usually set empirically, and then the simulated link loss value is compared with the actual link loss, so that the Df value is corrected. In this example, the Df parameter is empirically set to 0.004. Model extraction is performed based on this parameter, and the resulting link loss curve is shown in fig. 5. Fig. 5 is a schematic diagram of a specific simulated link loss curve according to an embodiment of the present application. The loss curve in fig. 5 corresponds to the loss of the entire link, including the PCB trace, via, and capacitance.
Further, referring to fig. 6, fig. 6 is a schematic diagram of specific actual loss provided by the embodiment of the present application, and fig. 6 shows loss values of a single via and capacitor at various frequency points. And analyzing whether the corresponding simulated link loss value is matched with the actual link loss value or not by estimating data at two frequency points of 8GHz and 12.89 Hz. As can be seen from fig. 3, the link has a total of 4 vias, 1 capacitor, and a PCB trace of 14inch length, and the theoretical actual link loss at 8GHz is about-4 x 0.3-0.3-14 x 0.6 = -9.9db. The actual link loss at 12.89GHz is about-4 x 0.4-0.4-14 x 0.84 = -13.76db. And the link simulation loss at 8GHz is-11.257 db, and the link simulation loss at 12.89GHz is-13.05 db. From this comparison, it can be seen that the simulated link loss value is greater than the actual link loss value at 8GHz and less than the actual link loss value at 12.89 GHz. This results in that the simulation and measured data cannot be fit well at each frequency point, regardless of how the Df value is adjusted.
The main reason for this is that there are capacitive devices in the link, which can have nonlinear effects on the link, and thus affect the fitting of the simulation and the actual measurement. To eliminate the effect of capacitance, the simulation parameters are better fitted by first removing the capacitance from the link, creating a corrected link, as shown in FIG. 7. Fig. 7 is a schematic diagram of a specific correction link according to an embodiment of the present application. The link loss curve obtained by extracting the model based on the correction link is shown in fig. 8, and fig. 8 is a schematic diagram of a specific simulated link loss curve provided by the embodiment of the application. The model extraction was analyzed for matching with the measured values by evaluating the data at both frequency points of 8GHz and 12.89 Hz. The links in fig. 7 have a total of 2 vias and a14 inch length PCB trace, with an actual link loss at 8GHz of about-2 x 0.3-14 x 0.6 = -9db. The actual link total loss at 12.89GHz is about-2 x 0.4-14 x 0.84 = -12.56db. Whereas the simulated link loss at 8GHz is-8.13 db and the simulated link loss at 12.89GHz is-11.16 db. From analysis, the simulated link loss is smaller than the actual link total loss at two frequency points of 8GHz and 12.89Hz, and the simulated df parameter needs to be increased and set to be 0.0055.
Further, model extraction is performed again based on the corrected Df value, and the obtained link loss curve is shown in fig. 9. Fig. 9 is a schematic diagram of a specific simulated link loss curve according to an embodiment of the present application. The simulation link loss after parameter correction is-9.1db@8GHz and-12.46db@12.89GHz, and is basically matched with the actual link loss of-9 db@8GHz and-12.56db@12.89GHz, so that the parameter setting is reasonable, and the simulation link loss simulation device can be applied to simulation of an actual link with a capacitor. That is, model extraction is performed on the target PCB link based on the parameter. Therefore, the system simulation evaluation accuracy is improved, and the link design quality is improved.
Referring to fig. 10, an embodiment of the present application discloses a PCB model extraction apparatus, including:
A correction link determining module 11, configured to determine a correction link corresponding to a target PCB link, where the correction link does not include a target device in the target PCB link, and the target device is a device that can cause a nonlinear effect on the link;
a correction link model extraction module 12, configured to perform model extraction on the correction link based on dissipation factor parameters, so as to obtain a corresponding model extraction result;
The dissipation factor parameter correction module 13 is configured to correct the dissipation factor parameter based on the model extraction result, so as to obtain a corrected dissipation factor parameter;
a target link model extraction module 14 for performing model extraction on the target PCB link based on the corrected dissipation factor parameter.
It can be seen that, in the embodiment of the present application, a correction link corresponding to a target PCB link is first determined, where the correction link does not include a target device in the target PCB link, and the target device is a device capable of causing a nonlinear effect on the link, and then model extraction is performed on the correction link based on dissipation factor parameters to obtain a corresponding model extraction result, and the dissipation factor parameters are corrected based on the model extraction result to obtain corrected dissipation factor parameters, and finally model extraction is performed on the target PCB link based on the corrected dissipation factor parameters. That is, the method and the device for correcting the PCB link of the application firstly determine the correction link corresponding to the target PCB link, the correction link does not comprise a device which can cause nonlinear influence on the link, the correction link is subjected to model extraction, and the corrected dissipation factor parameter is based on the correction, and finally the target PCB link is subjected to model extraction based on the corrected dissipation factor parameter, wherein the dissipation factor parameter is a key parameter in simulation parameters, so that the accuracy of the simulation parameters can be improved, and the accuracy of model extraction and the accuracy of link design evaluation can be improved.
The dissipation factor parameter correction module 13 specifically includes:
the simulation link loss value determining submodule is used for determining a simulation link loss value based on the model extraction result;
The link loss value comparison sub-module is used for comparing the simulated link loss value with the actual link loss value of the correction link to obtain a comparison result, wherein the comparison result comprises a magnitude relation and a difference value between the simulated link loss value and the actual link loss value;
and the parameter adjustment sub-module is configured to adjust the dissipation factor parameter based on the magnitude relation and the difference value if the difference value is greater than a preset threshold value, and start the correction link model extraction module 12 based on the adjusted dissipation factor parameter until the difference value is less than or equal to the preset threshold value, and determine the current dissipation factor parameter as the corrected dissipation factor parameter.
The parameter adjustment sub-module is specifically configured to adjust the dissipation factor parameter based on the difference value if the magnitude relation is that the simulated link loss value is greater than the actual link loss value, and adjust the dissipation factor parameter based on the difference value if the magnitude relation is that the simulated link loss value is less than the actual link loss value.
In a specific embodiment, the correction link determining module 11 is specifically configured to remove the target device from the target PCB link, so as to obtain the correction link.
In another specific embodiment, the correction link determining module 11 is specifically configured to determine, from existing PCB links, a correction link corresponding to the target PCB link;
The electronic components connected with the target device in the target PCB link are directly connected with the correction link through signal wires, and the other electronic components and wires in the target PCB link are consistent with the correction link.
Further, the simulation link loss value determining submodule is specifically configured to determine a simulation link loss value corresponding to the target key frequency point based on the model extraction result.
And, the target device includes a capacitor and an electrostatic resistor.
Referring to fig. 11, an embodiment of the present application discloses an electronic device 20, which includes a processor 21 and a memory 22, wherein the memory 22 is used for storing a computer program, and the processor 21 is used for executing the computer program, and the computer program when executed by the processor implements the PCB model extraction method disclosed in the foregoing embodiment.
For the specific process of the above PCB model extraction method, reference may be made to the corresponding content disclosed in the foregoing embodiment, and no further description is given here.
The memory 22 may be a carrier for storing resources, such as a read-only memory, a random access memory, a magnetic disk or an optical disk, and the storage mode may be transient storage or permanent storage.
In addition, the electronic device 20 further includes a power supply 23, a communication interface 24, an input/output interface 25, and a communication bus 26, where the power supply 23 is configured to provide working voltages for each hardware device on the electronic device 20, the communication interface 24 is capable of creating a data transmission channel between the electronic device 20 and an external device, and the communication protocol to be followed by the communication interface is any communication protocol applicable to the technical solution of the present application, and is not specifically limited herein, and the input/output interface 25 is configured to obtain external input data or output data to the external device, and a specific interface type thereof may be selected according to specific application needs and is not specifically limited herein.
Further, the embodiment of the application also discloses a computer readable storage medium for storing a computer program, wherein the computer program is executed by a processor to realize the PCB model extraction method disclosed in the previous embodiment.
For the specific process of the above PCB model extraction method, reference may be made to the corresponding content disclosed in the foregoing embodiment, and no further description is given here.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, so that the same or similar parts between the embodiments are referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The foregoing describes the method, apparatus, device and medium for extracting a PCB model, and specific examples are provided herein to illustrate the principles and embodiments of the application, and the above examples are only for aiding in understanding of the method and core concept of the application, and meanwhile, the disclosure should not be construed as limiting the application to any extent by those skilled in the art, based on the concept of the application, as long as the specific embodiments and application range are varied.