CN113808521A - Pixel circuit, display panel and driving method of pixel circuit - Google Patents

Abstract

The invention discloses a pixel circuit, a display panel and a driving method of the pixel circuit. The pixel circuit comprises a driving module, a compensation module, an initialization module, a first light-emitting control module, a data writing module and a second light-emitting control module. The compensation module is connected between the first end and the control end of the driving module and used for responding to the first light-emitting control signal to conduct in an initialization stage, a compensation stage and a data writing stage, and the driving module carries out threshold compensation through the conducted compensation module in the compensation stage. The initialization module is electrically connected with the compensation module and used for responding to the second light-emitting control signal in the initialization stage to be conducted, and the initialization voltage signal is written into the control end of the driving module through the compensation module. Compared with the prior art, the display uniformity is improved, and the display image quality is further improved.

Description

Pixel circuit, display panel and driving method of pixel circuit

Technical Field

The embodiment of the invention relates to the technical field of display, in particular to a pixel circuit, a display panel and a driving method of the pixel circuit.

Background

With the development of display technology, the high resolution and high frequency display requirements of display panels are higher and higher for panel manufacturers and consumers. However, the problem of incomplete compensation function of the display panel is caused as the refresh frequency is increased.

Specifically, in the conventional pixel circuit, during driving, threshold compensation is set in the same period as data writing, and the duration of the period is determined by the effective time of the scanning signal. However, since the higher the refresh frequency of the scan signal is, the shorter the effective time thereof is, the compensation function of the display panel is not complete with the increase of the refresh frequency, and the display is not uniform.

Disclosure of Invention

The invention provides a pixel circuit, a display panel and a driving method of the pixel circuit, which are used for improving the display uniformity and improving the display image quality.

In a first aspect, an embodiment of the present invention provides a pixel circuit, including:

the driving module comprises a control end, a first end and a second end, and is used for responding to the voltage of the control end to generate driving current and driving the light-emitting module to emit light;

the compensation module is connected between the first end and the control end of the driving module and used for responding to the first light-emitting control signal to conduct in an initialization stage, a compensation stage and a data writing stage, and the driving module conducts threshold compensation through the conducted compensation module in the compensation stage; the initialization phase, the compensation phase and the data writing phase are characterized by the driving time sequence of the pixel circuit in a working period;

the initialization module is electrically connected with the compensation module and used for responding to a second light-emitting control signal to be conducted in the initialization stage and writing an initialization voltage signal into the control end of the driving module through the compensation module;

the first light-emitting control module is electrically connected with the second end of the driving module and used for responding to the second light-emitting control signal in the initialization stage and the light-emitting stage to be conducted and writing a first power supply signal into the second end of the driving module;

the data writing module is electrically connected with the second end of the driving module and used for responding to a scanning signal to be conducted in the data writing stage and writing a data signal into the control end of the driving module through the compensation module;

and the second light-emitting control module is connected between the first end of the driving module and the light-emitting module and used for responding to the first light-emitting control signal in a light-emitting stage to be conducted so as to enable the driving current to flow into the light-emitting module.

Optionally, the compensation module includes a first transistor and a second transistor;

a first pole of the first transistor is connected with the control end of the driving module, a first pole of the second transistor is connected with a second pole of the first transistor, and a second pole of the second transistor is connected with the first end of the driving module;

the grid electrode of the first transistor and the grid electrode of the second transistor are both connected with the first light-emitting control signal;

optionally, the first transistor and the second transistor are both N-type transistors.

Optionally, the initialization module includes a third transistor, a first pole of the third transistor is connected to the initialization voltage signal, a second pole of the third transistor is connected to the compensation module, and a gate of the third transistor is connected to the second light emission control signal;

optionally, the third transistor is a P-type transistor.

Optionally, the first light-emitting control module includes a fourth transistor, and the second light-emitting control module includes a fifth transistor;

a first pole of the fourth transistor is connected to a first power supply signal, a second pole of the fourth transistor is connected to the second end of the driving module, and a gate of the fourth transistor is connected to the second light-emitting control signal;

a first pole of the fifth transistor is connected with the first end of the driving module, a second pole of the fifth transistor is connected with the light emitting module, and a grid electrode of the fifth transistor is connected with the first light emitting control signal;

optionally, the fourth transistor and the fifth transistor are both P-type transistors.

Optionally, the driving module includes a sixth transistor, a first pole of the sixth transistor is connected to the first light emission control module, a second pole of the sixth transistor is connected to the compensation module, a second pole of the sixth transistor is further connected to the second light emission control module, and a gate of the sixth transistor is connected to the compensation module;

optionally, the sixth transistor is a P-type transistor.

Optionally, the data writing module includes a seventh transistor, a first pole of the seventh transistor is connected to the data signal, a second pole of the seventh transistor is connected to the second end of the driving module, and a gate of the seventh transistor is connected to the scan signal;

optionally, the seventh transistor is a P-type transistor.

Optionally, the pixel circuit includes a storage module, and the storage module is connected to the control end of the driving module and is configured to store a voltage of the control end of the driving module;

optionally, the storage module includes a storage capacitor, a first end of the storage capacitor is connected to the first power signal, and a second end of the storage capacitor is connected to the control end of the driving module.

In a second aspect, an embodiment of the present invention further provides a display panel, where the display panel includes the pixel circuit described in any one of the first aspects.

In a third aspect, an embodiment of the present invention further provides a driving method for a pixel circuit, where the pixel circuit includes a driving module, a compensation module, an initialization module, a first light-emitting control module, a data writing module, a second light-emitting control module, and a light-emitting module; the driving method of the pixel circuit comprises an initialization stage, a compensation stage, a data writing stage and a light emitting stage;

in the initialization phase, the compensation module is conducted in response to a first light-emitting control signal, the initialization module and the first light-emitting control module are conducted in response to a second light-emitting control signal, the initialization module writes an initialization voltage into the control end of the drive module through the conducted compensation module, and the first light-emitting control module writes a first power supply signal into the second end of the drive module;

in the compensation phase, the compensation module is conducted in response to a first light-emitting control signal, and the driving module conducts threshold compensation through the conducted compensation module;

in the data writing phase, the compensation module is conducted in response to the first light-emitting control signal, the data writing module is conducted in response to a scanning signal, and the data writing module writes a data signal into a control end of the driving module through the conducted driving module and the conducted compensation module;

in the light-emitting stage, the first light-emitting control module is turned on in response to the second light-emitting control signal, the second light-emitting control module is turned on in response to the first light-emitting control signal, and the driving module generates a driving current in response to a voltage at a control end of the driving module to drive the light-emitting module to emit light.

Optionally, the first light-emitting control signal and the second light-emitting control signal are defined to be valid when at a first level, the scan signal is defined to be valid when at a second level, and the first level and the second level are opposite;

wherein, the effective time intervals of the first and the second light-emitting control signals have an overlapping interval, and the effective time interval of the scanning signal is within the overlapping interval; the start time of the effective time interval of the scanning signal is adjustable.

The embodiment of the invention provides a novel pixel circuit structure, and the pixel circuit comprises a driving module, a compensation module, an initialization module, a first light-emitting control module, a data writing module and a second light-emitting control module. The pixel circuit is controlled by a first light emission control signal, a second light emission control signal, and a scan signal. Specifically, the compensation module is connected between the first end and the control end of the driving module, and is configured to be turned on in response to the first light-emitting control signal in an initialization stage, a compensation stage, and a data writing stage, and in the compensation stage, the driving module performs threshold compensation through the turned-on compensation module. The initialization module is electrically connected with the compensation module and used for responding to the second light-emitting control signal in the initialization stage to be conducted, and the initialization voltage signal is written into the control end of the driving module through the compensation module. The first light-emitting control module is electrically connected with the second end of the driving module and used for responding to the second light-emitting control signal in the initialization stage and the light-emitting stage to be conducted and writing the first power supply signal into the second end of the driving module. Therefore, unlike the prior art in which the compensation time is controlled by the effective time of the scan signal, the pixel circuit provided in the embodiment of the invention can separate the compensation phase from the data writing phase, and can control the time duration of the compensation phase by using the start time of the scan signal. Therefore, when the threshold compensation is performed on the driving module, the threshold compensation method is not limited by the high refresh frequency, and is beneficial to fully writing the data signal into the control end of the driving module within a limited time, so that the threshold voltage is fully compensated, the display uniformity is improved, and the display image quality is improved.

Drawings

Fig. 1 is a schematic structural diagram of a pixel circuit in the prior art;

fig. 2 is a timing chart of a pixel circuit of the related art;

fig. 3 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;

FIG. 4 is a timing diagram of a pixel circuit according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;

fig. 7 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;

fig. 8 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;

fig. 9 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;

fig. 10 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention;

fig. 11 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention;

fig. 12-15 are schematic diagrams illustrating the conducting states of the transistors of the pixel circuit at various stages according to the embodiment of the invention;

fig. 16 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention;

fig. 17 is a comparison diagram of compensation phase adjustment of a pixel circuit according to an embodiment of the invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

As described in the background art, the conventional pixel circuit has an incomplete compensation function, and has a problem of non-uniform display of the display panel. The inventors have found, through their studies, that the reason for this problem is as follows.

Fig. 1 is a schematic structural diagram of a conventional pixel circuit, fig. 2 is a timing diagram of a conventional pixel circuit, and the timing diagram of fig. 2 can be applied to the pixel circuit shown in fig. 1. The pixel circuit comprises a driving transistor MD, a first switching tube M1, a second switching tube M2, a third switching tube M3, a fourth switching tube M4, a fifth switching tube M5, a capacitor C0 and a light-emitting device D1. Illustratively, the driving transistor MD, the first switching tube M1, the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 are all P-type transistors. Illustratively, the driving timing of the pixel circuit is:

in the first period t11, i.e. the initialization stage, only the first scan signal S1 is at a low level, the third switch tube M3 is turned on, and the initialization voltage signal Vref is written into the gate of the driving transistor MD through the third switch tube M3. Wherein the voltage of the initialization voltage signal Vref is low compared to the data signal to ensure that the driving transistor MD is turned on.

In the second period t22, namely the data writing and threshold compensation stage, only the second scan signal S2 is at a low level, the first switch transistor M1 and the second switch transistor M2 are turned on, and the data signal Vdata is written to the control terminal of the driving transistor MD through the first switch transistor M1, the driving transistor MD and the second switch transistor M2, so that the voltage at the control terminal of the driving transistor MD is Vdata- | Vth |, and Vth is the threshold voltage of the driving transistor MD, thereby implementing the data signal writing and threshold compensation. Since the gate voltage of the driving transistor MD is low and the writing time of the data signal Vdata is long, the data signal Vdata can be written sufficiently only when the time of the second period t22 is long enough, and the threshold compensation is complete.

In the third time period t33, i.e., the light emitting period, only the light emitting control signal EM is at the low level, and the fourth switching tube M4 and the fifth switching tube M5 are turned on. At this time, the driving transistor MD generates a driving current in response to its gate voltage, driving the light emitting device D1 to emit light.

As can be seen from the above process, both the data writing and the threshold compensation of the driving transistor MD occur in the second period t22, and the duration of the period is determined by the active pulse time (low level time) of the second scan signal S2. However, since the output characteristics of the GIP circuit indicate that the pulse widths of the first scan signal S1 and the second scan signal S2 are equal, and as the refresh frequency increases, the effective pulse time of the first scan signal S1 and the second scan signal S2 is shortened, which results in insufficient threshold compensation, resulting in non-uniform light emission of the light emitting device D1 and affecting the display quality.

For the above reasons, embodiments of the present invention provide a pixel circuit to prolong the threshold compensation time, improve the display uniformity, and improve the display quality of the display panel. Fig. 3 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention. Referring to fig. 3, the pixel circuit includes:

thedriving module 100 includes a control terminal G, a first terminal a1 and a second terminal a2, and thedriving module 100 is configured to generate a driving current in response to a voltage of the control terminal G and drive thelight emitting module 200 to emit light.

Thecompensation module 300 is connected between the first terminal a1 and the control terminal G of thedriving module 100, and is configured to be turned on in response to the first light-emitting control signal EM1 during an initialization phase, a compensation phase, and a data writing phase, wherein thedriving module 100 performs threshold compensation through the turned-oncompensation module 300 during the compensation phase. The initialization phase, the compensation phase and the data writing phase are characterized by the driving timing of the pixel circuit in a working period.

Theinitialization module 400 is electrically connected to thecompensation module 300, and configured to turn on in response to the second emission control signal EM2 in the initialization phase, and write an initialization voltage signal Vref into the control terminal G of thedriving module 100 through thecompensation module 300.

The first light emittingcontrol module 500 is electrically connected to the second terminal a2 of thedriving module 100, and is configured to be turned on in response to the second light emitting control signal EM2 during the initialization phase and the light emitting phase, so as to write the first power signal VDD into the second terminal a2 of thedriving module 100.

Thedata writing module 600 is electrically connected to the second terminal a2 of thedriving module 100, and is configured to turn on in response to the scan signal SC during a data writing phase, and write the data signal Vdata into the control terminal G of thedriving module 100 through thecompensation module 300.

The second lightemission control module 700 is connected between the first end a1 of thedriving module 100 and thelight emitting module 200, and is turned on in response to the first light emission control signal EM1 during a light emission phase, so that a driving current flows into thelight emitting module 200.

Fig. 4 is a timing diagram of a pixel circuit according to an embodiment of the invention, and the timing diagram of fig. 4 can be applied to the pixel circuit shown in fig. 3. Referring to fig. 3 and 4, the pixel circuit operation process may include four stages, an initialization stage t1, a compensation stage t2, a data writing stage t3, and a light emitting stage t4, as an example.

In the initialization phase t1, the first emission control signal EM1 controls thecompensation module 300 to be turned on, the second emission control signal EM2 controls theinitialization module 400 and the firstemission control module 500 to be turned on, and the data writemodule 600 and the secondemission control module 700 are turned off at this phase. The initialization voltage signal Vref is written into the control terminal G of thedriving module 100 through theinitialization module 400 and thecompensation module 300, the first power signal VDD is written into the second terminal a2 of thedriving module 100 through the firstlighting control module 500, and initialization of the control terminal G and the second terminal a2 of thedriving module 100 is achieved in the initialization phase t 1. Illustratively, the first power signal VDD is a positive voltage and the initialization voltage signal Vref is a negative voltage.

In the compensation phase t2, the first lighting control signal EM1 continues to control thecompensation module 300 to be turned on, and the firstlighting control module 500, theinitialization module 400, the data writemodule 600, and the secondlighting control module 700 are turned off at this phase. At the end of the initialization period t1, that is, at the beginning of the compensation period t2, the voltage at the second terminal a2 of thedriving module 100 is the first power signal VDD (e.g., a positive voltage), the voltage at the control terminal G of thedriving module 100 is the initialization voltage signal Vref (e.g., a negative voltage), and a large voltage difference exists between the second terminal a2 and the control terminal G of thedriving module 100. Due to the balanced characteristics of the driving module 100 (e.g., the driving transistors), thedriving module 100 is balanced to a stable state when not powered. Taking thedriving module 100 as a P-type transistor as an example, the second terminal a2 of thedriving module 100 continues to charge the control terminal G through the turned-oncompensation module 300 until thedriving module 100 reaches an equilibrium state and the charging stops. That is, when the voltage of the control terminal G minus the voltage of the second terminal a2 is- | Vth |, thedriving module 100 reaches an equilibrium state, where Vth is the threshold voltage of thedriving module 100.

In the data writing phase t3, the first emission control signal EM1 continues to control thecompensation module 300 to be turned on, the scan signal SC controls thedata writing module 600 to be turned on, and the firstemission control module 500, theinitialization module 400, and the secondemission control module 700 are turned off at this phase. The data signal Vdata is written into the control terminal G of thedriving module 100 through thedata writing module 600, thedriving module 100 and thecompensation module 300. Since the process of threshold compensation has been completed in the compensation phase t2, threshold compensation is not required in the data writing phase t3, and thus, the time required for the data writing phase t3 is short.

In the lighting phase t4, the second lighting control signal EM2 controls the firstlighting control module 500 and theinitialization module 400 to be turned on, the first lighting control signal EM1 controls the secondlighting control module 700 to be turned on, and thecompensation module 300 and thedata writing module 600 are turned off at this phase. The first power signal VDD is written into the second terminal a2 of thedriving module 100 through the firstlighting control module 500, and thedriving module 100 generates a driving current according to the voltages of the control terminal G and the second terminal a2 thereof to drive thelighting module 200 to emit light.

From the above process, compared with the prior art, the pixel circuit of the present embodiment adds the compensation phase t2 before the data writing phase t 3. Illustratively, the transistors in thedriving module 100 are P-type transistors, and during the compensation phase t2, the voltage at the control terminal G is continuously raised from Vref, and the voltage reaches the voltage V0 when the equilibrium state is reached, whereas in the prior art, after the initialization phase t1 is over, the voltage at the control terminal G of thedriving module 100 is the initialization voltage signal Vref, and V0> Vref. In the data writing phase t3, whether the prior art or the embodiment of the present invention, the data signal Vdata is written into the control terminal of thedriving module 100, so that the voltage of the control terminal G is finally Vdata- | Vth |. However, in the prior art, the voltage of the control terminal G is charged from Vref to Vdata- | Vth |, and in the present embodiment, the voltage of the control terminal G is charged from V0 to Vdata- | Vth |, since V0> Vref, the time required for raising the voltage of the control terminal G to Vdata- | Vth | in the data writing phase t3 in the present embodiment is shorter than that in the prior art, and the data writing of the embodiment of the present invention is more sufficient in the same time.

As can be seen from the above analysis, the start time of the compensation phase t2 is when the second emission control signal EM2 changes from low level to high level, and the end time of the compensation phase t2 is when the scan signal SC changes from high level to low level, so that the time of the compensation phase t2 can be shortened by adjusting the scan signal SC to move left, and the time of the compensation phase t2 can be prolonged by adjusting the scan signal SC to move right.

In summary, embodiments of the present invention provide a novel pixel circuit structure, where the pixel circuit includes a driving module, a compensation module, an initialization module, a first light-emitting control module, a data writing module, and a second light-emitting control module, and the pixel circuit is controlled by a first light-emitting control signal, a second light-emitting control signal, and a scan signal. Unlike the prior art in which the compensation time is controlled by the effective time of the scan signal, the pixel circuit provided in the embodiment of the present invention separates the compensation phase from the data writing phase, and can control the time duration of the compensation phase by using the start time of the scan signal. Therefore, when the threshold compensation is performed on the driving module, the embodiment of the invention is not limited by high refresh frequency, and is beneficial to fully writing the data signal into the control end of the driving module within a limited time, thereby realizing the full compensation of the threshold voltage, improving the display uniformity and further improving the display image quality.

Fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 5, on the basis of the above embodiments, optionally, thecompensation module 100 includes a first transistor T1 and a second transistor T2. The first electrode of the first transistor T1 is connected to the control terminal G of thedriving module 100, the first electrode of the second transistor T2 is connected to the second electrode of the first transistor T1, and the second electrode of the second transistor T2 is connected to the first terminal a1 of thedriving module 100. The gate of the first transistor T1 and the gate of the second transistor T2 are both connected to the first emission control signal EM 1.

Illustratively, the first transistor T1 and the second transistor T2 operate in a principle that the gates of the first transistor T1 and the second transistor T2 are both connected to the first emission control signal EM1, that is, the turn-on time of the first transistor T1 and the turn-on time of the second transistor T2 are controlled by the first emission control signal EM 1. The first transistor T1 and the second transistor T2 are turned on during the initialization phase, so that the initialization voltage signal Vref is written into the control terminal G of thedriving module 100 through the first transistor T1. The first transistor T1 and the second transistor T2 are also in a conducting state during the compensation phase, and the voltage at the second terminal a2 of thedriving module 100 continues to charge the control terminal G of thedriving module 100 through the first transistor T1 and the second transistor T2, so as to raise the voltage at the control terminal G. The first transistor T1 and the second transistor T2 are still in a conducting state during the data writing phase, so that the data signal Vdata is written into the control terminal G of thedriving module 100 sequentially through thedriving module 100, the second transistor T2 and the first transistor T1.

Optionally, the first transistor T1 and the second transistor T2 are both N-type transistors. The first emission control signal EM1 is at a low level to control the first transistor T1 and the second transistor T2 to be turned off, and the first emission control signal EM1 is at a high level to control the first transistor T1 and the second transistor T2 to be turned on.

Fig. 6 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 6, on the basis of the above embodiments, optionally, theinitialization module 400 includes a third transistor T3, a first pole of the third transistor T3 is connected to the initialization voltage signal Vref, a second pole of the third transistor T3 is connected to thecompensation module 300, and a gate of the third transistor T3 is connected to the second emission control signal EM 2.

Illustratively, the third transistor T3 operates on the principle that the gate of the third transistor T3 is connected to the second emission control signal EM2, i.e., the on-time of the third transistor T3 is controlled by the second emission control signal EM 2. The third transistor T3 is turned on during the initialization phase, so that the initialization voltage signal Vref is written into the control terminal G of thedriving module 100 through the turned-oncompensation module 300.

Optionally, the third transistor T3 is a P-type transistor, the second emission control signal EM2 is at a low level, and the third transistor T3 is controlled to be turned on; the second emission control signal EM2 is at a high level, and controls the third transistor T3 to be turned off.

Fig. 7 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 7, on the basis of the above embodiments, optionally, the first lightemission control module 500 includes a fourth transistor T4, and the second lightemission control module 700 includes a fifth transistor T5. A first electrode of the fourth transistor T4 is connected to the first power signal VDD, a second electrode of the fourth transistor T4 is connected to the second terminal a2 of thedriving module 100, and a gate of the fourth transistor T4 is connected to the second emission control signal EM 2. A first pole of the fifth transistor T5 is connected to the first end a1 of thedriving module 100, a second pole of the fifth transistor T5 is connected to thelight emitting module 200, and a gate of the fifth transistor T5 is connected to the first light emitting control signal EM 1.

Illustratively, the fourth transistor T4 and the fifth transistor T5 operate on the principle that the gate of the fourth transistor T4 is connected to the second emission control signal EM2, and the gate of the fifth transistor T5 is connected to the first emission control signal EM1, that is, the on-time of the fourth transistor T4 is controlled by the second emission control signal EM2, and the on-time of the fifth transistor T5 is controlled by the first emission control signal EM 1. The fourth transistor T4 is turned on during the initialization period, and the first power signal VDD is written into the second terminal a2 of thedriving module 100 through the turned-on fourth transistor T4. The fourth transistor T4 and the fifth transistor T5 are turned on during the lighting phase, the first power signal VDD is written into the second terminal a2 of thedriving module 100 through the turned-on fourth transistor T4, thedriving module 100 generates a driving current according to the voltages of the control terminal G and the second terminal a2, and the driving current flows into thelighting module 200 through the fifth transistor T5, thereby lighting thelighting module 200.

Optionally, the fourth transistor T4 and the fifth transistor T5 are both P-type transistors, and the second light emission control signal EM2 is at a low level to control the fourth transistor T4 to be turned on; the second emission control signal EM2 is at a high level, and controls the fourth transistor T4 to be turned off. The first light emitting control signal EM1 is at a low level, and controls the fifth transistor T5 to be turned on; the first emission control signal EM1 is at a high level, and controls the fifth transistor T5 to turn off.

Fig. 8 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention, and referring to fig. 8, based on the above embodiments, optionally, the data writing module includes a seventh transistor T7, a first pole of the seventh transistor T7 is connected to the data signal Vdata, a second pole of the seventh transistor T7 is connected to the second end a2 of thedriving module 100, and a gate of the seventh transistor T7 is connected to the scan signal SC.

Illustratively, the seventh transistor T7 operates on the principle that the gate of the seventh transistor T7 is connected to the scan signal SC, i.e., the turn-on time of the seventh transistor T7 is controlled by the scan signal SC. The seventh transistor T7 is turned on during the data writing phase, so that the data signal Vdata is written into the control terminal G of thedriving module 100.

Optionally, the seventh transistor T7 is a P-type transistor, the scan signal SC is at a low level, and the seventh transistor T7 is controlled to be turned on; the scan signal SC is high, and controls the seventh transistor T7 to be turned off.

Fig. 9 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 9, on the basis of the above embodiments, optionally, thedriving module 100 includes a sixth transistor T6, a first pole of the sixth transistor T6 is connected to the first light emittingcontrol module 500, a second pole of the sixth transistor T6 is connected to thecompensation module 300, a second pole of the sixth transistor T6 is further connected to the second light emittingcontrol module 700, and a gate of the sixth transistor T6 is connected to thecompensation module 300.

Illustratively, the sixth transistor T6 operates on the principle that, in the light emitting stage, thelight emitting module 200 is driven to emit light by forming a driving current according to the voltage of the gate and the first electrode.

Optionally, the sixth transistor is a P-type transistor, and when a voltage difference between the gate of the sixth transistor T6 and the first electrode is lower than- | Vth |, the sixth transistor T6 is turned on. In the initialization stage, an initialization voltage signal Vref is written into the gate of the sixth transistor T6, and the initialization voltage signal Vref is a negative voltage; the first power signal VDD is written into the first pole of the sixth transistor T6, and the first power signal VDD is a positive voltage. The voltage of the initialization voltage signal Vref is much lower than the first power signal VDD, so that the gate voltage of the sixth transistor T6 is much lower than the first voltage of the sixth transistor T6, and the sixth transistor T6 is turned on. In the compensation phase, the turned-on sixth transistor T6 is continuously balanced toward the stable state by the turned-oncompensation module 300; in the data writing phase, the gate of the sixth transistor T6 writes the data signal Vdata to achieve stable Vdata- | Vth |; in the light emitting period, the sixth transistor T6 generates a driving current, and the voltage difference between the gate and the first electrode is Vdata- | Vth | -VDD.

Fig. 10 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 10, on the basis of the above embodiments, optionally, the pixel circuit further includes astorage module 800, where thestorage module 800 is connected to the control terminal G of thedriving module 100, and is used for storing a voltage of the control terminal G of thedriving module 100.

Optionally, thestorage module 800 includes a storage capacitor Cst, a first end of the storage capacitor Cst is connected to the first power signal VDD, and a second end of the storage capacitor Cst is connected to the control end of thedriving module 100. The storage capacitor Cst has a storage function. When the two-pole potential of the storage capacitor Cst is determined, the storage capacitor Cst may store a voltage difference between the two-pole potential.

Fig. 11 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention. On the basis of the above embodiments, optionally, thecompensation module 300 includes the first transistor T1 and the first transistor T2, theinitialization module 400 includes the third transistor T3, the firstlighting control module 500 includes the fourth transistor T4, the secondlighting control module 700 includes the fifth transistor T5, thedriving module 100 includes the sixth transistor T6, and thedata writing module 600 includes the seventh transistor T7. The first transistor T1 and the first transistor T2 are both N-type transistors, and the third transistor T3 to the seventh transistor T7 are all P-type transistors.

Fig. 12-15 are schematic diagrams illustrating the conducting states of the transistors of the pixel circuit at various stages according to the embodiment of the invention. Referring to fig. 12-15, and the timing diagram of fig. 4, the pixel circuit operates as follows:

in the initialization stage T1, as shown in fig. 12, the first emission control signal EM1 and the scan signal SC are both at a high level, the second emission control signal EM2 is at a low level, the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 are turned on, the fifth transistor T5 and the seventh transistor T7 are turned off, and the initialization voltage signal Vref is written into the gate of the sixth transistor T6, i.e., the voltage V of the control terminal G of thedriving module 100, through the third transistor T3 and the first transistor T1_GWhen the first power signal VDD is written to the first pole of the sixth transistor T6 through the fourth transistor T4, i.e., the voltage at the second terminal a2 of thedriving module 100 is V_A2VDD. The initialization phase T1 enables initialization of the gate and the first pole of the sixth transistor T6.

In the compensation stage T2, as shown in fig. 13, the first emission control signal EM1, the scan signal SC, and the second emission control signal EM2 are all at a high level, the first transistor T1 and the second transistor T2 are turned on, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are turned off, the first electrode of the sixth transistor T6 continues to charge the gate of the sixth transistor T6 through the second electrode, the second transistor T2, and the first transistor T1, and the potential of the gate is raised until the sixth transistor T6 reaches a balanced state. When the sixth transistor T6 reaches the equilibrium state, the gate voltage minus the voltage of the first electrode is | Vth |, i.e. in the compensation phase, the voltage V of the voltage at the control end of thedriving module 100_GV0, the voltage V at the second terminal of thedrive module 100_A2V0+ | Vth |. During the compensation phase, the sixth crystal is lifted by continuing to charge the gate of the sixth transistor T6The potential of the gate of the tube T6.

In the data writing stage T3, as shown in fig. 14, the first emission control signal EM1 and the second emission control signal EM2 are both at a high level, the scan signal SC is at a low level, the first transistor T1, the second transistor T2 and the seventh transistor T7 are turned on, and the third transistor T3, the fourth transistor T4 and the fifth transistor T5 are turned off. The data signal Vdata is written to the gate of the sixth transistor T6 through the seventh transistor T7, the sixth transistor T6, the second transistor T2, and the first transistor T1. At the end of the data writing phase t3, the voltage V at the control terminal of thedriving module 100_GVdata-Vth |, the voltage V of the second terminal of thedriving module 100_A2＝Vdata。

In the emission period T4, as shown in fig. 15, the first emission control signal EM1 and the second emission control signal EM2 are both at a low level, the scan signal SC is at a high level, the first transistor T1, the second transistor T2 and the seventh transistor T7 are turned off, the third transistor T3, the fourth transistor T4 and the fifth transistor T5 are turned on, the first power signal VDD is transmitted to the first pole of the sixth transistor T6 through the fourth transistor T4, and the sixth transistor T6 generates the driving current I according to the voltages of the gate and the first pole of the sixth transistor T6_DDriving current I_DFlows into thelight emitting module 200 through the fifth transistor T5, thereby driving thelight emitting module 200 to emit light. Wherein the drive current I_D＝k*[VDD-(Vdata-|Vth|)-|Vth|]²＝k*(VDD-Vdata)²And k is a compensation coefficient.

As can be seen from the above analysis, unlike the prior art in which the compensation time is controlled by the effective time of the scan signal, the pixel circuit provided in this embodiment separates the compensation phase from the data writing phase, and the start time of the scan signal can be used to control the time duration of the compensation phase. Therefore, when the threshold compensation is performed on the driving module, the threshold compensation method is not limited by the high refresh frequency, and is beneficial to fully writing the data signal into the control end of the driving module within a limited time, so that the threshold voltage is fully compensated, the display uniformity is improved, and the display image quality is improved.

Embodiments of the present invention further provide a display panel, where the display panel includes the pixel circuit described in any of the above embodiments, and the technical principle and the resulting effect are similar and will not be described again.

The embodiment of the invention also provides a driving method of the pixel circuit, which is suitable for the pixel circuit provided by any embodiment of the invention. Fig. 16 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention, and referring to fig. 16, the driving method of the pixel circuit includes an initialization phase, a compensation phase, a data writing phase, and a light emitting phase;

s10: in an initialization stage, the compensation module responds to the first light-emitting control signal to be conducted, the initialization module and the first light-emitting control module respond to the second light-emitting control signal to be conducted, the initialization module writes initialization voltage into the control end of the driving module through the conducted compensation module, and the first light-emitting control module writes the first power supply signal into the second end of the driving module.

S20: in the compensation stage, the compensation module is conducted in response to the first light-emitting control signal, and the driving module performs threshold compensation through the conducted compensation module.

S30: in the data writing stage, the compensation module is conducted in response to the first light-emitting control signal, the data writing module is conducted in response to the scanning signal, and the data writing module writes the data signal into the control end of the driving module through the conducted driving module and the conducted compensation module.

S40: in the light-emitting stage, the first light-emitting control module is conducted in response to the second light-emitting control signal, the second light-emitting control module is conducted in response to the first light-emitting control signal, and the driving module generates a driving current in response to the voltage of the control end of the driving module to drive the light-emitting module to emit light.

Unlike the prior art in which the compensation time is controlled by the effective time of the scan signal, the driving method of the pixel circuit provided in this embodiment separates the compensation phase from the data writing phase, and can control the time duration of the compensation phase by using the start time of the scan signal. Therefore, the driving method of the pixel circuit of the embodiment is not limited by a high refresh frequency when performing threshold compensation on the driving module, and is beneficial to fully writing data signals into the control end of the driving module within a limited time, thereby realizing the full compensation of the threshold voltage, improving the display uniformity and further improving the display image quality.

Fig. 17 is a comparison diagram of compensation phase adjustment of a pixel circuit according to an embodiment of the present invention, and referring to fig. 17, on the basis of the above embodiments, optionally, the first emission control signal EM1 and the second emission control signal EM2 are defined to be active when they are at the first level, the scan signal SC is defined to be active when they are at the second level, and the first level and the second level are opposite. Wherein, the effective time intervals of the first and second emission control signals EM1 and EM2 have an overlapping interval, and the effective time interval of the scan signal SC is within the overlapping interval; the start time of the active time interval of the scan signal SC is adjustable. Wherein, the overlapping of the effective time intervals of the first emission control signal EM1 and the second emission control signal EM2 forms the compensation phase t2 and the data writing phase t 3. In the overlap interval, the flag entering the data writing phase t3 is asserted as the scan signal SC. The earlier the scan signal SC is valid, the shorter the compensation period t2 is; in contrast, the time delay of the scan signal SC being active, the time of the compensation phase t2 is extended. Therefore, by adjusting the start time of the active time interval of the scan signal SC, the time of the compensation phase t2 can be adjusted. As shown in fig. 17, the start time of the scan signal SC at the lower side is shifted to the right compared to the start time of the scan signal SC at the upper side, and obviously, the time of the compensation period t2 is prolonged after the shift. Therefore, the pixel circuit of the embodiment of the invention can increase the time of the compensation stage t2 by adjusting the right shift of the scan signal SC.

Illustratively, the compensation module includes a first transistor and a second transistor, the initialization module includes a third transistor, the first light emission control module includes a fourth transistor, the second light emission control module includes a fifth transistor, the driving module includes a sixth transistor, and the data writing module includes a seventh transistor. The first transistor and the second transistor are N-type transistors, and the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor are all P-type transistors. The first level is high and the second level is low.

In the initialization phase t1, when the first emission control signal EM1 is in the active time interval, the scan signal is in the SC inactive time interval, and the second emission control signal EM2 is in the inactive time interval. In the compensation phase t2, the first emission control signal EM1 is located in the active time interval, the scan signal SC is located in the inactive time interval, and the second emission control signal EM2 is located in the active time interval. In the data writing phase t3, the first emission control signal EM1 is located in the valid time interval, the scan signal SC is located in the valid time interval, and the second emission control signal EM2 is located in the valid time interval. In the light-emitting period t4, the first light-emitting control signal EM1 is located in the inactive time interval, the scan signal SC is located in the inactive time interval, and the second light-emitting control signal EM2 is located in the inactive time interval.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. A pixel circuit, comprising:

the driving module comprises a control end, a first end and a second end, and is used for responding to the voltage of the control end to generate driving current and driving the light-emitting module to emit light;

the compensation module is connected between the first end and the control end of the driving module and used for responding to the first light-emitting control signal to conduct in an initialization stage, a compensation stage and a data writing stage, and the driving module conducts threshold compensation through the conducted compensation module in the compensation stage; the initialization phase, the compensation phase and the data writing phase are characterized by the driving time sequence of the pixel circuit in a working period;

the initialization module is electrically connected with the compensation module and used for responding to a second light-emitting control signal to be conducted in the initialization stage and writing an initialization voltage signal into the control end of the driving module through the compensation module;

the first light-emitting control module is electrically connected with the second end of the driving module and used for responding to the second light-emitting control signal in the initialization stage and the light-emitting stage to be conducted and writing a first power supply signal into the second end of the driving module;

the data writing module is electrically connected with the second end of the driving module and used for responding to a scanning signal to be conducted in the data writing stage and writing a data signal into the control end of the driving module through the compensation module;

and the second light-emitting control module is connected between the first end of the driving module and the light-emitting module and used for responding to the first light-emitting control signal in a light-emitting stage to be conducted so as to enable the driving current to flow into the light-emitting module.

2. The pixel circuit of claim 1, wherein the compensation module comprises a first transistor and a second transistor;

a first pole of the first transistor is connected with the control end of the driving module, a first pole of the second transistor is connected with a second pole of the first transistor, and a second pole of the second transistor is connected with the first end of the driving module;

the grid electrode of the first transistor and the grid electrode of the second transistor are both connected with the first light-emitting control signal;

preferably, the first transistor and the second transistor are both N-type transistors.

3. The pixel circuit according to claim 1, wherein the initialization module comprises a third transistor, a first pole of the third transistor is connected to the initialization voltage signal, a second pole of the third transistor is connected to the compensation module, and a gate of the third transistor is connected to the second emission control signal;

preferably, the third transistor is a P-type transistor.

4. The pixel circuit according to claim 1, wherein the first light emission control module comprises a fourth transistor, and the second light emission control module comprises a fifth transistor;

a first pole of the fourth transistor is connected to a first power supply signal, a second pole of the fourth transistor is connected to the second end of the driving module, and a gate of the fourth transistor is connected to the second light-emitting control signal;

a first pole of the fifth transistor is connected with the first end of the driving module, a second pole of the fifth transistor is connected with the light emitting module, and a grid electrode of the fifth transistor is connected with the first light emitting control signal;

preferably, the fourth transistor and the fifth transistor are both P-type transistors.

5. The pixel circuit according to claim 1, wherein the driving module comprises a sixth transistor, a first pole of the sixth transistor is connected to the first light-emitting control module, a second pole of the sixth transistor is connected to the compensation module, a second pole of the sixth transistor is further connected to the second light-emitting control module, and a gate of the sixth transistor is connected to the compensation module;

preferably, the sixth transistor is a P-type transistor.

6. The pixel circuit according to claim 1, wherein the data writing module comprises a seventh transistor, a first pole of the seventh transistor is connected to a data signal, a second pole of the seventh transistor is connected to the second terminal of the driving module, and a gate of the seventh transistor is connected to a scan signal;

preferably, the seventh transistor is a P-type transistor.

7. The pixel circuit according to claim 1, further comprising a storage module, connected to the control terminal of the driving module, for storing a voltage of the control terminal of the driving module;

preferably, the storage module includes a storage capacitor, a first end of the storage capacitor is connected to the first power signal, and a second end of the storage capacitor is connected to the control end of the driving module.

8. A display panel comprising the pixel circuit according to any one of claims 1 to 7.

9. The pixel circuit is characterized by comprising a driving module, a compensation module, an initialization module, a first light-emitting control module, a data writing module, a second light-emitting control module and a light-emitting module; the driving method of the pixel circuit comprises an initialization stage, a compensation stage, a data writing stage and a light emitting stage;

in the initialization phase, the compensation module is conducted in response to a first light-emitting control signal, the initialization module and the first light-emitting control module are conducted in response to a second light-emitting control signal, the initialization module writes an initialization voltage into the control end of the drive module through the conducted compensation module, and the first light-emitting control module writes a first power supply signal into the second end of the drive module;

in the compensation phase, the compensation module is conducted in response to a first light-emitting control signal, and the driving module conducts threshold compensation through the conducted compensation module;

in the data writing phase, the compensation module is conducted in response to the first light-emitting control signal, the data writing module is conducted in response to a scanning signal, and the data writing module writes a data signal into a control end of the driving module through the conducted driving module and the conducted compensation module;

in the light-emitting stage, the first light-emitting control module is turned on in response to the second light-emitting control signal, the second light-emitting control module is turned on in response to the first light-emitting control signal, and the driving module generates a driving current in response to a voltage at a control end of the driving module to drive the light-emitting module to emit light.

10. The method for driving the pixel circuit according to claim 9, wherein the first light emission control signal and the second light emission control signal are defined to be active at a first level, and the scan signal is defined to be active at a second level, the first level and the second level being opposite to each other;

wherein, the effective time intervals of the first and the second light-emitting control signals have an overlapping interval, and the effective time interval of the scanning signal is within the overlapping interval; the start time of the effective time interval of the scanning signal is adjustable.

Images