CN113644180A

Movatterモバイル変換

Info

Publication number: CN113644180A
Application number: CN202110905650.0A
Authority: CN
Inventors: 赵进超; 李士涛; 田文
Original assignee: Xiamen Silan Advanced Compound Semiconductor Co Ltd
Current assignee: Xiamen Silan Advanced Compound Semiconductor Co Ltd
Priority date: 2021-08-05
Filing date: 2021-08-05
Publication date: 2021-11-12
Anticipated expiration: 2041-08-05
Also published as: CN113644180B

Abstract

Translated fromChinese

本发明提供了一种倒装LED芯片及其制备方法，倒装LED芯片包括：衬底；位于衬底上的外延层，包括依次层叠的N型半导体层、有源层和P型半导体层，且外延层中具有裸露出N型半导体层的N型凹槽；位于P型半导体层上的金属反射层，具有若干金属层通孔，金属层通孔裸露出P型半导体层；位于金属反射层上的绝缘反射层，其填充金属层通孔，以及覆盖N型凹槽的侧壁，以使绝缘反射层与P型半导体层接触；位于绝缘反射层上的焊接金属层，其包括N型焊接金属层和P型焊接金属层。本发明通过在金属反射层上形成若干金属层通孔，使绝缘反射层与P型半导体层形成接触，增加了金属反射层与P型半导体层的接触能力。

The invention provides a flip-chip LED chip and a preparation method thereof. The flip-chip LED chip comprises: a substrate; an epitaxial layer located on the substrate includes an N-type semiconductor layer, an active layer and a P-type semiconductor layer stacked in sequence, And the epitaxial layer has an N-type groove that exposes the N-type semiconductor layer; the metal reflective layer located on the P-type semiconductor layer has a number of metal layer through holes, and the metal layer through holes expose the P-type semiconductor layer; located in the metal reflective layer The insulating reflective layer on the top, which fills the metal layer through holes, and covers the sidewalls of the N-type grooves, so that the insulating reflective layer is in contact with the P-type semiconductor layer; the soldering metal layer on the insulating reflective layer, which includes N-type soldering Metal layer and P-type solder metal layer. In the present invention, several metal layer through holes are formed on the metal reflective layer, so that the insulating reflective layer and the P-type semiconductor layer are in contact, thereby increasing the contact ability between the metal reflective layer and the P-type semiconductor layer.

Description

Flip LED chip and preparation method thereof

Technical Field

The invention relates to the technical field of semiconductors, in particular to a flip LED chip and a preparation method thereof.

Background

Light Emitting Diodes (LEDs) have the advantages of high light efficiency, long life, low energy consumption, etc., and have drawn much attention in the fields of full color display, visible light illumination, etc.

Light emitting diodes, such as GaN-based light emitting diodes, generally use sapphire as a substrate, and sapphire is an insulator, in order to realize electrical interconnection, an N pad and a P pad are commonly located on a GaN plane, and light is extracted from the GaN plane, and the structure is called a front-mounted light emitting diode. The forward-mounted light emitting diode has the following disadvantages: firstly, the GaN surface emits light, the refractive index of the GaN is high, and the total reflection angle of the emitted light is small, so that the external quantum efficiency of the GaN-based light-emitting diode is reduced; secondly, the sapphire is a radiating surface, the heat conduction capability of the sapphire is poor, heat generated in the light emitting process of the light emitting diode cannot be effectively conducted out, and the reliability of the product is reduced.

In order to solve the above problems, a flip-chip light emitting diode has been developed, in which a chip is physically turned over during packaging, an electrode surface is interconnected with a substrate electrode, and light is emitted from a sapphire surface. The flip-chip product is divided into two processes, i.e., a DBR mirror (Distributed Bragg reflector) flip-chip process and a metal mirror flip-chip process.

The process of inverting the DBR mirror adopts ITO (Indium Tin oxide) as a current expansion layer, and the DBR mirror has high reflectivity, high brightness and strong adhesion with other films, but the current diffusion is not uniform. The flip metal reflector process adopts a silver (Ag) mirror as a current expansion layer, and the metal has strong current expansion capability but weak adhesion with other film layers and is easy to fall off. For the flip metal mirror technology, a transparent adhesion layer (i.e. a middle adhesion metal layer) is usually added between the metal reflection layer and the lower film layer in order to increase the adhesion, but the increase of the adhesion layer greatly reduces the reflectivity of the metal reflection layer, and affects the brightness of the light emitting diode.

Therefore, how to improve the characteristics of the flip-chip LED chip by combining the advantages of the two processes becomes an urgent problem to be solved on the premise of ensuring reliability.

Disclosure of Invention

The invention aims to provide a flip LED chip and a preparation method thereof, so as to increase the contact capacity of a metal reflecting layer and a P-type semiconductor layer and improve the brightness and current resistance of the flip LED chip.

In order to achieve the above and other objects, the present invention provides a flip LED chip, comprising:

a substrate;

the epitaxial layer is positioned on the substrate and comprises an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially stacked, and an N-type groove exposing the N-type semiconductor layer is formed in the epitaxial layer;

the metal reflecting layer is positioned on the P-type semiconductor layer, a plurality of metal layer through holes are formed in the metal reflecting layer, and the P-type semiconductor layer is exposed out of the metal layer through holes;

the insulating reflecting layer is positioned on the metal reflecting layer, fills the metal layer through hole and covers the side wall of the N-type groove so as to enable the insulating reflecting layer to be in contact with the P-type semiconductor layer;

the welding metal layer is positioned on the insulation reflecting layer and comprises an N-type welding metal layer and a P-type welding metal layer which is isolated from the N-type welding metal layer, the N-type welding metal layer is electrically connected with the N-type semiconductor layer, and the P-type welding metal layer is electrically connected with the P-type semiconductor layer.

Optionally, in the flip LED chip, the N-type groove includes an N-type scribe groove located at an edge of the epitaxial layer and an N-type through hole groove located inside the N-type scribe groove.

Optionally, in the flip LED chip, an isolation groove is further formed in an edge of the epitaxial layer, and the isolation groove is exposed out of the substrate and is communicated with the N-type scribing groove.

Optionally, in the flip LED chip, the insulating reflective layer further includes an insulating layer N-type through hole, the insulating layer N-type through hole corresponds to the N-type through hole groove in position, and a diameter of the insulating layer N-type through hole is smaller than that of the N-type through hole groove, so that the insulating reflective layer covers a sidewall of the N-type through hole groove.

Optionally, in the flip-chip LED chip, the insulating reflective layer and the bonding metal layer further have:

the N-type metal layer is positioned on the insulating reflecting layer, the N-type metal layer is also filled in the insulating layer N-type through hole, and a metal layer groove which exposes out of the insulating reflecting layer is also arranged in the N-type metal layer;

the insulating medium layer is positioned on the N-type metal layer, the metal layer groove is filled with the insulating medium layer, the medium layer groove exposing the metal reflecting layer and the N-type metal layer is further arranged in the insulating medium layer, the N-type welding metal layer covers a part of the insulating medium layer and the N-type metal layer, and the P-type welding metal layer covers a part of the insulating medium layer and the metal reflecting layer.

Optionally, in the flip LED chip, the dielectric layer groove includes a first dielectric layer groove and a second dielectric layer groove, wherein the first dielectric layer groove penetrates through the insulating dielectric layer and the insulating reflective layer and exposes the metal reflective layer, and the first dielectric layer groove is located in a position corresponding to the metal layer groove; and the N-type metal layer is exposed out of the groove of the second dielectric layer.

Optionally, in the flip LED chip, the insulating medium layer is made of at least one of silicon nitride, silicon dioxide, titanium dioxide, and aluminum oxide.

Optionally, in the flip LED chip, the diameter of the metal layer through hole is 1 μm to 20 μm.

Optionally, in the flip-chip LED chip, the metal reflection layer includes a metal contact layer, a metal barrier layer, and a metal etching layer, which are sequentially stacked.

Optionally, in the flip-chip LED chip, a material of the metal contact layer includes at least one of silver and aluminum.

Optionally, in the flip-chip LED chip, the metal etching layer is formed by stacking at least two metals selected from titanium, platinum, gold, nickel, and aluminum.

Optionally, in the flip LED chip, the insulating reflective layer is of a multilayer structure, and the insulating reflective layer is formed by alternately stacking at least two materials of silicon oxide, titanium oxide, aluminum oxide, silicon nitride, and zinc oxide.

Optionally, in the flip LED chip, the number of insulating reflective layers is 5 to 61, and the thickness of the insulating reflective layer is 0.5 μm to 4 μm.

In order to achieve the above objects and other related objects, the present invention also provides a method for manufacturing a flip LED chip, including the steps of:

providing a substrate;

forming an epitaxial layer on the substrate, wherein the epitaxial layer comprises an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially stacked;

etching the epitaxial layer to the upper surface of the N-type semiconductor layer to form an N-type groove in the epitaxial layer;

forming a metal reflecting layer on the P-type semiconductor layer, and etching the metal reflecting layer to form a plurality of metal layer through holes, wherein the P-type semiconductor layer is exposed out of the metal layer through holes;

forming an insulating reflecting layer on the metal reflecting layer, wherein the insulating reflecting layer is also filled in the metal layer through hole and covers the side wall of the N-type groove so as to enable the insulating reflecting layer to be in contact with the P-type semiconductor layer;

and forming a welding metal layer on the insulating reflecting layer, wherein the welding metal layer comprises an N-type welding metal layer and a P-type welding metal layer isolated from the N-type welding metal layer, the N-type welding metal layer is electrically connected with the N-type semiconductor layer, and the P-type welding metal layer is electrically connected with the P-type semiconductor layer.

Optionally, in the preparation method of the flip LED chip, the N-type groove includes an N-type scribe groove located at an edge of the N-type semiconductor layer and an N-type through hole groove located inside the N-type scribe groove.

Optionally, in the method for manufacturing a flip LED chip, before the step of forming the metal reflective layer on the P-type semiconductor layer, the method further includes:

and etching part of the N-type semiconductor layer at the position of the N-type scribing groove until the substrate is exposed so as to form an isolation groove on the epitaxial layer.

Optionally, in the method for manufacturing a flip LED chip, after the step of forming an insulating reflective layer on the metal reflective layer, the method further includes: and etching the insulation reflecting layer to the upper surface of the N-type semiconductor layer to form an insulation layer N-type through hole at a position corresponding to the N-type through hole groove, wherein the diameter of the insulation layer N-type through hole is smaller than that of the N-type through hole groove, so that the insulation reflecting layer covers the side wall of the N-type through hole groove.

Optionally, in the method for manufacturing a flip LED chip, after the step of forming an insulating layer N-type via at a position corresponding to the N-type via groove, the method further includes:

forming an N-type metal layer on the insulation reflecting layer, wherein the N-type metal layer is also filled in the insulation layer N-type through hole;

etching the N-type metal layer to the upper surface of the insulating reflecting layer to form a metal layer groove;

forming an insulating medium layer on the N-type metal layer, wherein the insulating medium layer also fills the metal layer groove;

etching the insulating medium layer to the upper surface of the metal reflecting layer and the upper surface of the N-type metal layer to form a medium layer groove, wherein the N-type welding metal layer covers part of the insulating medium layer and the N-type metal layer, and the P-type welding metal layer covers part of the insulating medium layer and the metal reflecting layer.

Optionally, in the method for manufacturing the flip LED chip, the dielectric layer groove includes a first dielectric layer groove and a second dielectric layer groove, wherein the first dielectric layer groove penetrates through the insulating dielectric layer and the insulating reflective layer and exposes the metal reflective layer, and the first dielectric layer groove is located in a position corresponding to the metal layer groove; and the N-type metal layer is exposed out of the groove of the second dielectric layer.

Optionally, in the preparation method of the flip LED chip, the material of the insulating medium layer includes at least one of silicon nitride, silicon dioxide, titanium dioxide and aluminum oxide.

Optionally, in the method for manufacturing the flip LED chip, the diameter of the metal layer through hole is 1 μm to 20 μm.

Optionally, in the preparation method of the flip LED chip, the metal reflection layer includes a metal contact layer, a metal barrier layer, and a metal etching layer, which are sequentially stacked.

Optionally, in the method for manufacturing a flip LED chip, the material of the metal contact layer includes at least one of silver and aluminum.

Optionally, in the method for manufacturing a flip-chip LED chip, the metal etching layer is formed by stacking at least two metals selected from titanium, platinum, gold, nickel, and aluminum.

Optionally, in the method for manufacturing the flip LED chip, the insulating reflective layer has a multilayer structure, and the insulating reflective layer is formed by alternately stacking at least two materials of silicon oxide, titanium oxide, aluminum oxide, silicon nitride, and zinc oxide.

Optionally, in the preparation method of the flip LED chip, the number of insulating reflective layers is 5 to 61, and the thickness of the insulating reflective layer is 0.5 to 4 μm.

Compared with the prior art, the technical scheme of the invention has the following beneficial effects:

according to the invention, the metal layer through holes are prepared on the metal reflecting layer, and the insulating reflecting layer is contacted with the P-type semiconductor layer through the metal layer through holes, so that the contact capability of the metal reflecting layer and the P-type semiconductor layer is increased, and the use of a middle adhesion metal layer can be further avoided. Moreover, the invention adopts the structure of the metal reflecting layer and the insulating reflecting layer to improve the brightness and the current resistance of the flip LED chip.

Drawings

FIG. 1 is a cross-sectional view of a flip-chip LED chip according to an embodiment of the present invention;

FIG. 2 is a cross-sectional view of a flip-chip LED chip after the epitaxial layers have been formed, in accordance with one embodiment of the present invention;

FIG. 3 is a cross-sectional view of a flip-chip LED chip after the formation of an N-type recess in the flip-chip LED chip in accordance with one embodiment of the present invention;

FIG. 4 is a cross-sectional view of a flip-chip LED chip after isolation recesses have been formed in accordance with one embodiment of the present invention;

FIG. 5 is a cross-sectional view of a flip-chip LED chip after formation of a metal reflector layer in accordance with one embodiment of the present invention;

FIG. 6 is a cross-sectional view of a flip-chip LED chip after fabrication of the insulating reflective layer in accordance with one embodiment of the present invention;

FIG. 7 is a cross-sectional view of a flip-chip LED chip after fabrication of an N-type metal layer in accordance with one embodiment of the present invention;

FIG. 8 is a cross-sectional view of a flip-chip LED chip after fabrication of the dielectric layer in accordance with one embodiment of the present invention;

FIG. 9 is a cross-sectional view of a flip-chip LED chip after formation of a bonding layer metal in accordance with one embodiment of the present invention;

in FIGS. 1 to 9:

100-substrate, 200-epitaxial layer, 201-N type semiconductor layer, 202-active layer, 203-P type semiconductor layer, 204-N type through hole groove, 205-N type scribing groove, 206-isolation groove, 300-metal reflective layer, 301-metal layer through hole, 400-insulating reflective layer, 401-insulating layer N type through hole, 500-N type metal layer, 501-metal layer groove, 600-insulating dielectric layer, 601-first dielectric layer groove, 602-second dielectric layer groove, 701-N type welding metal layer, 702-P type welding metal layer.

Detailed Description

Flip-chip light emitting diodes can be divided into two processes, namely, a flip-chip DBR mirror process and a flip-chip metal mirror process. The process of inverting the DBR mirror adopts ITO (Indium Tin oxide) as a current expansion layer, and the DBR mirror has high reflectivity, high brightness and strong adhesion with other films, but the current diffusion is not uniform. The flip metal reflector process adopts a silver (Ag) mirror as a current expansion layer, and the metal has strong current expansion capability but weak adhesion with other film layers and is easy to fall off. For the flip-chip metal mirror process, a transparent adhesion layer is usually added between the metal reflective layer and the lower film layer in order to increase the adhesion, but the addition of the adhesion layer greatly reduces the reflectivity of the metal reflective layer.

The invention provides a flip LED chip and a preparation method thereof, in order to fully utilize the advantages of two processes of flip DBR and flip metal reflector. The metal layer through hole is formed in the metal reflecting layer, the insulating reflecting layer is in contact with the P-type semiconductor layer through the metal layer through hole, the contact capacity of the metal reflecting layer and the P-type semiconductor layer is improved, and the metal layer can be prevented from being adhered to the middle of the metal reflecting layer. Moreover, the metal reflecting layer structure can improve the brightness and the current resistance of the flip LED chip.

The flip LED chip and the method for manufacturing the flip LED chip according to the present invention will be described in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.

Referring to fig. 1, the flip-chip LED chip provided by the present invention includes:

asubstrate 100;

anepitaxial layer 200 located on thesubstrate 100, wherein theepitaxial layer 200 includes an N-type semiconductor layer 201, anactive layer 202, and a P-type semiconductor layer 203 that are sequentially stacked, and an N-type groove exposing the N-type semiconductor layer 201 is formed in theepitaxial layer 200;

themetal reflecting layer 300 is positioned on the P-type semiconductor layer 203, and a plurality of metal layer through holes are formed in themetal reflecting layer 300 and expose out of the P-type semiconductor layer 203;

the insulatingreflective layer 400 is positioned on the metalreflective layer 300, and the insulatingreflective layer 400 also fills the metal layer through hole and covers the side wall of the N-type groove, so that the insulatingreflective layer 400 is in contact with the P-type semiconductor layer 203;

and a welding metal layer on the insulatingreflective layer 400, wherein the welding metal layer includes an N-typewelding metal layer 701 and a P-typewelding metal layer 702 isolated from the N-typewelding metal layer 701, the N-typewelding metal layer 701 is electrically connected to the N-type semiconductor layer 201, and the P-typewelding metal layer 702 is electrically connected to the P-type semiconductor layer 203.

The insulatingreflective layer 400 further has an insulating layer N-type via hole therein, and further has:

the N-type metal layer 500 is located on the insulatingreflective layer 400, the N-type metal layer 500 further fills the insulating layer N-type through hole, and the N-type metal layer 500 further has a metal layer groove exposing the insulatingreflective layer 400;

the insulatingdielectric layer 600 is located on the N-type metal layer 500, the insulatingdielectric layer 600 further fills the metal layer groove, the insulatingdielectric layer 600 further has a dielectric layer groove exposing the metalreflective layer 300 and the N-type metal layer 500, the N-typewelding metal layer 701 covers a part of the insulatingdielectric layer 600 and the N-type metal layer 500, and the P-typewelding metal layer 702 covers a part of the insulatingdielectric layer 600 and the metalreflective layer 300.

The preparation process of the flip-chip LED chip is shown in fig. 2 to 9, and specifically includes:

step S1: providing asubstrate 100;

step S2: forming anepitaxial layer 200 on thesubstrate 100, wherein theepitaxial layer 200 comprises an N-type semiconductor 201, anactive layer 202 and a P-type semiconductor layer 203 which are sequentially stacked;

step S3: etching theepitaxial layer 200 to the upper surface of the N-type semiconductor layer 201 to form an N-type groove in theepitaxial layer 200;

step S4: forming ametal reflecting layer 300 on the P-type semiconductor layer 203, and etching themetal reflecting layer 300 to form a plurality of metal layer throughholes 301, wherein the metal layer throughholes 301 expose the P-type semiconductor layer 203;

step S5: forming an insulatingreflective layer 400 on the metalreflective layer 300, wherein the insulatingreflective layer 400 further fills the metal layer via 301 and covers the sidewall of the N-type groove, so that the insulatingreflective layer 400 contacts the P-type semiconductor layer 203;

step S6: forming a welding metal layer on the insulatingreflective layer 400, wherein the welding metal layer comprises an N-typewelding metal layer 701 and a P-typewelding metal layer 702 isolated from the N-typewelding metal layer 701, the N-typewelding metal layer 701 is electrically connected with the N-type semiconductor layer 201, and the P-typewelding metal layer 702 is electrically connected with the P-type semiconductor layer 203.

Referring to fig. 2, in step S1, thesubstrate 100 may be sapphire, Si (silicon), SiC (silicon carbide), GaN (gallium nitride), ZnO (zinc oxide), etc., and in this embodiment, the material of thesubstrate 100 is preferably a highly transparent sapphire substrate. Further, thesubstrate 100 is a Patterned substrate (PSS), a mask is etched on the surface of thesubstrate 100 to form a pattern by using a standard photolithography process, and then thesubstrate 100 is etched by using an ICP etching technique, so that a Patterned groove is formed on the surface of thesubstrate 100 to improve the light emitting efficiency.

In step S2, the material of theepitaxial layer 200 is selected from one or a combination of AlN, GaN, AlGaN, InGaN, and AlInGaN, and particularly, the host material of theepitaxial layer 200 is preferably GaN, and more particularly, theepitaxial layer 200 may be formed on thesubstrate 100 by any one of the well-known methods such as chemical vapor deposition and evaporation.

The forming process of the epitaxial layer comprises the following steps:

step S21: forming the N-type semiconductor layer 201 on thesubstrate 100;

step S22: forming theactive layer 202 on the N-type semiconductor layer 201;

step S23: the P-type semiconductor layer 203 is formed on theactive layer 202.

The material of the N-type semiconductor layer 201 is preferably GaN, but is not limited thereto. Theactive layer 202 is used as a light emitting layer and is located above the N-type semiconductor layer 201, the structure of theactive layer 202 is preferably a multi-period quantum well layer, and the material of theactive layer 202 is preferably any one or a combination of AlN, GaN, AlGaN, InGaN, and AlInGaN, but is not limited thereto. The P-type semiconductor layer 203 is located above theactive layer 202, and the material of the P-type semiconductor layer 203 is preferably GaN, but not limited thereto.

Referring to fig. 3, in step S3, an N-type groove exposing the N-type semiconductor layer 201 is formed in theepitaxial layer 200, and the N-type groove includes an N-type scribe groove 205 located at an edge of theepitaxial layer 200 and an N-type viagroove 204 located inside the N-type scribe groove 205. And etching theepitaxial layer 200 to the upper surface of the N-type semiconductor layer 201 to form the N-type groove. Specifically, a photoresist pattern is formed on the upper surface of the P-type semiconductor layer 203, and then the P-type semiconductor layer 203 and theactive layer 202 in the region not covered by the photoresist are removed by etching, and the etching is stopped on the upper surface of the N-type semiconductor layer 201.

Referring to fig. 4, the edge position of theepitaxial layer 200 further has anisolation groove 206 exposing thesubstrate 100, and theisolation groove 206 is communicated with the N-type scribing groove 205. That is, before step S4, a portion of the N-type semiconductor layer 201 at the location of the N-type scribe line 205 is etched, and the etching is stopped on the upper surface of thesubstrate 100 to form theisolation groove 206. Theisolation trenches 206 separate theepitaxial layer 200 into individual dies.

When theisolation groove 206 is formed, only a part of the N-type semiconductor layer 201 at the position of the N-type scribing groove 205 is etched, so that the width of theisolation groove 206 is smaller than that of the N-type scribing groove 205, and a step structure is formed between the N-type semiconductor layer 201 exposed at the edge position of theepitaxial layer 200 and thesubstrate 100. After the insulatingreflective layer 400 is prepared subsequently, the edge position of the insulatingreflective layer 400 is consistent with the edge position of thesubstrate 100 due to the step structure, and under the condition that the edge position of the flip-chip LED chip is worn, the N-type semiconductor layer 201, theactive layer 202 and the P-type semiconductor layer 203 are not exposed easily, so that the electrical performance of the flip-chip LED chip is not affected. Moreover, theisolation groove 206 can prevent metal (e.g., Sn) from overflowing to contact with the N-type semiconductor layer 201 during subsequent packaging to cause short circuit.

Referring to fig. 5, in step S4, the metalreflective layer 300 is formed on the P-type semiconductor layer 203, and the metalreflective layer 300 has a plurality ofmetal layer vias 301. The diameter of the metal layer throughhole 301 is preferably 1 μm to 20 μm, and the diameter of the metal layer throughhole 301 cannot exceed 20 μm, so as to prevent the area of themetal reflection layer 301 from being too small, and influence on the light extraction efficiency and the electrical performance of the finally obtained flip-chip LED chip. The number of the metal layer throughholes 301 is plural, and the P-type semiconductor layer 203 is exposed from the metal layer throughholes 301. Since the metalreflective layer 300 is only formed on the P-type semiconductor layer 203 and the N-type groove is not filled, the surface of the N-type semiconductor layer 201 and the sidewalls of theactive layer 202 and the P-type semiconductor layer 203 are exposed, and when the insulatingreflective layer 400 is formed subsequently, the contact area between the insulatingreflective layer 400 and the P-type semiconductor layer 203 can be further increased, thereby increasing the contact capability between the metalreflective layer 300 and the P-type semiconductor layer 203. Since the metal layer throughhole 301 exposes the P-type semiconductor layer 203, the insulatingreflective layer 400 can also contact the P-type semiconductor layer 203 through the metal layer throughhole 301 when the insulatingreflective layer 400 is formed later, thereby increasing the contact capability between the metalreflective layer 300 and the P-type semiconductor layer 203. And as the diameter and the number of the metal layer throughholes 301 are increased, the contact area between the insulatingreflective layer 400 and the P-type semiconductor layer 203 can be increased, thereby increasing the contact capability.

The metalreflective layer 300 includes a metal contact layer, a metal barrier layer, and a metal etching layer, which are sequentially stacked. Preferably, the metalreflective layer 300 is formed by forming a mask pattern through a photolithography process, and growing a metal thin film having a high reflectivity through electron beam evaporation, sputtering, ALD (Atomic layer deposition), or the like. The thickness of the metalreflective layer 300 is preferably 0.1 to 2 μm.

The metal contact layer is used as a reflector, has a light reflecting effect, and reflects part of light emitted by theactive layer 202 and emitted to the P-type semiconductor layer 203 back, so that the luminous intensity and brightness of the flip LED chip are enhanced. The material of the metal contact layer includes at least one of silver and aluminum, but is not limited thereto. Further, the material of the metal contact layer is preferably silver.

The metal barrier layer is preferably a structural layer consisting of Ti/W/Ti (titanium/tungsten/titanium) and is positioned between the metal contact layer and the metal etching layer. The metal contact layer is made of Ag, so that Ag is active and easy to migrate and diffuse, and tungsten metal is inert and can effectively prevent the diffusion of the Ag.

The metal etching layer is formed by stacking at least two metals of titanium, platinum, gold, nickel, and aluminum, but is not limited thereto. The metal etching layer can be used as a current expansion layer to protect the metal contact layer and prevent electric leakage caused by electron migration. The metal etching layer has the function of current whole surface expansion besides protecting the metal contact layer.

Referring to fig. 6, in step S5, an insulatingreflective layer 400 is formed on the metalreflective layer 300, and the insulatingreflective layer 400 further fills the metal layer via 301 and covers the sidewalls of the N-type recess. That is, the insulatingreflective layer 400 covers sidewalls of the metalreflective layer 300, thesubstrate 100, theactive layer 202, and the P-type semiconductor layer 203, and exposes the N-type semiconductor layer 201 at the bottom of the N-type viagroove 204. The insulatingreflective layer 400 and the P-type semiconductor layer 203 have a relatively strong adsorption effect, the insulatingreflective layer 400 can be fixedly adhered to the P-type semiconductor layer 203 and is not easily detached, and the contact area between the insulatingreflective layer 400 and the P-type semiconductor layer 203 is larger, and the contact between the insulatingreflective layer 400 and the P-type semiconductor layer 203 is more stable.

In the prior art, the metal adhesion of the metal reflective layer on the P-type semiconductor layer is weak, and the metal reflective layer is easy to fall off, but in this embodiment, the metalreflective layer 300 is disposed between the insulatingreflective layer 400 and the P-type semiconductor layer 203, and the metalreflective layer 300 is provided with the metal throughhole 301, so that the insulatingreflective layer 400 can be in contact with the P-type semiconductor layer 203 through the metal throughhole 301, and further, the contact capability between the metalreflective layer 300 and the P-type semiconductor layer 203 can be increased, and the metalreflective layer 300 is prevented from falling off from the P-type semiconductor layer 203. Therefore, themetal reflecting layer 300 can be directly contacted with the P-type semiconductor layer 203, the use of an intermediate adhesive metal layer can be avoided, and the brightness and the current resistance of the flip-chip LED chip can be improved.

The insulatingreflective layer 400 is preferably a multilayer structure, and may be formed by alternately stacking two or more of silicon oxide, titanium oxide, aluminum oxide, silicon nitride, and zinc oxide. The number of layers of the insulatingreflective layer 400 is preferably 5 to 61, and the thickness of the insulatingreflective layer 400 is preferably 0.5 to 4 μm.

The insulatingreflective layer 400 further has an insulating layer N-type via 401 therein. And etching theinsulation reflecting layer 400 to the upper surface of the N-type semiconductor layer 201 to form the insulation layer N-type throughhole 401 at the corresponding position of the N-type throughhole groove 204, wherein the diameter of the insulation layer N-type throughhole 401 is smaller than that of the N-type throughhole groove 204, so that theinsulation reflecting layer 400 covers the side wall of the N-type throughhole groove 204. The diameter of the insulating layer N-type via 401 is preferably 4 to 9 μm.

Between step S5 and step S6, the preparation method further includes:

forming an N-type metal layer 500 on the insulatingreflective layer 400, wherein the N-type metal layer 500 further fills the insulating layer N-type via 401;

etching the N-type metal layer 500 to the upper surface of theinsulation reflection layer 400 to form ametal layer groove 501;

forming an insulatingmedium layer 600 on the N-type metal layer 500, wherein the insulatingmedium layer 600 further fills themetal layer groove 501;

etching the insulatingdielectric layer 600 to the upper surface of the metalreflective layer 300 and the upper surface of the N-type metal layer 500 to form a dielectric layer groove, wherein the N-typewelding metal layer 701 covers part of the insulatingdielectric layer 600 and the N-type metal layer 500, and the P-typewelding metal layer 702 covers part of the insulatingdielectric layer 600 and the metalreflective layer 300.

Referring to fig. 7, an N-type metal layer 500 is formed on the insulatingreflective layer 400, and the N-type metal layer 500 covers the insulatingreflective layer 400 and the N-type semiconductor layer 201. The N-type metal layer 500 further has themetal layer groove 501, and themetal layer groove 501 is located at one end of the flip LED chip. The forming process of themetal layer groove 501 may be: the N-type metal layer 500 is etched, and the etching is stopped on the upper surface of the insulatingreflective layer 400, so as to form themetal layer groove 501.

Referring to fig. 8, an insulatingdielectric layer 600 is formed on the N-type metal layer 500, and the insulatingdielectric layer 600 covers the N-type metal layer 500 and the insulatingreflective layer 400. The thickness of the insulatingdielectric layer 600 is preferably 0.5 μm to 4 μm, and the material of the insulatingdielectric layer 600 includes at least one of silicon nitride, silicon dioxide, titanium dioxide, and aluminum oxide, but is not limited thereto. The insulatingdielectric layer 600 has a dielectric layer groove therein, and the N-type metal layer 500 and the metalreflective layer 300 are exposed respectively. The insulatingdielectric layer 600 is preferably formed by a chemical vapor deposition method, and then the dielectric layer groove is formed by an etching method.

The dielectric layer grooves include a firstdielectric layer groove 601 and a seconddielectric layer groove 602, the firstdielectric layer groove 601 and the seconddielectric layer groove 602 are respectively located at two ends of the flip LED chip, wherein the firstdielectric layer groove 601 penetrates through the insulatingdielectric layer 600 and the insulatingreflective layer 400 and exposes the metalreflective layer 300, and the firstdielectric layer groove 601 is located in a position corresponding to themetal layer groove 501, that is, the diameter of the firstdielectric layer groove 601 is smaller than that of themetal layer groove 501. The number of the firstdielectric layer grooves 601 is preferably multiple, and the first dielectric layer grooves are all located in the corresponding positions of themetal layer grooves 501. When a welding metal layer is formed subsequently, the P-typewelding metal layer 702 is electrically connected with themetal reflection layer 300 through the firstdielectric layer groove 601, so as to be electrically connected with the P-type semiconductor layer 203. The seconddielectric layer groove 602 exposes the N-type metal layer 500, and the seconddielectric layer groove 602 is located at one end of the flip LED chip away from the firstdielectric layer groove 601. The number of the seconddielectric layer grooves 602 is preferably one. When a welding metal layer is formed subsequently, the N-typewelding metal layer 701 is electrically connected with the N-type metal layer 500 through the seconddielectric layer groove 602, so as to be electrically connected with the N-type semiconductor layer 201.

Referring to fig. 9, in step S6, a solder metal layer is formed on the insulatingmedium layer 600, and the solder metal layers are respectively located at two ends of the flip-chip LED chip, namely an N-typesolder metal layer 701 and a P-typesolder metal layer 702. The N-typewelding metal layer 701 covers the N-type metal layer 500 and a part of the insulatingdielectric layer 600, that is, the N-typewelding metal layer 701 fills the seconddielectric layer groove 602 and is in contact with the N-type metal layer 500, and the N-typewelding metal layer 701 can be electrically connected with the N-type semiconductor layer 201 through the N-type metal layer 500.

The P-typewelding metal layer 702 covers themetal reflection layer 300 and a part of the insulatingdielectric layer 600, that is, the P-typewelding metal layer 702 fills the firstdielectric layer groove 601 and contacts with themetal reflection layer 300, and the P-typewelding metal layer 702 can be electrically connected with the P-type semiconductor layer 203 through themetal reflection layer 300.

The welding metal layer is further provided with a welding metal layer groove exposing the upper surface of the insulatingmedium layer 600, and the welding metal layer groove is located between the P-typewelding metal layer 702 and the N-typewelding metal layer 701. The P-typesolder metal layer 702 and the N-typesolder metal layer 701 may be electrically insulated by the insulatingdielectric layer 600 and the solder metal layer recess. The solder metal layer is preferably formed by overlapping a plurality of metals, and the material of the solder metal layer is preferably at least one of metals such as gold (Au), tin (Sn), or gold-tin alloy, but is not limited thereto.

In the embodiment, the epitaxial layer, the insulating reflective layer and the insulating dielectric layer can be formed on the substrate by any one of chemical vapor deposition, evaporation and other process methods; the metal reflection layer, the N-type metal layer and the welding metal layer can be formed by any one of the processes of electron beam evaporation, sputtering, ALD and the like; the grooves and vias are formed by an etching process, and preferably dry etching.

In summary, in the flip-chip LED chip provided by this embodiment, the plurality of metal layer through holes are prepared on the metal reflective layer, and the insulating reflective layer is in contact with the P-type semiconductor layer through the metal layer through holes, so that the contact capability between the metal reflective layer and the P-type semiconductor layer is increased, and the use of the middle adhesion metal layer can be avoided. In addition, the metal reflecting layer and the insulating reflecting layer are adopted in the embodiment, so that the brightness and the current resistance of the flip LED chip can be improved. That is, the flip LED chip provided by this embodiment has the advantages of both the processes of flipping the DBR mirror and flipping the metal mirror.

In addition, it is to be understood that while the present invention has been described in conjunction with the preferred embodiments thereof, it is not intended to limit the invention to those embodiments. It will be apparent to those skilled in the art from this disclosure that many changes and modifications can be made, or equivalents modified, in the embodiments of the invention without departing from the scope of the invention. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the scope of the protection of the technical solution of the present invention, unless the contents of the technical solution of the present invention are departed.

It is to be further understood that the present invention is not limited to the particular methodology, compounds, materials, manufacturing techniques, uses, and applications described herein, as such may, of course, vary. It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to limit the scope of the present invention. It must be noted that, as used herein and in the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to "a step" means a reference to one or more steps and may include sub-steps. All conjunctions used should be understood in the broadest sense. Thus, the word "or" should be understood to have the definition of a logical "or" rather than the definition of a logical "exclusive or" unless the context clearly dictates otherwise. Structures described herein are to be understood as also referring to functional equivalents of such structures. Language that can be construed as approximate should be understood as such unless the context clearly dictates otherwise.

Claims

1. A flip LED chip, comprising:

a substrate;

2. The flip LED chip of claim 1, wherein the N-type grooves comprise an N-type scribe groove located at an edge position of the epitaxial layer and an N-type via groove located inside the N-type scribe groove.

3. The flip LED chip of claim 2, wherein the edge location of the epitaxial layer further has an isolation groove exposing the substrate, the isolation groove communicating with the N-type scribe groove.

4. The flip LED chip of claim 2, wherein the insulating reflective layer further comprises an insulating layer N-via corresponding to the N-via recess, and the insulating layer N-via has a smaller diameter than the N-via recess, such that the insulating reflective layer covers sidewalls of the N-via recess.

5. The flip LED chip of claim 4, further comprising between the insulating reflective layer and the solder metal layer:

6. The flip LED chip of claim 5, wherein the dielectric layer recess comprises a first dielectric layer recess and a second dielectric layer recess, wherein the first dielectric layer recess penetrates through the insulating dielectric layer and the insulating reflective layer and exposes the metallic reflective layer, the first dielectric layer recess being located in a position corresponding to the metallic layer recess; and the N-type metal layer is exposed out of the groove of the second dielectric layer.

7. The flip LED chip of claim 5, wherein the dielectric layer comprises at least one of silicon nitride, silicon dioxide, titanium dioxide, and aluminum oxide.

8. The flip LED chip of claim 1, wherein the metal layer via has a diameter of 1 μ ι η to 20 μ ι η.

9. The flip LED chip of claim 1, wherein the metallic reflective layer comprises a metallic contact layer, a metallic barrier layer, and a metallic etch layer, which are sequentially stacked.

10. The flip LED chip of claim 9, wherein the metal contact layer comprises at least one of silver and aluminum.

11. The flip LED chip of claim 9, wherein the metal etch layer is formed of a stack of at least two metals of titanium, platinum, gold, nickel, and aluminum.

12. The flip LED chip of claim 1, wherein the insulating reflective layer is a multilayer structure and is formed by alternately stacking at least two materials selected from the group consisting of silicon oxide, titanium oxide, aluminum oxide, silicon nitride, and zinc oxide.

13. The flip LED chip of claim 12, wherein the number of layers of the insulating reflective layer is 5 to 61, and the thickness of the insulating reflective layer is 0.5 to 4 μ ι η.

14. A preparation method of a flip LED chip is characterized by comprising the following steps:

providing a substrate;

15. The method of manufacturing a flip LED chip according to claim 14, wherein the N-type grooves include an N-type scribe groove at an edge position of the N-type semiconductor layer and an N-type via groove inside the N-type scribe groove.

16. The method of fabricating a flip LED chip of claim 15, wherein prior to the step of forming a metal reflective layer on the P-type semiconductor layer, the method further comprises:

17. The method of fabricating a flip LED chip of claim 15, wherein after the step of forming an insulating reflective layer on the metallic reflective layer, the method further comprises: and etching the insulation reflecting layer to the upper surface of the N-type semiconductor layer to form an insulation layer N-type through hole at a position corresponding to the N-type through hole groove, wherein the diameter of the insulation layer N-type through hole is smaller than that of the N-type through hole groove, so that the insulation reflecting layer covers the side wall of the N-type through hole groove.

18. The method of fabricating a flip LED chip according to claim 17, wherein after the step of forming an insulating layer N-type via at a corresponding position of the N-type via recess, the method further comprises:

19. The method of claim 18, wherein the dielectric layer recess comprises a first dielectric layer recess and a second dielectric layer recess, wherein the first dielectric layer recess penetrates through the insulating dielectric layer and the insulating reflective layer and exposes the metallic reflective layer, and the first dielectric layer recess is located in a position corresponding to the metallic layer recess; and the N-type metal layer is exposed out of the groove of the second dielectric layer.

20. The method of claim 18, wherein the insulating dielectric layer comprises at least one of silicon nitride, silicon dioxide, titanium dioxide, and aluminum oxide.

21. The method of making a flip LED chip of claim 14, wherein the metal layer via has a diameter of 1 μ ι η to 20 μ ι η.

22. The method of fabricating the flip LED chip of claim 14, wherein the metal reflective layer comprises a metal contact layer, a metal barrier layer, and a metal etching layer, which are sequentially stacked.

23. The method of claim 22, wherein the metal contact layer comprises at least one of silver and aluminum.

24. The method of fabricating a flip LED chip of claim 22, wherein the metal etch layer is formed of a stack of at least two metals selected from the group consisting of titanium, platinum, gold, nickel, and aluminum.

25. The method of claim 14, wherein the insulating reflective layer has a multi-layer structure and is formed by alternately stacking at least two materials selected from the group consisting of silicon oxide, titanium oxide, aluminum oxide, silicon nitride, and zinc oxide.

26. The method of claim 25, wherein the number of insulating reflective layers is 5-61, and the thickness of the insulating reflective layers is 0.5-4 μm.