Disclosure of Invention
In order to solve the above-mentioned problems of the prior art, the present invention provides a liquid crystal panel driving method and a display device, which can solve the problem of the temperature rise of a Driver (driving region) caused by high polarity conversion frequency without increasing the cost.
An embodiment of the present invention provides a method of driving a liquid crystal panel, including:
step one, presetting a skip scanning mode of a liquid crystal panel GOA;
secondly, converting the polarity of a data line (data line) in each frame of picture time in a jumping and sweeping mode;
step three, realizing low-power-consumption driving display of a COF end of the liquid crystal panel;
wherein, the skipping is carried out in a GOA time sequence cycle period, and the scanning sequence of the scanning lines or the Gate is non-continuous and sequential;
the polarity inversion frequency of the data line is reduced by at least 0.5 times.
In an embodiment of the present invention, the skip-scan mode includes: a first preset skip-scan mode and a second preset skip-scan mode; the first preset skipping mode is realized by controlling the GOA time sequence starting sequence, and the second preset skipping mode is realized by changing the connection of the GOA and the time sequence signal line or changing the connection of the GOA and the time sequence signal line and matching to change the cascade connection between the GOA subunits.
In an embodiment of the present invention, the first preset skip-scan mode includes:
keeping the wiring sequence of the GOA unit and the time sequence signal unchanged;
the starting sequence of the timing signals is controlled by the timing control circuit.
In an embodiment of the present invention, the sequence of the turn-on of the timing signals is: a first timing signal (CLK1) → a third timing signal (CLK3) → a second timing signal (CLK2) → a fourth timing signal (CLK4) → a fifth timing signal (CLK5) → a seventh timing signal (CLK7) → a sixth timing signal (CLK6) → an eighth timing signal (CLK8), for controlling output signals of the corresponding scan lines or gates; when the panel pixels are M × N, namely the number of the row pixels is N, the polarity conversion frequency of the data lines is N/2 times.
In one embodiment of the present invention, the CLK signal turn-on sequence is first timing signal (CLK1) → third timing signal (CLK3) → fifth timing signal (CLK5) → seventh timing signal (CLK7) → second timing signal (CLK2) → fourth timing signal (CLK4) → sixth timing signal (CLK6) → eighth timing signal (CLK 8); when the panel pixels are M × N, namely the number of the row pixels is N, the polarity conversion frequency of the data lines is N/4 times.
In an embodiment of the present invention, the second preset skip-scan mode further includes:
external time sequence CLK signals are sequentially started, and the GOA is switched in the sequence of the external time sequence CLK signals or cascade connection among the GOA subunits is adjusted in a matching mode, so that the Gate is swept by the GOA.
In one embodiment of the present invention, the skipping sequence is first scan line (Gate1) → third scan line (Gate3) → second scan line (Gate2) → fourth scan line (Gate4) → fifth scan line (Gate5) → seventh scan line (Gate7) → sixth scan line (Gate6) → eighth scan line (Gate 8); when the panel pixels are M × N, namely the number of the row pixels is N, the polarity conversion frequency of the data lines is N/2 times.
In one embodiment of the present invention, the skipping sequence is first scan line (Gate1) → third scan line (Gate3) → fifth scan line (Gate5) → seventh scan line (Gate7) → second scan line (Gate2) → fourth scan line (Gate4) → sixth scan line (Gate6) → eighth scan line (Gate 8); when the panel pixels are M × N, namely the number of the row pixels is N, the polarity conversion frequency of the data lines is N/4 times.
Another embodiment of the present invention further provides a display device, which adopts any one of the foregoing driving methods of a liquid crystal panel.
Compared with the prior art, the invention has the following beneficial effects:
according to the invention, the GOA circuit and the CLK signal are not connected, and when the cascade relation between the GOA subunits is not changed, the starting sequence of the CLK signal is controlled through an external circuit, so that the skip scanning function of the GOA is realized; or the starting sequence of the CLK signal is not changed, and the cascade connection between the GOA sub-units is kept unchanged, only the wiring sequence of the GOA units and the CLK signal is changed, so that the jumping scan is realized, such as Gate1 → Gate3 → Gate2 → Gate4 → Gate5 → Gate7 → Gate6 → Gate8, and the Gate precharge time is kept unchanged; the jumping scan of the Gate1 → Gate3 → Gate5 → Gate7 → Gate2 → Gate4 → Gate6 → Gate8 can be realized by changing the connection sequence of the GOA unit and the CLK signal and changing the cascade relation between the GOA sub-units, and the Gate precharge time is kept unchanged; the polarity conversion frequency of the data line within one frame of picture time is reduced, the power consumption can be effectively reduced, and overhigh temperature is avoided.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
Example one
Referring to fig. 2, fig. 2 is a schematic structural diagram of a liquid crystal display device according to an embodiment of the invention; for example, the present embodiment provides an activematrix display device 10, including: adisplay panel 111 having a gate driving circuit and a source driving circuit thereon; theXB board 113 has thereon a drivecircuit board assembly 1130, asystem board 13, and aconnector CL 1. The activematrix display device 10 of the present embodiment is, for example, a TCONLESS type liquid crystal television, and the system-on-chip on the system board is integrated with at least part of the functions of the conventional TCON chip, and the XB board is integrated with at least part of the functions of the conventional TCON chip, but the embodiment of the present application is not limited thereto.
Thedisplay panel 111 includes a display region 1111, and a gate driving circuit and a source driving circuit electrically connected to the display region 1111. A plurality of data lines DL, a plurality of gate lines GL, and a plurality of pixels P electrically connecting the data lines DL and the gate lines GL are disposed in the display region 1111; each pixel P is located at the intersection of the corresponding gate line GL and data line DL. The Gate driving circuit includes, for example, two Gate-On Array (GOA)circuits 1113, the twoGOA circuits 1113 are located in a peripheral region of the display region 1111 and are respectively disposed at two opposite sides of the display region 1111, that is, the Gate driving circuit of thedisplay panel 111 is a dual-side GOA circuit. EachGOA circuit 1113 is electrically connected to a gate line GL in the display region 1111, and is configured to provide a gate driving signal to each gate line GL in the display region 1111. The source driver circuit includes, for example, a plurality of COFtype source drivers 1115, such as twelve COF (Chip-On-Flex)type source drivers 1115 shown in fig. 1; each COFtype source driver 1115 is electrically connected to the data lines DL in the display region 1111, and is used for supplying image data signals to each data line DL. More specifically, the single COFtype source driver 1115 includes, for example, a flexible circuit board and a source driver chip (source driver IC) provided on the flexible circuit board.
Referring to fig. 3, fig. 3 is a timing diagram of a liquid crystal display device according to an embodiment of the invention. For example, in the liquid crystal display device described above, each scanning line corresponds to one row of the pixel matrix, and each data line corresponds to one column of the pixel matrix. In the prior art, when a Frame (Frame) image is input, ascanning line 1 controls a gate of a TFT to be turned on,scanning lines 2 to 4 control the gate of the TFT to be turned off, and a data line synchronously transmits data signals of pixels in arow 1 in a first clock cycle. In the second clock period, thescanning line 2 controls the grid electrode of the TFT to be opened, thescanning lines 1, 3 and 4 control the grid electrode of the TFT to be closed, and the data line synchronously transmits data signals of the pixels in therow 2. In a third clock period, thescanning line 3 controls the grid electrode of the TFT to be opened, thescanning lines 1, 2 and 4 control the grid electrode of the TFT to be closed, and the data line synchronously transmits data signals of the pixels in therow 3. And in a fourth clock period, thescanning line 4 controls the grid electrode of the TFT to be opened, the scanning lines 1-3 control the grid electrode of the TFT to be closed, and the data line synchronously transmits data signals of 4 pixels in a row, so that the scanning of the current frame image is completed. When the next frame of image data is input, the scanning is performed cyclically according to the principle described above, that is, the conventional display device is designed such that the pixels are provided with data lines and the scanning lines are used as gates, and the scanning sequence of each frame is 1, 2, 3, and 4 ….
Referring to fig. 4-7, fig. 4 is a schematic diagram of a Column Inversion + Flip-Pixel liquid crystal panel heavy-load monochrome R-screen according to an embodiment of the present invention. Taking a Column Inversion + Flip-Pixel (Column Inversion + staggered control Pixel) design of a 4K screen and an example of a case of overloading a monochrome R picture, CLK 1-CLK 8 signals are sequentially turned on, Gate lines are scanned, corresponding Gate waveforms and Data1 waveforms are shown in fig. 6 and 7, fig. 6 is a waveform schematic diagram of a liquid crystal display device provided by an embodiment of the invention when CLK 1-CLK 8 are sequentially turned on, and fig. 7 is a corresponding Gate/Data1 waveform schematic diagram of a liquid crystal display device provided by an embodiment of the invention when CLK 1-CLK 8 are sequentially turned on. Fig. 5 is a schematic diagram of a circuit of the liquid crystal display device according to an embodiment of the present invention when CLK 1-CLK 8 are sequentially turned on, in which the GOA cascade relationship is three stages of push 5, pull 5 and precharge, so that the Gate on time is 4 × Tp (the 4 th Tp is the effective charging time of the scan line output signal controlled by the current stage GOA), and so on. Obviously, when the panel size is large, the scanning control of the single forward scanning or reverse scanning sequence is matched with the driving of Data (Data lines), and when the picture is overloaded, the phenomena of overhigh driving power consumption and overhigh temperature can be caused. Within one frame of picture time, the faster the period of polarity inversion, i.e. the higher the frequency of polarity inversion, the larger the power consumption and temperature rise.
Referring to fig. 8, fig. 8 is a schematic diagram illustrating a driving method of a liquid crystal panel according to an embodiment of the invention; the embodiment provides a driving method of a liquid crystal panel, which comprises the following steps:
step one (S1), presetting a skipping mode of a liquid crystal panel GOA;
step two (S2), converting the polarity of the data line (data line) in each frame of picture time by the jump scanning mode;
step three (S3), realizing low-power-consumption driving display of a COF end of the liquid crystal panel;
wherein, the skipping is carried out in a GOA time sequence cycle period, and the scanning sequence of the scanning lines or the Gate is non-continuous and sequential; the polarity inversion frequency of the data line is reduced by at least 0.5 times.
Further, in this embodiment, the skip-scan mode includes: a first preset skip-scan mode and a second preset skip-scan mode; the first preset skipping mode is realized by controlling the starting sequence of the GOA time sequence.
Further, the first preset skipping mode includes: and keeping the wiring sequence of the GOA unit and the time sequence signal unchanged, and controlling the starting sequence of the time sequence signal through a time sequence control circuit.
Further, the sequence of the turn-on of the timing signals is as follows: a first timing signal (CLK1) → a third timing signal (CLK3) → a second timing signal (CLK2) → a fourth timing signal (CLK4) → a fifth timing signal (CLK5) → a seventh timing signal (CLK7) → a sixth timing signal (CLK6) → an eighth timing signal (CLK8), for controlling output signals of the corresponding scan lines or gates; when the panel pixels are M × N, namely the number of the row pixels is N, the polarity conversion frequency of the data lines is N/2 times.
Specifically, when the turn-on sequence of the CLK signal is adjusted and controlled by the external circuit to be CLK1 → CLK3 → CLK2 → CLK4 → CLK5 → CLK7 → CLK6 → CLK8, the corresponding controlled Gate output signal varies, and the corresponding waveforms are as shown in fig. 9a and 9b, where fig. 9a is a schematic diagram of a waveform of the CLK signal turn-on according to the embodiment of the present invention, and fig. 9b is a schematic diagram of a waveform of the Gate/Data1 corresponding to the turn-on sequence of the CLK signal according to the embodiment of the present invention; for example, when a 4K-screen column inversion + Flip _ Pixel is used to reload a monochrome R picture, the above control method reduces the switching times of Data1 from 2160 to 1080 and the pre-on time is 3 × Tp, compared with the waveform indication of the sequential on sequence of the CLK signal.
It should be noted that the turn-on sequence of the CLK signal includes the above sequence, but the technical effect is not limited to the above turn-on sequence.
Example two
The present embodiment describes the driving method proposed by the present invention in detail based on the activematrix display device 10 of the above embodiment.
Referring to fig. 8, fig. 8 is a schematic diagram illustrating a driving method of a liquid crystal panel according to an embodiment of the invention; the embodiment provides a driving method of a liquid crystal panel, which comprises the following steps:
step one (S1), presetting a skipping mode of a liquid crystal panel GOA;
step two (S2), converting the polarity of the data line (data line) in each frame of picture time by the jump scanning mode;
step three (S3), realizing low-power-consumption driving display of a COF end of the liquid crystal panel;
wherein, the skipping is carried out in a GOA time sequence cycle period, and the scanning sequence of the scanning lines or the Gate is non-continuous and sequential; the polarity inversion frequency of the data line is reduced by at least 0.5 times.
Further, in this embodiment, the skip-scan mode includes: a first preset skip-scan mode and a second preset skip-scan mode; the first preset skipping mode is realized by controlling the starting sequence of the GOA time sequence.
Further, the first preset skipping mode includes: and keeping the wiring sequence of the GOA unit and the time sequence signal unchanged, and controlling the starting sequence of the time sequence signal through a time sequence control circuit.
Further, the CLK signal turn-on sequence is first timing signal (CLK1) → third timing signal (CLK3) → fifth timing signal (CLK5) → seventh timing signal (CLK7) → second timing signal (CLK2) → fourth timing signal (CLK4) → sixth timing signal (CLK6) → eighth timing signal (CLK 8); when the panel pixels are M × N, namely the number of the row pixels is N, the polarity conversion frequency of the data lines is N/4 times.
Specifically, when the start sequence of the control CLK signal is adjusted by the external circuit to be CLK1 → CLK3 → CLK5 → CLK7 → CLK2 → CLK4 → CLK6 → CLK8, the corresponding waveforms are as shown in fig. 10 and 11, fig. 10 is a schematic diagram of another CLK signal start sequence provided by the embodiment of the present invention, and fig. 11 is a schematic diagram of a Gate/Data1 corresponding to another CLK signal start sequence provided by the embodiment of the present invention; for example, when a Column Inversion + Flip-Pixel of 4K screen is used to reload a monochrome R picture, the above control method can reduce the number of switching times of Data1 from 2160 times to 540 times compared with the waveform indication of the sequential turn-on sequence of CLK signal, but there is a disadvantage that the Gate precharge time of this method is 1 × Tp.
It should be noted that the turn-on sequence of the CLK signal includes the above sequence, but the technical effect is not limited to the turn-on sequence.
In the first embodiment or the second embodiment, when the wiring between the GOA circuit and the CLK signal is not changed and the cascade relationship between the GOA subunits is not changed, the external timing control circuit controls the turn-on sequence of the CLK signal to implement the leap function of the GOA; but only when CLK1 → CLK3 → CLK5 → CLK7 → CLK2 → CLK4 → CLK6 → CLK8 is achieved, the Gate precharge time is 1 × Tp; but the polarity conversion frequency of the data line in one frame of picture time can be reduced to different degrees, so that the power consumption can be effectively reduced, and the overhigh temperature can be avoided.
EXAMPLE III
The present embodiment further describes the driving method proposed by the present invention in detail based on the activematrix display device 10 of the first embodiment.
Referring to fig. 8, fig. 8 is a schematic diagram illustrating a driving method of a liquid crystal panel according to an embodiment of the invention; the embodiment provides a driving method of a liquid crystal panel, which comprises the following steps:
step one (S1), presetting a skipping mode of a liquid crystal panel GOA;
step two (S2), converting the polarity of the data line (data line) in each frame of picture time by the jump scanning mode;
step three (S3), realizing low-power-consumption driving display of a COF end of the liquid crystal panel;
wherein, the skipping is carried out in a GOA time sequence cycle period, and the scanning sequence of the scanning lines or the Gate is non-continuous and sequential; the polarity inversion frequency of the data line is reduced by at least 0.5 times.
Further, in this embodiment, the skip-scan mode includes: a first preset skip-scan mode and a second preset skip-scan mode; the second predetermined skipping mode is realized by changing the connection of the GOA and the timing signal (CLK) line or by matching and changing the cascade connection between the GOA subunits.
Further, the second preset skipping mode includes: external time sequence CLK signals are sequentially started, and the GOA is switched in the sequence of the external time sequence CLK signals or cascade connection among the GOA subunits is adjusted in a matching mode, so that the Gate is swept by the GOA.
Further, the skipping sequence is first scan line (Gate1) → third scan line (Gate3) → second scan line (Gate2) → fourth scan line (Gate4) → fifth scan line (Gate5) → seventh scan line (Gate7) → sixth scan line (Gate6) → eighth scan line (Gate 8); when the panel pixels are M × N, namely the number of the row pixels is N, the polarity conversion frequency of the data lines is N/2 times.
Specifically, by changing the wiring sequence of the GOA and the CLK signal, the skip-scan sequence is Gate1 → Gate3 → Gate2 → Gate4 → Gate5 → Gate7 → Gate6 → Gate8, and the corresponding circuit diagram is shown in fig. 12, where fig. 12 is a circuit diagram for implementing a skip-scan sequence by changing the wiring sequence of the GOA and the CLK signal according to the embodiment of the present invention. Fig. 13, 14 and 15 show the connection between the GOA units and the CLK signals and the corresponding waveforms, where fig. 13 is a schematic diagram of the connection between the GOA units and the CLK signals according to the embodiment of the present invention, fig. 14 is a schematic diagram of waveforms corresponding to the GOA units and the CLK signals according to the embodiment of the present invention, and fig. 15 is a schematic diagram of Gate/Data1 waveforms corresponding to the connection between the GOA units and the CLK signals according to the embodiment of the present invention. For example, when a Column Inversion + Flip-Pixel 4K lcd panel shown in fig. 4 is used to reload a monochrome R screen, the control method of this embodiment also reduces the number of times of switching Data1 from 2160 times to 1080 times, and the pre-on time is 3 × Tp.
It should be noted that the skip-scan sequence includes the above sequence, but the technical effect is not limited to the skip-scan sequence.
In the embodiment, the turn-on sequence of the CLK signal is not changed, the cascade connection between the GOA sub-units is kept unchanged, and only the wiring sequence between the GOA unit and the CLK signal is changed, so that Gate1 → Gate3 → Gate2 → Gate4 → Gate5 → Gate7 → Gate6 → Gate8 is skipped, and the Gate precharge time is kept unchanged, so that the polarity conversion frequency of the data line within one frame of picture time can be reduced, the power consumption can be effectively reduced, and the over-high temperature can be avoided.
Example four
The present embodiment describes the driving method proposed by the present invention in detail based on the activematrix display device 10 of the first embodiment.
Referring to fig. 8, fig. 8 is a schematic diagram illustrating a driving method of a liquid crystal panel according to an embodiment of the invention; the embodiment provides a driving method of a liquid crystal panel, which comprises the following steps:
step one (S1), presetting a skipping mode of a liquid crystal panel GOA;
step two (S2), converting the polarity of the data line (data line) in each frame of picture time by the jump scanning mode;
step three (S3), realizing low-power-consumption driving display of a COF end of the liquid crystal panel;
wherein, the skipping is carried out in a GOA time sequence cycle period, and the scanning sequence of the scanning lines or the Gate is non-continuous and sequential; the polarity inversion frequency of the data line is reduced by at least 0.5 times.
Further, in this embodiment, the skip-scan mode includes: a first preset skip-scan mode and a second preset skip-scan mode; the second predetermined skipping mode is realized by changing the connection of the GOA and the timing signal (CLK) line or by matching and changing the cascade connection between the GOA subunits.
Further, the second preset skipping mode includes: external time sequence CLK signals are sequentially started, and the GOA is switched in the sequence of the external time sequence CLK signals or cascade connection among the GOA subunits is adjusted in a matching mode, so that the Gate is swept by the GOA.
Further, the skipping sequence is first scan line (Gate1) → third scan line (Gate3) → fifth scan line (Gate5) → seventh scan line (Gate7) → second scan line (Gate2) → fourth scan line (Gate4) → sixth scan line (Gate6) → eighth scan line (Gate 8); when the panel pixels are M × N, namely the number of the row pixels is N, the polarity conversion frequency of the data lines is N/4 times.
Specifically, by changing the wiring sequence of the GOA and the CLK signal, skip-scanning of Gate1 → Gate3 → Gate5 → Gate7 → Gate2 → Gate4 → Gate6 → Gate8 is realized, and the corresponding circuit diagram is as shown in fig. 16, where fig. 16 is another circuit diagram provided by the embodiment of the present invention, in which a skip-scanning sequence is realized by changing the wiring sequence of the GOA and the CLK signal; fig. 17, 18 and 19 show a connection between a GOA unit and a CLK signal and corresponding waveforms, where fig. 17 is a schematic diagram of another connection between a GOA unit and a CLK signal according to an embodiment of the present invention, fig. 18 is a schematic diagram of another waveform between a GOA unit and a CLK signal according to an embodiment of the present invention, and fig. 19 is a schematic diagram of another Gate/Data1 waveform between a GOA unit and a CLK signal according to an embodiment of the present invention. For example, when a 4K lcd panel of Column Inversion + Flip-Pixel shown in fig. 4 is used to reload a monochrome R screen, the control method of this embodiment also reduces the number of switching times of Data1 from 2160 times to 540 times, and the pre-on time is 3 × Tp.
It should be noted that the skip-scan sequence includes the above sequence but the technical effect is not limited to the skip-scan sequence.
The turn-on sequence of the CLK signal is not changed in this embodiment, and the Gate1 → Gate3 → Gate5 → Gate7 → Gate2 → Gate4 → Gate6 → Gate8 is realized by changing the connection sequence of the GOA unit and the CLK signal and changing the cascade relationship between the GOA subunits, and the Gate precharge time is kept unchanged, so that the polarity conversion frequency of the data line within one frame of picture time can be reduced, the power consumption can be effectively reduced, and the temperature is prevented from being too high.
EXAMPLE five
This embodiment provides a display device, which adopts the method for driving a liquid crystal panel according to any of the foregoing embodiments.
Specifically, please refer to fig. 2, fig. 2 is a schematic structural diagram of a liquid crystal display device according to an embodiment of the present invention; for example, the present embodiment provides an activematrix display device 10, including: adisplay panel 111 having a gate driving circuit and a source driving circuit thereon; theXB board 113 has thereon a drivecircuit board assembly 1130, asystem board 13, and aconnector CL 1. The activematrix display device 10 of the present embodiment is, for example, a TCONLESS type liquid crystal television, and the system-on-chip on the system board is integrated with at least part of the functions of the conventional TCON chip, and the XB board is integrated with at least part of the functions of the conventional TCON chip, but the embodiment of the present application is not limited thereto.
Thedisplay panel 111 includes a display region 1111, and a gate driving circuit and a source driving circuit electrically connected to the display region 1111. A plurality of data lines DL, a plurality of gate lines GL, and a plurality of pixels P electrically connecting the data lines DL and the gate lines GL are disposed in the display region 1111; each pixel P is located at the intersection of the corresponding gate line GL and data line DL. The Gate driving circuit includes, for example, two Gate-On Array (GOA)circuits 1113, the twoGOA circuits 1113 are located in a peripheral region of the display region 1111 and are respectively disposed at two opposite sides of the display region 1111, that is, the Gate driving circuit of thedisplay panel 111 is a dual-side GOA circuit. EachGOA circuit 1113 is electrically connected to a gate line GL in the display region 1111, and is configured to provide a gate driving signal to each gate line GL in the display region 1111. The source driver circuit includes, for example, a plurality of COFtype source drivers 1115, such as twelve COF (Chip-On-Flex)type source drivers 1115 shown in fig. 1; each COFtype source driver 1115 is electrically connected to the data lines DL in the display region 1111, and is used for supplying image data signals to each data line DL. More specifically, the single COFtype source driver 1115 includes, for example, a flexible circuit board and a source driver chip (source driver IC) provided on the flexible circuit board.
Referring to fig. 3 and fig. 5, fig. 3 is a timing diagram of a liquid crystal display device according to an embodiment of the present invention, for example, based on the liquid crystal display device, each scan line corresponds to a row of a pixel matrix, and each data line corresponds to a column of the pixel matrix; fig. 5 is a schematic diagram of a circuit of the liquid crystal display device according to an embodiment of the present invention when CLK 1-CLK 8 are sequentially turned on, in which the GOA cascade relationship is three stages of push 5, pull 5 and precharge, so that the Gate on time is 4 × Tp (Tp is the effective charging time of the scan line output signal controlled by the current stage GOA), and so on. Obviously, when the panel size is large, the scanning control of the single forward scanning or reverse scanning sequence is matched with the driving of Data (Data lines), and when the picture is overloaded, the phenomena of overhigh driving power consumption and overhigh temperature can be caused. Within one frame of picture time, the faster the period of polarity inversion, i.e. the higher the frequency of polarity inversion, the larger the power consumption and temperature rise. At this time, the driving method of the liquid crystal panel of the first embodiment, the second embodiment, the third embodiment, or the fourth embodiment may be adopted by:
step one (S1), presetting a skipping mode of a liquid crystal panel GOA;
step two (S2), converting the polarity of the data line (data line) in each frame of picture time by the jump scanning mode;
step three (S3), realizing low-power-consumption driving display of a COF end of the liquid crystal panel;
wherein, the skipping is carried out in a GOA time sequence cycle period, and the scanning sequence of the scanning lines or the Gate is non-continuous and sequential; the polarity inversion frequency of the data line is reduced by at least 0.5 times.
Further, the skip-scan mode includes: a first preset skip-scan mode and a second preset skip-scan mode; the first preset skipping mode is realized by controlling the GOA time sequence starting sequence, and the second preset skipping mode is realized by changing the connection of the GOA and a time sequence signal (CLK) line or collocating and changing the cascade connection between the GOA subunits.
Specifically, when the wiring of the GOA circuit and the CLK signal is unchanged and the cascade relation between the GOA subunits is unchanged, the starting sequence of the CLK signal is controlled through an external circuit, so that the skip scanning function of the GOA is realized; or the sequence of the starting of the CLK signal is not changed, and the cascade connection between the GOA sub-units is kept unchanged, only the sequence of the wiring of the GOA units and the CLK signal is changed, so that the skip scanning of the Gate1 → Gate3 → Gate2 → Gate4 → Gate5 → Gate7 → Gate6 → Gate8 is realized, and the time for precharging the Gate is kept unchanged; the jumping scan of the Gate1 → Gate3 → Gate5 → Gate7 → Gate2 → Gate4 → Gate6 → Gate8 can be realized by changing the connection sequence of the GOA unit and the CLK signal and changing the cascade relation between the GOA sub-units, and the Gate precharge time is kept unchanged; the polarity conversion frequency of the data line within one frame of picture time is reduced, the power consumption of the display device is effectively reduced, and overhigh temperature is avoided.
The above description is provided to further explain in detail the method for driving a liquid crystal panel and the display device according to the present invention with reference to the specific preferred embodiments, and the detailed embodiments of the present invention are not considered to be limited to the description, and the driver, the structure, the circuit and the related technologies of the liquid crystal display panel, which are not disclosed in the present application, which are known in the art or can be easily understood are not considered to be disclosed enough. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as the protection scope of the invention.