技术领域Technical Field
本披露一般地涉及芯片控制领域。更具体地，涉及一种用于对芯片进行调频的方法、设备及计算机可读存储介质。The present disclosure generally relates to the field of chip control, and more specifically, to a method, device and computer-readable storage medium for frequency modulation of a chip.
背景技术Background technique
近年来，随着数据量的增多，计算能力的增强，用于数据运算的计算设备及测试设备中，通常集成了大量的芯片。由于各种芯片的工作性能和制造工艺差别较大，会直接影响整个系统的功耗和运算性能，尤其是运算芯片的工作频率可以决定整个组合处理装置的功耗和工作性能。因此，如何动态调节芯片实际所需频率，已成为亟待解决的问题。In recent years, with the increase in data volume and computing power, a large number of chips are usually integrated into computing devices and test equipment used for data computing. Since the working performance and manufacturing process of various chips vary greatly, they will directly affect the power consumption and computing performance of the entire system, especially the working frequency of the computing chip can determine the power consumption and working performance of the entire combined processing device. Therefore, how to dynamically adjust the actual required frequency of the chip has become an urgent problem to be solved.
发明内容Summary of the invention
为了至少解决在上述背景技术部分所描述的一个或多个问题，以便通过调整一个或多个组合处理装置中的所述芯片的工作频率，进而提高整个组合处理装置的工作性能，本披露提出如下的技术方案及其多个实施例。In order to at least solve one or more of the problems described in the above background technology section, so as to improve the working performance of the entire combined processing device by adjusting the working frequency of the chips in one or more combined processing devices, the present disclosure proposes the following technical solution and its multiple embodiments.
在一个方面中，本披露公开了一种用于对芯片进行调频的方法，该方法包括获取至少一个芯片操作时的实时功耗采样值和N-1个预定执行周期内的平均功耗值，其中N是大于或等于2的正整数；以及基于所述实时功耗采样值、所述平均功耗值和平均功耗参考值，利用N个逐级串联的PID控制模块来确定用于调整所述至少一个芯片的时钟频率的调整量。In one aspect, the present disclosure discloses a method for frequency modulation of a chip, the method comprising obtaining a real-time power consumption sampling value of at least one chip during operation and an average power consumption value within N-1 predetermined execution cycles, where N is a positive integer greater than or equal to 2; and based on the real-time power consumption sampling value, the average power consumption value and the average power consumption reference value, using N PID control modules connected in series in sequence to determine an adjustment amount for adjusting the clock frequency of the at least one chip.
在另一个方面中，本披露还公开了一种用于对芯片进行调频的方法，该方法包括获取至少一个芯片操作时的实时功耗采样值；确定所述实时功耗采样值是否大于或等于快速降频阈值；当所述实时功耗采样值大于或等于所述快速降频阈值时，执行对所述至少一个芯片的快速降频操作；当所述实时功耗采样值小于所述快速降频阈值时，执行以下操作：获取N-1个预定执行周期内的平均功耗值，其中N是大于或等于2的正整数；以及基于所述实时功耗采样值、所述平均功耗值和平均功耗参考值，利用N个逐级串联的PID控制模块来确定用于调整所述至少一个芯片的时钟频率的调整量。In another aspect, the present disclosure also discloses a method for frequency modulation of a chip, the method comprising obtaining a real-time power consumption sampling value when at least one chip is operating; determining whether the real-time power consumption sampling value is greater than or equal to a fast frequency reduction threshold; when the real-time power consumption sampling value is greater than or equal to the fast frequency reduction threshold, performing a fast frequency reduction operation on the at least one chip; when the real-time power consumption sampling value is less than the fast frequency reduction threshold, performing the following operations: obtaining an average power consumption value within N-1 predetermined execution cycles, where N is a positive integer greater than or equal to 2; and based on the real-time power consumption sampling value, the average power consumption value and the average power consumption reference value, using N PID control modules connected in series in sequence to determine an adjustment amount for adjusting the clock frequency of the at least one chip.
在又一个方面中，本披露进一步公开了一种用于对芯片进行调频的设备，该设备包括：获取模块，其配置用于获取至少一个芯片操作时的实时功耗采样值和N-1个预定执行周期内的平均功耗值，其中N是大于或等于2的正整数；以及N个逐级串联的PID控制模块，其配置用于基于所述实时功耗采样值、所述平均功耗值和平均功耗参考值，确定用于调整所述至少一个芯片的时钟频率的调整量。In another aspect, the present disclosure further discloses a device for frequency modulation of a chip, the device comprising: an acquisition module, configured to acquire a real-time power consumption sampling value of at least one chip during operation and an average power consumption value within N-1 predetermined execution cycles, where N is a positive integer greater than or equal to 2; and N PID control modules connected in series in sequence, configured to determine an adjustment amount for adjusting the clock frequency of the at least one chip based on the real-time power consumption sampling value, the average power consumption value and the average power consumption reference value.
在一个方面中，本披露公开了一种用于对芯片进行调频的设备，该设备包括：获取模块，其配置用于获取至少一个芯片操作时的实时功耗采样值；确定模块，其配置用于确定所述实时功耗采样值是否大于或等于快速降频阈值；快速降频模块，其配置用于当所述实时功耗采样值大于或等于所述快速降频阈值时，执行对所述至少一个芯片的快速降频操作；N个逐级串联的PID控制模块，其配置用于当所述实时功耗采样值小于所述快速降频阈值时，执行以下操作：获取N-1个预定执行周期内的平均功耗值，其中N是大于或等于2的正整数；以及基于所述实时功耗采样值、所述平均功耗值和平均功耗参考值，确定用于调整所述至少一个芯片的时钟频率的调整量。In one aspect, the present disclosure discloses a device for frequency modulation of a chip, the device comprising: an acquisition module, configured to acquire a real-time power consumption sampling value when at least one chip is operating; a determination module, configured to determine whether the real-time power consumption sampling value is greater than or equal to a fast frequency reduction threshold; a fast frequency reduction module, configured to perform a fast frequency reduction operation on the at least one chip when the real-time power consumption sampling value is greater than or equal to the fast frequency reduction threshold; N PID control modules connected in series in sequence, configured to perform the following operations when the real-time power consumption sampling value is less than the fast frequency reduction threshold: acquiring an average power consumption value within N-1 predetermined execution cycles, where N is a positive integer greater than or equal to 2; and determining an adjustment amount for adjusting the clock frequency of the at least one chip based on the real-time power consumption sampling value, the average power consumption value and the average power consumption reference value.
在另一个方面中，本披露还公开了一种用于对芯片进行调频的设备，该设备包括：至少一个处理器；至少一个存储器，用于存储程序指令，当该程序指令由所述至少一个处理器执行时，使得所述设备执行前述的控制处理器的方法。In another aspect, the present disclosure also discloses a device for frequency modulation of a chip, the device comprising: at least one processor; at least one memory for storing program instructions, when the program instructions are executed by the at least one processor, the device executes the aforementioned method of controlling the processor.
在又一个方面中，本披露公开了一种用于对芯片进行调频的板卡，该板卡包括前述的任一设备。In yet another aspect, the present disclosure discloses a board for frequency tuning a chip, the board comprising any of the aforementioned devices.
在一个方面中，本披露公开了一种集成电路芯片，该芯片包括用于对芯片进行调频的内核，当所述集成电路芯片工作时，所述内核可配置成执行前述的任意一项控制处理器的方法。In one aspect, the present disclosure discloses an integrated circuit chip, which includes a core for frequency modulation of the chip. When the integrated circuit chip is working, the core can be configured to execute any one of the aforementioned methods for controlling a processor.
在又一个方面中，本披露公开了一种计算机可读存储介质，其存储有用于对芯片进行调频的程序指令，当该程序指令由处理器运行时，执行前述任意一项所述的方法。In yet another aspect, the present disclosure discloses a computer-readable storage medium storing program instructions for frequency modulation of a chip. When the program instructions are executed by a processor, any of the aforementioned methods is executed.
根据本披露所提出的方法、设备和计算机可读存储介质，可以利用改进的PID控制技术对相关芯片进行调频控制。在一些应用场景中，本披露通过外部MCU(“Microcontroller Unit微控制单元”)对相关芯片进行调频控制的方案可以直接应用于具有修改频率接口的芯片，从而实现动态调频。同时，在频率控制过程中，本地数据被采集后可以直接进行本地管理和应用，从而调频速度更快。另外，本披露的技术方案也可以进行灵活地调整，比如调整比例系数、调整定时清空时间以及去掉积分项等，以适应不同的应用需求。According to the method, device and computer-readable storage medium proposed in the present disclosure, the improved PID control technology can be used to control the frequency modulation of the relevant chips. In some application scenarios, the solution disclosed in the present disclosure for controlling the frequency modulation of the relevant chips through an external MCU ("Microcontroller Unit") can be directly applied to chips with a frequency modification interface, thereby realizing dynamic frequency modulation. At the same time, during the frequency control process, local data can be directly managed and applied locally after being collected, so that the frequency modulation speed is faster. In addition, the technical solution disclosed in the present disclosure can also be flexibly adjusted, such as adjusting the proportional coefficient, adjusting the timed clearing time, and removing the integral term, etc., to meet different application requirements.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
通过结合附图，可以更好地理解本披露的上述特征，并且其众多目的、特征和优点对于本领域技术人员而言是显而易见的。下面描述中的附图仅仅是本披露的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可根据这些附图获得其他的附图，其中：By combining the accompanying drawings, the above features of the present disclosure can be better understood, and its many purposes, features and advantages are obvious to those skilled in the art. The drawings described below are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work, among which:
图1是示出根据本披露实施例的用于对芯片进行调频的示例系统的操作流程的框图；FIG1 is a block diagram showing an operation flow of an exemplary system for frequency tuning a chip according to an embodiment of the present disclosure;
图2是示出根据本披露实施例的用于对芯片进行调频的方法的总体流程图；FIG2 is an overall flow chart showing a method for frequency tuning a chip according to an embodiment of the present disclosure;
图3是示出根据本披露实施例的用于对芯片进行调频的方法的详细流程图；FIG3 is a detailed flow chart showing a method for frequency modulation of a chip according to an embodiment of the present disclosure;
图4是示出根据本披露实施例的快速降频的调频方法的流程图；FIG4 is a flow chart showing a frequency modulation method for fast frequency reduction according to an embodiment of the present disclosure;
图5是示出根据本披露实施例的多级动态调频方法的总体流程图；FIG5 is an overall flow chart showing a multi-stage dynamic frequency modulation method according to an embodiment of the present disclosure;
图6是示出根据本披露实施例的二级动态调频方法的流程框图；FIG6 is a flowchart showing a secondary dynamic frequency modulation method according to an embodiment of the present disclosure;
图7是示出根据本披露实施例的三级动态调频方法的流程框图；FIG7 is a flowchart showing a three-level dynamic frequency modulation method according to an embodiment of the present disclosure;
图8是示出根据本披露实施例的多级动态调频方法的流程框图；FIG8 is a flowchart showing a multi-stage dynamic frequency modulation method according to an embodiment of the present disclosure;
图9是示出根据本披露实施例的具有多级和快速降频的调频方法的流程框图；FIG9 is a flow chart showing a frequency modulation method with multiple stages and fast frequency reduction according to an embodiment of the present disclosure;
图10是示出利用本披露实施例的设备对芯片进行调频的示意框图；FIG10 is a schematic block diagram showing frequency modulation of a chip using a device according to an embodiment of the present disclosure;
图11是示出利用本披露实施例的设备对芯片进行调频的另一示意框图；FIG11 is another schematic block diagram showing frequency modulation of a chip using the device of an embodiment of the present disclosure;
图12是示出根据本披露实施例的一种组合处理装置的结构框图；以及FIG12 is a structural block diagram showing a combined processing device according to an embodiment of the present disclosure; and
图13是示出根据本披露实施例的对芯片进行调频的板卡的结构框图。FIG. 13 is a block diagram showing a structure of a board for frequency modulation of a chip according to an embodiment of the present disclosure.
具体实施方式Detailed ways
本披露的技术方案提供了一种用于对芯片进行调频的方法、设备及计算机可读存储介质。通过实时采集芯片的功耗等数据，并使用PID控制模块来对芯片的工作频率进行增量调整，进而控制系统整体的工作性能。在一些实施例中，本披露的方案使用单个或单级的PID控制模块对单个或多个芯片的工作频率进行增量调整。在另一些实施例中，本公开的方案使用多级串联的PID控制模块来对芯片的频率进行更加精细的调整。利用本披露的技术方案，可以实现组合处理装置中的一个或多个芯片的工作频率的增量调整。在频率调整过程中可以消除静差作用的同时，还可以削弱超调的影响。同时，本披露的调频方案稳定可靠，在业务可以达到设定目标功耗的情况下，可以将实际板卡平均功耗控制在目标功耗的±1W范围内。The technical solution disclosed in the present invention provides a method, device and computer-readable storage medium for frequency modulation of a chip. By collecting data such as the power consumption of the chip in real time and using a PID control module to incrementally adjust the operating frequency of the chip, the overall working performance of the system is controlled. In some embodiments, the solution disclosed in the present invention uses a single or single-stage PID control module to incrementally adjust the operating frequency of a single or multiple chips. In other embodiments, the solution disclosed in the present invention uses a multi-stage PID control module in series to make a more precise adjustment to the frequency of the chip. Using the technical solution disclosed in the present invention, incremental adjustment of the operating frequency of one or more chips in a combined processing device can be achieved. While the static error effect can be eliminated during the frequency adjustment process, the influence of overshoot can also be weakened. At the same time, the frequency modulation scheme disclosed in the present invention is stable and reliable. When the business can achieve the set target power consumption, the actual average power consumption of the board can be controlled within the range of ±1W of the target power consumption.
应当理解，本披露关于上述的芯片调频的方案阐述了许多具体细节以便提供对本披露所述多个实施例的透彻理解。然而，本领域普通技术人员在本披露公开内容的教导下可以在没有这些具体细节的情况下实践本披露描述的多个实施例。在其他情况下，本披露公开的内容并没有详细描述公知的方法、过程和组件，以避免不必要地模糊本披露描述的实施例。进一步，该描述也不应被视为限制本披露的多个实施例的范围。It should be understood that the present disclosure sets forth many specific details regarding the above-mentioned chip frequency modulation scheme in order to provide a thorough understanding of the multiple embodiments described in the present disclosure. However, those of ordinary skill in the art can practice the multiple embodiments described in the present disclosure without these specific details under the guidance of the disclosure disclosed content. In other cases, the disclosure disclosed content does not describe in detail the well-known methods, processes and components to avoid unnecessarily obscuring the embodiments described in the present disclosure. Further, the description should not be considered to limit the scope of the multiple embodiments disclosed.
下面将结合附图，对本披露的多个实施例中的技术方案进行清楚和完整地描述。The technical solutions in multiple embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings.
图1是示出根据本披露实施例的用于对芯片进行调频的示例系统的操作流程100的框图。需要注意的是，这里的系统及其操作流程仅仅是示例性的而非限制性的。本系统除调频操作以外，还可以执行其他的操作，而这些操作将不在此处做详细的描述，以便不必要地混淆本披露的方案。FIG. 1 is a block diagram showing an operation flow 100 of an example system for frequency modulation of a chip according to an embodiment of the present disclosure. It should be noted that the system and its operation flow here are merely exemplary and not restrictive. In addition to the frequency modulation operation, the system can also perform other operations, which will not be described in detail here so as not to unnecessarily confuse the solution of the present disclosure.
如图1所示，本披露的系统操作流程包括在步骤101处对系统执行初始化操作。例如，在初始化操作中，可以根据实际应用情况针对系统来进行相应的参数设置，并且还可以调入初始数据，以便准备后续程序的执行。As shown in Figure 1, the system operation flow of the present disclosure includes performing an initialization operation on the system at step 101. For example, in the initialization operation, corresponding parameter settings can be performed for the system according to actual application conditions, and initial data can also be called in to prepare for the execution of subsequent programs.
在经过上述的初始化操作后，在步骤102和103处，本披露的调频系统可以并行地或串行地分别执行主循环操作和动态调频操作。这里，主循环操作可以是除动态调频操作以外系统所需执行各类操作或任务，例如针对于人工智能领域的机器学习相关的操作。在动态调频操作中，如前所述，可以使用PID控制模块来对芯片的工作频率进行调整。After the above initialization operation, at steps 102 and 103, the frequency modulation system of the present disclosure can respectively perform the main loop operation and the dynamic frequency modulation operation in parallel or in series. Here, the main loop operation can be various operations or tasks required by the system to perform in addition to the dynamic frequency modulation operation, such as operations related to machine learning in the field of artificial intelligence. In the dynamic frequency modulation operation, as mentioned above, a PID control module can be used to adjust the operating frequency of the chip.
在一个应用场景中，在如图所示的定时器的控制下，包括本披露的PID控制模块的MCU可以按照固定的时间间隔(例如1毫秒)来获取至少一个芯片操作时的实时功耗采样值，并且通过结合功耗目标值，从而确定用于调整芯片的时钟频率的调整量。此后，可以利用该调整量在步骤104中针对相关情形来对一个或多个芯片的时钟频率实施调频动作，由此进一步管控整个设备或系统的功耗。此处的相关情形可以例如是芯片的操作频率过高或过低，或者是需要动态调频的其他场景。In an application scenario, under the control of the timer as shown in the figure, the MCU including the PID control module disclosed herein can obtain the real-time power consumption sampling value of at least one chip during operation at a fixed time interval (e.g., 1 millisecond), and determine the adjustment amount for adjusting the clock frequency of the chip by combining the power consumption target value. Thereafter, the adjustment amount can be used to perform frequency modulation on the clock frequency of one or more chips in step 104 for relevant situations, thereby further controlling the power consumption of the entire device or system. The relevant situation here may be, for example, that the operating frequency of the chip is too high or too low, or other scenarios that require dynamic frequency modulation.
上面结合图1对本披露用于对芯片进行调频的系统的操作流程进行了简要的描述，下面将结合图2-图13对芯片进行调频的流程方法、及其设备和装置做出进一步描述。The operation process of the system for frequency modulation of a chip disclosed in the present invention is briefly described above in conjunction with FIG1 . The process method, equipment and device for frequency modulation of a chip, and the like will be further described below in conjunction with FIGS. 2-13 .
图2是示出根据本披露实施例的用于对芯片进行调频的方法200的总体流程图。可以理解的是，这里所讨论的调频方法可以结合图1系统的操作流程来执行。Fig. 2 is a general flow chart showing a method 200 for frequency modulation of a chip according to an embodiment of the present disclosure. It can be understood that the frequency modulation method discussed herein can be performed in conjunction with the operation flow of the system of Fig. 1 .
如图2所示，在步骤201处，方法200可以获取至少一个芯片操作时的实时功耗采样值。接着，在步骤202处，方法200根据所述实时功耗采样值(例如1毫秒内采到的芯片功耗)和功耗目标值(例如芯片的功耗期望值)，确定二者之间的误差值。在一个实施例中，可以通过对前述的实时功耗采样值和功耗目标值求取差值来获得二者之间的误差值。接着，在步骤203处，方法200基于所述误差值，利用PID控制模块来确定用于调整至少一个芯片的时钟频率的调整量。在一个实施例中，这里的调整量可以是基于前次调整频率的一个相对增量。由此，可以通过将所述调整量与芯片当前的时钟频率相加，以获得本次操作调整后的芯片的时钟频率。As shown in FIG2 , at step 201, method 200 can obtain a real-time power consumption sampling value when at least one chip is operating. Then, at step 202, method 200 determines the error value between the real-time power consumption sampling value (e.g., the chip power consumption sampled within 1 millisecond) and the power consumption target value (e.g., the expected power consumption of the chip) based on the real-time power consumption sampling value. In one embodiment, the error value between the real-time power consumption sampling value and the power consumption target value can be obtained by taking the difference between the two. Then, at step 203, method 200 determines the adjustment amount for adjusting the clock frequency of at least one chip based on the error value using a PID control module. In one embodiment, the adjustment amount here can be a relative increment based on the previous adjustment frequency. Thus, the clock frequency of the chip adjusted for this operation can be obtained by adding the adjustment amount to the current clock frequency of the chip.
为了更好的理解本披露的技术方案，下面将对本披露使用到的PID控制算法进行介绍。In order to better understand the technical solution of the present disclosure, the PID control algorithm used in the present disclosure will be introduced below.
PID控制算法是结合比例(P)、积分(I)和微分(D)的一种控制算法，其控制的实质就是根据输入的偏差值，按照比例、积分、微分的函数关系进行运算，并且将运算结果用以控制输出。本披露的PID控制算法对现有PID控制算法进行改进，输出值是一个调整量，并且可以是一个相对于前一次调整量的增量，从而有别于现有PID控制算法输出值是一个绝对数值的情形。在一个实施例中，本披露的PID控制算法可以采用如下的公式(1)来获得调整量△u(t)：The PID control algorithm is a control algorithm that combines proportion (P), integration (I) and differentiation (D). The essence of its control is to perform calculations according to the functional relationship of proportion, integration and differentiation based on the input deviation value, and use the calculation results to control the output. The PID control algorithm disclosed in this disclosure improves the existing PID control algorithm. The output value is an adjustment value, and can be an increment relative to the previous adjustment value, which is different from the situation where the output value of the existing PID control algorithm is an absolute value. In one embodiment, the PID control algorithm disclosed in this disclosure can use the following formula (1) to obtain the adjustment value △u(t):
△u(t)＝kp*e(t)+ki*Σe(t)+kd*(e(t)-e(t-1)) (1)△u(t)＝kp *e(t)+ki *Σe(t)+kd *(e(t)-e(t-1)) (1)
其中kp为比例系数，ki为积分系数，kd为微分系数。e(t)为误差值，Σe(t)为误差值累加和，e(t-1)为前一次误差值。kp*e(t)为比例项，ki*Σe(t)为积分项，kd*(e(t)-e(t-1))为微分项。Wherekp is the proportional coefficient,ki is the integral coefficient, andkd is the differential coefficient. e(t) is the error value, Σe(t) is the accumulated error value, and e(t-1) is the previous error value.kp *e(t) is the proportional term,ki *Σe(t) is the integral term, andkd *(e(t)-e(t-1)) is the differential term.
根据不同的应用场景，本披露的方案既可以通过比例项来获得调整量，也可以通过将比例项与积分项和微分项中的任意一项进行组合来获得调整量。进一步，还可以将前述的三者组合使用来获得调整量，进而执行对芯片的调频方案。另外，通过在不断实测的基础上进行改进，本披露的PID控制算法将仅适用于类线性系统的传统PID算法拓展到了非线性系统中，并且实测效果良好。According to different application scenarios, the scheme disclosed in the present invention can obtain the adjustment amount through the proportional term, or by combining the proportional term with any one of the integral term and the differential term. Furthermore, the aforementioned three can be used in combination to obtain the adjustment amount, and then the frequency modulation scheme of the chip is executed. In addition, by making improvements based on continuous actual measurements, the PID control algorithm disclosed in the present invention extends the traditional PID algorithm that is only applicable to quasi-linear systems to nonlinear systems, and the actual measured effect is good.
上文结合图2对本披露的方案以及所使用到的PID控制模块进行了描述。基于上述描述，本领域技术人员可以理解本披露的PID控制模块在实现方面可以具有用于确定比例项的比例控制单元。可选地，其还可以进一步包括用于确定积分项的积分控制单元和用于确定微分项的微分控制单元中的至少一个。通过比例项或者将比例项与积分项和微分项二者中的至少一个来组合以确定调整量，本披露提供了多种灵活的方式来对芯片进行调频操作。The above describes the scheme of the present disclosure and the PID control module used in conjunction with Figure 2. Based on the above description, those skilled in the art can understand that the PID control module of the present disclosure can have a proportional control unit for determining a proportional term in terms of implementation. Optionally, it can further include at least one of an integral control unit for determining an integral term and a differential control unit for determining a differential term. By combining the proportional term or the proportional term with at least one of the integral term and the differential term to determine the adjustment amount, the present disclosure provides a variety of flexible ways to perform frequency modulation operations on the chip.
图3是示出根据本披露实施例的用于对芯片进行调频的方法300的详细流程图。通过下文的描述，本领域技术人员可以理解图3是图2所示的用于对芯片进行调频的方法的进一步细化，并且关于图2的描述同样也适用于图3所示出的内容。FIG3 is a detailed flow chart showing a method 300 for frequency modulation of a chip according to an embodiment of the present disclosure. Through the following description, those skilled in the art can understand that FIG3 is a further refinement of the method for frequency modulation of a chip shown in FIG2, and the description of FIG2 is also applicable to the content shown in FIG3.
如图3所示，在步骤301处，方法300获取实时功耗采样值。在一个实施例中，获取所述实时功耗采样值包括周期性地(例如1毫秒)获取多个所述实时功耗采样值。接着，方法300进入步骤302处，计算当前实时功耗与目标功耗之间的误差值。在一个实施例中，确定每个所述实时功耗采样值与所述功耗目标值之间的误差值可以对该实时功耗采样值与功耗目标值(例如用户定义的芯片或者板卡的期望功耗)求取差值，并将该差值视为误差值。As shown in FIG3 , at step 301, method 300 obtains a real-time power consumption sampling value. In one embodiment, obtaining the real-time power consumption sampling value includes periodically (e.g., 1 millisecond) obtaining a plurality of the real-time power consumption sampling values. Next, method 300 enters step 302 to calculate the error value between the current real-time power consumption and the target power consumption. In one embodiment, determining the error value between each of the real-time power consumption sampling values and the power consumption target value can be performed by taking the difference between the real-time power consumption sampling value and the power consumption target value (e.g., the expected power consumption of a user-defined chip or board), and treating the difference as the error value.
在获得误差值之后，方法300前进到步骤303，此处可以根据误差值得到比例项。在利用前述PID控制模块来确定调整量的一个实施例中，可以基于所述误差值，利用PID控制模块中的比例控制单元来获得比例项。在一种具体实现中，获得比例项可以包括根据所述误差值、选择的比例系数(例如根据实测结果调整的参量)和量纲(例如赫兹/瓦)来获得。在一个实施例中，可以基于所述比例项来确定用于调整所述时钟频率的第一调整量。接着，如图3中所示，方法300可以直接前进到步骤310处执行调频操作。具体地，可以依据获得的前述第一调整量结合前一次调整所述时钟频率对一个或多个芯片的时钟频率实施调频动作。After obtaining the error value, method 300 proceeds to step 303, where a proportional term can be obtained based on the error value. In an embodiment of determining the adjustment amount using the aforementioned PID control module, the proportional term can be obtained based on the error value using a proportional control unit in the PID control module. In a specific implementation, obtaining the proportional term can include obtaining it based on the error value, a selected proportional coefficient (e.g., a parameter adjusted according to actual measurement results), and a dimension (e.g., Hertz/Watt). In one embodiment, a first adjustment amount for adjusting the clock frequency can be determined based on the proportional term. Then, as shown in FIG. 3 , method 300 can proceed directly to step 310 to perform a frequency modulation operation. Specifically, a frequency modulation action can be performed on the clock frequency of one or more chips based on the aforementioned first adjustment amount obtained in combination with the previous adjustment of the clock frequency.
作为上述的替代方案，在步骤304处，方法300判断是否到达预定时间段(例如1秒的时间段)，这例如可以通过图1中所示出的定时器来实现。当预定时间段到达时，方法300执行步骤305，即对累加和执行清零操作，以便重新开始下一所述预定时间段内的对误差值的累加操作。根据本披露的方案，该累加和的清零操作可以清除功耗调节可能引起的累积效应。为了便于说明该累积效应，假设在一个实现的场景中，目标功耗值(用户设定的预期功耗值)是75瓦，并且芯片在预定的时间段内一直处于空载，从而在该预定的时间段内获取的实时功耗采样值一直是30瓦。在该情况下，当进行累加操作时，在该预定的时间段内的误差值累加和相对会很大。若此时出现芯片的功耗采样值超过目标功耗值(即75瓦)的情形，则会因为累加和已经过大而导致此次功耗的误差值被中和(即前述的累积效应)，从而导致系统功耗长时间超标，既而影响系统性能。鉴于此，本披露的方案因此提出在预定的时间段内对误差值累加和执行清零操作，以避免累积效应。As an alternative to the above, at step 304, method 300 determines whether a predetermined time period (e.g., a time period of 1 second) has been reached, which can be achieved, for example, by the timer shown in FIG. 1. When the predetermined time period is reached, method 300 executes step 305, i.e., performs a zeroing operation on the cumulative sum, so as to restart the accumulation operation of the error value in the next predetermined time period. According to the scheme disclosed herein, the zeroing operation of the cumulative sum can clear the cumulative effect that may be caused by power consumption regulation. For the convenience of illustrating the cumulative effect, it is assumed that in an implementation scenario, the target power consumption value (the expected power consumption value set by the user) is 75 watts, and the chip is always unloaded during the predetermined time period, so that the real-time power consumption sampling value obtained during the predetermined time period is always 30 watts. In this case, when the accumulation operation is performed, the cumulative sum of the error values in the predetermined time period will be relatively large. If the power consumption sampling value of the chip exceeds the target power consumption value (i.e., 75 watts) at this time, the error value of the power consumption will be neutralized because the accumulated sum is too large (i.e., the aforementioned cumulative effect), causing the system power consumption to exceed the standard for a long time, thereby affecting the system performance. In view of this, the solution disclosed herein therefore proposes to perform a zeroing operation on the accumulated sum of the error values within a predetermined time period to avoid the cumulative effect.
作为步骤304和305的替代方案，方法300可以另一种方式来判断是否到达预定时间段。具体地，可以将获取一个所述实时功耗采样值的时间段称为一个采样周期，由此可以将预定时间段设定为包括一定数目的采样周期。当该数目的采样周期到达时，可以从累加和中清除最早的采样周期所获得的误差值，并且将最近的采样周期所获得的误差值计入到累加和中。例如，以预定时间段包括100个采样周期为例，从第1个采样周期开始，确定该采样周期获取的实时功耗采样值与目标功耗值之间的误差值，并且依次与下一个周期的所述误差值执行累加操作，以获得累加和。当第100个采样周期到达时，方法300可以对累加和中预定采样周期个数中的最早一个采样周期(即第1个采样周期)的所述误差值进行清除，以便对最近一个采样周期(即第101个采样周期)的所述误差值执行累加操作，以获得累加和。即，该更新的累加和累计计算的是第2个采样周期至第101个采样周期的所述误差值。可以看出，通过对预定时间段进行不同的设置，本披露对如何确定累加和给出了多种方案，由此进一步提升了本披露的应用灵活性。As an alternative to steps 304 and 305, method 300 may determine whether the predetermined time period has been reached in another way. Specifically, the time period for obtaining a real-time power consumption sampling value may be referred to as a sampling cycle, and thus the predetermined time period may be set to include a certain number of sampling cycles. When the number of sampling cycles is reached, the error value obtained in the earliest sampling cycle may be cleared from the cumulative sum, and the error value obtained in the most recent sampling cycle may be included in the cumulative sum. For example, taking the case where the predetermined time period includes 100 sampling cycles, starting from the first sampling cycle, the error value between the real-time power consumption sampling value obtained in the sampling cycle and the target power consumption value is determined, and the error value is sequentially accumulated with the error value of the next cycle to obtain the cumulative sum. When the 100th sampling cycle is reached, method 300 may clear the error value of the earliest sampling cycle (i.e., the first sampling cycle) in the predetermined number of sampling cycles in the cumulative sum, so as to perform an accumulation operation on the error value of the most recent sampling cycle (i.e., the 101st sampling cycle) to obtain the cumulative sum. That is, the updated cumulative sum cumulatively calculates the error value from the 2nd sampling period to the 101st sampling period. It can be seen that by setting the predetermined time period differently, the present disclosure provides multiple solutions for determining the cumulative sum, thereby further improving the application flexibility of the present disclosure.
相反地，在预定时间段还未到达时，则方法300执行步骤306，即将本次误差值加入至累加和中。在获得更新后的累加和后，在步骤307处，方法300根据累加和得到积分项。如前所述，获得积分项可以包括根据所述累加和、选择的积分系数和量纲(例如赫兹/瓦)来获得积分项。接着，在步骤308处，限制积分项范围。在一个实施例中，可以将积分项限制在选择的范围内，以便消除静差作用和避免超调作用。该范围例如可以是经验统计值或多次实测后确定的调整量。此后，方法300进入步骤309，此处可以根据比例项与限制范围后的积分项来获得频率调节参数，例如本披露所称的调整量。此后，方法300前进到步骤310，此处方法300根据获得的调整量来对至少一个芯片的时钟频率执行调频动作。On the contrary, when the predetermined time period has not yet arrived, the method 300 executes step 306, that is, the error value of this time is added to the cumulative sum. After obtaining the updated cumulative sum, at step 307, the method 300 obtains the integral term according to the cumulative sum. As described above, obtaining the integral term may include obtaining the integral term according to the cumulative sum, the selected integral coefficient and the dimension (e.g., Hertz/Watt). Then, at step 308, the integral term range is limited. In one embodiment, the integral term may be limited to a selected range to eliminate static error effects and avoid overshoot effects. The range may be, for example, an empirical statistical value or an adjustment amount determined after multiple actual measurements. Thereafter, the method 300 enters step 309, where a frequency adjustment parameter, such as the adjustment amount referred to in the present disclosure, may be obtained based on the proportional term and the integral term after the limited range. Thereafter, the method 300 proceeds to step 310, where the method 300 performs a frequency modulation action on the clock frequency of at least one chip according to the obtained adjustment amount.
替代地或可选地，在步骤303处获得比例项或步骤309处获得比例项与限制后的积分项后，可以根据实际应用场景选择与微分项组合来获得频率调节参数。在此种情况下，方法300根据本次确定的误差值与前一次确定的误差值执行减法操作以获得微分差值。接着，基于所述微分差值，利用所述PID控制模块中的微分控制单元来获得微分项。如前所述，获得微分项可以包括根据所述微分差值、选择的微分系数和量纲(例如赫兹/瓦)来获得微分项。最后，在步骤310处，方法300可以根据通过比例项以及积分项和微分项二者中的至少一项所获得的调整量来对芯片的时钟频率执行调频动作。当在确定调整量的过程中使用微分项时，可以对调频起到一定的超前调节作用，也可以使调频反应速度变得更快。Alternatively or optionally, after obtaining the proportional term at step 303 or the proportional term and the integral term after limitation at step 309, the frequency adjustment parameter can be obtained by combining with the differential term according to the actual application scenario. In this case, the method 300 performs a subtraction operation according to the error value determined this time and the error value determined last time to obtain a differential difference. Then, based on the differential difference, the differential control unit in the PID control module is used to obtain the differential term. As described above, obtaining the differential term may include obtaining the differential term according to the differential difference, the selected differential coefficient and the dimension (e.g., Hertz/Watt). Finally, at step 310, the method 300 may perform a frequency modulation action on the clock frequency of the chip according to the adjustment amount obtained by the proportional term and at least one of the integral term and the differential term. When the differential term is used in the process of determining the adjustment amount, it can play a certain leading adjustment role in the frequency modulation, and can also make the frequency modulation reaction speed faster.
通过上述结合步骤304-310的描述，本领域技术人员可以理解本披露在一个实施例中周期性地(例如1毫秒)获取多个所述实时功耗采样值，并且在预定时间段(例如1秒)内针对每个所述实时功耗采样值执行确定每个所述实时功耗采样值与所述功耗目标值之间的误差值，并且对每次确定的所述误差值执行累加操作以获得累加和。进一步，基于该累加和，利用所述PID控制模块中的积分控制单元来获得积分项。接着，可以基于获得的比例项和利用积分控制单元所获得的积分项来确定用于调整所述至少一个芯片的时钟频率的第二调整量(相对于前述的第一调整量而言)。Through the above description in combination with steps 304-310, those skilled in the art can understand that the present disclosure, in one embodiment, periodically (e.g., 1 millisecond) obtains a plurality of the real-time power consumption sampling values, and determines the error value between each of the real-time power consumption sampling values and the power consumption target value for each of the real-time power consumption sampling values within a predetermined time period (e.g., 1 second), and performs an accumulation operation on the error value determined each time to obtain a cumulative sum. Further, based on the cumulative sum, an integral term is obtained using the integral control unit in the PID control module. Next, a second adjustment amount (relative to the aforementioned first adjustment amount) for adjusting the clock frequency of the at least one chip can be determined based on the obtained proportional term and the integral term obtained using the integral control unit.
如前所述，除了可以获得上述的第二调整量，在一个或多个实施例中，本披露还可以基于获得的比例项和利用微分控制单元所获得的微分项来确定用于调整所述至少一个芯片的时钟频率的第三调整量。类似地，还可以基于前述获得的比例项、积分项和微分项来确定用于调整所述至少一个芯片的时钟频率的第四调整量。在一个应用场景中，该第二调整量、第三调整量和第四调整量中的每个是相对于前次调整所述时钟频率的增量。对于这四种示例性的调整量，本领域技术人员可以根据监测到的实际调频效果来进行实时的调整，从而实现对芯片的实时调频操作。As mentioned above, in addition to obtaining the above-mentioned second adjustment amount, in one or more embodiments, the present disclosure can also determine a third adjustment amount for adjusting the clock frequency of the at least one chip based on the obtained proportional term and the differential term obtained using the differential control unit. Similarly, the fourth adjustment amount for adjusting the clock frequency of the at least one chip can also be determined based on the aforementioned obtained proportional term, integral term, and differential term. In an application scenario, each of the second adjustment amount, the third adjustment amount, and the fourth adjustment amount is an increment relative to the previous adjustment of the clock frequency. For these four exemplary adjustment amounts, those skilled in the art can make real-time adjustments based on the actual frequency modulation effect monitored, thereby realizing real-time frequency modulation operations on the chip.
上文结合图2和图3描述了本披露在芯片功耗位于合理范围内时，对芯片执行的调频操作。下文将结合图4详细描述了芯片功耗波动瞬时变大到超过常规范围的情况下，对芯片执行快速降频的操作。The above describes the frequency modulation operation performed on the chip when the chip power consumption is within a reasonable range in conjunction with Figures 2 and 3. The following describes in detail the operation of rapidly reducing the frequency of the chip when the chip power consumption fluctuation becomes larger than the normal range in conjunction with Figure 4.
图4是示出根据本披露实施例的快速降频的调频方法400的流程图。如图4所示，在步骤401处，方法400获取至少一个芯片操作时的实时功耗采样值。例如，可以周期性地(例如1毫秒)采集至少一个芯片的实时功耗采样值。接着，在步骤402处，确定实时功耗采样值是否大于或等于快速降频阈值。在一个应用场景中，该快速降频阈值可以根据产品规格要求来确定，其计算公式例如可以为下式：FIG4 is a flow chart showing a frequency modulation method 400 for rapid frequency reduction according to an embodiment of the present disclosure. As shown in FIG4, at step 401, method 400 obtains a real-time power consumption sampling value when at least one chip is operating. For example, the real-time power consumption sampling value of at least one chip can be collected periodically (e.g., 1 millisecond). Then, at step 402, it is determined whether the real-time power consumption sampling value is greater than or equal to the rapid frequency reduction threshold. In an application scenario, the rapid frequency reduction threshold can be determined according to the product specification requirements, and its calculation formula can be, for example, the following formula:
Pth＝U*Imax (2)Pth ＝U*Imax (2)
其中U表示工作电压，Imax表示允许的最大电流，Pth表示快速降频阈值，*表示乘积关系。Wherein, U represents the operating voltage, Imax represents the maximum allowable current, Pth represents the fast frequency reduction threshold, and * represents the product relationship.
在另一个实施例中，该快速降频阈值也可以在前述公式计算结果的基础上，根据实测结果进行一定范围内的调整，该调整范围可以例如根据经验值来确定。In another embodiment, the fast frequency reduction threshold may also be adjusted within a certain range based on the calculation result of the above formula and according to actual measurement results. The adjustment range may be determined, for example, based on empirical values.
当实时功耗采样值大于或等于上述的快速降频阈值时，方法400前进到步骤403处，此时方法400执行对至少一个芯片的快速降频操作。在执行快速降频操作前，在一个或多个实施例中，可以确定芯片本次调整的目标频率值。在一个实施例中，该目标频率值可以由如下公式确定：When the real-time power consumption sampling value is greater than or equal to the above-mentioned fast frequency reduction threshold, method 400 proceeds to step 403, at which time method 400 performs a fast frequency reduction operation on at least one chip. Before performing the fast frequency reduction operation, in one or more embodiments, the target frequency value of the chip for this adjustment can be determined. In one embodiment, the target frequency value can be determined by the following formula:
Faim＝Fnow*(Paim-Pidle)/(Pnow-Pidle) (3)Faim = Fnow * (Paim - Pidle ) / (Pnow - Pidle ) (3)
其中Faim为目标频率，Fnow为当前频率，Paim为目标功耗，Pidle为空闲功耗，Pnow为当前功耗，*表示乘积关系。需要注意的是，在执行快速降频的瞬时，可以近似认为功耗与频率二者间是线性关系。本披露的方案可以借助于这样的线性关系来获得目标频率值，该目标频率值可以作为本次调整的时钟频率，从而对至少一个芯片执行相应的调频动作。Wherein,Faim is the target frequency,Fnow is the current frequency,Paiim is the target power consumption,Pid is the idle power consumption,Pnow is the current power consumption, and * represents a product relationship. It should be noted that at the moment of executing rapid frequency reduction, it can be approximately considered that there is a linear relationship between power consumption and frequency. The scheme disclosed herein can obtain a target frequency value by means of such a linear relationship, and the target frequency value can be used as the clock frequency for this adjustment, so as to perform a corresponding frequency modulation action on at least one chip.
相反地，当实时功耗采样值小于快速降频阈值时，方法400在步骤404处执行正常调频操作。例如，方法400可以根据实时功耗采样值和功耗目标值，确定二者之间的误差值。接着，方法400可以基于前述误差值，利用PID控制模块来确定用于调整所述至少一个芯片的时钟频率的调整量。由此，可以依据获得的调整量结合前一次调整所述时钟频率对一个或多个芯片的时钟频率执行正常调频操作。本领域技术人员可以理解的是，这里的正常调频操作可以是前面结合图3所执行的调频操作，因此前面结合图3所描述的对芯片进行调频的操作也同样适用于此处的正常调频操作，故相同或类似的内容在此处将不再赘述。On the contrary, when the real-time power consumption sampling value is less than the fast frequency reduction threshold, method 400 performs a normal frequency modulation operation at step 404. For example, method 400 can determine the error value between the real-time power consumption sampling value and the power consumption target value. Then, method 400 can determine the adjustment amount for adjusting the clock frequency of the at least one chip based on the aforementioned error value using the PID control module. Thus, a normal frequency modulation operation can be performed on the clock frequency of one or more chips based on the obtained adjustment amount combined with the previous adjustment of the clock frequency. It can be understood by those skilled in the art that the normal frequency modulation operation here can be the frequency modulation operation performed in conjunction with FIG. 3 above, and therefore the operation of frequency modulation of the chip described in conjunction with FIG. 3 above is also applicable to the normal frequency modulation operation here, so the same or similar content will not be repeated here.
在上文中，本披露结合图1-图4描述了对芯片执行单级PID(例如图6中所示出的第二级，稍后详细描述)的调频操作，下文将结合图5-图9对本披露的多级PID调频操作做出进一步地说明。In the above, the present disclosure describes the frequency modulation operation of performing a single-stage PID (such as the second stage shown in FIG. 6, which will be described in detail later) on the chip in combination with FIG. 1-FIG . 4. The multi-stage PID frequency modulation operation of the present disclosure will be further explained in combination with FIG. 5-FIG . 9.
图5是示出根据本披露实施例的多级动态调频方法500的总体流程图。通过利用方法500对芯片进行多级串行PID动态调频，可以使频率调节更加精细，并且在一定程度上允许短时间内功耗超过TDP(“Thermal Design Power，散热设计功耗”)功耗，从而提高系统性能。5 is an overall flow chart showing a multi-level dynamic frequency modulation method 500 according to an embodiment of the present disclosure. By using the method 500 to perform multi-level serial PID dynamic frequency modulation on the chip, the frequency adjustment can be made more precise, and to a certain extent, the power consumption can exceed the TDP (“Thermal Design Power”) power consumption in a short time, thereby improving the system performance.
如图5所示，在步骤501处，方法500获取至少一个芯片操作时的实时功耗采样值和N-1个预定执行周期内的平均功耗值，其中N是大于或等于2的正整数。在一个实施例中，N-1个预定执行周期T1，……TN-1和实时功耗采样值的采样周期TN满足关系T1(例如1秒)>T2(例如500毫秒)……TN-1(例如50毫秒)>TN(例如1毫秒)。接着，在步骤502处，方法500基于所述实时功耗采样值、所述平均功耗值和平均功耗参考值，利用N个逐级串联的PID控制模块来确定用于调整所述至少一个芯片的时钟频率的调整量。在一个实施场景中，本披露的平均功耗参考值可根据实际情况进行灵活设定。例如，可以通过上位机的“Power Capping”功能进行设定，该功能允许用户将平均功耗参考值限定在其指定的范围内。进一步，在修改该平均功耗参考值后，用户无须再调整其他参数，所有涉及到前一次的平均功耗参考值的参数将自动按照用户给出的新的平均功耗参考值来进行相应地调整。As shown in FIG5 , at step 501, method 500 obtains the real-time power consumption sampling value when at least one chip is operating and the average power consumption value within N-1 predetermined execution cycles, where N is a positive integer greater than or equal to 2. In one embodiment, the N-1 predetermined execution cycles T1 , ... TN-1 and the sampling cycle TN of the real-time power consumption sampling value satisfy the relationship T1 (e.g., 1 second)>T2 (e.g., 500 milliseconds) ... TN-1 (e.g., 50 milliseconds)>TN (e.g., 1 millisecond). Then, at step 502, method 500 determines the adjustment amount for adjusting the clock frequency of the at least one chip based on the real-time power consumption sampling value, the average power consumption value and the average power consumption reference value using N PID control modules connected in series step by step. In an implementation scenario, the average power consumption reference value disclosed in the present disclosure can be flexibly set according to actual conditions. For example, it can be set by the "Power Capping" function of the host computer, which allows the user to limit the average power consumption reference value to its specified range. Furthermore, after modifying the average power consumption reference value, the user does not need to adjust other parameters, and all parameters related to the previous average power consumption reference value will be automatically adjusted accordingly according to the new average power consumption reference value given by the user.
以上结合图5对多级动态调频方法500的总体流程进行了简要说明，为了便于进一步地理解本披露的多级调频方案，下文将结合图6以二级PID控制模块串联的方式对多级动态调频方法进行详细的描述。The above briefly describes the overall process of the multi-stage dynamic frequency modulation method 500 in combination with Figure 5. In order to facilitate further understanding of the multi-stage frequency modulation scheme disclosed in the present invention, the following will describe the multi-stage dynamic frequency modulation method in detail in combination with Figure 6 in which the two-stage PID control module is connected in series.
图6是示出根据本披露实施例的二级动态调频方法600的流程框图。正如将理解到的，方法600是前述图5描述的N级动态调频方法中当N等于2时的情形，即利用串联的初级PID控制模块和末级PID控制模块来确定所述调整量，并将该调整量从所述末级PID控制模块输出。FIG6 is a flowchart showing a two-stage dynamic frequency modulation method 600 according to an embodiment of the present disclosure. As will be understood, the method 600 is the case when N is equal to 2 in the N-stage dynamic frequency modulation method described in FIG5 above, that is, the adjustment amount is determined by using the primary PID control module and the final PID control module connected in series, and the adjustment amount is output from the final PID control module.
如图6所示，方法600可以分别获取至少一个芯片的初级PID控制模块的预定执行周期T1(例如1秒)内的第一平均功耗值601和与初级PID控制模块关联的平均功耗参考值602。接着，方法600可以将所述第一平均功耗值和所述平均功耗参考值输入至初级PID控制模块603中。进一步，方法600可以将初级PID控制模块603的输出值，即本次的调整量和前次调整操作的实时功耗目标值输入至一个处理模块中进行计算，而该处理模块的输出即是本次调整操作的实时功耗目标值604。此后，方法600可以将其输入至末级PID控制模块606。接着，基于实时功耗采样值605和本次调整操作的实时功耗目标值604，利用末级PID控制模块606来输出调整量。实时功耗目标值与实时功耗采样值输入至末级PID控制模块的工作流程与上文结合图3描述的对芯片进行单级调频的方法相同或类似，此处将不再赘述。As shown in FIG6 , the method 600 can respectively obtain a first average power consumption value 601 and an average power consumption reference value 602 associated with the primary PID control module within a predetermined execution period T1 (e.g., 1 second) of the primary PID control module of at least one chip. Then, the method 600 can input the first average power consumption value and the average power consumption reference value into the primary PID control module 603. Further, the method 600 can input the output value of the primary PID control module 603, that is, the current adjustment amount and the real-time power consumption target value of the previous adjustment operation into a processing module for calculation, and the output of the processing module is the real-time power consumption target value 604 of the current adjustment operation. Thereafter, the method 600 can input it into the final PID control module 606. Then, based on the real-time power consumption sampling value 605 and the real-time power consumption target value 604 of the current adjustment operation, the final PID control module 606 is used to output the adjustment amount. The workflow of inputting the real-time power consumption target value and the real-time power consumption sampling value into the final PID control module is the same or similar to the method for performing single-stage frequency modulation on the chip described above in conjunction with FIG3 , and will not be repeated here.
最后，在步骤607处，方法600基于末级PID控制模块606输出值和芯片前次调整操作的时钟频率，可以获得芯片本次调整操作的时钟频率，依据该时钟频率执行相应的调频动作。如前所述，所述调整量可以是相对于前次调整时钟频率的增量。在一个实施例中，初级PID控制模块的预定执行周期T1(例如1秒)大于所述实时功耗采样值的采样周期TN(例如1毫秒)。Finally, at step 607, the method 600 can obtain the clock frequency of the current chip adjustment operation based on the output value of the final PID control module 606 and the clock frequency of the previous chip adjustment operation, and perform the corresponding frequency modulation action according to the clock frequency. As mentioned above, the adjustment amount can be an increment relative to the previous adjustment clock frequency. In one embodiment, the predetermined execution periodT1 (e.g., 1 second) of the primary PID control module is greater than the sampling periodTN (e.g., 1 millisecond) of the real-time power consumption sampling value.
图7是示出根据本披露实施例的三级动态调频方法700的流程框图。这里在图5-图6的基础上，对本披露的方案做出进一步细化描述，因此关于图5-图6所做的多级动态调频的描述也同样适用于图7的操作。如图7所示，这里绘出了N级动态调频方法中当N等于3时的情形，即利用串联的初级PID控制模块、第二级PID控制模块和末级PID控制模块来确定所述调整量，并且将该调整量从所述末级PID控制模块输出。FIG7 is a flowchart showing a three-level dynamic frequency modulation method 700 according to an embodiment of the present disclosure. Here, based on FIG5-FIG6, the scheme of the present disclosure is further described in detail, so the description of the multi-level dynamic frequency modulation made in FIG5-FIG6 is also applicable to the operation of FIG7. As shown in FIG7, the situation when N is equal to 3 in the N-level dynamic frequency modulation method is drawn here, that is, the primary PID control module, the second-level PID control module and the final-level PID control module connected in series are used to determine the adjustment amount, and the adjustment amount is output from the final-level PID control module.
具体地，方法700分别获取所述至少一个芯片的初级PID控制模块的预定执行周期T1(例如1秒)内的第一平均功耗值701和与初级PID控制模块关联的平均功耗参考值702，输入至初级PID控制模块703，以令其输出与第二级PID控制模块706关联的第二平均功耗目标值的调整值。接着，方法700获取第二级PID控制模块的预定执行周期T2内的第二平均功耗值705，并且将其输入至第二级PID控制模块706。进一步，利用调整值对第二平均功耗目标值进行调整来获得调整后的第二平均功耗目标值704，并将其输入至所述第二级PID控制模块706。Specifically, the method 700 obtains the first average power consumption value 701 within the predetermined execution period T1 (e.g., 1 second) of the primary PID control module of the at least one chip and the average power consumption reference value 702 associated with the primary PID control module, and inputs them into the primary PID control module 703 to make it output the adjustment value of the second average power consumption target value associated with the second-level PID control module 706. Next, the method 700 obtains the second average power consumption value 705 within the predetermined execution period T2 of the second-level PID control module, and inputs it into the second-level PID control module 706. Further, the second average power consumption target value is adjusted by using the adjustment value to obtain the adjusted second average power consumption target value 704, and inputs it into the second-level PID control module 706.
更进一步，基于第二级PID控制模块706的输出值和前次调整操作的实时功耗目标值来获得本次调整操作的实时功耗目标值707，并且将其输入至末级PID控制模块709。接着，基于实时功耗采样值708和本次调整操作的实时功耗目标值707，利用末级PID控制模块709输出所述调整量。在一个实施例中，实时功耗采样值的采样周期为TN，并且所述第二级PID控制模块的预定执行周期T2满足关系T1(例如1秒)>T2(例如200毫秒)>TN(例如1毫秒)。在一个示例性实施场景中，当作为初级PID控制模块输入值的平均功耗参考值是TDP功耗(例如75瓦)时，如果预定执行周期(例如1秒)内第一平均功耗值低于平均功耗参考值(即TDP功耗)，则可以升高下一级PID控制模块(例如第二级PID控制模块)的输入值，使该平均功耗目标值减少抑制功耗的力度；反之，当第一平均功耗值高于平均功耗参考值(即TDP功耗)时，则可以降低下一级PID控制模块的平均功耗目标值，以加大对功耗的抑制力度。Furthermore, the real-time power consumption target value 707 of the current adjustment operation is obtained based on the output value of the second-level PID control module 706 and the real-time power consumption target value of the previous adjustment operation, and is input to the final-level PID control module 709. Then, based on the real-time power consumption sampling value 708 and the real-time power consumption target value 707 of the current adjustment operation, the final-level PID control module 709 outputs the adjustment amount. In one embodiment, the sampling period of the real-time power consumption sampling value isTN , and the predetermined execution periodT2 of the second-level PID control module satisfies the relationshipT1 (e.g., 1 second)>T2 (e.g., 200 milliseconds)>TN (e.g., 1 millisecond). In an exemplary implementation scenario, when the average power consumption reference value used as the input value of the primary PID control module is the TDP power consumption (e.g., 75 watts), if the first average power consumption value within a predetermined execution cycle (e.g., 1 second) is lower than the average power consumption reference value (i.e., TDP power consumption), the input value of the next-level PID control module (e.g., the second-level PID control module) can be increased so that the average power consumption target value reduces the intensity of suppressing power consumption; conversely, when the first average power consumption value is higher than the average power consumption reference value (i.e., TDP power consumption), the average power consumption target value of the next-level PID control module can be lowered to increase the intensity of suppressing power consumption.
类似图6中所示出的，在获得上述至少一个芯片的时钟频率调整量后，在步骤710处，方法700基于末级PID控制模块709输出值和芯片前次调整操作的时钟频率，可以获得芯片本次调整操作的时钟频率，并依据该时钟频率执行相应的调频动作。Similar to what is shown in FIG6 , after obtaining the clock frequency adjustment amount of at least one of the above-mentioned chips, at step 710, method 700 can obtain the clock frequency of the current adjustment operation of the chip based on the output value of the final-stage PID control module 709 and the clock frequency of the previous adjustment operation of the chip, and perform corresponding frequency modulation actions according to the clock frequency.
图8是示出根据本披露实施例的多级动态调频方法800的流程框图。这里在图5-图7的基础上，对本披露的方案做出进一步细化描述，因此关于图5-图7所做的多级动态调频的描述也同样适用于图8的操作。Fig. 8 is a flowchart showing a multi-level dynamic frequency modulation method 800 according to an embodiment of the present disclosure. Here, based on Fig. 5-Fig. 7, the scheme of the present disclosure is further described in detail, so the description of the multi-level dynamic frequency modulation made in Fig. 5-Fig. 7 is also applicable to the operation of Fig. 8.
如图8所示，其示出N级动态调频方法中N大于等于4时的情形，即利用串联的初级PID控制模块、第二级PID控制模块，……，第N-1级PID控制模块和末级PID控制模块来确定所述调整量，并且将该调整量从所述末级PID控制模块输出。As shown in FIG8 , it illustrates the situation when N is greater than or equal to 4 in the N-stage dynamic frequency modulation method, that is, the adjustment amount is determined by using the primary PID control module, the second-stage PID control module, ..., the N-1-th stage PID control module and the final stage PID control module connected in series, and the adjustment amount is output from the final stage PID control module.
首先，方法800获取初级PID控制模块803至第N-1级PID控制模块809在其各自预定执行周期T1，……TN-1内的第一平均功耗值801、第二平均功耗值805至第N-1平均功耗值808，并将其分别输入到所述初级PID控制模块803、第二级PID控制模块806、……至第N-1级PID控制模块809中。在一个实施例中，初级PID控制模块至第N-1级PID控制模块的各自预定执行周期T1，……TN-1和实时功耗采样值的采样周期TN满足关系T1(例如1秒)>T2(例如500毫秒)……TN-1(例如50毫秒)>TN(例如1毫秒)。接着，将第一平均功耗值801和与初级PID控制模块关联的平均功耗参考值802输入至初级PID控制模块803，并且令初级PID控制模块至第N-2级PID控制模块的输出向各自的下一级PID控制模块输入，其中所述初级PID控制模块至第N-2级PID控制模块的每个输出是对与相应后一级PID控制模块关联的平均功耗目标值的调整值。进一步，利用每个调整值对相应后一级的平均功耗目标值进行调整来分别获得调整后的第二平均功耗目标值804，……和第N-1平均功耗目标值807，并且将其分别输入至相应的第二级PID控制模块806，……至第N-1级PID控制模块809。First, the method 800 obtains the first average power consumption value 801, the second average power consumption value 805 to the N-1th average power consumption value 808 of the primary PID control module 803 to the N-1th PID control module 809 in their respective predetermined execution cycles T1 , ... TN-1 , and inputs them into the primary PID control module 803, the second level PID control module 806, ... to the N-1th level PID control module 809. In one embodiment, the respective predetermined execution cycles T1 , ... TN-1 of the primary PID control module to the N-1th level PID control module and the sampling cycle TN of the real-time power consumption sampling value satisfy the relationship T1 (e.g., 1 second)>T2 (e.g., 500 milliseconds) ... TN-1 (e.g., 50 milliseconds)>TN (e.g., 1 millisecond). Next, the first average power consumption value 801 and the average power consumption reference value 802 associated with the primary PID control module are input into the primary PID control module 803, and the outputs from the primary PID control module to the N-2nd level PID control module are input into the respective next-level PID control modules, wherein each output from the primary PID control module to the N-2nd level PID control module is an adjustment value for the average power consumption target value associated with the corresponding next-level PID control module. Further, the average power consumption target value of the corresponding next-level is adjusted by each adjustment value to obtain the adjusted second average power consumption target value 804, ... and the N-1st average power consumption target value 807, respectively, and they are respectively input into the corresponding second-level PID control module 806, ... to the N-1st level PID control module 809.
更进一步，基于第N-1级PID控制模块809的输出值和前次调整操作的实时功耗目标值来获得本次调整操作的实时功耗目标值810，并且将其输入至末级PID控制模块812。以及，基于实时功耗采样值811和本次调整操作的实时功耗目标值810，利用末级PID控制模块812输出所述调整量。实时功耗采样值与实时功耗目标值输入至末级PID控制模块的工作流程与上文结合图3描述的对芯片进行单级调频的方法相同或类似，此处将不再赘述。最后，在步骤813处，方法800基于末级PID控制模块812输出值和芯片前次调整操作的时钟频率，可以获得芯片本次调整操作的时钟频率，并依据该时钟频率执行相应的调频动作。Furthermore, the real-time power consumption target value 810 of this adjustment operation is obtained based on the output value of the N-1th level PID control module 809 and the real-time power consumption target value of the previous adjustment operation, and is input into the final-level PID control module 812. And, based on the real-time power consumption sampling value 811 and the real-time power consumption target value 810 of this adjustment operation, the final-level PID control module 812 is used to output the adjustment amount. The workflow of inputting the real-time power consumption sampling value and the real-time power consumption target value into the final-level PID control module is the same or similar to the method for single-level frequency modulation of the chip described above in conjunction with FIG. 3, and will not be repeated here. Finally, at step 813, method 800 can obtain the clock frequency of the chip for this adjustment operation based on the output value of the final-level PID control module 812 and the clock frequency of the previous adjustment operation of the chip, and perform corresponding frequency modulation actions according to the clock frequency.
本披露的前文结合至少一个芯片对采集功耗及其调频方案进行了描述。然而，本披露的方案也适用于对包括一个或多个芯片的板卡的功耗进行采集。换句话说，本披露采集功耗的对象既可以是芯片，也可以是包括芯片的板卡。下面将结合图9以采集板卡的整板功耗作为示例来进一步描述调频的方法。The foregoing text of this disclosure describes the power consumption collection and frequency modulation scheme in conjunction with at least one chip. However, the scheme of this disclosure is also applicable to the collection of power consumption of a board including one or more chips. In other words, the object of power consumption collection in this disclosure can be either a chip or a board including a chip. The frequency modulation method will be further described below in conjunction with FIG. 9 using the power consumption of the entire board of the collection board as an example.
图9是示出根据本披露实施例的具有多级和快速降频的调频方法900的流程框图。本领域技术人员可以理解的是，图9的技术方案是在图4-图8所示的快速降频和多级PID调频结合后的调频方法。因此，关于图4-图8中所描述的技术细节在图9中也同样适用。FIG9 is a flowchart showing a frequency modulation method 900 with multi-stage and fast frequency reduction according to an embodiment of the present disclosure. It can be understood by those skilled in the art that the technical solution of FIG9 is a frequency modulation method after the fast frequency reduction and multi-stage PID frequency modulation shown in FIG4-FIG8 are combined. Therefore, the technical details described in FIG4-FIG8 are also applicable to FIG9.
如图9所示，在步骤901处，等待上一次的调频动作结束，即利用末级PID的输出对芯片进行调频的过程期间。由于调频动作从开始到执行完成需要一定的时间，在调频开始之后，到等待调频完成的时间段内，本披露的方案也允许并行执行其他任务(例如图1中所示出的主循环102执行的任务)，从而可以提高动态调频的效率。直到前次调频动作完成后，方法900进入到步骤902，此处可以获取整板功耗，该整板可以是包括一个或多个待调频的芯片的板卡。在实际场景中，例如可以通过板卡上的传感器来实时采集整板功耗，以获取整板操作时的实时功耗采样值，也可以通过板卡上的传感器来实时采集芯片功耗，以获取至少一个芯片操作时的实时功耗采样值，进而获取整板实时功耗采样值。接着，在步骤903处，每获取一个整板实时功耗采样值后，方法900确定整板实时功耗采样值是否大于或等于整板快速降频阈值。在一个实施例中，该快速降频阈值可以根据前述公式(2)来计算获得。在另一个实施例中，该阈值也可以在前述公式(2)计算数值的基础上，根据实测结果进行一定范围的调整，该调整范围可以根据经验值确定。As shown in FIG9 , at step 901, the last frequency modulation action is waited to be completed, that is, during the process of frequency modulation of the chip using the output of the final PID. Since the frequency modulation action takes a certain amount of time from the start to the completion of the execution, after the frequency modulation starts, during the time period of waiting for the frequency modulation to be completed, the scheme disclosed in the present invention also allows other tasks (such as the tasks performed by the main loop 102 shown in FIG1 ) to be executed in parallel, thereby improving the efficiency of dynamic frequency modulation. Until the last frequency modulation action is completed, the method 900 enters step 902, where the power consumption of the whole board can be obtained, and the whole board can be a board including one or more chips to be frequency modulated. In the actual scenario, for example, the power consumption of the whole board can be collected in real time by the sensor on the board to obtain the real-time power consumption sampling value when the whole board is in operation, and the power consumption of the chip can also be collected in real time by the sensor on the board to obtain the real-time power consumption sampling value when at least one chip is in operation, and then the real-time power consumption sampling value of the whole board is obtained. Then, at step 903, after each real-time power consumption sampling value of the whole board is obtained, the method 900 determines whether the real-time power consumption sampling value of the whole board is greater than or equal to the fast frequency reduction threshold of the whole board. In one embodiment, the fast frequency reduction threshold can be calculated according to the above formula (2). In another embodiment, the threshold can also be adjusted within a certain range according to the actual measurement results based on the value calculated by the above formula (2), and the adjustment range can be determined according to the empirical value.
当整板实时功耗采样值小于整板快速降频阈值时，方法900前进到步骤904，此处计算预定时间段(例如1秒)内的平均功耗值。接着，在步骤905处，方法900执行多级动态调频的操作，即前面结合图6-图8所描述的多级PID调频操作。最后，在步骤906处，方法900根据确定的调整量和芯片前次调整操作的时钟频率，以获得芯片本次操作调整的调频参数(即时钟频率)。When the real-time power consumption sampling value of the whole board is less than the fast frequency reduction threshold of the whole board, the method 900 proceeds to step 904, where the average power consumption value within a predetermined time period (e.g., 1 second) is calculated. Next, at step 905, the method 900 performs a multi-level dynamic frequency modulation operation, i.e., the multi-level PID frequency modulation operation described above in conjunction with FIG. 6-FIG 8. Finally, at step 906, the method 900 obtains the frequency modulation parameter (i.e., clock frequency) of the chip for this operation adjustment based on the determined adjustment amount and the clock frequency of the chip's previous adjustment operation.
相反地，当整板实时功耗采样值大于或等于整板快速降频阈值时，则方法900在步骤908处计算整板快速降频的目标频率值。该情形例如可以发生在当检测到整板瞬时功耗较大(例如超过1.2倍TDP)后，为了能在短时间内将芯片频率降低以满足板卡功耗的需求，此时执行快速降频操作。在执行快速降频操作前，需要确定芯片待调整的目标频率值。在一个或多个实施例中，该目标频率值可以根据前述的公式(3)来计算。On the contrary, when the real-time power consumption sampling value of the whole board is greater than or equal to the fast frequency reduction threshold of the whole board, method 900 calculates the target frequency value of the fast frequency reduction of the whole board at step 908. This situation may occur, for example, when it is detected that the instantaneous power consumption of the whole board is large (for example, more than 1.2 times TDP). In order to reduce the chip frequency in a short time to meet the power consumption requirements of the board, a fast frequency reduction operation is performed at this time. Before performing the fast frequency reduction operation, it is necessary to determine the target frequency value of the chip to be adjusted. In one or more embodiments, the target frequency value can be calculated according to the aforementioned formula (3).
最后，根据在步骤906或908获得的芯片本次调整操作的时钟频率后，在步骤907处，方法900依据该时钟频率执行相应的调频动作。基于上文结合图1-图9的描述，本领域技术人员可以理解图1-图9所示出的一种用于芯片频率调节的方法也可以各种形式实现于一种或多种设备中。这些实现形式可以包括但不限于以下的四种形式：1)芯片硬件自身具有或支持一定的动态调频能力，并且通过硬件模拟电路和/或数字电路构建本披露的PID模块来实现对其的调频操作；2)通过上层驱动或者操作系统内核对本地采集的功耗或与功耗相关的芯片占用率等数据进行类似于本披露的PID模块的处理，以便对芯片进行动态调频控制；3)通过设置于芯片外部的设备对芯片进行调频操作；4)通过设置于芯片内部的设备对芯片进行调频操作。关于此处的第3项和第4项实现形式，下文将结合图10和图11来具体阐述。Finally, according to the clock frequency of the chip adjustment operation obtained in step 906 or 908, at step 907, method 900 performs the corresponding frequency modulation action according to the clock frequency. Based on the above description in combination with Figures 1-9, those skilled in the art can understand that a method for chip frequency adjustment shown in Figures 1-9 can also be implemented in one or more devices in various forms. These implementation forms may include but are not limited to the following four forms: 1) The chip hardware itself has or supports a certain dynamic frequency modulation capability, and the PID module disclosed in this disclosure is constructed through hardware analog circuits and/or digital circuits to implement its frequency modulation operation; 2) The upper-level driver or the operating system kernel processes the power consumption or chip occupancy rate data related to power consumption collected locally in a manner similar to the PID module disclosed in this disclosure, so as to dynamically control the frequency modulation of the chip; 3) The chip is frequency modulated by a device set outside the chip; 4) The chip is frequency modulated by a device set inside the chip. Regarding the implementation forms of items 3 and 4 here, the following will be specifically explained in conjunction with Figures 10 and 11.
图10示出利用本披露实施例的设备对芯片进行调频的示意框图，而图11示出利用本披露实施例的设备对芯片进行调频的另一示意框图。从该两附图中可以看出，本披露的设备可置于芯片的外部或者内部以用于对至少一个芯片进行调频操作。Figure 10 shows a schematic block diagram of using the device of the embodiment of the present disclosure to modulate the frequency of a chip, and Figure 11 shows another schematic block diagram of using the device of the embodiment of the present disclosure to modulate the frequency of a chip. It can be seen from the two figures that the device of the present disclosure can be placed outside or inside the chip to perform frequency modulation operations on at least one chip.
如图10所示，设备1001在芯片1004外部对芯片进行调频操作。该设备1001包括获取模块1003，其配置用于获取至少一个芯片操作时的实时功耗采样值和N-1个预定执行周期内的平均功耗值，其中N是大于或等于2的正整数。在一个实施例中，该获取模块可以是传感器。该设备1001还可以包括PID控制模块1002，例如可以是单级的或N个逐级串联的PID控制模块，以对芯片1004执行动态调频操作。在一个实施例中，该PID控制模块1002可以实现在MCU(“Microcontroller Unit微控制单元”)上。由此，该设备1001可以是MCU。As shown in Figure 10, the device 1001 performs frequency modulation operation on the chip outside the chip 1004. The device 1001 includes an acquisition module 1003, which is configured to obtain a real-time power consumption sampling value when at least one chip is operating and an average power consumption value within N-1 predetermined execution cycles, where N is a positive integer greater than or equal to 2. In one embodiment, the acquisition module can be a sensor. The device 1001 can also include a PID control module 1002, for example, a single-stage or N PID control modules connected in series step by step, to perform dynamic frequency modulation operation on the chip 1004. In one embodiment, the PID control module 1002 can be implemented on an MCU ("Microcontroller Unit"). Thus, the device 1001 can be an MCU.
尽管在图10中未示出，但本领域技术人员基于前面结合图4-图9的描述，也可以想到为了实现快速降频的方案，上述设备还可以包括：确定模块，其配置用于确定所述实时功耗采样值是否大于或等于快速降频阈值；以及快速降频模块，其配置用于当所述实时功耗采样值大于或等于所述快速降频阈值时，执行对所述至少一个芯片的快速降频操作。Although not shown in FIG10 , a person skilled in the art may conceive, based on the above description in combination with FIGS. 4 to 9 , that in order to implement a fast frequency reduction scheme, the above-mentioned device may also include: a determination module configured to determine whether the real-time power consumption sampling value is greater than or equal to a fast frequency reduction threshold; and a fast frequency reduction module configured to perform a fast frequency reduction operation on the at least one chip when the real-time power consumption sampling value is greater than or equal to the fast frequency reduction threshold.
对于图10所示的通过外部设备进行调频控制的方式来说，接受动态调频的芯片可以配置成具有修改频率的接口并且前述外部设备仅通过修改或升级其固件即可实现对芯片的动态调频，从而操作方便并且灵活。另外，本地数据采集后直接在本地(例如板卡处)管理，因此数据处理速度要比由上层驱动或者操作系统内核处理快。For the frequency modulation control method through external devices shown in FIG10 , the chip receiving dynamic frequency modulation can be configured to have an interface for modifying the frequency and the aforementioned external device can realize dynamic frequency modulation of the chip only by modifying or upgrading its firmware, so that the operation is convenient and flexible. In addition, local data is directly managed locally (such as at the board) after being collected, so the data processing speed is faster than that processed by the upper driver or the operating system kernel.
如图11所示，本披露的用于调频的设备还可以置于芯片内部以实现对该芯片的调频操作，即芯片1102内部包含设备1101，该设备用来对芯片执行调频操作。在一些应用场景中，该设备1101可以具体化为驻留于芯片内部的软件代码(例如各种情形的指令)。鉴于图2-图9中关于对芯片单级、多级以及快速降频的描述也同样适用于图11的设备，因此在此将不再赘述。As shown in FIG11 , the device for frequency modulation disclosed in the present invention can also be placed inside a chip to implement frequency modulation operations on the chip, that is, the chip 1102 includes a device 1101 inside, which is used to perform frequency modulation operations on the chip. In some application scenarios, the device 1101 can be embodied as software code (such as instructions for various situations) residing inside the chip. In view of the fact that the description of single-stage, multi-stage and fast frequency reduction of the chip in FIG2-FIG9 is also applicable to the device in FIG11, it will not be repeated here.
除了图10和图11所示出的示例性设备框图，本披露的方案也可以实现于一种集成电路芯片中，该芯片包括用于对芯片进行调频的设备1101。在一些场景中，前述设备1101可以是芯片的内核。当所述集成电路芯片工作时，所述内核可配置成执行上述用于对芯片进行调频的方法。该集成电路芯片例如可以采用CPLD(“Complex Programmable LogicDevice复杂可编程逻辑器件”)、FPGA(“Field Programmable Gate Array现场可编程门阵列”)、ASIC(Application Specific Integrated Circuit用于供专门应用的集成电路)、MPU(Microprocessor Unit微处理器)、CPU(Central Processing Unit中央处理器)等硬件来实现。In addition to the exemplary device block diagrams shown in Figures 10 and 11, the solution disclosed herein can also be implemented in an integrated circuit chip, which includes a device 1101 for frequency modulation of the chip. In some scenarios, the aforementioned device 1101 can be the core of the chip. When the integrated circuit chip is working, the core can be configured to execute the above-mentioned method for frequency modulation of the chip. The integrated circuit chip can be implemented, for example, using hardware such as CPLD ("Complex Programmable Logic Device"), FPGA ("Field Programmable Gate Array"), ASIC (Application Specific Integrated Circuit for integrated circuits for special applications), MPU (Microprocessor Unit), CPU (Central Processing Unit).
另外，本领域技术人员也可以想到本披露的方案也可以实现于一种设备或板卡中。具体地，该设备包括至少一个处理器；至少一个存储器，用于存储程序指令，当该程序指令由所述至少一个处理器执行时，使得所述设备执行上述的用于对芯片进行调频的方法。进一步，该板卡包括上述的用于对芯片进行调频的设备。在另一个方面中，当本披露的调频操作由程序指令来实现时，本披露也就同样公开了一种计算机可读存储介质，其存储有用于对芯片进行调频的程序指令，当该程序指令由处理器运行时，执行上述的调频操作。In addition, those skilled in the art may also think that the solution of the present disclosure may also be implemented in a device or a board. Specifically, the device includes at least one processor; at least one memory for storing program instructions, and when the program instructions are executed by the at least one processor, the device executes the above-mentioned method for frequency modulation of the chip. Further, the board includes the above-mentioned device for frequency modulation of the chip. In another aspect, when the frequency modulation operation of the present disclosure is implemented by program instructions, the present disclosure also discloses a computer-readable storage medium, which stores program instructions for frequency modulation of the chip, and when the program instructions are executed by the processor, the above-mentioned frequency modulation operation is performed.
图12是示出根据本披露实施例的一种组合处理装置1200的结构框图。如图12所示，该组合处理装置1200包括具有前述架构的调频装置1201，其可以配置用于执行前述结合附图所描述的调频方法。另外，该组合处理装置还包括通用互联接口1202和其他处理装置1203。根据本披露的调频装置1201可以通过通用互联接口1202与其他处理装置1203进行交互，共同完成用户指定的相关操作。FIG12 is a block diagram showing a structure of a combined processing device 1200 according to an embodiment of the present disclosure. As shown in FIG12, the combined processing device 1200 includes a frequency modulation device 1201 having the aforementioned architecture, which can be configured to perform the frequency modulation method described in conjunction with the accompanying drawings. In addition, the combined processing device also includes a universal interconnection interface 1202 and other processing devices 1203. The frequency modulation device 1201 according to the present disclosure can interact with other processing devices 1203 through the universal interconnection interface 1202 to jointly complete the relevant operations specified by the user.
根据本披露的方案，该其他处理装置可以包括中央处理器(“CPU”)、图形处理器(“GPU”)、神经网络处理器等通用和/或专用处理器中的一种或多种类型的处理器，其数目可以不做限制而是根据实际需要来确定。在一个或多个实施例中，该其他处理装置可以作为本披露的调频装置与外部数据和控制的接口，执行包括但不限于数据搬运，完成对调频装置的开启、停止等的基本控制；其他处理装置也可以和调频装置协作共同完成运算任务。According to the scheme disclosed herein, the other processing device may include one or more types of processors in general and/or special processors such as a central processing unit ("CPU"), a graphics processing unit ("GPU"), a neural network processor, etc., and the number of processors may not be limited but determined according to actual needs. In one or more embodiments, the other processing device may serve as an interface between the frequency modulation device disclosed herein and external data and control, and perform functions including but not limited to data transfer, and complete basic control of the frequency modulation device such as starting and stopping; other processing devices may also cooperate with the frequency modulation device to complete computing tasks.
根据本披露的方案，该通用互联接口可以用于在调频装置与其他处理装置间传输数据和控制指令。例如，该调频装置可以经由所述通用互联接口从其他处理装置中获取所需的输入数据，写入该调频装置片上的存储装置(或称存储器)。进一步，该调频装置可以经由所述通用互联接口从其他处理装置中获取控制指令，写入调频装置片上的控制缓存。替代地或可选地，通用互联接口也可以读取调频装置的存储模块中的数据并传输给其他处理装置。According to the solution disclosed herein, the universal interconnection interface can be used to transmit data and control instructions between the frequency modulation device and other processing devices. For example, the frequency modulation device can obtain the required input data from other processing devices via the universal interconnection interface and write it into the storage device (or memory) on the frequency modulation device chip. Further, the frequency modulation device can obtain control instructions from other processing devices via the universal interconnection interface and write them into the control cache on the frequency modulation device chip. Alternatively or optionally, the universal interconnection interface can also read the data in the storage module of the frequency modulation device and transmit it to other processing devices.
可选的，该组合处理装置还可以包括存储装置1204，其可以分别与所述调频装置和所述其他处理装置连接。在一个或多个实施例中，存储装置可以用于保存所述调频装置和所述其他处理装置的数据，尤其是那些在本调频装置或其他处理装置的内部或片上存储装置中无法全部保存的数据。Optionally, the combined processing device may further include a storage device 1204, which may be connected to the frequency modulation device and the other processing device, respectively. In one or more embodiments, the storage device may be used to store data of the frequency modulation device and the other processing device, especially data that cannot be fully stored in the internal or on-chip storage device of the frequency modulation device or other processing devices.
根据应用场景的不同，本披露的组合处理装置可以作为手机、机器人、无人机、视频监控设备等设备的SOC片上系统，有效降低控制部分的核心面积，提高处理速度，调节芯片的频率以降低整体功耗。在此情况下，该组合处理装置的通用互联接口与设备的某些部件相连接。其中某些部件例如可以是摄像头、显示器、鼠标、键盘、网卡或Wifi接口。According to different application scenarios, the combined processing device disclosed herein can be used as a SOC chip system for mobile phones, robots, drones, video surveillance equipment and other devices, effectively reducing the core area of the control part, improving the processing speed, and adjusting the frequency of the chip to reduce the overall power consumption. In this case, the universal interconnection interface of the combined processing device is connected to certain components of the device. Some of these components can be, for example, a camera, a display, a mouse, a keyboard, a network card or a Wifi interface.
在一些实施例里，本披露还公开了一种芯片，其包括了上述调频装置或组合处理装置。在另一些实施例里，本披露还公开了一种芯片封装结构，其包括了上述芯片。In some embodiments, the present disclosure further discloses a chip, which includes the frequency modulation device or the combined processing device. In other embodiments, the present disclosure further discloses a chip packaging structure, which includes the chip.
在一些实施例里，本披露还公开了板卡，其包括了上述芯片封装结构。参阅图13，其提供了前述的示例性板卡，上述板卡除了包括上述芯片1301以外，还可以包括其他的配套部件，该配套部件包括但不限于：存储器件1302、接口装置1303和控制器件1304。In some embodiments, the present disclosure also discloses a board card, which includes the above chip packaging structure. Referring to FIG. 13 , it provides the above exemplary board card, which, in addition to the above chip 1301 , may also include other supporting components, including but not limited to: a storage device 1302 , an interface device 1303 and a control device 1304 .
所述存储器件与所述芯片封装结构内的芯片通过总线连接，用于存储数据。所述存储器件可以包括多组存储单元1305及1306。每一组所述存储单元与所述芯片通过总线连接。可以理解，每一组所述存储单元可以是DDR SDRAM(“Double Data Rate SDRAM，双倍速率同步动态随机存储器”，简称为DDR)。The memory device is connected to the chip in the chip package structure via a bus for storing data. The memory device may include multiple groups of storage units 1305 and 1306. Each group of the storage units is connected to the chip via a bus. It is understood that each group of the storage units may be DDR SDRAM ("Double Data Rate SDRAM, double data rate synchronous dynamic random access memory", referred to as DDR).
上述DDR不需要提高时钟频率就能加倍提高SDRAM的传输速度。DDR允许在时钟脉冲的上升沿和下降沿传输数据。DDR的传输速度是标准SDRAM的两倍。在一个实施例中，所述存储器件可以包括4组所述存储单元。每一组所述存储单元可以包括多个DDR4颗粒(芯片)。在一个实施例中，所述芯片内部可以包括4个72位DDR4控制器，上述72位DDR4控制器中64bit用于传输数据，8bit用于ECC校验。可以理解，当每一组所述存储单元中采用DDR4-3200颗粒时，单个所述存储单元传输数据的理论带宽可达到25600MB/s。The above-mentioned DDR can double the transmission speed of SDRAM without increasing the clock frequency. DDR allows data to be transmitted on the rising and falling edges of the clock pulse. The transmission speed of DDR is twice that of standard SDRAM. In one embodiment, the storage device may include 4 groups of storage units. Each group of storage units may include multiple DDR4 particles (chips). In one embodiment, the chip may include 4 72-bit DDR4 controllers, 64 bits of the above-mentioned 72-bit DDR4 controllers are used to transmit data, and 8 bits are used for ECC verification. It can be understood that when DDR4-3200 particles are used in each group of storage units, the theoretical bandwidth of a single storage unit to transmit data can reach 25600MB/s.
在一个实施例中，每一组所述存储单元包括多个并联设置的双倍速率同步动态随机存储器。DDR在一个时钟周期内可以传输两次数据。在所述芯片中设置控制DDR的控制器，用于对每个所述存储单元的数据传输与数据存储的控制。In one embodiment, each group of the storage units includes a plurality of double rate synchronous dynamic random access memories arranged in parallel. DDR can transmit data twice in one clock cycle. A controller for controlling DDR is arranged in the chip to control the data transmission and data storage of each of the storage units.
所述接口装置与所述芯片封装结构内的芯片电连接。所述接口装置用于实现所述芯片与外部设备1307(例如服务器或计算机)之间的数据传输。例如在一个实施例中，所述接口装置可以为标准PCIE接口。比如，待处理的数据由服务器通过标准PCIE接口传递至所述芯片，实现数据转移。优选地，当采用PCIE3.0 X16接口传输时，理论带宽可达到16000MB/s。在另一个实施例中，所述接口装置还可以是其他的接口，本披露并不限制上述其他的接口的具体表现形式，所述接口单元能够实现转接功能即可。另外，所述芯片的计算结果仍由所述接口装置传送回外部设备(例如服务器)。The interface device is electrically connected to the chip in the chip packaging structure. The interface device is used to realize data transmission between the chip and an external device 1307 (such as a server or a computer). For example, in one embodiment, the interface device can be a standard PCIE interface. For example, the data to be processed is transmitted to the chip by the server through a standard PCIE interface to realize data transfer. Preferably, when the PCIE3.0 X16 interface is used for transmission, the theoretical bandwidth can reach 16000MB/s. In another embodiment, the interface device can also be other interfaces. This disclosure does not limit the specific forms of expression of the above-mentioned other interfaces. The interface unit can realize the switching function. In addition, the calculation results of the chip are still transmitted back to the external device (such as a server) by the interface device.
所述控制器件与所述芯片电连接。所述控制器件用于对所述芯片的状态进行监控。具体地，所述芯片与所述控制器件可以通过SPI接口电连接。所述控制器件可以包括CPU或者单片机。在一个或多个实施例中，所述芯片可以包括多个处理芯片、多个处理核或多个处理电路，可以带动多个负载。因此，所述芯片可以处于多负载和轻负载等不同的工作状态。通过所述控制装置可以实现对所述芯片中多个处理芯片、多个处理核和/或多个处理电路的工作状态的调控。The control device is electrically connected to the chip. The control device is used to monitor the state of the chip. Specifically, the chip and the control device can be electrically connected via an SPI interface. The control device may include a CPU or a single-chip microcomputer. In one or more embodiments, the chip may include multiple processing chips, multiple processing cores or multiple processing circuits, which can drive multiple loads. Therefore, the chip can be in different working states such as multi-load and light load. The control device can realize the regulation of the working states of multiple processing chips, multiple processing cores and/or multiple processing circuits in the chip.
在一些实施例里，本披露还公开了一种电子设备或装置，其包括了上述板卡。根据不同的应用场景，电子设备或装置可以包括数据处理装置、机器人、电脑、打印机、扫描仪、平板电脑、智能终端、手机、行车记录仪、导航仪、传感器、摄像头、服务器、云端服务器、相机、摄像机、投影仪、手表、耳机、移动存储、可穿戴设备、交通工具、家用电器、和/或医疗设备。所述交通工具包括飞机、轮船和/或车辆；所述家用电器包括电视、空调、微波炉、冰箱、电饭煲、加湿器、洗衣机、电灯、燃气灶、油烟机；所述医疗设备包括核磁共振仪、B超仪和/或心电图仪。In some embodiments, the present disclosure also discloses an electronic device or apparatus, which includes the above-mentioned board. According to different application scenarios, the electronic device or apparatus may include a data processing device, a robot, a computer, a printer, a scanner, a tablet computer, a smart terminal, a mobile phone, a driving recorder, a navigator, a sensor, a camera, a server, a cloud server, a camera, a video camera, a projector, a watch, a headset, a mobile storage, a wearable device, a means of transportation, a household appliance, and/or a medical device. The means of transportation include an airplane, a ship and/or a vehicle; the household appliances include a television, an air conditioner, a microwave oven, a refrigerator, an electric rice cooker, a humidifier, a washing machine, an electric lamp, a gas stove, and a range hood; the medical equipment includes an MRI, an ultrasound machine and/or an electrocardiograph.
需要说明的是，对于前述的各方法实施例，为了简单描述，故将其都表述为一系列的动作组合，但是本领域技术人员应该知悉，本披露并不受所描述的动作顺序的限制，因为依据本披露，某些步骤可以采用其他顺序或者同时进行。其次，本领域技术人员也应该知悉，说明书中所描述的实施例均属于可选实施例，所涉及的动作和模块并不一定是本披露所必须的。It should be noted that, for the above-mentioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should know that the present disclosure is not limited by the order of the actions described, because according to the present disclosure, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily required by the present disclosure.
在本披露所提供的几个实施例中，应该理解到，所披露的装置，可通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口、装置或单元的间接耦合或通信连接，也可以是通过电性、光学、声学、磁性或其它的形式。In the several embodiments provided in the present disclosure, it should be understood that the disclosed devices can be implemented in other ways. For example, the device embodiments described above are only schematic, such as the division of the units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, or it can be in electrical, optical, acoustic, magnetic or other forms.
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例的方案。另外，在本披露各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件程序模块的形式实现。The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to implement the scheme of this embodiment. In addition, the functional units in the various embodiments of the present disclosure may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware or in the form of software program modules.
所述集成的单元如果以软件程序模块的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储器中。基于这样的理解，当本披露的技术方案可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储器中，包括若干指令用以使得一台计算机设备(可为个人计算机、服务器或者网络设备等)执行本披露各个实施例所述方法的全部或部分步骤。而前述的存储器包括：U盘、只读存储器(“ROM，Read-OnlyMemory”)、随机存取存储器(“RAM，Random Access Memory”)、移动硬盘、磁碟或者光盘等各种可以存储程序代码的介质。If the integrated unit is implemented in the form of a software program module and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, when the technical solution of the present disclosure can be embodied in the form of a software product, the computer software product is stored in a memory, including a number of instructions to enable a computer device (which can be a personal computer, server or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present disclosure. The aforementioned memory includes: U disk, read-only memory ("ROM, Read-Only Memory"), random access memory ("RAM, Random Access Memory"), mobile hard disk, magnetic disk or optical disk and other media that can store program codes.
在本披露的上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。上述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。In the above embodiments of the present disclosure, the description of each embodiment has its own emphasis. For parts not described in detail in a certain embodiment, please refer to the relevant description of other embodiments. The technical features of the above embodiments can be combined arbitrarily. In order to make the description concise, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
依据以下条款可更好地理解前述内容：The foregoing content can be better understood in accordance with the following terms:
条款A1、一种用于对芯片进行调频的方法，包括：Clause A1. A method for frequency tuning a chip, comprising:
获取至少一个芯片操作时的实时功耗采样值和N-1个预定执行周期内的平均功耗值，其中N是大于或等于2的正整数；以及Acquire a real-time power consumption sampling value of at least one chip during operation and an average power consumption value within N-1 predetermined execution cycles, where N is a positive integer greater than or equal to 2; and
基于所述实时功耗采样值、所述平均功耗值和平均功耗参考值，利用N个逐级串联的PID控制模块来确定用于调整所述至少一个芯片的时钟频率的调整量。Based on the real-time power consumption sampling value, the average power consumption value and the average power consumption reference value, an adjustment amount for adjusting the clock frequency of the at least one chip is determined by using N PID control modules connected in series step by step.
条款A2、根据条款A1所述的方法，其中当N等于2时，利用串联的初级PID控制模块和末级PID控制模块来确定所述调整量，并将该调整量从所述末级PID控制模块输出，所述方法进一步包括：Clause A2. The method according to clause A1, wherein when N is equal to 2, the adjustment amount is determined by using a primary PID control module and a final PID control module connected in series, and the adjustment amount is output from the final PID control module, and the method further comprises:
获取初级PID控制模块的预定执行周期T1内的第一平均功耗值；Obtaining a first average power consumption value within a predetermined execution periodT1 of the primary PID control module;
将所述第一平均功耗值和与初级PID控制模块关联的平均功耗参考值输入至所述初级PID控制模块；inputting the first average power consumption value and an average power consumption reference value associated with a primary PID control module into the primary PID control module;
基于所述初级PID控制模块的输出值和前次调整操作的实时功耗目标值来获得本次调整操作的实时功耗目标值，并且将其输入至所述末级PID控制模块；以及Obtaining a real-time power consumption target value for this adjustment operation based on an output value of the primary PID control module and a real-time power consumption target value for a previous adjustment operation, and inputting the real-time power consumption target value into the final PID control module; and
基于所述实时功耗采样值和本次调整操作的实时功耗目标值，利用所述末级PID控制模块输出所述调整量，Based on the real-time power consumption sampling value and the real-time power consumption target value of this adjustment operation, the final-stage PID control module is used to output the adjustment amount.
其中所述初级PID控制模块的预定执行周期T1大于所述实时功耗采样值的采样周期TN。The predetermined execution periodT1 of the primary PID control module is greater than the sampling period TN of the real-time power consumption sampling value.
条款A3、根据条款A1或条款A2所述的方法，其中当N等于3时，利用串联的初级PID控制模块、第二级PID控制模块和末级PID控制模块来确定所述调整量，并且将该调整量从所述末级PID控制模块输出，所述方法进一步包括：Clause A3. The method according to clause A1 or clause A2, wherein when N is equal to 3, the adjustment amount is determined by using a primary PID control module, a second-stage PID control module and a final-stage PID control module connected in series, and the adjustment amount is output from the final-stage PID control module, and the method further comprises:
获取初级PID控制模块的预定执行周期T1内的第一平均功耗值；Obtaining a first average power consumption value within a predetermined execution periodT1 of the primary PID control module;
将所述第一平均功耗值和与初级PID控制模块关联的平均功耗参考值输入至所述初级PID控制模块，以令其输出与第二级PID控制模块关联的第二平均功耗目标值的调整值；inputting the first average power consumption value and the average power consumption reference value associated with the primary PID control module into the primary PID control module so as to cause it to output an adjustment value of the second average power consumption target value associated with the secondary PID control module;
获取第二级PID控制模块的预定执行周期T2内的第二平均功耗值，并将其输入至所述第二级PID控制模块；Obtaining a second average power consumption value within a predetermined execution periodT2 of the second-level PID control module, and inputting the second average power consumption value into the second-level PID control module;
利用调整值对第二平均功耗目标值进行调整来获得调整后的第二平均功耗目标值，并且将其输入至所述第二级PID控制模块；Using the adjustment value to adjust the second average power consumption target value to obtain an adjusted second average power consumption target value, and inputting the adjusted second average power consumption target value into the second-level PID control module;
基于所述第二级PID控制模块的输出值和前次调整操作的实时功耗目标值来获得本次调整操作的实时功耗目标值，并且将其输入至所述末级PID控制模块；以及Obtaining a real-time power consumption target value for this adjustment operation based on the output value of the second-stage PID control module and the real-time power consumption target value for the previous adjustment operation, and inputting the real-time power consumption target value into the final-stage PID control module; and
基于所述实时功耗采样值和本次调整操作的实时功耗目标值，利用所述末级PID控制模块输出所述调整量，Based on the real-time power consumption sampling value and the real-time power consumption target value of this adjustment operation, the final-stage PID control module is used to output the adjustment amount.
其中所述实时功耗采样值的采样周期为TN，并且所述第二级PID控制模块的预定执行周期T2满足关系T1>T2>TN。The sampling period of the real-time power consumption sampling value is TN , and the predetermined execution period T2 of the second-level PID control module satisfies the relationship T1 >T2 >TN .
条款A4、根据条款A1-A3任一项所述的方法，其中当N大于或等于4时，利用串联的初级PID控制模块、第二级PID控制模块，……，第N-1级PID控制模块和末级PID控制模块来确定所述调整量，并且将该调整量从所述末级PID控制模块输出，所述方法进一步包括：Clause A4. A method according to any one of clauses A1 to A3, wherein when N is greater than or equal to 4, the adjustment amount is determined by using a primary PID control module, a second-stage PID control module, ..., an N-1th-stage PID control module and a final-stage PID control module connected in series, and the adjustment amount is output from the final-stage PID control module, and the method further comprises:
获取所述初级PID控制模块至第N-1级PID控制模块在其各自预定执行周期T1，……TN-1内的第一至第N-1平均功耗值，并将其分别输入到所述初级PID控制模块至第N-1级PID控制模块中；Obtaining the first to N-1th average power consumption values of the primary PID control module to the N-1th level PID control module in their respective predetermined execution cycles T1 , ...TN-1 , and inputting them into the primary PID control module to the N-1th level PID control module respectively;
将所述第一平均功耗值和与初级PID控制模块关联的平均功耗参考值输入至所述初级PID控制模块；inputting the first average power consumption value and an average power consumption reference value associated with a primary PID control module into the primary PID control module;
令所述初级PID控制模块至第N-2级PID控制模块的输出向各自的下一级PID控制模块输入，其中所述初级PID控制模块至第N-2级PID控制模块的每个输出是对与相应后一级PID控制模块关联的平均功耗目标值的调整值；Allow the outputs of the primary PID control module to the N-2 PID control module to be input to the respective next-stage PID control modules, wherein each output of the primary PID control module to the N-2 PID control module is an adjustment value of the average power consumption target value associated with the corresponding next-stage PID control module;
利用每个调整值对相应后一级的平均功耗目标值进行调整来分别获得调整后的平均功耗目标值，并且将其分别输入至相应的第二级PID控制模块至第N-1级PID控制模块；Using each adjustment value to adjust the average power consumption target value of the corresponding next stage to obtain adjusted average power consumption target values, and inputting them into the corresponding second-stage PID control module to the N-1th-stage PID control module respectively;
基于所述第N-1级PID控制模块的输出值和前次调整操作的实时功耗目标值来获得本次调整操作的实时功耗目标值，并且将其输入至所述末级PID控制模块；以及Obtaining a real-time power consumption target value for this adjustment operation based on an output value of the N-1th stage PID control module and a real-time power consumption target value for a previous adjustment operation, and inputting the real-time power consumption target value into the final stage PID control module; and
基于所述实时功耗采样值和本次调整操作的实时功耗目标值，利用所述末级PID控制模块输出所述调整量，Based on the real-time power consumption sampling value and the real-time power consumption target value of this adjustment operation, the final-stage PID control module is used to output the adjustment amount.
其中所述初级PID控制模块至所述第N-1级PID控制模块的各自预定执行周期T1，……TN-1和实时功耗采样值的采样周期TN满足关系T1>T2……TN-1>TN。The respective predetermined execution periods T1 , ...TN-1 of the primary PID control module to the N-1th PID control module and the sampling periodTN of the real-time power consumption sampling value satisfy the relationship T1 >T2 ...TN-1 >TN .
条款A5、根据条款A1-A4任一项所述的方法，其中所述调整量是相对于前次调整所述时钟频率的增量。Clause A5. A method according to any one of clauses A1-A4, wherein the adjustment amount is an increment relative to a previous adjustment of the clock frequency.
条款A6、一种用于对芯片进行调频的方法，包括：Clause A6. A method for frequency tuning a chip, comprising:
获取至少一个芯片操作时的实时功耗采样值；Obtaining a real-time power consumption sampling value of at least one chip during operation;
确定所述实时功耗采样值是否大于或等于快速降频阈值；Determine whether the real-time power consumption sampling value is greater than or equal to a fast frequency reduction threshold;
当所述实时功耗采样值大于或等于所述快速降频阈值时，执行对所述至少一个芯片的快速降频操作；When the real-time power consumption sampling value is greater than or equal to the fast frequency reduction threshold, performing a fast frequency reduction operation on the at least one chip;
当所述实时功耗采样值小于所述快速降频阈值时，执行以下操作：When the real-time power consumption sampling value is less than the fast frequency reduction threshold, the following operations are performed:
获取N-1个预定执行周期内的平均功耗值，其中N是大于或等于2的正整数；以及Obtaining an average power consumption value within N-1 predetermined execution cycles, where N is a positive integer greater than or equal to 2; and
基于所述实时功耗采样值、所述平均功耗值和平均功耗参考值，利用N个逐级串联的PID控制模块来确定用于调整所述至少一个芯片的时钟频率的调整量。Based on the real-time power consumption sampling value, the average power consumption value and the average power consumption reference value, an adjustment amount for adjusting the clock frequency of the at least one chip is determined by using N PID control modules connected in series step by step.
条款A7、一种用于对芯片进行调频的设备，包括：Clause A7. A device for frequency tuning a chip, comprising:
获取模块，其配置用于获取至少一个芯片操作时的实时功耗采样值和N-1个预定执行周期内的平均功耗值，其中N是大于或等于2的正整数；以及an acquisition module configured to acquire a real-time power consumption sampling value of at least one chip during operation and an average power consumption value within N-1 predetermined execution cycles, where N is a positive integer greater than or equal to 2; and
N个逐级串联的PID控制模块，其配置用于基于所述实时功耗采样值、所述平均功耗值和平均功耗参考值，确定用于调整所述至少一个芯片的时钟频率的调整量。N PID control modules are connected in series in stages, and are configured to determine an adjustment amount for adjusting the clock frequency of the at least one chip based on the real-time power consumption sampling value, the average power consumption value and the average power consumption reference value.
条款A8、一种用于对芯片进行调频的设备，包括：Clause A8. A device for frequency tuning a chip, comprising:
获取模块，其配置用于获取至少一个芯片操作时的实时功耗采样值；An acquisition module configured to acquire a real-time power consumption sampling value of at least one chip during operation;
确定模块，其配置用于确定所述实时功耗采样值是否大于或等于快速降频阈值；A determination module configured to determine whether the real-time power consumption sampling value is greater than or equal to a fast frequency reduction threshold;
快速降频模块，其配置用于当所述实时功耗采样值大于或等于所述快速降频阈值时，执行对所述至少一个芯片的快速降频操作；A fast frequency reduction module, configured to perform a fast frequency reduction operation on the at least one chip when the real-time power consumption sampling value is greater than or equal to the fast frequency reduction threshold;
N个逐级串联的PID控制模块，其配置用于当所述实时功耗采样值小于所述快速降频阈值时，执行以下操作：N PID control modules are connected in series step by step, and are configured to perform the following operations when the real-time power consumption sampling value is less than the fast frequency reduction threshold:
获取N-1个预定执行周期内的平均功耗值，其中N是大于或等于2的正整数；以及Obtaining an average power consumption value within N-1 predetermined execution cycles, where N is a positive integer greater than or equal to 2; and
基于所述实时功耗采样值、所述平均功耗值和平均功耗参考值，确定用于调整所述至少一个芯片的时钟频率的调整量。An adjustment amount for adjusting the clock frequency of the at least one chip is determined based on the real-time power consumption sampling value, the average power consumption value and the average power consumption reference value.
条款A9、一种用于对芯片进行调频的设备，包括：Clause A9. A device for frequency tuning a chip, comprising:
至少一个处理器；at least one processor;
至少一个存储器，用于存储程序指令，当该程序指令由所述至少一个处理器执行时，使得所述设备执行根据条款A1-A6的任意一项所述的方法。At least one memory for storing program instructions, which, when executed by the at least one processor, cause the device to perform the method according to any one of clauses A1-A6.
条款A10、一种用于对芯片进行调频的板卡，包括根据条款A7-A9的任意一项所述的设备。Item A10. A board for frequency modulation of a chip, comprising a device according to any one of items A7-A9.
条款A11、一种集成电路芯片，包括用于对芯片进行调频的内核，当所述集成电路芯片工作时，所述内核可配置成执行根据条款A1-A6的任意一项所述的方法。Item A11. An integrated circuit chip comprising a core for frequency tuning the chip, wherein when the integrated circuit chip is in operation, the core can be configured to execute the method according to any one of items A1-A6.
条款A12、一种计算机可读存储介质，其存储有用于对芯片进行调频的程序指令，当该程序指令由处理器运行时，执行根据条款A1-A6的任意一项所述的方法。Item A12. A computer-readable storage medium storing program instructions for frequency tuning a chip. When the program instructions are executed by a processor, the method according to any one of Items A1-A6 is executed.
应当理解，本披露的权利要求、说明书及附图中的术语“第一”、“第二”、“第三”和“第四”等是用于区别不同对象，而不是用于描述特定顺序。本披露的说明书和权利要求书中使用的术语“包括”和“包含”指示所描述特征、整体、步骤、操作、元素和/或组件的存在，但并不排除一个或多个其它特征、整体、步骤、操作、元素、组件和/或其集合的存在或添加。It should be understood that the terms "first", "second", "third", and "fourth" in the claims, specifications, and drawings of the present disclosure are used to distinguish different objects rather than to describe a specific order. The terms "include" and "comprise" used in the specifications and claims of the present disclosure indicate the presence of the described features, wholes, steps, operations, elements, and/or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and/or their collections.
还应当理解，在此本披露说明书中所使用的术语仅仅是出于描述特定实施例的目的，而并不意在限定本披露。如在本披露说明书和权利要求书中所使用的那样，除非上下文清楚地指明其它情况，否则单数形式的“一”、“一个”及“该”意在包括复数形式。还应当进一步理解，在本披露说明书和权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合，并且包括这些组合。It should also be understood that the terms used in this disclosure are only for the purpose of describing specific embodiments and are not intended to limit the disclosure. As used in this disclosure and claims, the singular forms of "a", "an", and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should also be further understood that the term "and/or" used in this disclosure and claims refers to any combination of one or more of the associated listed items and all possible combinations, including these combinations.
如在本说明书和权利要求书中所使用的那样，术语“如果”可以依据上下文被解释为“当...时”或“一旦”或“响应于确定”或“响应于检测到”。类似地，短语“如果确定”或“如果经过判断[所描述条件或事件]”可以依据上下文被解释为意指“一旦确定”或“响应于确定”或“一旦检测到[所描述条件或事件]”或“响应于检测到[所描述条件或事件]”。As used in this specification and claims, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if determined" or "if upon determining [described condition or event]" can be interpreted as meaning "uponce determined" or "in response to determining" or "uponce detected [described condition or event]" or "in response to detecting [described condition or event]", depending on the context.
以上对本披露实施例进行了详细介绍，本文中应用了具体个例对本披露的原理及实施方式进行了阐述，以上实施例的说明仅用于帮助理解本披露的方法及其核心思想。同时，本领域技术人员依据本披露的思想，基于本披露的具体实施方式及应用范围上做出的改变或变形之处，都属于本披露保护的范围。综上所述，本说明书内容不应理解为对本披露的限制。The embodiments of the present disclosure are described in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present disclosure. The description of the above embodiments is only used to help understand the method and its core idea of the present disclosure. At the same time, changes or deformations made by those skilled in the art based on the ideas of the present disclosure, based on the specific implementation methods and application scope of the present disclosure, all belong to the scope of protection of the present disclosure. In summary, the content of this specification should not be understood as a limitation on the present disclosure.
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| CN202010225213.XACN113448718B (en) | 2020-03-26 | 2020-03-26 | Method, apparatus and computer readable storage medium for frequency modulation of chip |
| PCT/CN2021/080891WO2021190343A1 (en) | 2020-03-26 | 2021-03-15 | Frequency regulation method and device for chip, and computer-readable storage medium |
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