Disclosure of Invention
The invention aims to provide a series-parallel connection architecture of a universal lithium battery pack, which improves the feasibility of series-parallel connection of the universal lithium battery pack without complex auxiliary circuits and communication links.
In order to achieve the above object, the present invention provides a series-parallel connection architecture for a general lithium battery pack, which includes a plurality of battery packs and a plurality of control modules respectively corresponding to one of the battery packs. The battery packs are connected in series or in parallel, and each battery pack comprises a plurality of electric cores which are connected in series in sequence. The control module group comprises a series equalization circuit and a parallel equalization circuit, the series equalization circuit is used for controlling voltage equalization between the battery groups connected in series and/or between a plurality of battery cells in the battery groups, and the parallel equalization circuit is used for automatically equalizing the current of the battery cells in the battery groups connected in parallel.
Compared with the prior art, each battery pack is independently subjected to charging management by a control module, when an overvoltage and overcharge phenomenon occurs, adverse effects caused by faults can be isolated and limited in an independent local module, the functions of the whole battery system are not influenced, further, the influence of the consistency of each single battery pack on the whole charging effect of the battery system is weakened, and the functional integrity of the whole battery system is ensured to the maximum extent; the requirement on the consistency among the battery packs is reduced, the application range of a single battery pack is improved, namely the battery cell matching rate and the utilization rate, and the cost of the battery pack is further reduced; meanwhile, as each battery pack is independently charged and managed, the quantity and complexity of connectors, wiring harnesses, communication links and other related circuits and components are reduced to the maximum extent, so that the reliability of the battery system is improved, and the cost is reduced. Each control module comprises a series equalization circuit and a parallel equalization circuit, and the series equalization circuit is used for controlling the voltage equalization among the series battery packs and/or among a plurality of battery cells in the battery packs, so that the requirement on the consistency among the series battery packs and/or among the single battery cells in the battery packs is lowered, the reliability of a battery system is further improved, and the feasibility of series use of the battery packs is improved; the parallel balancing circuit realizes automatic current sharing of the currents of all the electric cores in the parallel battery packs, so that the requirement on the consistency of the parallel battery packs is lowered, the reliability of a battery system is further improved, and the feasibility of parallel use of the battery packs is improved. When the single battery pack needs to be replaced, specific equipment such as a balance charger and the like does not need to be balanced in advance or used, and the technical difficulty and the working strength of field maintenance are reduced.
Preferably, the parallel balancing circuit includes a plurality of ntc thermistors, the electric cores in the battery packs connected in parallel and located in the same sequence are connected in parallel through corresponding ntc thermistors to form corresponding internal charging and discharging branches, all the internal charging and discharging branches are arranged in parallel, and the ntc thermistors automatically balance the currents of all the electric cores in the battery packs connected in parallel.
Preferably, the NTC thermistor is a power type NTC thermistor.
Preferably, one of the positive electrode and the negative electrode of the battery cells located in the same sequence in the parallel and adjacent battery packs is electrically connected through the negative temperature coefficient thermistor, and the other of the positive electrode and the negative electrode of the battery cells located in the same sequence in the parallel and adjacent battery packs is electrically connected through a lead, so that the battery cells located in the same sequence in the battery packs are arranged in parallel.
Preferably, the battery pack is provided with a current equalizing interface, and the current equalizing interfaces of the battery packs which are connected in parallel and adjacent to each other are electrically connected through corresponding current equalizing harnesses, so that all internal charging and discharging branches are arranged in parallel through the corresponding current equalizing harnesses.
Preferably, the series equalization circuit includes a module-level equalization circuit and a cell-level equalization circuit, the cell-level equalization circuit is used for equalization among a plurality of cells in the corresponding battery pack, and the module-level equalization circuit is used for equalization among a plurality of battery packs connected in series.
Preferably, the series equalization circuit includes an equalization control unit, the cell-level equalization circuit includes first discharge resistors and first switches that are in one-to-one correspondence with the plurality of cells in the battery pack, and the cells, the first discharge resistors and the first switches that correspond to each other are connected in series to form a loop, and the equalization control unit controls on/off of the first switches in each loop; the module level equalization circuit comprises a second discharge resistor and a second switch which correspond to the battery pack, the second discharge resistor and the second switch which correspond to each other are connected in series to form a loop, and the equalization control unit controls the on-off of the second switch in each loop.
Preferably, at least one of the control modules is used as a master control module, and the other control modules are used as slave control modules, the master control module includes a main charging loop, an equalizing charging loop and a charging control circuit, the equalizing charging loop is connected in parallel with the main charging loop and includes a current-limiting resistor, and the charging control circuit is connected with the equalizing circuit, the main charging loop and the equalizing charging loop and is used for conducting the main charging loop to charge the battery pack; or when the series equalization circuit starts equalization, the main charging loop is disconnected and the equalization charging loop is conducted to charge the battery pack.
Preferably, the charge control circuit includes an or gate, a photoelectric coupler and a switch circuit, an input end of the or gate is connected to the equalizing circuit, an output end of the or gate is connected to a transmitting end of the photoelectric coupler, the switch circuit is connected between a receiving end of the photoelectric coupler and the equalizing charge circuit, and the switch circuit is turned on when the photoelectric coupler is turned on, so as to turn on the equalizing charge circuit to charge the battery pack.
Preferably, a plurality of control module groups are distributed in a matrix form, each control module group comprises a plurality of connecting ports, the connecting ports are connected in parallel, the control modules are connected in the row direction and the row direction, every two adjacent control module groups are connected through the corresponding connecting ports, at least one control module group serves as a master control module group, the other control module groups serve as slave control module groups, and the switching signals of the slave control module groups are sequentially transmitted to the master control module group through the connecting ports.
Detailed Description
In order to explain technical contents and structural features of the present invention in detail, the following description is made with reference to the embodiments and the accompanying drawings. It is to be understood that the described embodiments are merely a subset of embodiments of the invention and not all embodiments of the invention, with the understanding that the invention is not limited to the example embodiments described herein. All other embodiments, which can be derived by a person skilled in the art from the described embodiments without inventive effort, shall fall within the scope of protection of the invention.
Referring to fig. 1 to 14, the general series-parallel connection architecture for lithium battery packs of the present invention includes a plurality ofbattery packs 1 and a plurality ofcontrol modules 2 respectively corresponding to onebattery pack 1, wherein the plurality ofbattery packs 1 are connected in series or in parallel, and eachbattery pack 1 includes a plurality ofcells 11 connected in series in sequence. Thecontrol module 2 comprises a series equalization circuit and a parallel equalization circuit, the series equalization circuit is used for controlling voltage equalization between the series-connectedbattery packs 1 and/or between a plurality ofbattery cells 11 in thebattery packs 1, and the parallel equalization circuit is used for automatically equalizing the current of thebattery cells 11 in the parallel-connectedbattery packs 1.
Hereinafter, the series-parallel connection architecture of the general lithium battery pack according to the present invention will be described in detail with reference to fig. 1 to 14.
Referring to fig. 1 to 4, fig. 2 is an equivalent circuit diagram of a parallel equalizing circuit when 4battery packs 1 are connected in parallel. As shown in fig. 2, the parallel balancing circuit includes a plurality ofntc thermistors 31, thecells 11 in the same sequence in the fourbattery packs 1 are connected in parallel through thecorresponding ntc thermistors 31 to form corresponding internal charging and dischargingbranches 32, all the internal charging and dischargingbranches 32 are arranged in parallel, and thentc thermistors 31 automatically balance the currents of all thecells 11.
By utilizing the inherent physical characteristics of the negativetemperature coefficient thermistor 31, the real-time automatic equalization of thebattery pack 1 is effectively realized without complex auxiliary circuits and communication links; meanwhile, the negativetemperature coefficient thermistor 31 has stable characteristics and high equalization efficiency, can realize real-time equalization by simply transforming the traditionalparallel battery pack 1, has a simple circuit structure, low cost and high reliability, and is convenient for later maintenance and replacement of thebattery pack 1.
In a preferred embodiment, thentc thermistor 31 is a power-type ntc thermistor 31, so that thentc thermistor 31 can withstand a large power to satisfy the normal operation of the battery system. Due to the inherent negative temperature coefficient characteristic of the power type negativetemperature coefficient thermistor 31, the power type negativetemperature coefficient thermistor 31 can automatically match and adjust the equalizing current of the internal charging and dischargingbranch 32 in which the power type negative temperature coefficient thermistor is located according to the voltage difference between thebattery cells 11 in real time, so that eachbattery cell 11 of the current internal charging anddischarging branch 32 has the same equalizing current. Since each internal charging anddischarging branch 32 is arranged in parallel, all thebattery cells 11 have the same balance current under the common current balance effect of each internal charging and dischargingbranch 32, so as to realize the real-time current balance of all thebattery cells 11 of thebattery pack 1.
During actual circuit design, appropriate equalization current can be achieved only by selecting the power type negativetemperature coefficient thermistor 31 with appropriate temperature coefficient, power and zero power resistance values according to the specification, model, internal resistance, voltage and other parameters of all theelectric cores 11 in thecurrent battery pack 1, so as to meet the requirement of real-time current equalization of all theelectric cores 11 of thebattery pack 1. According to the design, an additional control circuit or a BMS system is not required to be arranged, the circuit design complexity of the parallel equalization circuit is effectively reduced, the design cost is effectively reduced, and the reliability is improved.
As shown in fig. 2, as a preferred embodiment, one of the positive electrodes and the negative electrodes of thebattery cells 11 in the same order in theadjacent battery packs 1 is electrically connected through the negativetemperature coefficient thermistor 31, and the other of the positive electrodes and the negative electrodes of thebattery cells 11 in the same order in theadjacent battery packs 1 is electrically connected through a lead, so that thebattery cells 11 in the same order in all thebattery packs 1 are arranged in parallel. Specifically, the adjacent internal charge anddischarge branches 32 share all thentc thermistors 31 in the same order in thebattery pack 1.
For example, for thecells 11 in the first sequence, since therespective battery packs 1 are arranged in parallel, the positive electrodes of thecells 11 in the first sequence are electrically connected by a conducting wire, and theadjacent cells 11 are electrically connected by thecorresponding ntc thermistors 31, that is, thecells 11 in the first sequence are arranged in parallel by threentc thermistors 31, and all thecells 11 in the first sequence and thecorresponding ntc thermistors 31 constitute an internal charging and dischargingbranch 32, and the internal charging and dischargingbranch 32 performs a real-time current balancing operation on therespective cells 11 therein.
For thecells 11 in the second sequence, since thecells 11 of thesame battery pack 1 are connected in series in sequence, the positive electrodes of thecells 11 in the second sequence share the threentc thermistors 31 in the first sequence, and the negative electrodes of thecells 11 in the second sequence are electrically connected through a wire, that is, at this time, thecells 11 in the second sequence are arranged in parallel through the threentc thermistors 31, at this time, all thecells 11 in the second sequence and thecorresponding ntc thermistors 31 form an internal charging and dischargingbranch 32, and the internal charging and dischargingbranch 32 performs a real-time current balancing operation on thecells 11 therein.
The connection modes of thebattery cells 11 in the third order and the fourth order are set as described above, and are not described in detail. At this time, the parallel balancing circuit has four internal charging and dischargingbranches 32 connected in parallel, the four internal charging and dischargingbranches 32 perform current balancing operation in real time, and real-time balancing of all thebattery cells 11 is realized under the combined action of the internal charging and dischargingbranches 32. In addition, the adjacent internal charging and dischargingbranches 32 share all the negativetemperature coefficient thermistors 31 which are positioned in the same sequence in thebattery pack 1, so that the number of the negativetemperature coefficient thermistors 31 is effectively saved, and the circuit manufacturing cost is effectively reduced.
In some embodiments, thentc thermistor 31 may be disposed in thecorresponding battery pack 1 to prevent thentc thermistor 31 from being directly exposed to the external environment, and effectively prevent thentc thermistor 31 from affecting the stability due to environmental changes. In other embodiments, thebattery pack 1 is provided with a current equalizing interface 33 (as shown in fig. 3), the current equalizing interfaces 33 of allbattery packs 1 are electrically connected through corresponding current equalizing harnesses 34 (as shown in fig. 4) also provided with current equalizing interfaces 33, so that all internal charging and dischargingbranches 32 are arranged in parallel through the corresponding current equalizing harnesses 34, and thentc thermistors 31 are located in the corresponding current equalizing harnesses 34. Through the above arrangement, the wiring rationality of the flow equalizingwire harness 34 is improved, and the assembly, the overhaul and the replacement are convenient.
It should be noted that, in the present embodiment, the battery pack 4S4P is used to illustrate the novel design concept, and the number of the battery packs 1 and the number of thebattery cells 11 in eachbattery pack 1 may be set according to actual situations, which is not limited herein.
When charging and discharging the series-connectedbattery cells 11 in thebattery pack 1 or thebattery pack 1, since it cannot be ensured that all the electrical and physical and chemical indexes of the series-connectedbattery cells 11 or thebattery pack 1 are completely consistent, a situation that a certain series-connectedbattery cell 11 or thebattery pack 1 reaches a charge and discharge cutoff condition before other series-connectedbattery cells 11 or thebattery pack 1 occurs in the charge and discharge process. If this happens at the time of charging, it means that theother series cells 11 or thebattery pack 1 in the entire power battery are not fully charged, and if the charging is stopped at this time, a situation where the capacity of the entire power battery is insufficient may result.
Referring next to fig. 5 to 11, fig. 7 and 8 respectively show partial schematic diagrams of thecontrol module 2 as a master and a slave. As shown in fig. 7 and 8, theseries equalization circuit 4 includes a module-level equalization circuit 41 and a cell-level equalization circuit 42, where the cell-level equalization circuit 42 is used for equalization among a plurality of cells in thecorresponding battery pack 1, and when each cell in thebattery pack 1 reaches a cell equalization threshold, cell-level equalization is started. The modulelevel equalization circuit 41 is used for equalization among the plurality of battery packs 1, and starts module level equalization when the total voltage of the battery packs 1 reaches a module equalization threshold value. The battery cell balance threshold value and the module balance threshold value can be flexibly set according to specific conditions.
Specifically, theseries equalization circuit 4 further includes anequalization control unit 43, the cell-level equalization circuit 42 includes a first discharge resistor R7 and a first switch K7 that are in one-to-one correspondence with the plurality of cells B1-B4 in thecorresponding battery pack 1, and the cells, the first discharge resistor R7 and the first switch K7 that correspond to each other are connected in series to form a loop. The module-level equalizing circuit 41 includes a second discharging resistor R8 and a second switch K8 corresponding to thebattery pack 1, and thebattery pack 1, the second discharging resistor R8 and the second switch K8 corresponding to each other are connected in series to form a loop. Theequalization control unit 43 is connected to the first switch K7 and the second switch K8.
When cell level equalization needs to be started, theequalization control unit 43 controls the first switch K7 connected with the corresponding cell to be switched on, and discharges electricity through the first discharge resistor R7 connected with the cell; when the battery cell is balanced, the first switch K7 corresponding to the battery cell is controlled to be switched off, and at the moment, the battery cell level balance is switched off. When the module level equalization needs to be started, theequalization control unit 43 controls the second switch K8 connected with the correspondingbattery pack 1 to be conducted, and the second switch K8 is discharged through a second discharge resistor R8 connected with thebattery pack 1; when thebattery pack 1 is balanced, the second switch K8 corresponding to thebattery pack 1 is controlled to be switched off, and at the moment, the module level is balanced and switched off.
By means of a cell-level and module-level two-level equalization mechanism, after a singleseries battery pack 1 is overcharged to a certain degree, the whole charging loop is not disconnected, so thatother battery packs 1 can be continuously charged; after a single series-connected battery cell in thebattery pack 1 is overcharged to a certain extent, the whole charging loop cannot be disconnected, so that other battery cells in thebattery pack 1 andother battery packs 1 can be continuously charged, and the functionality of the battery is ensured to the maximum extent.
One of thecontrol modules 2 is used as a master control module, and theother control modules 2 are used as slave control modules. As shown in fig. 7 and 8, the master control module is different from the slave control module in that the master control module further includes amaster charging circuit 5, an equalizingcharging circuit 6, a pre-charging circuit, a normal charging/discharging circuit, acharger detection circuit 7 and a charging control circuit 8, wherein themaster charging circuit 5, the equalizingcharging circuit 6, the pre-charging circuit and the normal charging/discharging circuit are connected in parallel, and one of themaster charging circuit 5, the equalizingcharging circuit 6, the pre-charging circuit and the normal charging/discharging circuit is selectively turned on by a selection switch.
Themain charging circuit 5 is connected to both positive and negative ends of a battery Pack (as shown in fig. 6) composed of a plurality of battery packs 1, and is used for normally charging eachbattery Pack 1 in the battery Pack. A switching device K (as shown in fig. 6) is connected in series to themain charging loop 5, and the switching device K is used for controlling on/off of themain charging loop 5. When thecharger 001 is connected to themain charging circuit 5 and the switching device K is turned on (connected), themain charging circuit 5 is turned on, and thecharger 001 can charge thebattery pack 1 through themain charging circuit 5; when the switching device K is turned off, themain charging circuit 5 is turned off. The equalizingcharge circuit 6 is a circuit for charging thebattery pack 1 by thecharger 001 in an equalizing state, and includes a current limiting resistor, through which the charge current is reduced. Thecharger detection circuit 7 is used to detect whether thecharger 001 is connected to the main charging loop 5 (as shown in fig. 6).
As shown in fig. 5 and 7, the charging control circuit 8 is connected to the equalizingcharge circuit 6, thecharger detection circuit 7, themain charge circuit 5 and the equalizingcharge circuit 6, and is configured to conduct themain charge circuit 5 to charge thebattery pack 1 under normal conditions; alternatively, when thecharger detection circuit 7 detects that thecharger 001 is connected and the equalizingcharge circuit 6 starts equalizing, themain charge circuit 5 is turned off and the equalizingcharge circuit 6 is turned on to charge thebattery pack 1, so as to reduce the charge current, enhance the effect of discharging through the first discharge resistor R7 and/or the second discharge resistor R8, and further enhance the equalizing effect.
When the cell level equalization and the module level equalization are both closed, the charging control circuit 8 disconnects theequalization charging loop 6, controls the switching device K to be switched to a normal charging and discharging mode, and charges thebattery pack 1 through themain charging loop 5. The specific work flow can be seen in fig. 11.
The "normal condition" is a state when the equalizingcharge circuit 6 does not start equalization, and the "equalized state" is a state when the equalizingcharge circuit 6 starts equalization. When thecharger detection circuit 7 detects that thecharger 001 is connected and the equalizingcharge circuit 6 does not start equalizing, thebattery pack 1 is charged through themain charge circuit 5 to realize quick charging; when thecharger detection circuit 7 detects that thecharger 001 is connected and the equalizingcharge circuit 6 starts equalizing, thebattery pack 1 is charged through the equalizingcharge circuit 6 to protect the battery cells.
Referring to fig. 6, in the embodiment shown in fig. 6, thecharger detection circuit 7 includes a first resistor R1, a photocoupler O1 and a first switch circuit, and the first switch circuit includes a photocoupler O2, a photocoupler O3, a diode D1, a thyristor T1, a field-effect transistor Q2, a triode Q3, an and gate U1, a zener diode Z1, a resistor R2, a resistor R3, a resistor R4, a resistor R5 and a resistor R6. One end of the first resistor R1 is connected to thebattery pack 1, the other end is connected to the emitting end O1A of the photo-electric coupler O1, the receiving end O1B of the photo-electric coupler O1 is connected to the control electrode of the thyristor T1, the anode of the thyristor T1 is connected to the emitting end O2A of the photo-electric coupler O2, the receiving end O3B of the photo-electric coupler O3 is connected in series to the emitting end O2A of the photo-electric coupler O2, the receiving end O2B of the photo-electric coupler O2 is connected to the gate of the field effect transistor Q2, the source of the field effect transistor Q2 is connected to the first input end of the and gate U2, the second input end of the gate U2 is connected to the base of the transistor Q2 to the signal OC, the emitter of the transistor Q2 is connected to theemitting end O3 2 of the photo-electric coupler O2, the emittingend O3 2 of the photo-electric coupler O2 is connected in series to the resistor R2, the zener diode Z2, and the output end of the and gate circuit U368.
In an idle state (noload 002 is connected), the switching device K is turned off, and in a normal state, the signal OC is at a high level, and the transistor Q3 and the emitting terminal O3A are turned on. After thecharger 001 is connected, because the switching device K is disconnected, the charging current flows through the transmitting terminal O1A, the receiving terminal O1B is triggered, the thyristor T1 is triggered, the transmitting terminal O2A and the receiving terminal O3B are triggered, the receiving terminal O2B and the field-effect transistor Q2 are triggered, and at this time, the first input terminal of the gate U1 is at a high level; meanwhile, since the signal OC is high, the and gate U1 outputs high to the charge control circuit 8, so that the charge control circuit 8 generates a turn-on control signal to turn on the switching device K, thereby enabling thecharger 001 to charge thebattery pack 1 through themain charging loop 5. After the switching device K is turned on, the emitting terminal O1A is short-circuited, and since the receiving terminal O3B is in a conducting state, the thyristor T1 is kept conducting, so the switching device K is kept conducting.
When thebattery pack 1 is fully charged or theseries equalization circuit 4 starts equalization, the signal OC is at a low level, the and gate U1 outputs the low level to the charge control circuit 8, so that the charge control circuit 8 generates a disconnection control signal to disconnect the switching device K, and the triode Q3, the photoelectric coupler O3, the photoelectric coupler O2, the thyristor T1 and the field effect transistor Q2 are all turned off. When the voltage of thebattery pack 1 is reduced to the voltage threshold value and theseries equalization circuit 4 does not start equalization, the signal OC is restored to the high level, the switching device K is restored to be on, and thebattery pack 1 is restored to be charged through themain charging loop 5.
In the embodiment shown in fig. 6, thecharger detection circuit 7 realizes automatic charger identification without changing the existing charger and without complex auxiliary circuits, dedicated communication interfaces and communication protocols, has strong versatility, and can realize seamless replacement with the existing lead-acid system. Meanwhile, the switch device K is conducted to short the transmitting terminal O1A, so that the power consumption is reduced; moreover, thecharger detection circuit 7 is simple and reliable, and can be compatible with the same port and the separate port.
Of course, thecharger detection circuit 7 is not limited to the above circuit connection relationship and components, for example, in some embodiments, a triode is used instead of the fet Q2; for another example, the first resistor R1 or the like is replaced with a constant current source circuit.
Referring to fig. 7 to 9, in the embodiment shown in fig. 7 to 9, the charging control circuit 8 includes alinkage control circuit 81 and asecond switch circuit 82, an input end of thelinkage control circuit 81 is connected to the equalizingcontrol unit 43, an output end of thelinkage control circuit 81 is connected to thesecond switch circuit 82, thesecond switch circuit 82 is connected to the equalizingcharge circuit 6, and thelinkage control circuit 81 turns on or off thesecond switch circuit 82 based on a signal output by the equalizingcontrol unit 43 to turn on the equalizingcharge circuit 6 for equalizing charge or turn off the equalizingcharge circuit 6 to switch to themain charge circuit 5 for normal charge.
As shown in fig. 7, theinterlock control circuit 81 includes an or gate U2 and a photocoupler O4, an input terminal of the or gate U2 is connected to theequalization control unit 43, a transmitting terminal of the photocoupler O4 is connected to an output terminal of the or gate U2, and asecond switch circuit 82 is connected to a receiving terminal of the photocoupler O4. When the equalizingcontrol unit 43 outputs a control signal to start the cell level equalization and/or the module level equalization, the or gate U2 outputs a high level, the photoelectric coupler O4 is turned on to trigger thesecond switch circuit 82 to be turned on, and the equalizingcharge circuit 6 is turned on to perform equalizing charge. On the contrary, when thebalance control unit 43 turns off the cell level balance and the module level balance, the photoelectric coupler O4 and thesecond switch circuit 82 are not turned on, and the equalizingcharge circuit 6 is turned off. The O4 isolated protection signal triggering, transmitting and controlling circuit of the photoelectric coupler can be universally used for a low-side or high-side protection mechanism, a circuit and components, is close to the application scene and the use method of the existing lead-acid battery to the maximum extent, and is compatible with two wiring modes of same port and split port.
As shown in fig. 9, thesecond switch circuit 82 includes field effect transistors Q4, Q5, Q6, Q7, and Q8, when the photocoupler O4 is turned on, Q4, Q5, Q6, Q7, and Q8 are triggered to be turned on, so that the entiresecond switch circuit 82 is turned on, BC is at a high level, and thebattery pack 1 is charged through the equalizingcharge circuit 6. Conversely, when the photocoupler O4 is non-conductive, thesecond switching circuit 82 is non-conductive; at this time, the charging control circuit 8 may turn on the switching device K to switch to the normal charging and discharging mode, and charge thebattery pack 1 through themain charging circuit 5.
Referring to fig. 10, in the embodiment shown in fig. 10, the current limiting resistor is a positive temperature coefficient thermistor. By the design, the equalizingcharge circuit 6 has the functions of automatic constant current, automatic overcurrent protection and automatic recovery. Of course, in other embodiments, a common resistor may be used as the current limiting resistor. Specifically, the equalizingcharge circuit 6 includes two current limiting resistors PTC1 and PTC2 and a field effect transistor Q9 connected in series, when BC is at a high level, the field effect transistor Q9 is turned on, the equalizingcharge circuit 6 is turned on, and thebattery pack 1 is charged through the equalizingcharge circuit 6. Of course, the equalizingcharge circuit 6 in the embodiment is not limited to use of two current limiting resistors, and the fet Q9 may be eliminated.
Referring to fig. 12 to 14, as shown in fig. 12, the plurality ofcontrol modules 2 are distributed in a matrix, and the plurality ofcontrol modules 2 are distributed in M rows and N columns. One of the control modules located at one end of the diagonal line of the matrix is used as amaster control module 2a, and the other control modules are used asslave control modules 2 b. Eachcontrol module 2a, 2b includes a plurality of connection ports, and the connection ports are connected in parallel. In the column direction and the row direction, every twoadjacent control modules 2b and 2b/2a and 2b are connected through corresponding connecting ports. The switch signals of theslave modules 2b are sequentially transmitted to themaster module 2a through the connection ports.
In the embodiment shown in fig. 12 to 14, the control module includes 12control modules 2a and 2b, the 12control modules 2a and 2b are distributed into 3 rows and 4 columns, one control module in the 3 rd row and the 4 th column is themaster control module 2a, and the other control modules are theslave control modules 2 b. The battery packs 1 corresponding to thecontrol modules 2a, 2b in each column are connected in series, and the battery packs 1 corresponding to thecontrol modules 2a, 2b in each row are connected in parallel.
Referring to fig. 13 and 14, as shown in fig. 13 and 14, each of thecontrol modules 2a and 2b has four connection ports RU, RD, RL, RR, which are respectively disposed on four different sides of thecontrol modules 2a and 2b, two corresponding connection ports of the twoadjacent control modules 2b and 2b/2a and 2b are connected by awire harness 9, and two corresponding connection ports of the twoadjacent control modules 2b and 2b/2a and 2b are disposed adjacent to and opposite to each other. As shown in fig. 13, for twoadjacent control modules 2b and 2b/2a and 2b in the column or row direction, the connection port RU of one control module is connected to the connection port RD of the other control module, and the connection port RR of the control module is connected to the connection port RL of the other control module. Specifically, the connection ports RU, RD, RL, RR have insertion portions (not shown), and the insertion portions between the twoadjacent control modules 2b and 2b/2a and 2b are inserted and connected through thewire harness 9 to connect the twoadjacent control modules 2b and 2b/2a and 2 b.
By respectively arranging one connecting port RU, RD, RL and RR at four different sides of thecontrol modules 2a and 2b and enabling the two connecting ports of the twoadjacent control modules 2b and 2b/2a and 2b to be adjacent and opposite, the connecting distance of thewiring harness 9 between the two connecting ports of the twoadjacent control modules 2b and 2b/2a and 2b is further shortened, thereby further shortening the transmission distance of signals and saving the cost of thewiring harness 9.
As a preferred embodiment, thewire harness 9 is a general-purpose type wire harness, which is strong in versatility. Plugs (not shown) matched with the plugging parts of the connection ports RU, RD, RL and RR are arranged at two ends of thewire harness 9, and the plugs are matched with the plugging parts of the connection ports RU, RD, RL and RR in a plugging manner, so that connection between the connection ports RR and RL of the twoadjacent control modules 2b and 2b/2a and 2 b/connection between RU and RD are realized, and further connection between the twoadjacent control modules 2b and 2b/2a and 2b is realized.
Referring to fig. 14, as shown in fig. 14, the positive terminals of the four connection ports RU, RD, RL, RR in eachslave control module 2b are connected to thefirst loop 21, and the negative terminals of the four connection ports RU, RD, RL, RR are connected to thesecond loop 22. Eachslave control module 2b is provided with a switching device S and abattery management system 23, the switching device S is connected between thefirst loop 21 and thesecond loop 22, thebattery management system 23 controls the switching device S to be switched on in a first state, and controls the switching device S to be switched off in a second state, and the first state and the second state respectively correspond to one of a fault state of thebattery pack 1 and a normal state of thebattery pack 1.
In the embodiment shown in fig. 14, the switching device S is a single-contact switch, and one end of the switching device S is connected to thefirst loop 21 and the pull-up resistor R, and the other end is connected to thesecond loop 22 and grounded. Of course, the specific implementation is not limited to the specific form of the switching device S.
As shown in fig. 14, the positive terminals of the four connection ports RU, RD, RL, RR in themain control module 2a are connected to thefirst circuit 21, and the negative terminals of the four connection ports RU, RD, RL, RR are connected to thesecond circuit 22. One end of the switching device S is connected to thefirst loop 21 and the pull-up resistor R, and the other end is connected to thesecond loop 22 and grounded. Unlike theslave module 2b, thebattery management system 23 in themaster module 2a is provided with a signal receiving terminal ER connected to thefirst loop 21 of themaster module 2a to receive the switching signal of theslave module 2 b.
In an embodiment, in the case that thebattery management system 23 of theslave module 2b can independently handle the problem (e.g., overcharge, overdischarge, over-temperature, etc.) of thecorresponding battery pack 1, the switching device S is turned off, and theslave module 2b outputs a switching signal (e.g., high level) representing normal operation to themaster module 2 a. In the case that thebattery management system 23 of theslave control module 2b cannot independently handle the problem of thecorresponding battery pack 1, i.e. the fault state, thebattery management system 23 controls the switch device S to be closed, and theslave control module 2b outputs a switch signal (e.g. low level) representing the fault state to themaster control module 2a to trigger themaster control module 2a to start protection, e.g. shut down the whole battery system.
In combination with the practical application of thebattery pack 1, eachcontrol module 2b, 2a is provided with a plurality of parallel connection ports RU, RD, RL, RR, and eachcontrol module 2b, 2a is connected with theadjacent control module 2b, 2a nearby through thewiring harness 9 and the connection ports RU, RD, RL, RR to form a matrix signal network. The switch signals of thecontrol module 2b as the slave module can be transmitted to thecontrol module 2a as the master module through the connection ports RU, RD, RL, RR thereof and the connection ports RU, RD, RL, RR of theslave module 2b connected thereto, and since the same switch signal of theslave module 2b is transmitted through the connection ports RU, RD, RL, RR, there is an excellent redundancy backup effect, and the reliability of signal transmission is greatly improved. Meanwhile, the switch signals of theslave control modules 2b are sequentially transmitted in a relay manner, and the space distance between thecontrol modules 2b and 2b, and the space distance between thecontrol modules 2a and 2b are short, so that the signal transmission distance is short, the anti-interference capability is high, the reliability is high, and the cost of thewiring harness 9 for connecting thecontrol modules 2b and 2b/2a and 2b is low.
In summary, eachbattery pack 1 is independently subjected to charging management by acontrol module 2, when an overvoltage and overcharge phenomenon occurs, adverse effects caused by faults can be isolated and limited in an independent local module, the functions of the whole battery system are not affected, further, the influence of the consistency of eachsingle battery pack 1 on the whole charging effect of the battery system is weakened, and the functional integrity of the whole battery system is ensured to the maximum extent; the requirement on the consistency among the battery packs 1 is reduced, the application range of thesingle battery pack 1 is improved, namely the battery cell matching rate and the utilization rate, and the cost of thebattery pack 1 is further reduced; meanwhile, as eachbattery pack 1 is independently charged and managed, the number and complexity of connectors, wiring harnesses, communication links and other related circuits and components are reduced to the maximum extent, so that the reliability of the battery system is improved, and the cost is reduced. Moreover, eachcontrol module 2 comprises a series equalization circuit and a parallel equalization circuit, and the series equalization circuit controls the voltage equalization between the series battery packs 1 and between a plurality of battery cells in the battery packs 1, so that the requirement on the consistency between the series battery packs 1 and between the single battery cells in the battery packs 1 is lowered; the parallel balancing circuit realizes automatic current sharing of the currents of all the electric cores in theparallel battery pack 1, reduces the requirement on the consistency of theparallel battery pack 1, further improves the reliability of a battery system, and improves the feasibility of series-parallel connection use of the universallithium battery pack 1. The problem that the charging and discharging energy and power of each series-parallel battery pack 1/battery cell 11 are inconsistent due to the consistency of thebattery cells 11 and structural distribution parameters when the battery packs 1 are connected in series and parallel is solved, so that the design of thebattery pack 1 is simplified, and the service life and the usability are improved. When thesingle battery pack 1 needs to be replaced, special equipment such as a pre-balancing charger or a balancing charger is not needed, and the technical difficulty and the working strength of field maintenance are reduced.
The above disclosure is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the scope of the present invention, therefore, the present invention is not limited by the appended claims.