技术领域technical field
本发明涉及二维材料与器件技术领域,具体涉及一种Ag/[SnS2/PMMA]/Cu 低功耗阻变存储器及其制备方法。The invention relates to the technical field of two-dimensional materials and devices, in particular to an Ag/[SnS2 /PMMA]/Cu low-power resistive memory and a preparation method thereof.
背景技术Background technique
随着电子信息行业的快速发展,低成本、高性能、非易失性存储器在电子器件和逻辑存储单元中的应用需求越来越大,而传统的硅基信息存储技术面临着理论与物理上的限制。With the rapid development of the electronic information industry, the application requirements of low-cost, high-performance, non-volatile memory in electronic devices and logic storage units are increasing, while the traditional silicon-based information storage technology faces theoretical and physical challenges. limits.
在众多类型的非易失性存储器中,阻变存储器(Resistive Random AccessMemory,RRAM)具有耐受性好、密度高、写入速度快、保持时间长、工作电压低等优点,成为了下一代信息存储设备的理想替代品。寻找合适的功能材料来改善RRAM的存储特性是一个重要的研究领域。Among many types of non-volatile memory, resistive random access memory (RRAM) has the advantages of good endurance, high density, fast writing speed, long retention time, and low operating voltage, and has become the next generation of information technology. Ideal replacement for storage devices. Finding suitable functional materials to improve the storage properties of RRAM is an important research area.
绝缘过渡金属氧化物是最常见的阻变材料,但是因为其柔韧性差,因此不利于应用在柔性器件领域。二维材料由于其柔性、超薄、具有晶体结构等特点,在过去十几年的研究表现出了独特的电学、化学、力学和物理性能。二维材料,如石墨烯、氧化石墨烯、还原氧化石墨烯、过渡金属二卤化物和MXenes已经被引入作为阻变层,在柔性或刚性衬底上制备RRAM器件。尽管基于二维材料的RRAM器件表现出了优异的性能,但是实现一种具有所有参数均优异的功能性记忆材料仍然是一项具有挑战性的工作。功能层的复合是提高其性能的有效途径之一,与石墨烯、GO、RGO、TaOx、MoS2等单活性层相比,基于复合功能层的RRAM性能得到了较大幅度的提高。Insulating transition metal oxides are the most common resistive switching materials, but because of their poor flexibility, they are not conducive to application in the field of flexible devices. Due to its flexibility, ultra-thin, and crystal structure, two-dimensional materials have shown unique electrical, chemical, mechanical, and physical properties in the past ten years of research. Two-dimensional materials such as graphene, graphene oxide, reduced graphene oxide, transition metal dichalcogenides, and MXenes have been introduced as resistive switching layers to fabricate RRAM devices on flexible or rigid substrates. Although RRAM devices based on 2D materials have shown excellent performance, it is still a challenging work to realize a functional memory material with excellent performance in all parameters. Combination of functional layers is one of the effective ways to improve its performance. Compared with single active layers such as graphene, GO, RGO, TaOx, and MoS2, the performance of RRAM basedon composite functional layers has been greatly improved.
商用柔性可穿戴器件的发展需要较低的RRAM工作电压。为了推进可穿戴技术的应用,需要电源电压小于1V的RRAM。然而,当开关比大于106、耐受性大于104且Set电流小于10-8A时,几乎所有基于绝缘过渡金属氧化物和二维材料的RRAM的Set都高于1V。The development of commercial flexible wearable devices requires lower RRAM operating voltage. In order to advance the application of wearable technology, RRAM with supply voltage less than 1V is required. However, the Set of almost all RRAMs based on insulating transition metal oxides and 2D materials is higher than 1 V when the on-off ratio is greater than 106 , the endurance is greater than 104 , and the Set current is less than 10−8 A.
调节限制电流可以改变阻变存储器导通时的低阻值,从而实现RRAM的多级存储特性。如果器件的开关比较低,调控低阻值的范围就越窄,所以高开关比的RRAM将有利于实现多级存储功能。然而,当Set电压小于1V、耐受性大于104、Set电流小于10-8A且限制电流调控开关比的变化范围大于5×102时,几乎所有基于绝缘过渡金属氧化物和二维材料的RRAM的开关比都小于106。Adjusting the limiting current can change the low resistance value of the RRAM when it is turned on, thereby realizing the multi-level storage characteristics of the RRAM. If the switching ratio of the device is relatively low, the range of adjusting the low resistance value will be narrower, so RRAM with high switching ratio will be beneficial to realize multi-level storage function. However, when the Set voltage is less than 1V, the tolerance is greater than 104 , the Set current is less than 10-8 A, and the variation range of the limiting current regulation switching ratio is greater than 5×102 , almost all insulating transition metal oxides and two-dimensional materials based on The on-off ratios of the RRAMs are less than 106 .
发明内容Contents of the invention
有鉴于此,本发明提供一种Ag/[SnS2/PMMA]/Cu低功耗阻变存储器及其制备方法,其制备出的阻变存储器具有低操作电压、低功耗、高耐受性、高开关比的特点。In view of this, the present invention provides a Ag/[SnS2 /PMMA]/Cu low-power resistive memory and a preparation method thereof, and the prepared resistive memory has low operating voltage, low power consumption, and high tolerance , High switching ratio characteristics.
为解决现有技术存在的问题,本发明的技术方案是:一种 Ag/[SnS2/PMMA]/Cu低功耗阻变存储器,其特征在于:所述Ag/[SnS2/PMMA]/Cu 阻变存储器包括自下而上依次设置的衬底、底电极、阻变层和顶电极。In order to solve the problems existing in the prior art, the technical solution of the present invention is: an Ag/[SnS2 /PMMA]/Cu low-power resistive memory, characterized in that: said Ag/[SnS2 /PMMA]/ The Cu resistive variable memory includes a substrate, a bottom electrode, a resistive variable layer and a top electrode arranged sequentially from bottom to top.
进一步,衬底为玻璃衬底。Further, the substrate is a glass substrate.
进一步,底电极为Ag,电极的厚度为100~300nm;顶电极为Cu,电极的厚度为100~300nm,直径250μm。Further, the bottom electrode is Ag, and the thickness of the electrode is 100-300 nm; the top electrode is Cu, and the thickness of the electrode is 100-300 nm, and the diameter of the electrode is 250 μm.
进一步,阻变层材料为SnS2/PMMA复合薄膜。Further, the material of the resistance variable layer is a composite film of SnS2 /PMMA.
一种Ag/[SnS2/PMMA]/Cu低功耗阻变存储器的制备方法,其特征在于:所述的方法步骤为:A preparation method of Ag/[SnS2 /PMMA]/Cu low-power resistive memory, characterized in that: the method steps are:
1)将硫代乙酰胺、五水四氯化锡溶解在去离子水中,滴加冰乙酸,搅拌均匀直至形成透明溶液后放入反应釜内;1) Dissolve thioacetamide and tin tetrachloride pentahydrate in deionized water, add glacial acetic acid dropwise, stir evenly until a transparent solution is formed, and then put it into the reaction kettle;
2)维持反应釜温度150~200℃,进行水热反应6~24h;2) Maintain the temperature of the reactor at 150-200°C, and carry out the hydrothermal reaction for 6-24 hours;
3)反应结束后,将产物用无水乙醇、去离子水分别清洗3-5次,然后80℃恒温烘干,得到产物SnS2;3) After the reaction is finished, the product is washed with absolute ethanol and deionized water for 3-5 times, and then dried at a constant temperature of 80° C. to obtain the product SnS2 ;
4)称取步骤3)制得的1~2g SnS2加入10~100mL的N-N二甲基甲酰胺中,采用超声法制备SnS2悬浮液;4) Weighing1-2 g of SnS2 prepared in step3 ) and adding it to 10-100 mL of NN dimethylformamide, and preparing SnS2 suspension by ultrasonic method;
5)采用真空蒸发镀膜法在玻璃衬底上蒸镀厚度为100~300nm的Ag底电极;5) Evaporating an Ag bottom electrode with a thickness of 100-300 nm on the glass substrate by vacuum evaporation coating method;
6)将步骤4)制得的SnS2悬浮液采用真空抽滤法在底电极上制备SnS2薄膜,并采用旋转涂胶法在SnS2薄膜表面旋涂一层PMMA;6) the SnS2 suspension prepared in step4 ) is prepared on the bottom electrode by a vacuum filtration method to prepare a SnS2 film, and a layer of PMMA is spin- coated on the surface of the SnS2 film by a spin coating method;
7)在PMMA薄膜上表面真空蒸镀直径250μm、厚度100~300nm的Cu 作为顶电极。7) Vacuum-deposit Cu with a diameter of 250 μm and a thickness of 100-300 nm on the upper surface of the PMMA film as the top electrode.
进一步,步骤1)中五水四氯化锡与硫代乙酰胺的摩尔比为1:2.5,去离子水体积为50~150mL,冰乙酸体积为1~10mL。Further, in step 1), the molar ratio of tin tetrachloride pentahydrate to thioacetamide is 1:2.5, the volume of deionized water is 50-150 mL, and the volume of glacial acetic acid is 1-10 mL.
进一步,步骤4)中超声法的时间为1~4h,超声功率为150~250W。Further, the ultrasonic method in step 4) takes 1-4 hours, and the ultrasonic power is 150-250W.
进一步,步骤5)中真空蒸发镀膜法的条件为:蒸镀速率为本底真空小于5×10-4Pa、蒸镀功率为130~160W。Further, in step 5), the condition of the vacuum evaporation coating method is: the evaporation rate is The background vacuum is less than 5×10-4 Pa, and the evaporation power is 130-160W.
进一步,步骤6)中SnS2悬浮液体积为0.5~3ml,旋转涂胶法的转速为4000 ~8000rpm,旋涂时间为60~120s。Further, in step 6), the volume of the SnS2 suspension is 0.5-3ml, the rotational speed of the spin-coating method is 4000-8000rpm, and the spin-coating time is 60-120s.
进一步,步骤7)中,所述真空蒸镀的条件为:蒸镀速率为本底真空小于5×10-4Pa、蒸镀功率为160~190W。Further, in step 7), the conditions of the vacuum evaporation are: the evaporation rate is The background vacuum is less than 5×10-4 Pa, and the evaporation power is 160-190W.
与现有技术相比,本发明的优点如下:Compared with prior art, advantage of the present invention is as follows:
1)本发明采用水热法制备的SnS2作为阻变材料制备Ag/[SnS2/PMMA]/Cu 阻变存储器,开关比约为106,耐受性达到了104,这两项参数在二维材料阻变存储器中已达到较优水平的基础上,Set/Reset电压只有0.14V/-0.1V,远低于现有技术制备出的RRAM,有利于其未来在可穿戴设备方面的应用;当器件从高阻态转变为低阻态时对应的Set电流为2.6×10-9A,Set功率仅为3.6×10-10W,说明器件的功耗极低。1) In the present invention, SnS2 prepared by hydrothermal method is used as the resistive switch material to prepare Ag/[SnS2 /PMMA]/Cu resistive switch memory, the switch ratio is about 106 , and the tolerance reaches 104 . These two parameters On the basis that the two-dimensional material resistive variable memory has reached a better level, the Set/Reset voltage is only 0.14V/-0.1V, which is far lower than the RRAM prepared by the existing technology, which is conducive to its future development in wearable devices. Application; when the device changes from a high-resistance state to a low-resistance state, the corresponding Set current is 2.6×10-9A , and the Set power is only 3.6×10-10 W, indicating that the power consumption of the device is extremely low.
2)本发明利用Ag/[SnS2/PMMA]/Cu阻变存储器表现出的高开关比,通过限制电流改变器件的低阻值,调控开关比的变化范围高达5×102,可以较好的实现多级存储功能;2) The present invention utilizes the high switching ratio exhibited by the Ag/[SnS2 /PMMA]/Cu resistive variable memory, changes the low resistance value of the device by limiting the current, and regulates the variation range of the switching ratio up to 5×102 , which can be better The realization of multi-level storage function;
3)本发明将SnS2与PMMA形成复合功能层制备Ag/[SnS2/PMMA]/Cu阻变存储器,SnS2薄膜中SnS2纳米片之间存在空隙,蒸镀顶部Cu电极时Cu沿空隙沉积,造成顶部Cu电极与底部Ag电极贯通,SnS2层上旋涂上PMMA层后,PMMA层可将SnS2层封装在衬底上,阻断了SnS2层与外界的接触,不仅防止了顶部Cu电极蒸镀时其与底部Ag电极的贯通,也提高了阻变存储器的耐受性。3) In the present invention, SnS2 and PMMA form a composite functional layer to prepare Ag/[SnS2 /PMMA]/Cu resistive memory, there are gaps between SnS2 nanosheets in the SnS2 film, and Cu along the gap when the top Cu electrode is evaporated Deposition, causing the top Cu electrode and the bottom Ag electrode to penetrate, after the PMMA layer is spin-coated on the SnS2 layer, the PMMA layer can encapsulate the SnS2 layer on the substrate, blocking the contact between the SnS2 layer and the outside world, not only preventing The penetration of the top Cu electrode and the bottom Ag electrode during evaporation also improves the resistance of the RRAM.
附图说明:Description of drawings:
图1是实施例1中合成的SnS2纳米片在扫描电镜(SEM)和透射电镜(TEM) 下的形貌和结构;图中(a)SEM,(b)TEM,(c)和(d)HRTEM;Fig. 1 is the morphology and the structure of the SnS synthesized in embodiment1 nanosheets under scanning electron microscope (SEM) and transmission electron microscope (TEM); Among the figure (a) SEM, (b) TEM, (c) and (d )HRTEM;
图2是实施例1中合成的SnS2纳米片的XRD、EDX、XPS和拉曼光谱分析结果;图中(a)XRD,(b)和(c)XPS,(d)拉曼光谱;Fig. 2 is the XRD, EDX, XPS and Raman spectrum analysis result of the SnS synthesized in the embodiment1 nanosheet; Among the figure (a) XRD, (b) and (c) XPS, (d) Raman spectrum;
图3是实施例1中Ag/[SnS2/PMMA]/Cu阻变存储器的结构与性能;图中(a) 结构的示意图,(b)器件的侧切面SEM图,(c)I-V曲线,(d)正向双对数I-V曲线,(e)反向双对数I-V曲线,(f)高低阻值统计图;Fig. 3 is the structure and performance of Ag/[SnS2 /PMMA]/Cu resistive memory in
图4是实施例1中Ag/[SnS2/PMMA]/Cu阻变存储器的多级阻变特性;图中 (a)不同限制电流下的I-V曲线图,(b)不同限制电流下的高低阻值统计图;Fig. 4 is the multilevel resistive change characteristic of Ag/[SnS2 /PMMA]/Cu resistive change memory in
图5是实施例2中Ag/[SnS2/PMMA]/Cu阻变存储器的阻变特性;图中(a)I-V 曲线图,(b)高低阻值统计图。Fig. 5 is the resistive switching characteristics of the Ag/[SnS2 /PMMA]/Cu resistive memory in Example 2; in the figure (a) IV curve, (b) high and low resistance statistics.
具体实施方式Detailed ways
为了进一步理解本发明,下面结合实施例对本发明提供的技术方案进行详细说明,本发明的保护范围不受以下实施例的限制。In order to further understand the present invention, the technical solutions provided by the present invention will be described in detail below in conjunction with the examples, and the protection scope of the present invention is not limited by the following examples.
本发明一种Ag/[SnS2/PMMA]/Cu低功耗阻变存储器,如图3的(a)和(b),包括自下而上依次设置的衬底、底电极、阻变层和顶电极;An Ag/[SnS2 /PMMA]/Cu low-power resistive variable memory of the present invention, as shown in (a) and (b) of Figure 3, includes a substrate, a bottom electrode, and a resistive variable layer arranged in sequence from bottom to top and the top electrode;
上述衬底为玻璃衬底;底电极为Ag,电极的厚度为100~300nm;阻变层材料为SnS2/PMMA复合薄膜;顶电极为Cu,电极的厚度为100~300nm,直径 250μm。The above substrate is a glass substrate; the bottom electrode is Ag, and the thickness of the electrode is 100-300nm; the material of the resistive layer is SnS2 /PMMA composite film; the top electrode is Cu, the thickness of the electrode is 100-300nm, and the diameter is 250μm.
实施例1:Example 1:
一种Ag/[SnS2/PMMA]/Cu低功耗阻变存储器的制备方法的步骤为:The steps of a preparation method of Ag/[SnS2 /PMMA]/Cu low-power resistive memory are as follows:
1)称取5.0mmol的五水四氯化锡(SnCl4·5H2O)溶解在70mL的稀冰乙酸溶液(3mL冰乙酸+67mL去离子水)中,均匀搅拌;1) Dissolve 5.0 mmol of tin tetrachloride pentahydrate (SnCl4 5H2 O) in 70 mL of dilute glacial acetic acid solution (3 mL of glacial acetic acid + 67 mL of deionized water), and stir evenly;
2)加入12.5mmol的硫代乙酰胺(CH3CSNH2)后继续搅拌10min,将搅拌好的透明溶液转移至100mL的聚四氟衬里的不锈钢高压反应釜内,密封好,放入电热恒温鼓风干燥箱中,180℃反应12h;2) After adding 12.5mmol of thioacetamide (CH3 CSNH2 ), continue to stir for 10 minutes, transfer the stirred transparent solution to a 100mL stainless steel autoclave with PTFE lining, seal it well, and put it into an electric heating constant temperature drum In an air drying oven, react at 180°C for 12 hours;
3)反应结束后自然冷却至室温,用去离子水和无水乙醇反复超声洗涤3次后离心,将样品在80℃的真空条件下烘干,即可得到SnS2纳米片;3) Naturally cool to room temperature after the reaction, repeat ultrasonic washing with deionized water and absolute ethanol for 3 times, then centrifuge, and dry the sample under vacuum conditions at 80°C to obtain SnS2 nanosheets;
4)称取1g SnS2样品加入到100ml的N,N-二甲基甲酰胺中,采用超声法将SnS2粉末分散制备SnS2悬浮液,超声时间3h、超声功率为250W;4) Weigh 1g of SnS2 sample and add it to 100ml of N,N-dimethylformamide, and disperse the SnS2 powder by ultrasonic method to prepare SnS2 suspension, the ultrasonic time is 3h, and the ultrasonic power is 250W;
5)采用真空蒸发镀膜法在玻璃衬底上蒸镀厚度为220nm的Ag作为底电极,真空蒸镀条件为:蒸镀速率为本底真空小于5×10-4Pa、蒸镀功率为 140W;5) Ag with a thickness of 220nm is evaporated on the glass substrate by the vacuum evaporation coating method as the bottom electrode, and the vacuum evaporation conditions are: the evaporation rate is The background vacuum is less than 5×10-4 Pa, and the evaporation power is 140W;
6)取1ml的SnS2悬浮液采用真空抽滤法在底电极上制备SnS2阻变层薄膜,并采用旋转涂胶法在SnS2薄膜表面在6000rpm转速和70s时间的条件下旋涂一层PMMA;6 ) Take 1ml of the SnS2 suspension and prepare a SnS2 resistive layer filmon the bottom electrode by vacuum filtration, and spin coat a layeron the surface of the SnS2 film under the conditions of 6000rpm and 70s by spin coating method PMMA;
7)在SnS2/PMMA阻变层薄膜上采用真空抽滤法蒸镀直径250μm、厚度220nm 的Cu作为顶电极,真空蒸镀的条件为:蒸镀速率为本底真空小于 5×10-4Pa、蒸镀功率为180W。最后采用吉利时(keithely)4200-SCS半导体特性分析仪进行阻变特性测试,限制电流为1×10-3A。7) On the SnS2 /PMMA resistive layer film, Cu with a diameter of 250 μm and a thickness of 220 nm was evaporated as the top electrode by vacuum filtration method. The conditions of vacuum evaporation were: the evaporation rate was The background vacuum is less than 5×10-4 Pa, and the evaporation power is 180W. Finally, a keithely 4200-SCS semiconductor characteristic analyzer was used to test the resistive switching characteristics, and the limiting current was 1×10-3 A.
本实施例提供制备低操作电压、高耐受性、高开关比的Ag/[SnS2/PMMA]/Cu 阻变存储器的方法。为本发明的最优实施例,This embodiment provides a method for preparing an Ag/[SnS2 /PMMA]/Cu RRAM with low operating voltage, high endurance, and high switching ratio. For the best embodiment of the present invention,
图1是实施例1中水热法制备的SnS2粉体在扫描电镜(SEM)和透射电镜 (TEM)下的形貌和结构,可以看出制备的SnS2粉体为边长等于20~50nm的六角形纳米片,层数约为15层(厚度约为10nm),其原子结构为蜂窝状排列的 2H结构。Fig. 1 is the SnS prepared by the hydrothermal method in embodiment1 The morphology and structure of the powder under the scanning electron microscope (SEM) and the transmission electron microscope (TEM), it can be seen that the prepared SnSThe powder has a side length equal to 20~ The 50nm hexagonal nanosheet has about 15 layers (thickness is about 10nm), and its atomic structure is a 2H structure arranged in a honeycomb shape.
图2是实施例1中合成的SnS2粉末的成分;通过图2(a)的XRD图谱,可以看出所制备SnS2纳米片的主要衍射峰与标准卡中的六方结构SnS2(JCPDS No.23-0677)的相一致,这表明所制备SnS2纳米片具有六方结构。采用x光电子能谱(XPS)分析了所制备SnS2纳米片的化学组成和键合结构,如图2(b)和(c) 所示。由于Sn元素强烈的自旋轨道分裂,Sn 3d5/2和Sn3d3/2两个主要能级峰分别位于486.59eV和495.03eV,见图2(b),图中两个主要能级峰之差表示Sn 的自旋轨道分裂能,可以算出Sn的自旋轨道分裂能为8.44eV,是SnS2中Sn4+轨道的典型值。而S 2p3/2和S 2p1/2两个主要能级峰分别位于161.94eV和163.03 eV,见图2(c),可以算出S的自旋轨道分裂能约为1.09eV。拉曼光谱可用于定量分析SnS2纳米片的层数。一层、二层、三层、四层和块体SnS2的A1g拉曼频率分别为304.6、307.0、308.9、309.5和310.8cm-1。图2(d)为所制备SnS2纳米片的拉曼光谱,可以看出其拉曼光谱图上只在311.1cm-1处出现了一个特征峰,这一特征峰应是SnS2的A1g峰。制备SnS2纳米片的层数为15层左右,其 A1g峰对应的拉曼频率与块体SnS2的(310.8cm-1)几乎完全相同。Fig.2 is the composition of the SnS2 powder synthesized in
本发明将水热法制备的SnS2纳米片与PMMA薄膜进行复合形成SnS2/PMMA复合薄膜作为阻变层,制备了Ag/[SnS2/PMMA]/Cu阻变存储器。In the present invention, SnS2 nanosheets prepared by a hydrothermal method are combined with PMMA films to form a SnS2 /PMMA composite film as a resistive variable layer, and an Ag/[SnS2 /PMMA]/Cu resistive variable memory is prepared.
图3是实施例1中RRAM的阻变特性。图3(a)为器件的示意图,器件从下至上分别是Ag电极、SnS2薄膜、PMMA薄膜以及Cu电极。图3(b)是器件的侧切面SEM图,Ag/[SnS2/PMMA]/CuAg电极的厚度约为250nm,SnS2薄膜的厚度约为900nm、PMMA薄膜的厚度约为180nm,Cu电极的厚度约为250nm。图3(c) 为I-V曲线图,器件的Set电压为0.14V,Reset电压为-0.1V,操作电压远小于1V。器件从高阻转变为低阻时的Set电流为2.6×10-9A,Set功率仅为 3.6×10-10W,说明器件的功耗极低。图3(d)和(e)是正偏压区和负偏压区的双对数坐标I-V曲线图,Ag/[SnS2/PMMA]/Cu阻变存储器的双对数坐标I–V曲线的斜率值~1,表明高阻态(HRS)与低阻态(LRS)的转换是由导电细丝模型控制的。图3(f)为高低阻值统计图,从图中可以看出其在高阻态(HRS)和低阻态(LRS)之间可以进行稳定的电阻切换。在约1×104次开/关循环后,开/关电阻比基本保持稳定,约集中在1×106左右。综合考虑器件的开关比、耐受性、功耗和Set/Reset电压,实施例1中的Ag/[SnS2/PMMA]/Cu阻变存储器的综合性能十分优异。FIG. 3 is the resistive switching characteristic of the RRAM in the first embodiment. Figure 3(a) is a schematic diagram of the device, and the device is Ag electrode, SnS2 film, PMMA film and Cu electrode from bottom to top. Figure 3(b) is a side-section SEM image of the device. The thickness of the Ag/[SnS2 /PMMA]/CuAg electrode is about 250nm, the thickness of the SnS2 film is about 900nm, and the thickness of the PMMA film is about 180nm. The thickness is about 250nm. Figure 3(c) is the IV curve. The Set voltage of the device is 0.14V, the Reset voltage is -0.1V, and the operating voltage is much less than 1V. When the device changes from high resistance to low resistance, the Set current is 2.6×10-9 A, and the Set power is only 3.6×10-10 W, indicating that the power consumption of the device is extremely low. Figure 3(d) and (e) are the log-log coordinate IV curves of the positive bias region and the negative bias region, and the log-log coordinate I-V curve of the Ag/[SnS2 /PMMA]/Cu resistive memory The slope value ~1 indicates that the transition from the high resistance state (HRS) to the low resistance state (LRS) is controlled by the conductive filament model. Figure 3(f) is a statistical diagram of high and low resistance values, from which it can be seen that it can perform stable resistance switching between the high resistance state (HRS) and the low resistance state (LRS). After about 1×104 on/off cycles, the on/off resistance ratio remains basically stable, centered around 1×106 . Comprehensively considering the switching ratio, tolerance, power consumption and Set/Reset voltage of the device, the comprehensive performance of the Ag/[SnS2 /PMMA]/Cu resistive memory in Example 1 is very excellent.
将实施例1制备的阻变存储器采用吉利时(keithely)4200-SCS半导体特性分析仪进行阻变特性测试时限制电流的设置范围为1×10-5~5×10-3A。The setting range of the limiting current is 1×10-5 to 5×10-3 A when the resistive switching memory prepared in Example 1 is tested using a Keithely 4200-SCS semiconductor characteristic analyzer.
改变限制电流的大小可以调控RRAM低阻值,图5是实施例2中 Ag/[SnS2/PMMA]/Cu阻变存储器的多级阻变特性,图5(a)是不同限制电流下的 I-V曲线图,可以看出器件在1×10-5A、5×10-4A、5×10-3A限制电流条件下都表现出了良好的阻变存储特性,Set/Reset电压低。图5(b)是不同限制电流下的高低阻值统计图,可以看出器件在不同参数的限制电流下,未导通时的高阻值基本保持不变,而导通后的低阻值会发生改变。六个不同的低阻态仍然可以被明显的区分开,这说明了通过限制电流调控Ag/[SnS2/PMMA]/Cu阻变存储器低阻值的可行性。最高限制电流(5×10-3A)和最低限制电流(1×10-5A)条件下,低阻值的比值约为5×102,限制电流调控开关比的变化范围约为5×102,可以较好的实现多级存储功能。Changing the size of the limiting current can regulate the low resistance value of RRAM, and Fig. 5 is the multi-level resistive switching characteristic of Ag/[SnS2 /PMMA]/Cu resistive switching memory in
实施例2:Example 2:
一种Ag/[SnS2/PMMA]/Cu低功耗阻变存储器的制备方法的步骤为:The steps of a preparation method of Ag/[SnS2 /PMMA]/Cu low-power resistive memory are as follows:
1)称取8.0mmol的四氯化锡(SnCl4·5H2O)溶解在100mL的稀冰乙酸溶液(5mL冰乙酸+112mL去离子水)中,均匀搅拌;1) Dissolve 8.0 mmol of tin tetrachloride (SnCl4 5H2 O) in 100 mL of dilute glacial acetic acid solution (5 mL of glacial acetic acid + 112 mL of deionized water), and stir evenly;
2)加入20mmol的硫代乙酰胺(CH3CSNH2)后继续搅拌10min,将搅拌好的透明溶液转移至150mL的聚四氟衬里的不锈钢高压反应釜内,密封好,放入电热恒温鼓风干燥箱中,190℃反应10h;2) After adding 20mmol of thioacetamide (CH3 CSNH2 ), continue to stir for 10 minutes, transfer the stirred transparent solution to a 150mL stainless steel autoclave lined with polytetrafluoroethylene, seal it well, and put it into an electric heating constant temperature blasting In a drying oven, react at 190°C for 10h;
3)反应结束后自然冷却至室温,用去离子水和无水乙醇反复超声洗涤5次后离心,将样品在80℃的真空条件下烘干,即可得到SnS2纳米片;3) Naturally cool to room temperature after the reaction, ultrasonically wash with deionized water and absolute ethanol for 5 times, centrifuge, and dry the sample under vacuum at 80°C to obtain SnS2 nanosheets;
4)称取1g SnS2样品加入到100ml的N,N-二甲基甲酰胺中,采用超声法将SnS2粉末分散制备SnS2悬浮液,超声时间3h、超声功率为250W;4) Weigh 1g of SnS2 sample and add it to 100ml of N,N-dimethylformamide, and disperse the SnS2 powder by ultrasonic method to prepare SnS2 suspension, the ultrasonic time is 3h, and the ultrasonic power is 250W;
5)采用真空蒸发镀膜法在玻璃衬底上蒸镀厚度为200nm的Ag作为底电极,真空蒸镀条件为:蒸镀速率为本底真空小于5×10-4Pa、蒸镀功率为150 W;5) The vacuum evaporation coating method is used to evaporate Ag with a thickness of 200nm on the glass substrate as the bottom electrode. The vacuum evaporation conditions are: the evaporation rate is The background vacuum is less than 5×10-4 Pa, and the evaporation power is 150 W;
6)取2ml的SnS2悬浮液采用真空抽滤法在底电极上制备SnS2阻变层薄膜。并采用旋转涂胶法在SnS2薄膜表面在7000rpm转速和60s时间的条件下旋涂一层PMMA;6) Take 2ml of the SnS2 suspension and prepare a SnS2 resistive layer film on the bottom electrode by vacuum filtration. And adopt the spin-coating method to spin- coat a layer of PMMA on the SnS2 film surface under the condition of 7000rpm rotating speed and 60s time;
7)在SnS2/PMMA阻变层薄膜上采用真空抽滤法蒸镀直径250μm、厚度200nm 的Cu作为顶电极,真空蒸镀的条件为:蒸镀速率为本底真空小于5×10-4 Pa、蒸镀功率为170W。最后采用吉利时(keithely)4200-SCS半导体特性分析仪进行阻变特性测试,,限制电流为1×10-3A。7) On the SnS2 /PMMA resistive layer film, Cu with a diameter of 250 μm and a thickness of 200 nm was evaporated as the top electrode by vacuum filtration method. The conditions of vacuum evaporation were: the evaporation rate was The background vacuum is less than 5×10-4 Pa, and the evaporation power is 170W. Finally, a keithely 4200-SCS semiconductor characteristic analyzer is used to test the resistive switching characteristics, and the limiting current is 1×10-3 A.
图5是实施例2中Ag/[SnS2/PMMA]/Cu阻变存储器的阻变特性。图5(a) 为I-V曲线图,器件的Set电压为0.16V,Reset电压为-0.09v,操作电压远小于 1V。图5(b)为高低阻值统计图,从图中可以看出其在高阻态(HRS)和低阻态(LRS)之间可以进行稳定的电阻切换。在约1400次开/关循环后,开/关电阻比保持稳定。Ag/[SnS2/PMMA]/Cu阻变存储器的高低阻开关比值在约为106。FIG. 5 shows the resistive switching characteristics of the Ag/[SnS2 /PMMA]/Cu resistive memory in Example 2. FIG. Figure 5(a) is the IV curve. The Set voltage of the device is 0.16V, the Reset voltage is -0.09v, and the operating voltage is far less than 1V. Figure 5(b) is a statistical diagram of high and low resistance values, from which it can be seen that it can perform stable resistance switching between the high resistance state (HRS) and the low resistance state (LRS). The on/off resistance ratio remained stable after about 1400 on/off cycles. The high-to-low resistance switching ratio of the Ag/[SnS2 /PMMA]/Cu RRAM is about 106 .
以上所述仅是本发明的优选实施例,并非用于限定本发明的保护范围,应当指出,对本技术领域的普通技术人员在不脱离本发明原理的前提下,对其进行若干改进与润饰,均应视为本发明的保护范围。The above is only a preferred embodiment of the present invention, and is not intended to limit the protection scope of the present invention. It should be pointed out that those skilled in the art can make some improvements and modifications to it without departing from the principles of the present invention. All should be regarded as the protection scope of the present invention.
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CN (1) | CN113328036B (en) |
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3504430A (en)* | 1966-06-27 | 1970-04-07 | Hitachi Ltd | Method of making semiconductor devices having insulating films |
CN105810817A (en)* | 2016-05-31 | 2016-07-27 | 天津理工大学 | A Two-Dimensional Nanosheet MoS2 Vertical Structure Resistive Switching Device |
KR20180106868A (en)* | 2017-03-20 | 2018-10-01 | 광주과학기술원 | Multi-function electronic device having memristor and memcapacitor and method for manufacturing the same |
CN110379922A (en)* | 2019-08-20 | 2019-10-25 | 西安工业大学 | A kind of flexibility Ag/MoS2The preparation method of/Cu resistive formula memory |
CN110491991A (en)* | 2019-08-20 | 2019-11-22 | 西安工业大学 | It is a kind of to prepare hydro-thermal method MoS2The method of multistage resistance-variable storing device |
CN111933794A (en)* | 2020-07-02 | 2020-11-13 | 北京航空航天大学 | MoS based on coexistence of analog type and digital type2Base memristor and preparation method thereof |
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7491962B2 (en)* | 2005-08-30 | 2009-02-17 | Micron Technology, Inc. | Resistance variable memory device with nanoparticle electrode and method of fabrication |
US20160284811A1 (en)* | 2013-11-04 | 2016-09-29 | Massachusetts Institute Of Technology | Electronics including graphene-based hybrid structures |
KR101945814B1 (en)* | 2017-12-20 | 2019-02-08 | 성균관대학교산학협력단 | Resistance random access memory device and preparing method thereof |
US10418550B2 (en)* | 2018-05-29 | 2019-09-17 | Nanjing University | High temperature resistant memristor based on two-dimensional covalent crystal and preparation method thereof |
US11257962B2 (en)* | 2019-05-02 | 2022-02-22 | Micron Technology, Inc. | Transistors comprising an electrolyte, semiconductor devices, electronic systems, and related methods |
JP7584899B2 (en)* | 2019-06-17 | 2024-11-18 | 三星電子株式会社 | Memristor and neuromorphic device including same |
CN112103389A (en)* | 2020-10-10 | 2020-12-18 | 南京工业大学 | Low-power-consumption nonvolatile resistive random access memory series and preparation method thereof |
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3504430A (en)* | 1966-06-27 | 1970-04-07 | Hitachi Ltd | Method of making semiconductor devices having insulating films |
CN105810817A (en)* | 2016-05-31 | 2016-07-27 | 天津理工大学 | A Two-Dimensional Nanosheet MoS2 Vertical Structure Resistive Switching Device |
KR20180106868A (en)* | 2017-03-20 | 2018-10-01 | 광주과학기술원 | Multi-function electronic device having memristor and memcapacitor and method for manufacturing the same |
CN110379922A (en)* | 2019-08-20 | 2019-10-25 | 西安工业大学 | A kind of flexibility Ag/MoS2The preparation method of/Cu resistive formula memory |
CN110491991A (en)* | 2019-08-20 | 2019-11-22 | 西安工业大学 | It is a kind of to prepare hydro-thermal method MoS2The method of multistage resistance-variable storing device |
CN111933794A (en)* | 2020-07-02 | 2020-11-13 | 北京航空航天大学 | MoS based on coexistence of analog type and digital type2Base memristor and preparation method thereof |
Title |
---|
Controllable Growth of Single Layer MoS2 and Resistance Switching Effect in Polymer/MoS2 Structure;Sung Jae Park等;《Appl. Sci. Converg. Technol.》;20170930;第26卷(第5期);第129页第1栏第2段至第132页第2栏第2段,图1-6* |
二维材料新起之秀:Ⅳ-Ⅵ族半导体;周兴等;《中国激光》;20170731(第07期);全文* |
Publication number | Publication date |
---|---|
CN113328036A (en) | 2021-08-31 |
Publication | Publication Date | Title |
---|---|---|
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