Detailed Description
Herein, unless the context specifically defines the article "a" and "an" may refer to one or more. It will be further understood that the terms "comprises," "comprising," "includes," and/or "including" when used herein, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
In this context, the term "circuit" generally refers to an object that is connected by one or more transistors and/or one or more active and passive elements in a manner to process signals.
The term "coupled" as used herein may also refer to "electrically coupled" and the term "connected" may also refer to "electrically connected". "coupled" or "connected" may also mean that two or more elements cooperate or interact with each other.
Various embodiments of the present disclosure will be disclosed below with reference to the accompanying drawings. It should be understood that the actual details are not to be taken in a limiting sense. That is, in some embodiments of the present disclosure, these actual details are not necessary. Furthermore, for the sake of simplicity of the drawing, some of the existing conventional structures and elements are shown in the drawing in a simplified schematic manner.
Reference is made to fig. 1. Fig. 1 is a schematic diagram of a filtering system 100 shown in accordance with some embodiments of the present disclosure. In some embodiments, the filtering system 100 may be applied in a wireless communication system. The wireless communication system is, for example, a communication system employing wireless compatibility authentication (WIFI) technology or employing Bluetooth (Bluetooth) technology. For example, the filtering system 100 can be applied to a transceiver using a wireless compatible authentication technology or using a bluetooth technology, but the disclosure is not limited thereto.
For the example of fig. 1, the filtering system 100 includes a mixer 102, a filter 104, and an analog-to-digital converter 106. The filter 104 is coupled between the mixer 102 and the analog-to-digital converter 106.
The mixer 102 receives a high frequency input signal RX at an input IN. The mixer 102 further receives a local oscillation frequency (local oscillator frequency) signal LO. The mixer 102 mixes the high-frequency input signal RX and the local oscillation frequency signal LO to generate an input signal SI that is transmitted to the filter 104. The input signal SI is, for example, an intermediate frequency (intermediate frequency) signal.
The filter 104 receives an input signal SI. The filter 104 is configured to perform a filtering process on the input signal SI to generate an output signal SO at the output terminal OUT. Specifically, the filter 104 provides a filter response to process the input signal SI to generate the output signal SO. The filter response is used to pass signal components of the input signal SI within a specific frequency band to shape (shape) the input signal SI into the output signal SO. The aforementioned filter response may include low-pass filtering, high-pass filtering, band-pass filtering, or band-reject filtering in various applications.
The analog-to-digital converter 106 receives the output signal SO. The adc 106 performs an adc process on the output signal SO to generate a digital output DO.
The implementations described above with respect to filtering system 100 are for illustrative purposes only. Various implementations of the filtering system 100 are within the scope of the present disclosure.
Reference is made to fig. 2. Fig. 2 is a schematic diagram of the filter 104 of fig. 1 shown in accordance with some embodiments of the present disclosure. For the example of fig. 2, the filter 104 includes M stages of filter circuits 104_1 to 104_m. M is a positive integer greater than 1. The filter 104 includes an input terminal SIN and an output terminal SOUT. The M-stage filter circuits 104_1 to 104_m are coupled in series between the input terminal SIN and the output terminal SOUT to filter the input signal SI from the mixer 102 and generate the output signal SO at the output terminal SOUT.
In some embodiments, the input SIN may be a single-ended input. In some embodiments, the input terminal SIN may be a differential (differential) input terminal, and the input signal SI is a difference between differential input signals. In some embodiments, the output SOUT may be a single ended output. In some embodiments, the output SOUT may be a differential output, and the output signal SO is a difference between the differential output signals.
For simplicity and ease of understanding, fig. 2 only shows the internal components of one of the filter circuits (e.g., filter circuit 104_2) in detail, while the other filter circuits have similar circuit structures and operations.
Taking the filter circuit 104_2 as an example, it includes an amplifier OP, a capacitor C1, a resistor R1 and a resistor R2. The capacitor C1 is coupled in parallel with the amplifier OP. Resistor R1 is coupled in parallel with capacitor C1. The amplifier OP includes two inputs. The resistor R2 is coupled between one of the input terminals of the amplifier OP and the previous stage filter circuit 104_1. The other input terminal of the amplifier OP is coupled to the ground terminal GND. In some embodiments, the capacitor C1 is implemented as a variable capacitor, and the resistor R1 and the resistor R2 are implemented as variable resistors, but the disclosure is not limited thereto.
The implementations described above with respect to filter circuit 104_2 and other filter circuits are for illustrative purposes only. Various implementations of the filter circuit 104_2 and other filter circuits are within the scope of the present disclosure.
Referring to fig. 1 and 2 simultaneously. In some embodiments, the filtering system 100 may further comprise a detection circuit (not shown). The detection circuit is used for detecting the amplitude of the input signal SI and comparing the detected amplitude with an amplitude threshold value to generate a detection result.
Based on the detection results described above, it can be determined that each of the M-stage filter circuits 104_1 to 104_m operates as an active filter circuit or a passive filter circuit. In some embodiments, the active filter circuit is a filter circuit having an amplification gain. For example, if the amplifier OP of the filter circuit 104_2 is in a power up state, the filter circuit 104_2 has an amplifying gain and operates as an active filter circuit. Whereas a passive filter circuit is a circuit without amplification gain. For example, if the amplifier OP of the filter circuit 104_2 is in a power down (power down) state, the filter circuit 104_2 has no amplification gain and operates as a passive filter circuit.
In operation, the M-stage filter circuits 104_1 to 104_m are preset as active filter circuits. That is, the amplifiers OP in the M-stage filter circuits 104_1 to 104_m are all preset to be powered on.
When the detection result indicates that the amplitude of the input signal SI is greater than the amplitude threshold, the gain of the representative filter 104 may be small. In this case, at least one of the M-stage filter circuits 104_1 to 104_m may be adjusted to be a passive filter circuit, while the rest remain as an active filter circuit. For example, if the filter circuit 104_2 is selectively adjusted to be a passive filter circuit, the amplifiers OP of the filter circuit 104_2 are adjusted to be in a power-off state, while the amplifiers OP of the other filter circuits remain in a power-on state. In some embodiments, which filter circuit is adjusted to be in the power-off state may be determined according to the desired output signal SO and the quality factor value (Q value) of the M-stage filter circuits 104_1 to 104_m.
In some embodiments, if the detection result indicates that the amplitude of the input signal SI is far greater than the amplitude threshold, the gain of the representative filter 104 is adjusted to be very small. In this case, one of the M-stage filter circuits 104_1 to 104_m may be maintained as an active filter circuit, while the other are all adjusted as passive filter circuits. That is, if it is determined that only the filter circuit 104_2 is maintained as an active filter circuit, the amplifier OP of the filter circuit 104_2 is maintained in a power-on state, and the amplifiers OP of the other filter circuits are all adjusted to be in a power-off state. In some embodiments, which filter circuit is maintained in the power-on state may be determined according to the desired output signal SO and the quality factor value (Q value) of the M-stage filter circuits 104_1 to 104_m.
In some other embodiments, the M-stage filter circuits 104_1 to 104_m may be all adjusted to be passive filter circuits based on the required gain. That is, the amplifiers OP of the M-stage filter circuits 104_1 to 104_m are all adjusted to be in the power-off state, so as to greatly reduce the power consumption of the filter 140.
In contrast, when the detection result indicates that the amplitude of the input signal SI is equal to or smaller than the amplitude threshold, the amplifiers OP of the M-stage filter circuits 104_1 to 104_m are maintained in the power-on state, so that the M-stage filter circuits 104_1 to 104_m are all maintained as active filter circuits to provide the amplification gain. Based on the amplification gain, the amplitude of the output signal SO is adjusted to be large, which makes subsequent other operations less prone to errors.
Since the high frequency input signal RX is related to the input signal SI, in some embodiments the detection circuit may be adapted to detect the amplitude of the high frequency input signal RX and compare the detected amplitude with an amplitude threshold to generate a detection result. As described above, the filter circuits in the filter 140 are adjusted accordingly according to the detection result.
In some related art, the filters are all implemented by active filter circuits. Because the active filter circuit requires a power supply, the filter is not suitable for low power applications (e.g., wireless compatible authentication technology or bluetooth technology).
Compared with the related art, the filter 140 of the present disclosure is formed by mixing the active filter circuit and the passive filter circuit, so as to achieve the effect of low power consumption. In addition, when the passive filter circuit is adjusted to the active filter circuit (the amplifier OP is adjusted from the power-off state to the power-on state), it takes an instantaneous time (settling time) to stabilize the system. The filter 140 of the present disclosure presets the M-stage filter circuits 104_1 to 104_m as active filter circuits, which can avoid consuming the above-mentioned transient time. In other words, the filter 140 of the present disclosure has the advantages of low power consumption and saving the transient time.
In some embodiments, at least one of the active filter circuits is operable to adjust back to the passive filter circuit if the Bit Error Rate (BER) of the digital output DO is below a default value. In this case, since the bit error rate of the digital output DO is low, the system requirements can still be satisfied after at least one of the active filter circuits is adjusted back to the passive filter circuit. And the active filter circuit is adjusted to be a passive filter circuit, so that the power consumption of the system can be reduced.
Reference is made to fig. 3. Fig. 3 is a flow chart of a filtering method 300 shown in accordance with some embodiments of the present disclosure. The operation method 300 includes operation S310 and S320. For ease of understanding, the method of operation 300 will be discussed in conjunction with fig. 1-2.
In operation S310, the input signal SI or the high frequency input signal RX of the filter 104 is detected to generate a detection result. In some embodiments, the detection circuit detects the amplitude of the input signal SI or the high frequency input signal RX and compares the detected amplitude with an amplitude threshold to produce a detection result.
In operation S320, it is determined that one of the M-stage filter circuits 104_1 to 104_m operates as an active filter circuit or a passive filter circuit based on the above detection result. In some embodiments, the gain of the representative filter 104 may be adjusted small when the detection result indicates that the amplitude of the input signal SI or the high frequency input signal RX is greater than the amplitude threshold. In this case, at least one or all of the M-stage filter circuits 104_1 to 104_m may be adjusted to be passive filter circuits. When the detection result indicates that the amplitude of the input signal SI or the high-frequency input signal RX is equal to or smaller than the amplitude threshold, the M-stage filter circuits 104_1 to 104_m may be maintained as active filter circuits.
The operations of the filtering method 300 described above are merely examples and are not limited to be performed in the order illustrated in this example. The various operations of the filtering method 300 may be added, substituted, omitted, or performed in a different order as appropriate without departing from the manner and scope of operation of the various embodiments of the present disclosure.
In summary, the filter, the filtering method and the filtering system of the disclosure have the advantages of low power consumption and saving the transient time.
Various functional elements and blocks have been disclosed herein. It will be appreciated by those of ordinary skill in the art that the functional blocks may be implemented by circuits, whether special purpose circuits or general purpose circuits operating under the control of one or more processors and code instructions, which generally include transistors or other circuit elements to control the operation of an electrical circuit in accordance with the functions and operations described herein. As will be further appreciated, the specific structure and interconnection of circuit elements in general may be determined by a compiler (compiler), such as a register transfer language (Register Transfer Language, RTL) compiler. The buffer transfer language compiler operates on a script (script) that is quite similar to the assembly language code (assembly language code), compiling the script into a form for layout or making the final circuit. Indeed, buffer transfer languages are known for their role and purpose in facilitating the design of electronic and digital systems.
While the present disclosure has been described with reference to the embodiments, it should be understood that the invention is not limited thereto, but may be variously modified and modified by one skilled in the art without departing from the spirit and scope of the present disclosure, and the scope of the present disclosure is therefore defined by the appended claims.
[ symbolic description ]
100: filtering system
102: mixer with a high-speed mixer
104: filter device
104_1 to 104_m: filtering circuit
106: analog-to-digital converter
300: filtering method
IN: input terminal
OUT: an output terminal
RX: high frequency input signal
LO: local oscillation frequency signal
DO: digital output
SIN: input terminal
SOUT: an output terminal
SI: input signal
SO: output signal
OP: amplifier
C1: capacitance device
R1: resistor
R2: resistor
GND: grounding end
S310, S320: and (3) operating.