CN112928040A - Offset state detection method and offset state detection device - Google Patents
Offset state detection method and offset state detection deviceDownload PDFInfo
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- CN112928040A CN112928040ACN202110185113.3ACN202110185113ACN112928040ACN 112928040 ACN112928040 ACN 112928040ACN 202110185113 ACN202110185113 ACN 202110185113ACN 112928040 ACN112928040 ACN 112928040A
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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Abstract
Description
Technical Field
The present invention relates to the field of semiconductor technology, and in particular, to an offset state detection method and an offset state detection apparatus.
Background
In a silicon epitaxial process chamber, a wafer slot for accommodating a silicon wafer is usually arranged on a base for bearing the silicon wafer, the diameter of the wafer slot is usually 2mm-3mm larger than that of the silicon wafer, and in the silicon epitaxial process, the optimal process position of the silicon wafer is that the axis of the silicon wafer is coincident with the axis of the wafer slot. Due to factors such as transmission errors of the mechanical arm for transmitting the silicon wafer or position errors of the base in the silicon epitaxial process chamber, the silicon wafer is difficult to be positioned in the optimal process in the silicon epitaxial process, even a part of the silicon wafer is positioned outside the wafer groove and is lapped on the wafer groove, and lapping of the silicon wafer on the wafer groove causes disqualification of the epitaxial wafer after the silicon epitaxial process. However, no effective solution exists at present for the condition that the silicon wafer is lapped on the wafer slot. Therefore, whether the silicon wafer is lapped on the wafer slot in the silicon epitaxial process can be detected, the silicon wafer with the lapping condition is prevented from flowing to the downstream, and the method becomes an important technology for improving the performance index of the semiconductor equipment.
In the prior art, whether a silicon wafer is lapped on a wafer slot or not is usually detected by independently arranging a detection device in a silicon epitaxial process chamber, and the detection device judges whether the silicon wafer is lapped on the wafer slot or not by detecting the relative position relationship between the silicon wafer and the wafer slot in the silicon epitaxial process chamber. Since the detection device needs to be separately disposed in the silicon epitaxial process chamber, the internal structure of the silicon epitaxial process chamber needs to be modified, which damages the process environment such as the temperature field in the silicon epitaxial process chamber and increases the cost of the semiconductor device.
Disclosure of Invention
The invention aims to solve at least one technical problem in the prior art, and provides an offset state detection method and an offset state detection device, which can detect whether a wafer is overlapped with an accommodating structure of a bearing part in a process chamber or not, and reduce the cost and the failure rate of semiconductor equipment.
To achieve the object of the present invention, there is provided an offset state detecting method for detecting an offset state of a wafer with respect to a carrier in a process chamber, comprising:
transferring the wafer out of the process chamber based on a transfer component after the current process is finished;
in the process that the wafer is conveyed to a subsequent process chamber by the conveying component, acquiring the offset of the actual position of the wafer relative to the preset position on the conveying component based on the detection assembly corresponding to the subsequent process chamber;
and determining the offset state of the wafer relative to the bearing part according to the preset corresponding relation between the offset and the offset state.
Preferably, the acquiring an offset of the actual position of the wafer relative to a preset position on the transfer component based on the detection assembly corresponding to the subsequent process chamber includes:
acquiring a first direction offset of the actual position of the wafer relative to the preset position in a first direction, and acquiring a second direction offset of the actual position of the wafer relative to the preset position in a second direction, wherein the first direction is crossed with the second direction;
and calculating the offset according to the first direction offset and the second direction offset.
Preferably, the first direction is perpendicular to the second direction, and the offset amount is calculated according to the following formula:
wherein j is the offset, m is the first direction offset, and n is the second direction offset.
Preferably, the preset correspondence between the offset and the offset state includes a plurality of offset value intervals and a plurality of offset state grades, the plurality of offset value intervals correspond to the plurality of offset state grades one to one, and the determining the offset state of the wafer relative to the carrier according to the preset correspondence between the offset and the offset state includes:
determining an offset value interval to which the offset belongs according to the offset;
and determining the offset state grade corresponding to the offset value interval as the offset state.
Preferably, the offset state detection method further includes:
when the determined offset state grade is larger than a preset first offset state grade threshold value, sending an alarm;
when the determined offset state grade is greater than a preset second offset state grade threshold value, sending an alarm and stopping the process;
wherein the second offset state rank threshold is greater than the first offset state rank threshold.
Preferably, the preset corresponding relationship between the offset and the offset state is obtained by the following steps:
sequentially placing the wafer on the bearing part at positions corresponding to the plurality of offset state grades, conveying the wafer out of the process chamber through the conveying part, and sequentially acquiring offset values corresponding to the plurality of offset state grades;
determining the offset value intervals by taking the offset values corresponding to the offset state grades as endpoints;
and establishing a one-to-one corresponding relation between the plurality of offset value intervals and the plurality of offset state grades.
The invention also provides an offset state detection device, which is arranged in semiconductor processing equipment and used for detecting the offset state of a wafer relative to a bearing part in a processing chamber, and the offset state detection device comprises:
the transmission module is used for transmitting the wafer out of the process chamber based on a transmission component after the current process is finished;
the acquisition module is used for acquiring the offset of the actual position of the wafer relative to the preset position on the transmission component based on the detection assembly corresponding to the subsequent process chamber in the process of transmitting the wafer to the subsequent process chamber by the transmission component;
and the determining module is used for judging the offset state of the wafer relative to the bearing part according to the preset corresponding relation between the offset and the offset state.
Preferably, the obtaining module includes:
an obtaining unit, configured to obtain a first direction offset amount of the actual position of the wafer in a first direction with respect to the preset position, and obtain a second direction offset amount of the actual position of the wafer in a second direction with respect to the preset position, where the first direction intersects with the second direction;
a calculating unit configured to calculate the offset amount according to the first directional offset amount and the second directional offset amount.
Preferably, the preset corresponding relationship between the offset and the offset state includes a plurality of offset value intervals and a plurality of offset state grades;
the determining module comprises:
the first determining unit is used for determining the offset value interval to which the offset belongs according to the offset;
and a second determining unit, configured to determine a shift state level corresponding to the shift value interval as the shift state.
Preferably, the offset state detection device further includes:
the alarm unit is used for giving an alarm when the offset state grade determined by the determination module is greater than a preset first offset state grade threshold value; when the deviation state grade determined by the determining module is larger than a preset second deviation state grade threshold value, sending an alarm and stopping the process; wherein the second offset state rank threshold is greater than the first offset state rank threshold.
The invention has the following beneficial effects:
the offset state detection method provided by the invention obtains the offset of the actual position of the wafer relative to the preset position on the transmission component based on the detection component corresponding to the subsequent process chamber in the process of transferring the wafer from the process chamber to the subsequent process chamber, and determines the offset state of the wafer relative to the bearing component according to the corresponding relation between the preset offset and the offset state, and because the offset required for determining the offset state of the wafer relative to the bearing component is obtained based on the detection component corresponding to the subsequent process chamber, the offset state of the wafer relative to the bearing component can be detected without independently arranging a detection device in the process chamber, thereby avoiding the process environment in the process chamber from being influenced, reducing the cost and the failure rate of semiconductor equipment, and the offset state detection method provided by the invention, the corresponding relation between the preset offset and the offset state can be adjusted according to different conditions needing to be detected, so that whether the accommodating structures of the wafer and the bearing part in the process chamber are overlapped or not can be detected.
The offset state detection device provided by the invention acquires the offset of the actual position of the wafer relative to the preset position on the transmission component based on the detection component corresponding to the subsequent process chamber by virtue of the acquisition module in the process of transmitting the wafer to the subsequent process chamber, and judges the offset state of the wafer relative to the bearing component by virtue of the determination module according to the corresponding relation between the preset offset and the offset state, because the offset required by determining the offset state of the wafer relative to the bearing component is acquired by virtue of the acquisition module based on the detection component corresponding to the subsequent process chamber, and the acquisition module and the determination module are not required to be arranged in the process chamber, the offset state of the wafer relative to the bearing component can be detected without independently arranging a detection device in the process chamber, thereby avoiding the process environment in the process chamber from being influenced, the offset state detection device provided by the invention can adjust the corresponding relation between the preset offset and the offset state according to different detection conditions, so that whether the wafer is lapped with the accommodating structure of the bearing part in the process chamber or not can be detected.
Drawings
Fig. 1 is a flowchart of an offset state detection method according to an embodiment of the present invention;
FIG. 2 is another flow chart of a method for detecting an offset state according to an embodiment of the present invention;
FIG. 3 is a flowchart illustrating a method for detecting an offset state according to another embodiment of the present invention;
fig. 4 is a flowchart for acquiring a preset offset and a preset offset state corresponding relationship of the offset state detection method according to the embodiment of the present invention;
fig. 5 is a schematic diagram of a one-to-one correspondence between multiple offset value intervals and multiple offset state levels in the offset state detection method according to the embodiment of the present invention;
fig. 6 is a schematic diagram of a one-to-one correspondence between multiple offset value intervals and multiple offset state levels in the offset detection method according to the embodiment of the present invention;
FIG. 7 is a schematic view of the wafer fully received in the receiving structure without contacting the edge of the receiving structure;
FIG. 8 is a schematic view of the wafer fully received in the receiving structure and contacting an edge of the receiving structure;
FIG. 9 is a schematic view of a wafer positioned outside the containment structure and overlapping the containment structure;
FIG. 10 is a schematic view of a flexible wafer centering device;
FIG. 11 is a schematic view of the robot carrying a wafer in an initial position;
FIG. 12 is a schematic view of a robot carrying a wafer in a first touch with a sensor;
FIG. 13 is a schematic view of the robot carrying a wafer in a second touch with the sensor;
FIG. 14 is a schematic view of the robot carrying a wafer and the sensor making a third touch;
FIG. 15 is a schematic view of a fourth touch of the wafer carried by the robot with the sensor;
FIG. 16 is a schematic view of the robot carrying the wafer to a processing position;
FIG. 17 is a flow chart illustrating indirect offset of the wafer relative to the carrier during transfer of the wafer from the process chamber to the cooling chamber;
description of reference numerals:
11-a carrier member; 12-a wafer; 13-a containment structure; 14-a robot arm; 15-a controller; 16-a sensor; 17-process position.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the offset state detection method and the offset state detection apparatus provided by the present invention are described in detail below with reference to the accompanying drawings.
As shown in fig. 1, the present embodiment provides a displacement state detection method for detecting a displacement state of awafer 12 with respect to acarrier 11 in a process chamber, including:
s1, transferring thewafer 12 out of the process chamber based on the transfer component after the current process is finished;
s2, acquiring an offset of the actual position of thewafer 12 relative to the preset position on the transfer component based on the detection assembly corresponding to the subsequent process chamber in the process of transferring thewafer 12 to the subsequent process chamber by the transfer component;
and S3, determining the offset state of thewafer 12 relative to the bearingpart 11 according to the preset corresponding relation between the offset amount and the offset state.
In the offset detection method provided by this embodiment, in the process of transferring thewafer 12 out of the process chamber by the transfer component and transferring thewafer 12 to the subsequent process chamber, the offset amount of the actual position of thewafer 12 relative to the preset position on the transfer component is obtained based on the detection component corresponding to the subsequent process chamber, and the offset state of thewafer 12 relative to thecarrier component 11 is determined according to the corresponding relationship between the preset offset amount and the offset state, and since the offset amount required for determining the offset state of thewafer 12 relative to thecarrier component 11 is obtained based on the detection component corresponding to the subsequent process chamber, the offset state of thewafer 12 relative to thecarrier component 11 can be detected without separately arranging a detection device in the process chamber, thereby avoiding the process environment in the process chamber from being affected, and reducing the cost and the failure rate of the semiconductor device, the offset state detection method provided by the invention can adjust the corresponding relation between the preset offset and the offset state according to different detection conditions, so that whether thewafer 12 is lapped with theaccommodating structure 13 of the bearingpart 11 in the process chamber can be detected.
As shown in fig. 7-9, thecarrier 11 is used for carryingwafers 12 to be processed in a process chamber (not shown), and a receivingstructure 13 is disposed on thecarrier 11 for receiving thewafers 12.
When it is desired to detect whether thewafer 12 is lapped with the receivingstructure 13 of thecarrier 11 in the process chamber, the offset state may include two states, i.e., a lapped state and an un-lapped state, in the preset correspondence between the offset amount and the offset state. When determining the correspondence between the two offset states and the offset amount, it may be firstly determined that the offset amount of the actual position of thewafer 12 relative to the preset position on the transfer member during the process of transferring thewafer 12 out of the process chamber and transferring thewafer 12 to the subsequent process chamber by the transfer member when thewafer 12 is accommodated in theaccommodating structure 13 of the carryingmember 11 and is in contact with the edge of the accommodating structure 13 (as shown in fig. 8), and this offset amount may be used as a reference point, so as to determine the correspondence between the two offset states and the offset amount.
When the process wafer is actually judged, after the current semiconductor process is finished, the transmission component transmits thewafer 12 out of the process chamber, and in the process of transmitting thewafer 12 to the subsequent process chamber, the offset of the actual position of thewafer 12 relative to the preset position on the transmission component can be obtained based on the detection component corresponding to the subsequent process chamber, and then the offset can be compared with the reference point.
If the offset is greater than the reference point, it indicates that the offset of thewafer 12 relative to thecarrier 11 is higher than the offset of thewafer 12 relative to thecarrier 11 when thewafer 12 is accommodated in theaccommodating structure 13 of thecarrier 11 and contacts with the edge of theaccommodating structure 13, i.e. thewafer 12 is not completely accommodated in theaccommodating structure 13, but partially outside theaccommodating structure 13 and overlaps the accommodating structure 13 (as shown in fig. 9), so that it can be determined that thewafer 12 overlaps theaccommodating structure 13 of thecarrier 11 in the process chamber and thewafer 12 is in an overlapping state.
If the offset is smaller than the reference point, it indicates that the offset of thewafer 12 relative to thecarrier 11 is smaller than the offset of thewafer 12 relative to thecarrier 11 when thewafer 12 is accommodated in theaccommodating structure 13 of thecarrier 11 and contacts with the edge of theaccommodating structure 13, i.e. thewafer 12 is completely accommodated in theaccommodating structure 13 and does not contact with the edge of the accommodating structure 13 (as shown in fig. 7), so that it can be determined that thewafer 12 is not overlapped with theaccommodating structure 13 of thecarrier 11 in the process chamber and thewafer 12 is in an overlapped state.
If the offset is equal to the reference point, it indicates that thewafer 12 is in a state of being accommodated in theaccommodating structure 13 of thecarrier member 11 and contacting with the edge of theaccommodating structure 13, so that it can be determined that thewafer 12 is not overlapped with theaccommodating structure 13 of thecarrier member 11 in the process chamber, and thewafer 12 is in a non-overlapped state.
Alternatively, the offset of the acquired actual position of thewafer 12 from the preset position on the transfer unit may include an offset of the center of thewafer 12 from the center of the transfer unit. For example, the center of the die 12 may be the center of the wafer and the center of the transfer unit may be the center of therobot 14.
Optionally, the subsequent process chamber may be a cooling chamber, and the detection assembly may be an Active Wafer Centering (AWC) device disposed in the cooling chamber. The flexible wafer centering device can detect the entry and exit of thewafer 12 into and out of the cooling chamber, and when the entry and exit of thewafer 12 into and out of the cooling chamber are detected, the servo axis position data of a transfer member such as therobot 14 can be immediately acquired and latched, and the offset of the actual position of thewafer 12 with respect to the preset position on the transfer member can be calculated from the acquired data, so that the offset of the actual position of thewafer 12 with respect to the preset position on the transfer member can be obtained based on the flexible wafer centering device corresponding to the cooling chamber. Moreover, because the flexible wafer centering device is arranged in the cooling chamber, the inner structure of the process chamber does not need to be modified, so that the process environment such as a temperature field in the process chamber is not damaged, and the cost and the failure rate of the semiconductor equipment are not increased. In addition, the flexible wafer centering device can compensate the extension of therobot 14 based on the calculated offset to correct the offset of thewafer 12 so that therobot 14 can place thewafer 12 on thecarrier 11 in the cooling chamber at the correct position. However, the type of the detection assembly corresponding to the subsequent process chamber is not limited thereto.
Optionally, taking a detection assembly corresponding to a subsequent process chamber as a flexible wafer centering device disposed in the cooling chamber as an example, based on the detection assembly corresponding to the subsequent process chamber, obtaining an offset of the actual position of thewafer 12 with respect to a preset position on the transmission component, which may be servo axis position data of the transmission component, such as therobot 14, collected by the flexible wafer centering device, and then calculating the offset of the actual position of thewafer 12 with respect to the preset position on the transmission component according to the obtained data, or directly obtaining the offset of the actual position of thewafer 12 calculated by the flexible wafer centering device with respect to the preset position on the transmission component.
Turning now to the flexible wafer centering apparatus, as shown in fig. 10, the flexible wafer centering apparatus may include acontroller 15 and twosensors 16. As shown in fig. 11-16, during the process of transferring the wafer 12 carried by the robot 14 to the predetermined process position 17 such as the cooling chamber, the wafer 12 carried by the robot 14 makes four touches with the two sensors 16, and the controller 15 records the coordinates of the robot 14 in the R axis and the T axis at the time when the wafer 12 makes each touch with the sensor 16, as (R) and (T) respectively1,T1)、(R2,T2)、(R3,T3)、(R4,T4) The center of the wafer 12 can be determined by any three of the four coordinates, the center of the circle obtained by calculation can be used as the actual position of the wafer 12, and the robot 14 can also carry a standard center (x, y) obtained by learning the preset position of the wafer 12 located at the preset position before the flexible wafer centering device is used, and the standard center of the circle can be used as the preset position of the wafer 12 relative to the robot 14, so that the center of the circle obtained by calculation and the standard center (x, y) can be obtainedObtaining the distance q between the center of the circle obtained by calculation and the standard center of the circle:
q is the offset of the actual position of the wafer 12 relative to the predetermined position on the robot 14, and the offset of the wafer 12 relative to the carrier 11 can be indirectly obtained from the offset of the actual position of the wafer 12 relative to the predetermined position on the robot 14.
In the semiconductor silicon epitaxial process, thewafer 12 that has been processed in the process chamber must be placed in the cooling chamber for cooling due to the high temperature of the silicon epitaxial process, and if the position of thewafer 12 in the process chamber with respect to thecarrier 11 has been shifted during the placement of thewafer 12 in the cooling chamber, thecontroller 15 calculates calibration data based on the obtained shift amount of the actual position of thewafer 12 with respect to the preset position on therobot 14 when placing it in the cooling chamber, and calibrates the position of thewafer 12 placed in the cooling chamber based on the calibration data. As shown in fig. 17, taking the process of transferring thewafer 12 from the process chamber to the cooling chamber by therobot 14 as an example, how to indirectly obtain the offset of thewafer 12 with respect to thecarrier 11 will be described, the process of indirectly obtaining the offset of thewafer 12 with respect to thecarrier 11 during the process of transferring thewafer 12 from the process chamber to the cooling chamber by therobot 14 may include:
s1000, starting;
s2000, acquiring calibration data of the flexible wafer centering device in the process of transferring thewafer 12 from the process chamber to the cooling chamber;
s3000, determining an offset of thewafer 12 with respect to a preset position on therobot 14 according to the calibration data;
s4000, determining the offset of thewafer 12 relative to the bearingpart 11 in the process chamber according to the offset;
and S5000, ending.
As shown in fig. 7-9, the receivingstructure 13 of thecarrier 11 may optionally include a receiving groove for receiving thewafer 12.
As shown in fig. 2, in a preferred embodiment of the present invention, acquiring an offset of the actual position of thewafer 12 relative to the preset position on the transfer unit based on the detection assembly corresponding to the subsequent process chamber may include:
s21, obtaining a first direction offset of the actual position of thewafer 12 relative to the preset position in a first direction, and obtaining a second direction offset of the actual position of thewafer 12 relative to the preset position in a second direction, wherein the first direction intersects the second direction;
s22, an offset amount is calculated based on the first direction offset amount and the second direction offset amount.
For example, taking the first direction perpendicular to the second direction as an example, when the first direction is perpendicular to the second direction, the offset amount may be calculated according to the following formula:
wherein j is an offset, m is a first direction offset, and n is a second direction offset.
Alternatively, it may be possible to acquire a first direction offset of the actual position of thewafer 12 in a first direction with respect to the preset position and acquire a second direction offset of the actual position of thewafer 12 in a second direction with respect to the preset position by acquiring servo axis position data of a transfer member such as therobot 14 acquired by, for example, a flexible wafer centering device.
As shown in fig. 3, in a preferred embodiment of the present invention, the determining the offset state of the wafer relative to thecarrier 11 according to the preset offset and offset state correspondence relationship includes:
s31, determining the offset value interval to which the offset belongs according to the offset;
s32, the offset state rank corresponding to the offset value range is determined as the offset state.
By making the preset corresponding relationship between the offset and the offset state include a plurality of offset value ranges and a plurality of offset state grades corresponding to the plurality of offset value ranges one by one, the offset state of thewafer 12 with respect to thecarrier 11 can be determined when the offset state is determined based on the preset correspondence between the offset amount and the offset state, determining an offset value interval to which the offset belongs according to the offset, determining an offset state grade corresponding to the offset value interval as an offset state, this allows a more detailed understanding of the degree of offset of thewafers 12 in the lapped state relative to thecarrier 11, so that it is possible to facilitate a decision as to whether subsequent adjustments and maintenance are required for example of the position of thecarrier 11 or of the transport mechanism for thewafers 12, and further, the flexibility of the semiconductor process can be improved, and the efficiency and the yield of the semiconductor process are both considered.
This is because, for example, when thewafer 12 is in the lapping state, but the offset degree of thewafer 12 relative to thecarrier 11 is small, the semiconductor process result of thewafer 12 may not be greatly affected and still meet the requirements of the semiconductor process, and the lapping state only appears sporadically, and at this time, the semiconductor process may be continued without adjusting and maintaining the position of thecarrier 11 or the transport structure of thewafer 12, and the like, thereby maintaining the efficiency of the semiconductor process. When the deviation degree of thewafer 12 in the lap joint state relative to the bearingpart 11 is increased to the extent that the semiconductor process result of thewafer 12 cannot meet the requirement of the semiconductor process, and when the deviation degree of thewafer 12 in the lap joint state relative to the bearingpart 11 frequently occurs, the position of the bearingpart 11 or the transmission of thewafer 12 needs to be adjusted and met, and the abnormality which causes the frequent occurrence of the serious lap joint state is eliminated, so that the semiconductor process result of thewafer 12 can meet the requirement of the semiconductor process, therefore, compared with the situation that only the lap joint state is judged to occur, the deviation degree of thewafer 12 relative to the bearingpart 11 is known in more detail, the subsequent decision on whether the position of the bearingpart 11 or the transmission structure of thewafer 12 needs to be adjusted and maintained can be conveniently made, so that the flexibility of the semiconductor process can be improved.
Alternatively, the offset state levels indicating that the wafer 1 overlaps theaccommodating structure 13 may be plural, and the areas of the projections of the portions of thewafer 12 outside theaccommodating structure 13 on thecarrier member 11 are different in the plural offset state levels.
In a preferred embodiment of the present invention, the method for detecting an offset state may further include: when the determined offset state grade is larger than a preset first offset state grade threshold value, sending an alarm; when the determined offset state grade is greater than a preset second offset state grade threshold value, sending an alarm and stopping the process; wherein the second offset state grade threshold is greater than the non-lap grade threshold.
Alternatively, the first and second offset state level thresholds may be set according to, for example, process requirements or process experience. For example, the first offset level threshold may be an offset level corresponding to a non-bonded state, the first offset level threshold may also be an offset level corresponding to a case where thewafer 12 is in a bonded state and the semiconductor process result still satisfies the process requirement, and the second offset level threshold may be an offset level corresponding to a case where thewafer 12 is in a bonded state and the semiconductor process result of thewafer 12 fails to satisfy the process requirement.
When the determined offset state grade is greater than the first offset state grade threshold value, the semiconductor process result of thewafer 12 in the overlapped state of thewafer 12 still can meet the process requirement, at the moment, an alarm is sent, and a worker or a semiconductor process machine can choose to stop the semiconductor process by means of the alarm, adjust and fail the position of the bearingpart 11 or the transmission structure of thewafer 12 and the like, and can choose to continue the semiconductor process; when the determined offset state grade is greater than the second offset state grade threshold value, the fact that thewafer 12 is in the lap joint state and the semiconductor process result of thewafer 12 cannot meet the process requirement is indicated, an alarm is sent and the process is stopped at the moment, the semiconductor process can be stopped in time, thewafer 12 is prevented from continuing to perform the semiconductor process under the condition that the semiconductor process result cannot be met, and therefore the flexibility of the semiconductor process can be improved, and the efficiency and the yield of the semiconductor process are both considered.
As shown in fig. 4, in a preferred embodiment of the present invention, the preset corresponding relationship between the offset amount and the offset state may be obtained through the following steps:
s100, sequentially placing thewafer 12 on the bearingpart 11 at positions corresponding to a plurality of offset state grades, transferring thewafer 12 out of the process chamber through the transmission part, and sequentially obtaining offset values corresponding to the plurality of offset state grades;
s200, determining a plurality of offset value intervals by taking the offset values corresponding to the plurality of offset state grades as endpoints;
s300, establishing a one-to-one corresponding relation between the offset value intervals and the offset state grades.
As shown in fig. 5, the example that the plurality of offset state levels includes four is described, and the four offset state levels may be: non-lap rating: thewafer 12 is accommodated in theaccommodating structure 13 of thecarrier 11 and is in contact with the edge of theaccommodating structure 13; light lap rating: the part of thewafer 12 outside the containingstructure 13 is overlapped on the containingstructure 13, and the projected area of the part of the wafer outside the containingstructure 13 on the bearingpart 11 is light; medium lap rating: the part of thewafer 12 outside the containingstructure 13 is overlapped on the containingstructure 13, and the projection area of the part of thewafer 12 outside the containingstructure 13 on the bearingpart 11 is more than light and moderate; the heavy lap joint rating is: the portion of thewafer 12 outside the containingstructure 13 overlaps the containingstructure 13, and the projected area of the portion of thewafer 12 outside the containingstructure 13 on the bearingmember 11 is more than moderately severe.
When obtaining the corresponding relationship between the preset offset amount and the offset state, the wafer 12 may be first placed on the carrier 11 at a position corresponding to the non-overlapping level, the wafer 12 is transferred from the process chamber through the transfer unit, the offset value corresponding to the non-overlapping level is obtained as a, the wafer 12 is then placed on the carrier 11 at a position corresponding to the light overlapping level, the wafer 12 is transferred from the process chamber through the transfer unit, the offset value corresponding to the light overlapping level is obtained as b, the wafer 12 is then placed on the carrier 11 at a position corresponding to the medium overlapping level, the wafer 12 is transferred from the process chamber through the transfer unit, the offset value corresponding to the medium overlapping level is obtained as c, the wafer 12 is then placed on the carrier 11 at a position corresponding to the heavy overlapping level, and the wafer 12 is transferred from the process chamber through the transfer unit, obtaining an offset value d corresponding to the heavy lap level, and then determining a coordinate origin 0, namely, an offset value interval from the offset value 0 to the offset value a, an offset value interval from the offset value a to the offset value b, an offset value interval from the offset value b to the offset value c, and an offset value interval from the offset value c to the offset value d, by using the offset value a corresponding to the non-lap level, the offset value b corresponding to the light lap level, the offset value c corresponding to the medium lap level, and the offset value d corresponding to the heavy lap level as end points, so that one-to-one correspondence relationships can be established between the value intervals and the non-lap level, the light lap level, the medium lap level, and the heavy lap level.
As shown in fig. 5, when the obtained offset amount is smaller than the offset value a, it indicates that the level of the offset state is smaller than the non-overlapping level, that is, the wafer 12 is completely accommodated in the accommodating structure 13 and does not contact with the edge of the accommodating structure 13 (as shown in fig. 7), so that it can be determined that the wafer 12 is not overlapped with the accommodating structure 13 of the carrier 11 in the process chamber; when the obtained offset amount is equal to the offset amount a, it indicates that the offset state level is equal to the non-overlapping level, that is, the wafer 12 is completely accommodated in the accommodating structure 13 and is in contact with the edge of the accommodating structure 13 (as shown in fig. 8), so that it can be determined that the wafer 12 is not overlapped with the accommodating structure 13 of the carrier 11 in the process chamber; when the obtained offset amount is greater than the offset amount a, it indicates that the offset state grade is greater than the non-overlapping grade, that is, the wafer 12 is not completely accommodated in the accommodating structure 13, but is partially located outside the accommodating structure 13 and overlaps the accommodating structure 13, so that it can be determined that the wafer 12 overlaps the accommodating structure 13 of the bearing part 11 in the process chamber.
When the obtained offset is greater than the offset value a and less than the offset value b, the offset state grade is greater than the light lap joint grade, so that the area of the projection of the part of the wafer 12 outside the accommodating structure 13 on the bearing part 11 can be judged to be less than light; when the obtained offset is equal to the offset value b, the level of the offset state is equal to the light lap level, so that the area of the projection of the part of the wafer 12, which is positioned outside the accommodating structure 13, on the bearing part 11 can be judged to be equal to light; when the obtained offset is greater than the offset value b and less than the offset value c, the obtained offset indicates that the offset state grade is greater than the light lap joint grade and less than the medium lap joint grade, so that the area of the projection of the part of the wafer 12, which is located outside the accommodating structure 13, on the bearing part 11 can be judged to be greater than light and less than medium; when the obtained offset is equal to the offset value c, the obtained offset indicates that the level of the offset state is equal to the intermediate lap level, so that the area of the projection of the part of the wafer 12 outside the accommodating structure 13 on the bearing part 11 can be judged to be equal to the intermediate level; when the obtained offset is greater than the offset value c and less than the offset value d, the obtained offset indicates that the offset state grade is greater than the moderate overlapping grade and less than the severe overlapping grade, so that the area of the projection of the part of the wafer 12, which is located outside the accommodating structure 13, on the bearing part 11 can be judged to be greater than moderate and less than severe; when the obtained offset is equal to the offset value d, the offset state grade is equal to the heavy lap joint grade, so that the area of the projection of the part of the wafer 12, which is positioned outside the accommodating structure 13, on the bearing part 11 can be judged to be equal to the heavy; when the obtained offset amount is larger than the offset value d, the offset state grade is larger than the heavy lap joint grade, so that the projection area of the part of the wafer 12 outside the accommodating structure 13 on the bearing part 11 can be judged to be larger than the heavy weight.
By further knowing how much the projected area of the portion of thewafer 12 outside theaccommodating structure 13 on thecarrier 11 is, it can be determined according to, for example, process requirements or process experience, if the projected area of the portion of thewafer 12 outside theaccommodating structure 13 on thecarrier 11 is too large to satisfy the process requirements, the position of thecarrier 11 or the transmission structure of thewafer 12 can be adjusted and maintained to maintain the yield of the semiconductor process, and if the projected area of the portion of thewafer 12 outside theaccommodating structure 13 on thecarrier 11 is too large to satisfy the process requirements, the semiconductor process can be continued to maintain the efficiency of the semiconductor process, thereby further facilitating the determination of whether the subsequent adjustment of the transmission structure of thecarrier 11 or thewafer 12 is needed, and further, the flexibility of the semiconductor process can be improved, and the efficiency and the yield of the semiconductor process are both considered.
As shown in fig. 6, in a preferred embodiment of the present invention, the first migration status level threshold may be a light lap level and the second migration status level threshold may be a heavy lap level. And when the determined offset state grade is greater than the light lap joint grade and the corresponding offset value is greater than the offset value b, giving an alarm, and when the determined offset state grade is greater than the heavy lap joint grade and the corresponding offset value is greater than the offset value d, giving an alarm and stopping the process.
As another technical solution, an embodiment of the present invention further provides an offset state detecting apparatus, disposed in a semiconductor processing device, for detecting an offset state of awafer 12 with respect to a carrier in a processing chamber, including: a transfer module, an acquisition module, and a determination module, wherein the transfer module is configured to transfer thewafer 12 out of the process chamber based on the transfer component after the current process is completed; the obtaining module is used for obtaining the offset of the actual position of thewafer 12 relative to the preset position on the transmission component based on the detection component corresponding to the subsequent process chamber in the process that the transmission component transmits thewafer 12 to the subsequent process chamber; the determining module is configured to determine a shift state of thewafer 12 relative to the carrier according to a preset corresponding relationship between the shift amount and the shift state.
The offset state detection device provided by the embodiment of the invention acquires the offset of the actual position of the wafer 12 relative to the preset position on the transmission component based on the detection component corresponding to the subsequent process chamber in the process of transmitting the wafer 12 to the subsequent process chamber by the acquisition module, and judges the offset state of the wafer 12 relative to the bearing component by the determination module according to the corresponding relation between the preset offset and the offset state, because the offset required for determining the offset state of the wafer 12 relative to the bearing component is acquired by the acquisition module based on the detection component corresponding to the subsequent process chamber, and the acquisition module and the determination module are not required to be arranged in the process chamber, the offset state of the wafer 12 relative to the bearing component can be detected without independently arranging a detection device in the process chamber, thereby avoiding the process environment in the process chamber from being influenced, the cost and the failure rate of the semiconductor equipment are reduced, and the offset state detection device provided by the invention can adjust the corresponding relation between the preset offset and the offset state according to different detection conditions, so that whether the wafer 12 is lapped with the accommodating structure 13 of the bearing part in the process chamber can be detected.
Optionally, the transport means may comprise arobot 14.
In a preferred embodiment of the present invention, the obtaining module may include an obtaining unit and a calculating unit, wherein the obtaining unit is configured to obtain a first direction offset amount of the actual position of thewafer 12 in a first direction with respect to the preset position, and obtain a second direction offset amount of the actual position of thewafer 12 in a second direction with respect to the preset position, wherein the first direction intersects with the second direction; the calculating unit is used for calculating the offset according to the first direction offset and the second direction offset.
In a preferred embodiment of the present invention, the preset corresponding relationship between the offset and the offset state may include a plurality of offset value intervals and a plurality of offset state grades; the determining module may include a first determining unit and a second determining unit, where the first determining unit is configured to determine an offset value interval to which the first determining unit belongs according to the offset; the second determining unit is configured to determine the offset state level corresponding to the offset value interval as the offset state.
By making the preset corresponding relationship between the offset and the offset state include a plurality of offset value ranges and a plurality of offset state grades corresponding to the plurality of offset value ranges one by one, the offset state of thewafer 12 with respect to thecarrier 11 can be determined when the offset state is determined based on the preset correspondence between the offset amount and the offset state, the first determining unit can determine the offset value section to which the offset belongs according to the offset, and the second determining unit can determine the offset state grade corresponding to the offset value section as the offset state, this allows a more detailed knowledge of the offset of thewafer 12 with respect to thecarrier 11, so that it is possible to facilitate a decision as to whether subsequent adjustments are required for example for the position of thecarrier 11 or for the transport of thewafers 12, and further, the flexibility of the semiconductor process can be improved, and the efficiency and the yield of the semiconductor process are both considered.
In a preferred embodiment of the present invention, the offset state detection apparatus may further include an alarm unit, where the alarm unit is configured to send an alarm when the offset state level determined by the determination module is greater than a preset first offset state level threshold; when the deviation state grade determined by the determining module is larger than a preset second deviation state grade threshold value, sending an alarm and stopping the process; wherein the second offset state rank threshold is greater than the first offset state rank threshold. Therefore, the flexibility of the semiconductor process can be improved, and the efficiency and the yield of the semiconductor process are both considered.
In summary, the offset detection method and the offset status detection apparatus provided in the embodiments of the present invention can detect whether thewafer 12 is overlapped with theaccommodating structure 13 of thecarrier 11 in the process chamber, thereby reducing the cost and the failure rate of the semiconductor device.
It is to be understood that the above embodiments are merely exemplary embodiments that have been employed to illustrate the principles of the present invention, and that the present invention is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.
Claims (10)
1. An offset state detection method for detecting an offset state of a wafer with respect to a carrier in a process chamber, comprising:
transferring the wafer out of the process chamber based on a transfer component after the current process is finished;
in the process that the wafer is conveyed to a subsequent process chamber by the conveying component, acquiring the offset of the actual position of the wafer relative to the preset position on the conveying component based on the detection assembly corresponding to the subsequent process chamber;
and determining the offset state of the wafer relative to the bearing part according to the preset corresponding relation between the offset and the offset state.
2. The offset detection method of claim 1, wherein the obtaining an offset of the actual position of the wafer relative to the predetermined position on the transport component based on the detection module corresponding to the subsequent process chamber comprises:
acquiring a first direction offset of the actual position of the wafer relative to the preset position in a first direction, and acquiring a second direction offset of the actual position of the wafer relative to the preset position in a second direction, wherein the first direction is crossed with the second direction;
and calculating the offset according to the first direction offset and the second direction offset.
3. The offset state detection method according to claim 2, wherein the first direction is perpendicular to the second direction, and the amount of offset is calculated according to the following formula:
wherein j is the offset, m is the first direction offset, and n is the second direction offset.
4. The offset state detection method according to any one of claims 1 to 3, wherein the preset correspondence between the offset amount and the offset state includes a plurality of offset amount value ranges and a plurality of offset state levels, the plurality of offset amount value ranges correspond to the plurality of offset state levels one to one, and the determining the offset state of the wafer with respect to the carrier according to the preset correspondence between the offset amount and the offset state includes:
determining an offset value interval to which the offset belongs according to the offset;
and determining the offset state grade corresponding to the offset value interval as the offset state.
5. The offset state detection method according to claim 4, further comprising:
when the determined offset state grade is larger than a preset first offset state grade threshold value, sending an alarm;
when the determined offset state grade is greater than a preset second offset state grade threshold value, sending an alarm and stopping the process;
wherein the second offset state rank threshold is greater than the first offset state rank threshold.
6. The offset state detection method according to claim 4, wherein the preset correspondence relationship between the offset amount and the offset state is obtained by:
sequentially placing the wafer on the bearing part at positions corresponding to the plurality of offset state grades, conveying the wafer out of the process chamber through the conveying part, and sequentially acquiring offset values corresponding to the plurality of offset state grades;
determining the offset value intervals by taking the offset values corresponding to the offset state grades as endpoints;
and establishing a one-to-one corresponding relation between the plurality of offset value intervals and the plurality of offset state grades.
7. An offset state detection device, provided in a semiconductor processing apparatus, for detecting an offset state of a wafer with respect to a carrier in a process chamber, comprising:
the transmission module is used for transmitting the wafer out of the process chamber based on a transmission component after the current process is finished;
the acquisition module is used for acquiring the offset of the actual position of the wafer relative to the preset position on the transmission component based on the detection assembly corresponding to the subsequent process chamber in the process of transmitting the wafer to the subsequent process chamber by the transmission component;
and the determining module is used for judging the offset state of the wafer relative to the bearing part according to the preset corresponding relation between the offset and the offset state.
8. The apparatus according to claim 7, wherein the acquiring means comprises:
an obtaining unit, configured to obtain a first direction offset amount of the actual position of the wafer in a first direction with respect to the preset position, and obtain a second direction offset amount of the actual position of the wafer in a second direction with respect to the preset position, where the first direction intersects with the second direction;
a calculating unit configured to calculate the offset amount according to the first directional offset amount and the second directional offset amount.
9. The offset state detection device according to claim 7 or 8, wherein the preset correspondence between the offset amount and the offset state includes a plurality of offset amount value intervals and a plurality of offset state levels;
the determining module comprises:
the first determining unit is used for determining the offset value interval to which the offset belongs according to the offset;
and a second determining unit, configured to determine a shift state level corresponding to the shift value interval as the shift state.
10. The offset state detection device according to claim 9, further comprising:
the alarm unit is used for giving an alarm when the offset state grade determined by the determination module is greater than a preset first offset state grade threshold value; when the deviation state grade determined by the determining module is larger than a preset second deviation state grade threshold value, sending an alarm and stopping the process; wherein the second offset state rank threshold is greater than the first offset state rank threshold.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119340258A (en)* | 2024-12-24 | 2025-01-21 | 上海邦芯半导体科技有限公司 | Wafer transmission method, wafer processing method and wafer processing device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4770590A (en)* | 1986-05-16 | 1988-09-13 | Silicon Valley Group, Inc. | Method and apparatus for transferring wafers between cassettes and a boat |
| US5917601A (en)* | 1996-12-02 | 1999-06-29 | Kabushiki Kaisha Toyoda Jidoshokki Seisakusho | Position difference detecting device and method thereof |
| US5980194A (en)* | 1996-07-15 | 1999-11-09 | Applied Materials, Inc. | Wafer position error detection and correction system |
| US20020002422A1 (en)* | 2000-05-26 | 2002-01-03 | Masaki Kondo | Transfer apparatus for semiconductor process |
| JP2016201494A (en)* | 2015-04-13 | 2016-12-01 | 東京エレクトロン株式会社 | Substrate processing apparatus, operation method of substrate processing apparatus, and storage medium |
- 2021
- 2021-02-10CNCN202110185113.3Apatent/CN112928040B/enactiveActive
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4770590A (en)* | 1986-05-16 | 1988-09-13 | Silicon Valley Group, Inc. | Method and apparatus for transferring wafers between cassettes and a boat |
| US5980194A (en)* | 1996-07-15 | 1999-11-09 | Applied Materials, Inc. | Wafer position error detection and correction system |
| US5917601A (en)* | 1996-12-02 | 1999-06-29 | Kabushiki Kaisha Toyoda Jidoshokki Seisakusho | Position difference detecting device and method thereof |
| US20020002422A1 (en)* | 2000-05-26 | 2002-01-03 | Masaki Kondo | Transfer apparatus for semiconductor process |
| JP2016201494A (en)* | 2015-04-13 | 2016-12-01 | 東京エレクトロン株式会社 | Substrate processing apparatus, operation method of substrate processing apparatus, and storage medium |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119340258A (en)* | 2024-12-24 | 2025-01-21 | 上海邦芯半导体科技有限公司 | Wafer transmission method, wafer processing method and wafer processing device |
| CN119340258B (en)* | 2024-12-24 | 2025-03-11 | 上海邦芯半导体科技有限公司 | Wafer transmission method, wafer processing method and wafer processing device |
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