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CN112904173A - Method and equipment for testing minority carrier lifetime of silicon wafer - Google Patents

Method and equipment for testing minority carrier lifetime of silicon wafer
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Publication number
CN112904173A
CN112904173ACN202110121154.6ACN202110121154ACN112904173ACN 112904173 ACN112904173 ACN 112904173ACN 202110121154 ACN202110121154 ACN 202110121154ACN 112904173 ACN112904173 ACN 112904173A
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silicon wafer
minority carrier
carrier lifetime
charge deposition
testing
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CN112904173B (en
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代斌洲
张翔
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Xian Eswin Silicon Wafer Technology Co Ltd
Xian Eswin Material Technology Co Ltd
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Xian Eswin Silicon Wafer Technology Co Ltd
Xian Eswin Material Technology Co Ltd
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Abstract

The invention discloses a method and equipment for testing the minority carrier lifetime of a silicon wafer, wherein the method for testing the minority carrier lifetime of the silicon wafer comprises the following steps: s10, carrying out heat treatment on the silicon wafer to enable uniform thin oxide films to grow on the front side and the back side of the silicon wafer; s20, performing charge deposition on the front side and the back side of the silicon wafer; s30, rotating the silicon wafer according to the set rotation angle theta; s40, performing charge deposition on the front and back surfaces of the rotated silicon wafer; s50, repeatedly executing the steps S30 and S40, wherein the repetition times are more than or equal to 1 time; and S60, obtaining the minority carrier lifetime of the silicon wafer after charge deposition. The method and the equipment for testing the minority carrier lifetime of the silicon wafer can accurately measure the minority carrier lifetime of the silicon wafer, so that the quality of the wafer can be accurately reflected.

Description

Method and equipment for testing minority carrier lifetime of silicon wafer
Technical Field
The invention relates to the technical field of silicon wafer detection, in particular to a method and equipment for testing the minority carrier lifetime of a silicon wafer.
Background
With the increasing integration of integrated circuits, the quality requirement for the required substrate monocrystalline silicon wafer is higher and higher, and the quality of the wafer is often reflected by the lifetime of the non-equilibrium minority carrier (minority carrier lifetime). By testing the minority carrier lifetime inside the wafer, the distribution of metal contamination and defects inside the wafer can be analyzed. The minority carrier lifetime of a silicon wafer refers to the average time for excited hole-electron pairs to recombine minority carriers under excitation of energy (1.12eV) larger than the forbidden bandwidth of a semiconductor. The metal and the defects can become effective recombination centers, and when more metal and defects exist in the silicon wafer, the minority carrier lifetime can be greatly reduced, so that the length of the minority carrier lifetime can reflect the quality of the wafer.
At present, the method for detecting the minority carrier lifetime of the silicon wafer is mainly a Microwave photoconductive Decay method (micro Photo-semiconductor Decay, mu-PCD). The microwave photoconduction decay method is characterized in that pulse laser with the band gap width larger than that of silicon is used for irradiating the surface of a silicon wafer, the generated hole-electron can increase the photoconductivity of the silicon wafer, the photoconductivity is decayed exponentially along with the removal of the laser, and the change of the photoconductivity is detected by the change of the reflection intensity of the microwave, so that the service life of minority carriers is obtained. However, the dangling bonds existing on the surface of the silicon wafer can become effective recombination centers, so that the measured minority carrier lifetime is not the real minority carrier lifetime of the silicon wafer. In order to eliminate the influence of surface recombination, the surface of the silicon wafer needs to be passivated.
Passivation methods commonly used in the industry include thermal oxidation passivation, iodine solution chemical passivation and charge passivation, the thermal oxidation passivation has poor stability and is easy to introduce other metal pollution, the iodine solution chemical passivation level depends on the proficiency of operators, the repeatability is poor, and the minority carrier lifetime distribution of the silicon wafer cannot be fully reflected. The charge passivation is to form a charge aggregation state on the surface of the monocrystalline silicon wafer by virtue of in-situ charge deposition so as to reduce the surface recombination of minority carriers, thereby measuring the real minority carrier lifetime. However, after the existing charge deposition method is used for charge deposition, the detected minority carrier lifetime of the silicon wafer has certain deviation.
Disclosure of Invention
The invention aims to provide a method and equipment for testing the minority carrier lifetime of a silicon wafer, which can accurately test the minority carrier lifetime of the silicon wafer so as to accurately reflect the quality of the wafer.
In order to achieve the above object, in one aspect, the present invention provides a method for testing minority carrier lifetime of a silicon wafer, comprising the following steps:
s10, carrying out heat treatment on the silicon wafer to enable uniform thin oxide films to grow on the front side and the back side of the silicon wafer;
s20, performing charge deposition on the front side and the back side of the silicon wafer;
s30, rotating the silicon wafer according to the set rotation angle theta;
s40, performing charge deposition on the front and back surfaces of the rotated silicon wafer;
s50, repeatedly executing the steps S30 and S40, wherein the repetition times are more than or equal to 1 time;
and S60, obtaining the minority carrier lifetime of the silicon wafer after charge deposition.
Preferably, in S10, the heat-treating the silicon wafer includes:
s101, placing the silicon wafer into a heating cavity of heat treatment equipment;
s102, introducing oxygen into the heating cavity of the heat treatment equipment, and heating to 700-950 ℃ at a speed of 50-100 ℃ per second;
s103, preserving heat for 3-25 minutes;
s104, stopping oxygen supply, introducing nitrogen into the heating cavity of the heat treatment equipment, and cooling to 70-90 ℃ at a speed of 20-90 ℃ per minute.
Preferably, the thickness of the thin oxide film formed on the front and back surfaces of the silicon wafer is 2-8 nm.
Preferably, in S30, the rotation angle θ of the silicon wafer is 20 to 40 degrees.
Preferably, in S30, the spinning silicon wafer includes:
s301, clamping the silicon wafer through a manipulator, and placing the silicon wafer in a rotating device;
s302, the rotating device rotates the silicon wafer according to the rotation angle theta;
and S303, clamping the silicon wafer through a manipulator, and putting the silicon wafer back to a charge deposition position.
Preferably, in S30, the spinning silicon wafer includes:
s304, judging the rotation angle of the silicon wafer; if the silicon wafer has been rotated by theta degrees, executing S40; if the silicon wafer is not rotated, S301 is performed.
Preferably, the judgment of the rotation angle of the silicon wafer is carried out according to a Notch opening on the silicon wafer.
The method for testing the minority carrier lifetime of the silicon wafer is different from the prior art in that the silicon wafer is subjected to heat treatment, so that uniform thin oxide films grow on the front surface and the back surface of the silicon wafer, and the silicon wafer is rotated for multiple times according to a set angle in the process of carrying out charge deposition on the silicon wafer, so that the interference on the charge deposition uniformity (such as the interference of a supporting point in the process of carrying out charge deposition on the silicon wafer) during the charge deposition of the silicon wafer can be reduced, the minority carrier lifetime value can be accurately measured, and a tester can accurately analyze the quality of the silicon wafer according to a test result. Therefore, the method for testing the minority carrier lifetime of the silicon wafer can accurately measure the minority carrier lifetime of the silicon wafer, and accurately reflects the quality of the wafer.
On the other hand, the invention also provides equipment for testing the minority carrier lifetime of the silicon wafer, which comprises a heat treatment device, a charge deposition device, a rotating device, a silicon wafer minority carrier lifetime measuring device and a conveying device, wherein the heat treatment device can carry out heat treatment on the silicon wafer to ensure that uniform thin oxide films grow on the front side and the back side of the silicon wafer, the charge deposition device can carry out charge deposition on the front side and the back side of the silicon wafer after heat treatment, and the rotating device can rotate the silicon wafer; the conveying device conveys the silicon wafer between the charge deposition device and the rotating device.
Preferably, the charge deposition device comprises a silicon wafer positioning platform and an electrode discharger, the silicon wafer positioning platform comprises a positioning ring and at least two supporting points fixed on the positioning ring, the positioning ring is U-shaped, the silicon wafer can be placed in the positioning ring and supported on the supporting points, and the electrode discharger can deposit charges on the front side and the back side of the silicon wafer placed in the positioning ring.
Preferably, the charge deposition device comprises a silicon wafer rotation angle detection element, and the silicon wafer rotation angle detection element detects the rotation angle of the silicon wafer according to a Notch opening on the silicon wafer.
The equipment for testing the minority carrier lifetime of the silicon wafer has the same technical advantages as the method for testing the minority carrier lifetime of the silicon wafer in the prior art, and is not described herein again.
Drawings
FIG. 1 is a schematic flow chart of a method for testing minority carrier lifetime of a silicon wafer according to the present invention;
fig. 2 is a schematic structural diagram of a positioning stage of a charge deposition device of an apparatus for testing minority carrier lifetime of a silicon wafer according to an embodiment of the present invention.
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.
In the prior art, due to the problem of charge deposition uniformity on the surface of a silicon wafer during charge deposition, the measured minority carrier lifetime of the silicon wafer has deviation, so that the quality of the wafer cannot be accurately judged.
In order to solve the above problems, the method for testing the minority carrier lifetime of a silicon wafer provided by the present invention, as shown in fig. 1, comprises the following steps:
and S10, carrying out heat treatment on the silicon wafer to enable the front and back surfaces of the silicon wafer to grow uniform thin oxide films. In the present embodiment, various conventional heat treatment apparatuses, such as a high-temperature diffusion furnace, can be used for heat-treating a silicon wafer. After the silicon wafer is subjected to heat treatment, the thickness of the thin oxide film obtained on the front and back surfaces of the silicon wafer is preferably 2 nm to 8 nm.
The step of forming a uniform thin oxide film on both the front and back surfaces of the silicon wafer by the heat treatment apparatus preferably employs the steps of:
s101, placing the silicon wafer into a heating cavity of heat treatment equipment; when the silicon wafer is placed in the heating cavity of the heat treatment equipment, the silicon wafer to be heat treated can be placed on the crystal boat through the manipulator, and then the crystal boat is placed in the heating cavity of the heat treatment equipment. When the silicon wafer is placed on the wafer boat, in order to improve the thickness uniformity of the thin oxide film formed on the surface of the silicon wafer, blocking pieces are required to be placed in the clamping grooves at the upper end and the lower end of the wafer boat so as to stabilize the air flow in the heating cavity and balance the temperature in the furnace.
S102, introducing oxygen into the heating cavity of the heat treatment equipment, and heating to 700-950 ℃ at a speed of 50-100 ℃ per second; specifically, firstly, oxygen is introduced into the heat treatment equipment through an oxygen pipe, oxygen delivery is maintained, the temperature of the furnace is rapidly raised from room temperature to 700-950 ℃, and the temperature raising speed is 50-100 ℃ per second. Preferably, the temperature in the heating chamber is rapidly increased to 800 degrees celsius at a ramp rate of 75 degrees celsius per second after the oxygen is introduced.
S103, preserving heat for 3-25 minutes; preferably, the incubation time is 10 minutes.
S104, stopping oxygen supply, introducing nitrogen into the heating cavity of the heat treatment equipment, and cooling to 70-90 ℃ at a speed of 20-90 ℃ per minute. Specifically, the oxygen delivery of an oxygen pipe of the heat treatment equipment is cut off, then a nitrogen pipe is opened, nitrogen is introduced into a heating cavity of the heat treatment equipment, and the temperature in the heating cavity is reduced to 70-90 ℃ at the speed of 20-90 ℃ per minute. Preferably, after the nitrogen gas is introduced, the temperature in the heating chamber is reduced to 70 degrees celsius at a rate of 45 degrees celsius per minute.
And S20, performing charge deposition on the front side and the back side of the silicon wafer. The charge deposition of the silicon wafer with the thin oxide film formed on the front and back surfaces can be performed by using the existing charge deposition equipment, such as WT2500 series test equipment. The wafer may be robotically transferred into a charge deposition chamber of a charge deposition apparatus after cooling the wafer to room temperature (e.g., 25 ℃).
S30, rotating the silicon wafer according to the set rotation angle theta; specifically, after the silicon wafer can be clamped by the manipulator, the manipulator is controlled to rotate the silicon wafer by an angle theta, and then the silicon wafer is placed at a charge deposition position of the charge deposition cavity; the silicon wafer can also be rotated by a rotating device, and the method preferably comprises the following steps of S301, clamping the silicon wafer by a mechanical arm, and placing the silicon wafer in the rotating device; s302, the rotating device rotates the silicon wafer according to the rotation angle theta; and S303, clamping the silicon wafer through a manipulator, and putting the silicon wafer back to a charge deposition position. The rotating device can adopt the existing device capable of realizing the rotation of the silicon wafer.
Wherein the rotation angle theta is such that when the silicon wafer is placed at the charge deposition position after being rotated, the silicon wafer is in contact with the support at the silicon wafer deposition position at a position different from the position of the silicon wafer before being rotated. The rotation angle theta of the silicon wafer is preferably 20-40 degrees.
Further, S304, judging the rotation angle of the silicon wafer; if the silicon wafer has been rotated by theta degrees, executing S40; if the silicon wafer is not rotated, S301 is performed. The method for judging the rotation angle of the silicon wafer can be detection by arranging a position sensor, and preferably, the position sensor can judge the rotation angle of the silicon wafer according to the Notch opening on the silicon wafer.
S40, performing charge deposition on the front and back surfaces of the rotated silicon wafer; the manner of charge deposition is the same as the manner in which charge deposition is achieved in step S20.
S50, repeatedly executing the steps S30 and S40, wherein the repetition times are more than or equal to 1 time; the repeated execution of steps S30 and S40 means that after the charge deposition is performed on the silicon wafer in step S40, step S30 of rotating the silicon wafer and step S40 of performing charge deposition on the silicon wafer are performed, that is, the charge deposition is performed on the silicon wafer after the silicon wafer is rotated. For example, the steps S30 and S40 are repeated twice, that is, after the silicon wafer is rotated and charge deposition is performed on the silicon wafer, the silicon wafer is rotated again and charge deposition is performed on the silicon wafer.
Wherein the time for performing charge deposition on the front side and the back side of the silicon wafer is generally 30 seconds to 2 minutes. The number of times of repeating the steps S30 and S40 is determined according to the amount of charges deposited on the surface of the silicon wafer during each charge deposition, the total amount of charges deposited on the surface of the silicon wafer is generally 2000-4000 nanobanks, and an oxide film is broken down when the amount of charges deposited on the surface of the silicon wafer is too much. Therefore, those skilled in the art should understand that the number of times of repeatedly performing the steps S30 and S40 should be limited to not break down the thin oxide film on the silicon wafer.
And S60, obtaining the minority carrier lifetime of the silicon wafer after charge deposition. The minority carrier lifetime of the silicon wafer after charge deposition is mainly realized by a microwave photoconductive decay method (mu-PCD). The microwave photoconduction decay method is characterized in that pulse laser with the band gap width larger than that of silicon is used for irradiating the surface of a silicon wafer, the generated hole-electron can increase the photoconductivity of the silicon wafer, the photoconductivity is decayed exponentially along with the removal of the laser, and the change of the photoconductivity is detected by the change of the reflection intensity of the microwave, so that the service life of minority carriers is obtained. In particular, silicon minority carrier lifetimes may be obtained by existing μ -PCD detection devices (e.g., WT2500 series devices).
According to the method for testing the minority carrier lifetime of the silicon wafer, provided by the embodiment, the silicon wafer is subjected to heat treatment, so that uniform thin oxide films grow on the front surface and the back surface of the silicon wafer, and the silicon wafer is rotated for multiple times according to the set angle in the process of carrying out charge deposition on the silicon wafer, so that the interference of a supporting point in the process of carrying out charge deposition on the silicon wafer can be reduced, the situation that the charge deposition cannot be carried out on the position of the supporting point of the silicon wafer is avoided, meanwhile, the interference which possibly occurs to the charge deposition of the silicon wafer due to the specificity of the moving track of an electrode discharger can also be reduced, the minority carrier lifetime value can be accurately measured.
Similar to the technical concept of the method for testing the minority carrier lifetime of the silicon wafer provided by the embodiment, the invention also provides equipment for testing the minority carrier lifetime of the silicon wafer, which comprises a heat treatment device, a charge deposition device, a rotating device, a silicon wafer minority carrier lifetime measuring device and a conveying device.
The heat treatment device can carry out heat treatment on the silicon wafer, so that uniform thin oxide films grow on the front surface and the back surface of the silicon wafer. The heat treatment device can be selected from various existing heat treatment equipment, such as a high-temperature diffusion furnace.
The charge deposition device can perform charge deposition on the front side and the back side of the silicon wafer after heat treatment. The charge deposition device can use the existing charge deposition equipment to perform charge deposition on the silicon wafer, for example, the WT2500 series test equipment is used to perform charge deposition on the silicon wafer.
In one embodiment of the invention, the charge deposition apparatus comprises a wafer positioning stage and an electrode discharger. As shown in fig. 2, the silicon wafer positioning platform includes a positioning ring 1 and at least two fulcrums 2 fixed on the positioning ring, the positioning ring 1 is U-shaped, and the silicon wafer can be placed in the positioning ring 1 and supported on the fulcrums 2. The diameter of the inner hole at the right end of the positioning ring 1 is slightly larger than the outer diameter of the silicon wafer, meanwhile, the fulcrum 2 is positioned in the inner hole of the positioning ring 1, and when the silicon wafer is placed in the inner hole of the positioning ring 1, the fulcrum 2 can support the silicon wafer. Wherein the number of the fulcrums 2 is preferably 3.
The electrode discharger can deposit charges on the front surface and the back surface of the silicon wafer placed in the positioning ring. Potential difference is formed between the silicon wafer supported by the supporting point 2 and the electrode discharger, the silicon wafer is placed on the supporting point 2, the electrode discharger moves to deposit charges on the front side of the silicon wafer according to a fixed line track (such as a parallel line), then the electrode discharger moves to the back side of the silicon wafer, and the charges are also moved to deposit on the back side of the silicon wafer according to the fixed line track, so that the charges on the front side and the back side of the silicon wafer are deposited. The movement of the electrode discharger can be carried out by using an existing moving device (e.g., a robot). The number of the electrode dischargers can also be two, and the positive and negative surfaces of the silicon wafer can be subjected to charge deposition respectively through the two electrode dischargers.
The charge deposition of the monocrystalline silicon wafer is to perform charge deposition on the front side and the back side of the monocrystalline silicon wafer, and due to the existence of the supporting point 2, the situation that the supporting point position of the monocrystalline silicon wafer is blocked inevitably to cause that the charge cannot be deposited in the region, so that the minority carrier lifetime of the supporting point part is obviously reduced, and a tester cannot accurately analyze the quality of the wafer according to a test result. Therefore, the apparatus of the present invention includes a rotating device for rotating the silicon wafer.
The rotating device can adopt the existing structure capable of realizing the rotation of the silicon wafer, preferably, the rotating device can comprise a support, a rotating part and a stepping motor, wherein the rotating part is rotatably arranged on the support, the stepping motor is used for driving the rotating part to rotate, the rotating part is in a disc shape and is provided with a notch, so that a mechanical arm for clamping the silicon wafer can conveniently place the silicon wafer on the rotating part, and the rotating part can be rotatably connected with the support through a slewing bearing. When the silicon wafer is rotated by using the rotating device, the silicon wafer is firstly placed on the rotating piece through the mechanical arm, then the stepping motor is controlled to enable the rotating piece to rotate for a set angle, the silicon wafer placed on the rotating piece rotates for the same angle, then the mechanical arm is used for clamping the silicon wafer through a notch in the edge of the rotating piece, and then the silicon wafer is conveyed to the charge deposition device.
Further preferably, the charge deposition device further comprises a silicon wafer rotation angle detection element. The silicon wafer rotation angle detection element may be a position sensor, and the rotation angle of the silicon wafer is detected through a Notch opening in the silicon wafer. Specifically, the silicon wafer rotation angle detection element detects the positions of the Notch openings on the silicon wafer, and determines the rotation angle of the silicon wafer according to the difference between the detected positions of the Notch openings adjacent to each other twice.
The conveying device conveys the silicon wafer between the charge deposition device and the rotating device. The conveying device can adopt various existing manipulators for clamping the silicon wafer. When the silicon wafer after being thermally treated by the thermal treatment device is conveyed to the charge deposition device, the conveying can also be realized by adopting a mechanical arm. The silicon chip minority carrier lifetime measuring device can be realized by the existing mu-PCD detection equipment. Wherein the silicon wafer minority carrier lifetime measuring device and the charge deposition device can share the same silicon wafer positioning platform.
In the invention, the charge deposition device, the rotating device and the silicon wafer minority carrier lifetime measuring device can be arranged in a shell. Considering that the heat treatment device may affect other devices when in operation, in order to make the whole equipment simpler, the heat treatment device and the charge deposition device, the rotating device and the silicon wafer minority carrier lifetime measuring device may be respectively positioned in two different shells.
According to the method and the device for testing the minority carrier lifetime of the silicon wafer, provided by the invention, the silicon wafer is subjected to multiple rotations and charge deposition, so that charges are uniformly deposited on the front side and the back side of the silicon wafer without dead zones, the whole silicon wafer can be fully passivated by charges, a region with low minority carrier lifetime cannot occur due to the problem of testing equipment, the minority carrier lifetime value can be accurately measured, and a tester can accurately analyze the quality of the wafer according to a test result.
In the description of the present invention, it is to be understood that the terms "inside", "outside", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the device referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "disposed," "connected," and the like are to be construed broadly and can include, for example, fixed connections, removable connections, integral connections, or the presence of intervening components. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and not to be construed as limiting the present invention, and those skilled in the art can make changes, modifications, substitutions and alterations to the above embodiments within the scope of the present invention.

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CN202110121154.6A2021-01-282021-01-28Method and equipment for testing minority carrier lifetime of silicon waferActiveCN112904173B (en)

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