Disclosure of Invention
The present application provides an image data access device and method based on a nonvolatile memory, which aims to solve or partially solve the above-mentioned problems involved in the background art or at least one other disadvantage in the prior art.
In one aspect, the present application provides such a non-volatile memory-based video data access apparatus comprising: the device comprises an acquisition module, a writing module, a nonvolatile memory and a reading module. The acquisition module is used for acquiring video data. The writing module is electrically connected with the acquisition module and is used for generating a storage instruction for storing video data. The nonvolatile memory is electrically connected with the writing module and is used for responding to a storage instruction and storing video data through spin current. The reading module is electrically connected with the nonvolatile memory and is used for reading video data in the nonvolatile memory.
In some embodiments, the nonvolatile memory includes: a double data rate controller and MRAM. The double data rate controller is configured to generate a drive store instruction in response to the store instruction. The MRAM is electrically connected to the double data rate controller for storing video data at a double rate in response to a drive storage command.
In some embodiments, the double data rate controller is further configured to generate a drive read command in response to the read command of the read module.
In some embodiments, MRAM is also used to read video data at double rate in response to a drive read command.
In some embodiments, the memory device further comprises a judging module electrically connected with the writing module and used for judging the storage space of the nonvolatile memory.
In some embodiments, the method further includes a cloud storage platform, configured to receive and store video data of the nonvolatile memory in response to a determination result that the storage space of the nonvolatile memory of the determination module is insufficient.
In some embodiments, the system further comprises a display module electrically connected with the reading module for receiving and displaying the video data obtained by the reading module.
In another aspect, the present application also provides a video data access method based on a nonvolatile memory, including: collecting video data; generating a storage instruction of the video data by the writing module; according to the storage instruction, storing video data by a nonvolatile memory through spin current; and reading the video data in the nonvolatile memory by the reading module.
In some embodiments, storing video data by a nonvolatile memory through spin current, when current supply to the nonvolatile memory is temporarily stopped, includes:
Continuing to respond to the received storage instruction by the memory, and storing the video data through the spin current; and
A storage completion signal of the video data is generated by the nonvolatile memory, and reception of a new storage instruction is stopped.
In some embodiments, after the storage instructions of the video data are generated by the writing module, the method further comprises:
judging the storage space of the nonvolatile memory; and
And when the judgment result shows that the storage space of the nonvolatile memory is insufficient, uploading the video data in the nonvolatile memory to the cloud storage platform.
The technical solution according to the above-described embodiments may achieve at least one of the following advantages.
According to the image data access device and the image data access method based on the nonvolatile memory, the mode of writing video data through spin current of the MRAM is used for replacing the original capacitance storage mode of the SDRAM, so that the problem that data to be stored are lost due to capacitance discharge at the moment of power failure of a system is avoided, and the integrity of the stored video data is ensured.
According to the image data access device and the image data access method based on the nonvolatile memory, the MRAM is used as a storage unit of the nonvolatile memory, has higher reading and writing speed, reduces storage time and is beneficial to completing a large number of video data writing and reading tasks.
Detailed Description
In the following detailed description, numerous specific details are set forth by way of examples in order to provide a thorough understanding of the relevant disclosure. However, it will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. It should be appreciated that the terms "system," "apparatus," "unit," and/or "module" are used herein to describe various elements, components, portions or assemblies in a sequential order. However, these terms may be replaced with other expressions if the other expressions can achieve the same purpose.
It will be understood that when a device, unit, or module is referred to as being "on," "connected to," or "coupled to" another device, unit, or module, it can be directly on, connected to, or coupled to, or in communication with the other device, unit, or module, or intervening devices, units, or modules may be present unless the context clearly indicates an exception. For example, the term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the scope of the application. As used in the specification and in the claims, the terms "a," "an," "the," and/or "the" are not specific to a singular, but may include a plurality, unless the context clearly dictates otherwise. In general, the terms "comprises" and "comprising" are intended to cover only those features, integers, steps, operations, elements, and/or components that are explicitly identified, but do not constitute an exclusive list, as other features, integers, steps, operations, elements, and/or components may be included.
These and other features and characteristics of the present application, as well as the methods of operation and functions of the related elements of structure, the combination of parts and economies of manufacture, may be better understood with reference to the following description and the accompanying drawings, all of which form a part of this specification. It is to be expressly understood, however, that the drawings are for the purpose of illustration and description only and are not intended as a definition of the limits of the application. It will be understood that the figures are not drawn to scale.
Various block diagrams are used in the description of the various embodiments according to the present application. It should be understood that the foregoing or following structures are not intended to limit the present application. The scope of the application is defined by the appended claims.
Fig. 1 is a schematic structural view of an image data access device based on a nonvolatile memory according to an exemplary embodiment of the present application.
As shown in fig. 1, the present application discloses a video data access device based on a nonvolatile memory, which may include: an acquisition module 1, a writing module 2, a nonvolatile memory 3 and a reading module 4. The acquisition module is used for acquiring video data. The writing module is electrically connected with the acquisition module and is used for generating a storage instruction for storing video data. And the nonvolatile memory is electrically connected with the writing module and is used for responding to a storage instruction and storing video data through spin current. And the reading module is electrically connected with the nonvolatile memory and is used for reading the video data in the nonvolatile memory.
The acquisition module 1 may be a camera, and is configured to acquire all dynamics within a field of view of the camera, so as to acquire video data. According to the application scenario of the video data access device based on the nonvolatile memory of the present application, the acquisition module 1 needs to perform continuous acquisition within a predetermined working time, for example, in a certain monitoring scenario, the working time of one week of the acquisition module may be preset to be 7dx24 hours, where d is the number of days and h is the number of hours, and it is anticipated that the acquisition module 1 will perform continuous acquisition for a long time to meet the requirement of the application scenario, and inevitably generates a large amount of video data. The video data in the present application may be dynamic video information, static picture information, or other data modes according to the needs of the user, which is not limited herein.
The programmable logic device selected from the video data access device based on the nonvolatile memory is an FPGA (Field Programmable GATE ARRAY ). The programmable logic device is a hardware carrier for realizing the established functions and technical indexes of the electronic application system by an electronic design automation technology, and the FPGA is one of the main devices for realizing the path, and has the characteristics of direct user-oriented, extremely high flexibility and universality, convenient use, quick hardware test and realization, and the like. In the application, the FPGA is used as a main control chip, on one hand, the video data sent by the acquisition module 1 can be effectively received, and a storage instruction containing the video data is generated so as to drive the nonvolatile memory 3 to store the video data; on the other hand, the FPGA can effectively respond to the reading requirement of the display module 5, and further convert the reading requirement into a reading instruction matched with the nonvolatile memory 3, so as to realize the transmission of video data contained in the reading instruction.
The writing module 2 is a part of the FPGA responsible for generating the storage instruction, and is electrically connected with the acquisition module 1 through the I2C bus. The I2C bus is a simple and bidirectional two-wire synchronous serial bus, and can realize information transmission work between two connected devices by only two wires, so that the I2C bus is arranged between the FPGA and the acquisition module 1 to realize video data transmission. In the process of video data transmission, the resolution can be set to be an output format of RGB565, wherein the output format of RGB565 is 16 bits each time, and in order to rapidly realize storage and real-time display of video data, the video data is divided into 28 bits for transmission, and in the application, CH0 and CH1 are taken as two data transmission channels to realize transmission of video data acquired by the acquisition module 1. The data transferred through the I2C bus is received by a first FIFO (FIRST IN FIRST Out ) and the video data is processed by the first FIFO to generate a store pulse, i.e., a store instruction, and the store instruction is acknowledged by a write arbitration unit. Further, a lower power data transfer is performed on the storage instructions containing video data via AXI (Advanced eXtensible Interface) bus protocol. Further, the nonvolatile memory 3 is driven by the IP (Intellectual Property ) core to respond to a store instruction, for example, a store operation for video data contained in the store instruction. The IP core selected by the application is an MIG IP core, and the IP core can provide a high-speed interface between the nonvolatile memory 3 and comprises video data transmission, initialization operation and correction operation for the nonvolatile memory 3 and the like; in addition, it is also possible to more efficiently receive the storage instruction and drive the nonvolatile memory 3 to execute the storage instruction.
The nonvolatile memory 3 includes double data rate controllers 31 and MRAM (Magnetoresistive RandomAccess Memory) 32. The double data rate controller 31 is electrically connected to the writing module 2, and is capable of receiving and responding to a storage command transmitted by the MIG IP core, and driving the MRAM 32 at a double rate to store video data contained in the storage command.
MRAM 32 is a novel nonvolatile magnetic random access memory that realizes information writing by spin current. The MRAM 32 realizes the storage of video data by spin current, and the direction of spin current will not change when power is off, the MRAM 32 will still maintain the original current direction, and the received video data is stored continuously, which is beneficial to guaranteeing the integrity of video storage. Meanwhile, the MRAM 32 has the advantage of greatly reduced power consumption by eliminating leakage, and thus lower dynamic power consumption. In addition, the read-write speed of the MRAM 32 is up to 500MHZ, the write time is less than 10ns, the storage of video data can be completed at a higher storage speed, the requirement of a large amount of video data storage is met under certain application scenes such as full-time monitoring all the day, and the user experience is improved.
Of course, the storage space of the MRAM 32 is limited, and in order to avoid the situation of clearing the stored video data caused by insufficient storage space of the MRAM 32 during the storage process, the present application is further provided with a judging module 6 and a cloud storage platform 7. The judging module 6 is electrically connected with the writing module 2, and after receiving the storage instruction, judges the storage space of the MRAM 32 first, and if the storage space can meet the requirement, no operation is executed; if the storage space of the MRAM 32 is insufficient as a result of the determination, an upload instruction is sent to the MRAM 32, and the MRAM 32 uploads the video data stored therein to the cloud storage platform 7 in response to the upload instruction, and the cloud storage platform 7 receives and stores the video data of the MRAM 32. By arranging the cloud storage platform 7, the situation of insufficient storage space of the MRAM 32 can be effectively solved, the situation of clearing stored video data caused by insufficient storage space of the MRAM 32 is avoided, the integrity of the stored video data is ensured, further, the storage capacity of the video data access device based on the nonvolatile memory is improved, and the requirement of scenes with larger video data storage capacity is met.
To meet the present application's requirement for real-time display of captured video data, the display module 5 includes an HDMI (High Definition Multimedia Interface, high-definition multimedia interface) display 51 and an external display 52. The HDMI display is a display device supporting a high-definition multimedia interface, capable of displaying more display information, and high in definition. The external display 52 is a client operation end, and is used for interacting information with a user, and specifically includes displaying real-time video dynamics acquired by the acquisition module 1 to the user, and sending a reading requirement to the reading module 4. The display can meet the display requirement of the collected video data, meanwhile, the information interaction between a user and the video data access device based on the nonvolatile memory is enhanced, and the use experience of the user is improved.
The reading module 4 is another part of the FPGA, and is configured to receive a reading requirement of a user, convert the reading requirement into a reading instruction, and transmit the reading instruction to the double data rate controller 31 through the MIG IP core; the double data rate controller 31 drives the MRAM 32 at a double rate for reading of stored data, i.e., reads out its stored information by detecting its resistance.
When the stored video data is to be read, the memory access and mapping are performed on the MRAM 32 in the access mode of RBC (Row-Bank-Column), that is, one memory address is converted to a physical memory unit of the MRAM 32, so as to obtain the video data stored in the memory unit, and further realize the reading of the video data.
After the reading module 4 reads the responsive video data, the video data is transferred to the display module 5. Specifically, the reading module 4 includes a MIG IP core that is shared with the writing module 2, so as to implement transmission of the read video data and transfer of the read command, which are not described herein. After the MIG IP core acquires the video data, the video data is transmitted to the read arbitration unit through an AXI bus protocol, and the confirmation of the video data is completed. Further, the video data is transferred to the second FIFO, a display pulse is generated by processing the video data in the second FIFO, and the video data is transferred to the display module 5 through two channels, i.e., CH1 and CH0, so as to complete the display requirement of the video data. The reading module 4 and the writing module 2 are two modules of the FPGA, and the transmission of two paths of data generated by the two modules can be completed asynchronously, namely, the independent completion of the storage and reading functions can be realized, so that the real-time acquisition and display of the data are realized.
It should be noted that, in this embodiment, all modules are electrically connected to perform information interaction.
Fig. 2 is a flowchart of a method for accessing image data based on a nonvolatile memory in a power-on condition according to an exemplary embodiment of the present application. Fig. 3 is a schematic diagram of an MRAM workflow in a power-on condition according to an exemplary embodiment of the present application based on a nonvolatile memory image data access method.
As shown in fig. 2, the present application provides a video data access method based on a nonvolatile memory, comprising:
Collecting video data;
Generating a storage instruction of the video data by the writing module;
according to the storage instruction, storing video data by a nonvolatile memory through spin current; and
The video data in the nonvolatile memory is read by the reading module.
Specifically, as shown in fig. 3, the MRAM in the nonvolatile memory includes four Mode registers, such as MR0 (Mode Register 0 ), MR1 (Mode Register 1, mode Register 2), MR2 (Mode Register 2), and MR3 (Mode Register 3 ), where the MRAM in the nonvolatile memory receives a storage instruction including video data through an AXI Bus protocol and an AHB (ADVANCED HIGH performance Bus) system Bus, and performs parameters such as a characteristic of a storage control update, impedance, and a write length of CAS (Central Authentication Service, central authentication server) through MR 2; then the MR3 is used for controlling the multipurpose register; further, parameters such as DLL (Delay-locked Loop), output driving length, extra length, write level enabling and the like are stored through MR 1; further, data of different operation modes of the memory are stored through MR0, including burst length, read burst type, CAS length, test mode, DLL reset, etc.; after the MRAM is calibrated and before the memory command is executed, the operation of the parameters such as the characteristics, the impedance, and the write length of the CAS updated by the memory control needs to be performed again by the MR 2. Further, after the above operation is completed, the data is read and written in the form of ROW-BANK-COL, and simultaneously the depth and width of FIFO and CAS are increased, so that the storage of MRAM to the stored data is finally realized.
In some embodiments, after the storage instruction of the video data is generated by the writing module, the method further comprises judging the storage space of the nonvolatile memory; and uploading the video data in the nonvolatile memory to the cloud storage platform when the judgment result is that the storage space of the nonvolatile memory is insufficient. To avoid that in some cases, due to the limitation of the storage space, the video data is cleared, further ensuring the integrity of the video data.
In some embodiments, prior to the entire accessing step, initializing the apparatus to perform the method of the present application is also included.
The present embodiment is a method for implementing the correspondence of the non-volatile memory-based image data access device in the first embodiment, and the implementation manner, the function and the effect of any module related thereto are not described herein in detail with reference to the first embodiment.
Fig. 4 is a flowchart of a method for accessing image data based on a nonvolatile memory in a power-off condition according to an exemplary embodiment of the present application.
As shown in fig. 4, the present application provides a video data access method based on a nonvolatile memory, comprising:
Collecting video data;
Generating a storage instruction of the video data by the writing module;
According to the storage instruction, storing video data by a nonvolatile memory through spin current;
Reading video data in the nonvolatile memory by a reading module;
when the current supply to the nonvolatile memory is temporarily stopped, the nonvolatile memory continues to respond to the received storage instruction, and video data is stored through spin current; and
A storage completion signal of the video data is generated by the nonvolatile memory, and reception of a new storage instruction is stopped.
Fig. 5 is a schematic diagram of an MRAM workflow in the case of power down, according to an exemplary embodiment of the present application, based on a nonvolatile memory image data access method.
As shown in fig. 5, in the case of a sudden power failure, the MRAM will stop receiving any new command, including a storage command or a read command, but will continue to execute the received command, including the storage command or the read command, and store video data by means of a spin current or read stored data by means of detecting its resistance, and after completing the storage command or the read command, generate a storage completion signal, and finally turn off the power of the MRAM. The method of the application can ensure that the storage or the reading of the video data is not lost due to power failure, and ensure the integrity of the storage and the reading.
In some embodiments, the method further comprises, i.e., re-supplying current to the nonvolatile memory, and repeating the above operations.
The present embodiment is to implement the accessing method of the image data accessing device based on the nonvolatile memory in the first embodiment under the power failure condition, and the execution mode, the function and the effect of any module related to the accessing method are not described herein in detail with reference to the first embodiment.
According to the image data access method based on the nonvolatile memory, the mode of writing video data through spin current of the MRAM is used for replacing the original capacitance storage mode of the SDRAM, so that the problem that data to be stored are lost due to capacitance discharge at the moment of power failure of a system is avoided, and the integrity of the stored video data is ensured. Meanwhile, in the embodiment, the MRAM has a higher read-write speed, so that the storage time is reduced, and a large number of video data writing and reading tasks are facilitated.
It is to be understood that the above-described embodiments of the present application are merely illustrative of or explanation of the principles of the present application and are in no way limiting of the application. Accordingly, any modification, equivalent replacement, improvement, etc. made without departing from the spirit and scope of the present application should be included in the scope of the present application. Furthermore, the appended claims are intended to cover all such changes and modifications that fall within the scope and boundary of the appended claims, or equivalents of such scope and boundary.