Background
The power semiconductor device is a semiconductor device for processing high voltage and large current, and during the measurement process of the dynamic characteristics of the power semiconductor device, the instantaneous high voltage and large current measurement is usually included. In the traditional dynamic characteristic measuring process of the power semiconductor device, the measuring duration is microsecond, the voltage reaches thousands of volts, and the current reaches thousands of amperes. Parameters such as avalanche, switching time, conduction loss waiting test are large in instantaneous power, and because a traditional power supply cannot provide such high instantaneous power, in power semiconductor measuring equipment, especially dynamic parameter testing equipment, a high-voltage large-capacitance energy storage capacitor is often used for providing energy for power semiconductor device measurement.
The energy stored in the high-voltage large-capacitance energy storage capacitor is high, and after the measurement equipment is tested or turned off, in order to prevent the test equipment from being damaged or an operator from being injured, the energy stored in the high-voltage large-capacitance energy storage capacitor is generally required to be released to a safety range through a release circuit.
The traditional bleeder circuit has two types, one type is realized by directly connecting a high-resistance bleeder resistor in parallel at two ends of an energy storage capacitor, however, along with the rise of the voltage and the capacitance value of the energy storage capacitor, the efficiency of the bleeder circuit is greatly reduced, and the test efficiency of the characteristics of a power semiconductor device is seriously influenced. The other type of the bleeder circuit is realized by connecting a bleeder resistor in series with a transistor, and the transistor is driven by a power supply to reduce the resistance value of the bleeder resistor, so that the bleeder efficiency is improved. However, in the bleeder circuit, since the Power Supply of the driving transistor is powered down after the test equipment is powered down, the bleeder circuit cannot be normally controlled to complete the bleeding, so that the bleeder circuit is generally equipped with an Uninterruptible Power Supply (UPS for short) to provide Power for the transistor after the Power is powered down, and the bleeder circuit has the disadvantages of high cost, large volume and inflexibility. In addition, when the test equipment is abnormally powered off, the transistor of the leakage circuit cannot normally work due to the fact that the driving power supply is lost, and therefore the energy stored by the energy storage capacitor cannot be normally discharged. Therefore, the traditional bleeder circuit has low reliability and is not suitable for occasions of high-voltage large-capacitance energy storage capacitors.
At present, no effective solution is provided for the problem of low reliability of the bleeder circuit in the related art.
Disclosure of Invention
The embodiment of the application provides a bleeder circuit, an energy storage circuit, a semiconductor test system and a bleeder method, which are used for at least solving the problem of low reliability of the bleeder circuit in the related art.
In a first aspect, an embodiment of the present application provides a bleeding circuit, including: the charging module is electrically connected with the triode, and the triode is electrically connected with the discharging main body; wherein,
the charging module comprises a first diode and a first capacitor, the cathode of the first diode is electrically connected with one end of the first capacitor, the anode of the first diode and the other end of the first capacitor are respectively used for being electrically connected with two ends of a power supply, and the charging module is used for providing a working power supply for the triode;
the triode is electrically connected with the discharge main body, the triode and the discharge main body are connected in parallel at two ends of the capacitor to be discharged, and the triode is used for controlling the discharge main body to discharge the energy of the capacitor to be discharged under the conduction condition.
In some embodiments, the charging module further comprises: and one end of the switch unit is electrically connected with the triode, the other end of the switch unit is movably connected with the cathode of the first diode and the common end of the first capacitor, and the switch unit is used for switching on or switching off an electric path from the charging module to the triode.
In some embodiments, the charging module further comprises: and one end of the driving unit is electrically connected with the triode, the other end of the driving unit is movably connected with the cathode of the first diode and the common end of the first capacitor, and the driving unit is used for driving the triode.
In some embodiments, the charging module further comprises: and the current limiting unit is connected between the power supply and the first diode in series and is used for adjusting the current value output by the charging module so as to provide working current with a preset threshold value for the triode.
In some of these embodiments, the transistor comprises: and the collector and the emitter of the insulated gate bipolar triode are connected in parallel with two ends of the capacitor to be discharged, and the grid is electrically connected with the charging module.
In a second aspect, an embodiment of the present application provides an energy storage circuit, which includes a power supply circuit and an energy storage capacitor, where one end of the power supply circuit is electrically connected to a power supply, and the other end of the power supply circuit is electrically connected to the energy storage capacitor; the energy storage circuit further comprises a bleeder circuit as described in the first aspect above, wherein the bleeder circuit is electrically connected between the power supply circuit and the energy storage capacitor.
In a third aspect, an embodiment of the present application provides a semiconductor test system, including an interface module, a control module, a test module, and a power supply, where the interface module is electrically connected to the control module, the control module is electrically connected to the test module, and the power supply is electrically connected to the interface module, the control module, and the test module, respectively, where the interface module is configured to receive information input by a user or feed back information to the user, the control module is configured to control the test module, and the test module is configured to test a semiconductor device; the energy storage circuit is electrically connected with the control module, the test module and the power supply respectively, and the energy storage circuit is used for providing energy for the test module.
In some embodiments, the control module is electrically connected to a switch unit in the energy storage circuit, and the control module is configured to control an operating state of the energy storage circuit, where the operating state of the energy storage circuit includes: and starting the discharging energy storage capacitor and stopping discharging the energy storage capacitor.
In a fourth aspect, an embodiment of the present application provides a bleeding method, which is applied to the semiconductor test system as described in the third aspect, and the method includes:
acquiring a power-down signal for indicating power-down of a power supply;
and according to the power failure signal, controlling a switch unit to conduct an electric path from a charging module to the triode, so that the triode controls the discharge main body to discharge the capacitor to be discharged.
In some of these embodiments, the method further comprises:
acquiring a discharge signal for indicating starting of discharging the energy storage capacitor; according to the discharge signal, controlling the switch unit to conduct an electric path between the charging module and the triode so that the triode controls the discharge main body to discharge the capacitor to be discharged;
or, obtaining a discharge stopping signal for indicating to stop discharging the energy storage capacitor; and controlling the switch unit to break an electric path from the charging module to the triode according to the discharge stopping signal, so that the triode controls the discharge main body to stop discharging the capacitor to be discharged.
Compared with the related art, the bleeder circuit, the tank circuit, the semiconductor test system and the bleeder method provided by the embodiment of the application are characterized in that: the charging module is electrically connected with the triode, and the triode is electrically connected with the discharging body; the charging module comprises a first diode and a first capacitor, wherein the cathode of the first diode is electrically connected with one end of the first capacitor, the anode of the first diode and the other end of the first capacitor are respectively used for being electrically connected with two ends of a power supply, and the charging module is used for providing a working power supply for the triode; the triode is electrically connected with the discharge main body, the triode and the discharge main body are connected in parallel at two ends of the capacitor to be discharged, and the triode is used for controlling the discharge main body to discharge the energy of the capacitor to be discharged under the conduction condition, so that the problem of low reliability of a discharge circuit in the related technology is solved, and the reliability of the discharge circuit is improved.
The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below to provide a more thorough understanding of the application.
Detailed Description
In order to make the purpose, technical solution and advantages of the present application more apparent, the present application will be described and illustrated with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments provided in the present application without any inventive step are within the scope of protection of the present application. Moreover, it should be further appreciated that such a development effort might be complex and tedious, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure, and it should be understood that such a development effort might be complex and tedious.
Reference in the specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the specification. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of ordinary skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments without conflict.
Unless defined otherwise, technical or scientific terms referred to herein shall have the ordinary meaning as understood by those of ordinary skill in the art to which this application belongs. Reference to "a," "an," "the," and similar words throughout this application are not to be construed as limiting in number, and may refer to the singular or the plural. The use of the terms "including," "comprising," "having," and any variations thereof herein, is intended to cover a non-exclusive inclusion; for example, a process, method, system, article, or apparatus that comprises a list of steps or modules (elements) is not limited to the listed steps or elements, but may include additional steps or elements not listed, or may include additional steps or elements inherent to such process, method, article, or apparatus. Reference to "connected," "coupled," and the like in this application is not intended to be limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Reference herein to "a plurality" means greater than or equal to two. "and/or" describe the association relationship of the associated object, meaning that three relationships may exist, e.g., "A and/or B" may mean: a exists alone, A and B exist simultaneously, and B exists alone. Reference herein to the terms "first," "second," "third," and the like, are merely to distinguish similar objects and do not denote a particular ordering for the objects.
The present embodiment provides a bleeder circuit. Fig. 1 is a first structural schematic diagram of a bleeder circuit according to an embodiment of the present application, as shown in fig. 1, the bleeder circuit includes: the chargingmodule 110, thetransistor 120, and thedrain body 130, thecharging module 110 is electrically connected to the transistor 120 (the first capacitor C1 is electrically connected to the transistor 120), and thetransistor 120 is electrically connected to thedrain body 130. Thecharging module 110 includes a first diode D1 and a first capacitor C1, a cathode of the first diode D1 is electrically connected to one end of the first capacitor C1, an anode of the first diode D1 and the other end of the first capacitor C1 are respectively electrically connected to two ends of thepower supply 304, and thecharging module 110 is configured to provide a working power supply for thetransistor 120; thetransistor 120 is electrically connected to thedrain body 130, thetransistor 120 and thedrain body 130 are connected in parallel to two ends of the capacitor C0 to be drained, and thetransistor 120 is configured to control thedrain body 130 to drain the energy of the capacitor C0 to be drained when thetransistor 120 is turned on.
Under the condition that thepower supply 304 normally operates, thecharging module 110 provides operating power to thetransistor 120, so that thetransistor 120 drives thedrain body 130 to drain the capacitor C0 to be drained. Under the condition thatpower 304 loses power abnormally, on the one hand, the electric charge has been accumulated on first electric capacity C1, can provide operating current fortriode 120, and on the other hand, first diode D1 can make the electric charge that accumulates on first electric capacity C1 can not bleed off fast, guarantees that chargingmodule 110 can provide operating power to triode 120 continuously in presetting the time span to maketriode 120 still can switch on enough long time, with the control main part of bleeding 130 will wait to bleed off the electric charge that electric capacity C0 stored and bleed off completely. Through this embodiment, the problem that the reliability of bleeder circuit is low among the correlation technique has been solved, bleeder circuit's reliability has been promoted.
Moreover, the release circuit that this embodiment provided has abandoned the UPS power, has realized the release return circuit of a low cost, small volume, high flexibility through above-mentioned structure, has realized the function of releasing of low-power consumption, high speed, high reliability.
In some embodiments, bleedbody 130 includes a bleed resistor. Fig. 2 is a first structural diagram of the bleeder body side according to the embodiment of the present application, and as shown in fig. 2, the bleeder resistor R1 and thetransistor 120 are connected in series and in parallel at two ends of the capacitor C0 to be bled. When the two ends of the capacitor C0 to be drained are powered off, the drain resistor R1 drains the residual charge in the capacitor C0 to be drained under the control of thetransistor 120.
In some embodiments, thevent body 130 comprises an absorption cell. Fig. 3(a) and 3(b) respectively show the schematic structural diagrams of the bleeder body side according to the embodiment of the present application, and as shown in the figure, theabsorption unit 131 is provided with a resistor R2, a second capacitor C2 and a semiconductor switch D2, and the semiconductor switch D2 may be a diode or a triode. Referring to fig. 3(a), a resistor R2 is connected in series with the second capacitor C2, in parallel with the semiconductor switch D2. Referring to fig. 3(b), a resistor R2 is connected in series with the second capacitor C2 and in parallel with the semiconductor switch D2. When the two ends of the capacitor C0 to be drained are powered off, theabsorption unit 131 absorbs the residual charges in the capacitor C0 to be drained under the control of thetransistor 120, so as to achieve the draining effect.
In some embodiments, the bleedingbody 130 may further include both the bleeding resistor R1 and theabsorption cell 131 to further improve the bleeding efficiency.
Fig. 4 is a schematic diagram of a preferred structure of a bleeder circuit according to an embodiment of the present application, and as shown in fig. 4, thecharging module 110 further includes: and one end of the switch unit 111 is electrically connected to thetransistor 120, and the other end of the switch unit 111 is movably connected to the cathode of the first diode D1 and the common end of the first capacitor C1, wherein the switch unit 111 is used for conducting or breaking an electrical path from thecharging module 110 to thetransistor 120.
Under the condition that the other end of the switch unit 111 is electrically connected to the cathode of the first diode D1 and the common end of the first capacitor C1, the electrical path between the chargingmodule 110 and thetransistor 120 is in a conducting state, and thecharging module 110 provides a working power supply for thetransistor 120, so that thetransistor 120 is conducted, and the bleedingmain body 130 is controlled to bleed the capacitor C0 to be bled; in a case where the other end of the switching unit 111 and the negative electrode of the first diode D1 are disconnected from the common terminal of the first capacitor C1, the circuit between the chargingmodule 110 and thetransistor 120 is in an off state, and thecharging module 110 stops providing thetransistor 120 with the operating power, so that thetransistor 120 is turned off, thereby controlling the dischargingbody 130 to stop discharging the capacitor C0 to be discharged. By providing the switching unit 111, the start and stop of the bleeding can be achieved.
Referring to fig. 4, in some embodiments, thecharging module 110 further comprises: and one end of the driving unit 112 is electrically connected to thetransistor 120, the other end of the driving unit 112 is movably connected to the negative electrode of the first diode D1 and the common end of the first capacitor C1, and the driving unit 112 is used for driving thetransistor 120. The driving unit 112 may be provided as one or more driving resistors.
Referring to fig. 4, in some embodiments, thecharging module 110 further comprises: and the current limitingunit 113, one end of the current limitingunit 113 is electrically connected to thepower supply 304, the other end of the current limitingunit 113 is electrically connected to the first diode D1, and the current limitingunit 113 is configured to adjust a current value output by thecharging module 110 to provide an operating current with a preset threshold for thetransistor 120. The current limitingunit 113 may be provided as one or more current limiting resistors.
Fig. 5 is a schematic diagram of a hardware structure of a bleeder circuit according to a preferred embodiment of the present application, and as shown in fig. 5, theTransistor 120 includes an Insulated Gate Bipolar Transistor (IGBT) T, a collector of the IGBT T is electrically connected to the bleeder resistor R1, an emitter of the IGBT T is respectively connected to ground in common with the capacitor C0 to be drained and the first capacitor C1, and a Gate of the IGBT T is electrically connected to thecharging module 110.
In the embodiment, the igbt T is used as the discharge control transistor, so that the voltage and capacitance specification of the capacitor C0 to be discharged can be improved, and the discharge speed of the charge accumulated in the capacitor C0 to be discharged can be improved.
The triode in the application is not limited to an insulated gate bipolar transistor, but can be other bipolar transistors and field effect transistors in some embodiments.
Referring to fig. 5, in some embodiments, the first diode D1 includes a reverse blocking diode, the driving unit 112 includes a driving resistor R3, one end of the driving resistor R3 is electrically connected to the gate of the igbt T, the current limitingunit 113 includes a current limiting resistor R4, the current limiting resistor R4 is used for adjusting the current value of the DC output from the DC power source, the switching unit 111 includes a relay K, the relay K includes a first fixed contact K1, a second fixed contact K2, and a movable contact K3, the first fixed contact K1 is grounded, the second fixed contact K2 is electrically connected to the common end of the first diode D1 and the first capacitor C1, one end of the movable contact K3 is movably connected to the first fixed contact K1 and the second fixed contact K2, and the other end of the movable contact K3 is electrically connected to the driving resistor R3.
In some embodiments, the voltage range of the DC power DC is 10V to 16V, preferably 15V.
In some embodiments, the contact type of the relay K is preferably a 1-pair single pole double throw contact relay or a 2-pair single pole double throw contact relay.
In some embodiments, the charging voltage of the capacitor C0 to be discharged ranges from 0V to 2000V, and the capacitor value ranges from 0pF to 100 mF.
In some embodiments, it may be preferred that the resistance R of the bleed resistor R11Can be based on the charging voltage V at two ends of the capacitor C0 to be dischargedc0And a preset maximum value T of the bleeding timebThe correlation equation can be determined as follows:
in some embodiments, the breakdown voltage V between the collector and emitter of the insulated gate bipolar transistor TceCan be based on the charging voltage V at two ends of the capacitor C0 to be dischargedc0It is determined that the following correlation equation exists:
Vce≥1.5×Vc0
in some embodiments, the current resistance I of the IGBT TceCan be based on the charging voltage V at two ends of the capacitor C0 to be dischargedc0And the resistance R of the bleeder resistor R11It is determined that the following equation:
in some embodiments, the capacitance value C of the first capacitor C11Can be determined according to the capacity value C at two ends of the capacitor C0 to be discharged0Resistance R of discharge resistor R11And a predetermined resistance value RTDetermination of RTThe value of 100K ohm can be obtained, and the following formula is provided:
in combination with the bleeder circuit described in the above embodiments, the present embodiment provides a tank circuit. Fig. 6 is a schematic structural diagram of a tank circuit according to an embodiment of the present application, and as shown in fig. 6, the tank circuit includes apower supply circuit 201 and atank capacitor 202, thepower supply circuit 201 is electrically connected to thetank capacitor 202, one end of thepower supply circuit 201 is electrically connected to apower supply 304, and the other end is electrically connected to thetank capacitor 202; the tank circuit further includes thebleeder circuit 100 as described in any of the above embodiments, wherein thebleeder circuit 100 is electrically connected between thepower supply circuit 201 and thetank capacitor 202.
The energy storage circuit can implement the function of the bleeder circuit implemented in any of the above embodiments, and will not be described herein again.
In some embodiments, theenergy storage capacitor 202 may be a high voltage dc bus capacitor with a large capacitance value, which can store high-capacity charge to provide required energy for semiconductor testing. When the test equipment is powered off, the energy storage circuit in the related art is usually equipped with a UPS power supply to provide power for the transistor used for controlling the discharging after the test equipment is powered off. The energy storage circuit of the embodiment does not need to be equipped with a UPS, so that on one hand, the problem of low reliability of the energy storage circuit in the related technology is solved, and the reliability of the energy storage circuit is improved; on the other hand, a UPS power supply is abandoned, an energy storage loop with low cost, small volume and high flexibility is realized, and an energy storage function with low power consumption, high speed and high reliability is realized.
The present embodiment provides a semiconductor test system with the bleeder circuit and the tank circuit described in conjunction with the above embodiments. Fig. 7 is a schematic structural diagram of a semiconductor test system according to an embodiment of the present application, and as shown in fig. 7, the system includes: the semiconductor device testing system comprises aninterface module 301, acontrol module 302, atesting module 303 and apower supply 304, wherein theinterface module 301 is electrically connected with thecontrol module 302, thecontrol module 302 is electrically connected with thetesting module 303, and thepower supply 304 is electrically connected with theinterface module 301, thecontrol module 302 and thetesting module 303 respectively, wherein theinterface module 301 is used for receiving information input by a user or feeding back information to the user, thecontrol module 302 is used for controlling thetesting module 303, and thetesting module 303 is used for testing thesemiconductor device 400; the system further comprises theenergy storage circuit 200 as described in any of the above embodiments, theenergy storage circuit 200 is electrically connected to thecontrol module 302, thetesting module 303 and thepower supply 304, respectively, and theenergy storage circuit 200 is used for supplying power to thetesting module 303.
The semiconductor test system can implement the functions described in any of the above embodiments, and will not be described herein again. The semiconductor Test system includes an Automatic Test Equipment (ATE for short), and a user may interact with the ATE through aninterface module 301 and control theTest module 303 and theenergy storage circuit 200 through acontrol module 302. Thetest module 303 is provided with a test Cable (Cable) for testing a semiconductor to be tested. Thetank circuit 200 provides the instantaneous power needed for testing to the test module and thepower supply 304 provides power to the entire ATE. By the semiconductor test system provided by the embodiment, on one hand, the problem of low reliability of automatic test equipment in the related technology is solved, and the reliability of the automatic test equipment is improved; on the other hand, a UPS power supply is abandoned, automatic test equipment with low cost, small volume and high flexibility is realized, and a test function with low power consumption, high speed and high reliability is realized.
In some embodiments, thecontrol module 302 is electrically connected to the switch unit 111 in thetank circuit 200, and thecontrol module 302 is configured to control an operating state of thetank circuit 200, where the operating state of thetank circuit 200 includes: and starting the discharging energy storage capacitor and stopping discharging the energy storage capacitor.
In this embodiment, theenergy storage circuit 200, by receiving the discharge starting instruction, enables the switch unit 111 to conduct the electrical path from thecharging module 110 to thetriode 120, thereby starting the discharge energy storage capacitor; and by receiving the bleeding stopping instruction, the switch unit 111 disconnects the electrical path from thecharging module 110 to thetransistor 120, thereby stopping bleeding the energy storage capacitor. Thecontrol module 302 may generate a start bleeding instruction or a stop bleeding instruction by receiving information input by a user; alternatively, thecontrol module 302 may further have a preset logic code built therein, where the logic code plans the bleeding start instruction and the bleeding stop instruction according to a preset flow, so that the semiconductor test system realizes bleeding automation.
In some embodiments, thecontrol module 302 may be any processor capable of controlling thetank circuit 200, such as a single chip, a Field Programmable Gate Array (FPGA), or the like. Fig. 8 is a schematic diagram of a hardware structure of a control module according to an embodiment of the present application, and as shown in fig. 8, the control module includes aprocessor 501 and amemory 502 storing computer program instructions.
Specifically, theprocessor 501 may include a Central Processing Unit (CPU), or A Specific Integrated Circuit (ASIC), or may be configured to implement one or more Integrated circuits of the embodiments of the present Application.
Memory 502 may include, among other things, mass storage for data or instructions. By way of example, and not limitation,memory 502 may include a Hard Disk Drive (Hard Disk Drive, abbreviated to HDD), a floppy Disk Drive, a Solid State Drive (SSD), flash memory, an optical Disk, a magneto-optical Disk, tape, or a Universal Serial Bus (USB) Drive or a combination of two or more of these.Memory 502 may include removable or non-removable (or fixed) media, where appropriate. Thememory 502 may be internal or external to the data processing apparatus, where appropriate. In a particular embodiment, thememory 502 is a Non-Volatile (Non-Volatile) memory. In particular embodiments,Memory 502 includes Read-Only Memory (ROM) and Random Access Memory (RAM). The ROM may be mask-programmed ROM, Programmable ROM (PROM), Erasable PROM (EPROM), Electrically Erasable PROM (EEPROM), Electrically rewritable ROM (earrom), or FLASH Memory (FLASH), or a combination of two or more of these, where appropriate. The RAM may be a Static Random-Access Memory (SRAM) or a Dynamic Random-Access Memory (DRAM), where the DRAM may be a Fast Page Mode Dynamic Random-Access Memory (FPMDRAM), an Extended data output Dynamic Random-Access Memory (eddram), a Synchronous Dynamic Random-Access Memory (SDRAM), and the like.
Thememory 502 may be used to store or cache various data files that need to be processed and/or used for communication, as well as possible computer program instructions executed by theprocessor 501.
Theprocessor 501 generates a start bleeding instruction or a stop bleeding instruction by reading and executing computer program instructions stored in thememory 502.
In some of these embodiments, the control module may also include acommunication interface 503 and abus 500. Theprocessor 501, thememory 502, and thecommunication interface 503 are connected via thebus 500 to complete communication therebetween.
Thecommunication interface 503 is used for implementing communication between modules, apparatuses, units and/or devices in the embodiments of the present application. Thecommunication interface 503 may also enable communication with other components such as: the data communication is carried out among external equipment, image/data acquisition equipment, a database, external storage, an image/data processing workstation and the like.
Thebus 500 includes hardware, software, or both to couple the components of the control modules to each other.Bus 500 includes, but is not limited to, at least one of: data Bus (Data Bus), Address Bus (Address Bus), Control Bus (Control Bus), Expansion Bus (Expansion Bus), and Local Bus (Local Bus). By way of example, and not limitation,Bus 500 may include an Accelerated Graphics Port (AGP) or other Graphics Bus, an Enhanced Industry Standard Architecture (EISA) Bus, a Front-Side Bus (Front Side Bus), an FSB (FSB), a Hyper Transport (HT) Interconnect, an ISA (ISA) Bus, an InfiniBand (InfiniBand) Interconnect, a Low Pin Count (LPC) Bus, a memory Bus, a microchannel Architecture (MCA) Bus, a PCI (Peripheral Component Interconnect) Bus, a PCI-Express (PCI-X) Bus, a Serial Advanced Technology Attachment (SATA) Bus, abbreviated VLB) bus or other suitable bus or a combination of two or more of these.Bus 500 may include one or more buses, where appropriate. Although specific buses are described and shown in the embodiments of the application, any suitable buses or interconnects are contemplated by the application.
The present embodiment further provides a bleeding method, which is applied to the semiconductor test system described in the above embodiments. Fig. 9 is a flow chart of a bleeding method according to an embodiment of the present application, as shown in fig. 9, the flow chart includes the steps of:
step S901, a power down signal for indicating power down of a power supply is acquired.
And S902, according to the power-down signal, controlling the switch unit to conduct an electric path between the charging module and the triode, so that the triode controls the discharging main body to discharge the capacitor to be discharged.
Referring to fig. 5 and 8, in the event of a DC power failure, the relay K loses its driving power and is forced to switch to a conducting state under the control of thecontrol module 302 to conduct the electrical path between the chargingmodule 110 and the igbt T, so that the igbt T and the first capacitor C1 are electrically connected, and the first diode D1 is driven by the energy stored in the first capacitor C1 to maintain the conducting state for a longer time, so that the charge accumulated in the capacitor C0 to be drained is drained. Through the steps, the problem of low reliability of the bleeder circuit in the related art is solved, and the reliability of the bleeder circuit is improved.
In some of these embodiments, the method further comprises: acquiring a discharge signal for indicating discharge of a capacitor to be discharged; according to the discharge signal, the control switch unit conducts an electric path between the charging module and the triode, so that the triode controls the discharge main body to discharge the discharge capacitor to be discharged.
By obtaining the bleed-off signal, thecontrol module 302 controls the relay K to be in a conducting state to conduct the electrical path from thecharging module 110 to the igbt T, so that the gate of the igbt T is connected to the DC power supply DC, and the bleed-off resistor R1 is controlled to bleed off.
In some of these embodiments, the method further comprises: obtaining a discharge stopping signal for indicating to stop discharging the capacitor to be discharged; according to the discharging stopping signal, the control switch unit disconnects the electric path between the charging module and the discharging module, so that the triode controls the discharging main body to stop discharging the capacitor to be discharged.
By obtaining the bleeding stopping signal, thecontrol module 302 controls the relay K to be in the off state to break the electrical path from thecharging module 110 to the igbt T, so that the gate of the igbt T is grounded and turned off, thereby stopping bleeding.
It should be noted that the steps shown in the above-mentioned flow chart or the flow chart of the drawing can be executed in a computer system such as a set of computer executable instructions.
In addition, by combining the energy storage capacitor discharge method in the above embodiments, the embodiments of the present application can provide a storage medium to implement. The storage medium having stored thereon a computer program; the computer program, when executed by a processor, implements any of the energy storage capacitor bleed-off methods in the above embodiments.
In summary, the bleeder circuit, the energy storage capacitor bleeder method, the energy storage circuit and the semiconductor test system provided by the embodiment of the present application have the following advantages:
(1) the problem of the reliability of bleeder circuit is low among the correlation technique is solved, bleeder circuit's reliability has been promoted.
(2) The UPS power supply is abandoned, the discharge loop with low cost, small volume and high flexibility is realized through the structure, and the discharge function with low power consumption, high speed and high reliability is realized.
(3) By a low-cost mode, on the premise of not sacrificing the discharge speed, the safe and reliable discharge of the high-voltage large-capacitance energy storage capacitor is realized, and the safe and reliable discharge of the energy stored by the discharged high-voltage large-capacitance energy storage capacitor under the condition of abnormal power failure can be met.
It should be understood by those skilled in the art that various features of the above-described embodiments can be combined in any combination, and for the sake of brevity, all possible combinations of features in the above-described embodiments are not described in detail, but rather, all combinations of features which are not inconsistent with each other should be construed as being within the scope of the present disclosure.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.