CN112162187A - Signal test system - Google Patents
Signal test systemDownload PDFInfo
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- CN112162187A CN112162187ACN202010956142.0ACN202010956142ACN112162187ACN 112162187 ACN112162187 ACN 112162187ACN 202010956142 ACN202010956142 ACN 202010956142ACN 112162187 ACN112162187 ACN 112162187A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
- G01R1/0416—Connectors, terminals
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
- G01R31/2808—Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
Translated fromChinese
Description
Technical Field
The invention relates to the field of signal testing, in particular to a signal testing system.
Background
An MXM (Peripheral Component Interconnect Express) interface is a device interface designed for a graphics processor based on a PCIe (Peripheral Component Interconnect Express) interface, and the signal quality of a PCIe signal in the MXM interface on a motherboard may be problematic for various reasons, but no mature signal testing system in the prior art can test the signal quality of the PCIe signal in the MXM interface, so that the signal quality problem of the PCIe signal cannot be found in time, and the normal use of the graphics processor is affected.
Therefore, how to provide a solution to the above technical problem is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a signal testing system which can test the signal quality of a PCIe signal to be tested, can find the problem of the signal quality of the PCIe signal in time, ensures the signal integrity of a PCIe link of the system to be tested and ensures the normal use of a graphics processor.
In order to solve the above technical problem, the present invention provides a signal testing system, including:
the special PCIe signal interface MXM interface with the first end suspended for the switching graphics processor is used for connecting with the MXM interface to be tested on the mainboard to be tested;
the first end of the connecting wire is connected with the second end of the switching MXM interface, the second end of the connecting wire is connected with the connector, and the connecting wire is used for connecting each signal in the to-be-tested MXM interface to the connector in a one-to-one correspondence manner;
the connectors are used for respectively providing connection ports of signal channels in the MXM interface to be tested corresponding to the connectors;
and the signal acquisition device is connected with the connector and used for acquiring the PCIe signal to be tested output by the MXM interface to be tested so as to test the PCIe signal of the high-speed serial computer expansion bus to be tested.
Preferably, the signal testing system further comprises:
the code pattern switching device is used for being connected with the connector corresponding to the appointed signal receiving channel and sending a code pattern switching signal to the appointed signal receiving channel through the code pattern switching device, so that the mainboard to be tested can output a PCIe signal to be tested with the appointed code pattern through the signal sending channel to be tested corresponding to the signal receiving channel;
the signal acquisition device is connected with the connector corresponding to the signal sending channel to be tested and the connector corresponding to the clock signal channel respectively, and is used for acquiring the PCIe signal to be tested, of which the signal sending channel to be tested outputs the appointed code pattern, so as to test the PCIe signal to be tested.
Preferably, the signal testing system further comprises:
and the processing device is connected with the signal acquisition device and used for analyzing the waveform of the PCIe signal to be tested by adopting preset analysis software so as to obtain a signal quality test result of the PCIe signal to be tested.
Preferably, the signal testing system further comprises:
and the memory is connected with the processing device and used for storing the waveform of the PCIe signal to be tested.
Preferably, the signal testing system further comprises:
and the prompter is connected with the processing device and used for prompting the signal quality test result under the control of the processing device.
Preferably, the whole of the signal acquisition device, the processing device, the memory and the prompter is an oscilloscope.
Preferably, the preset analysis software is Sigtest.
Preferably, the connector is an SMP connector or an SMA connector.
Preferably, the code pattern switching device is a common logic board CLB board.
The invention provides a signal testing system, wherein a switching MXM interface and a connecting wire in the signal testing system can smoothly connect each signal in an MXM interface to be tested to a connector in a one-to-one correspondence manner, and a signal acquisition device can acquire a PCIe signal to be tested output by the MXM interface to be tested through the connector by being connected with the connector, so that the signal quality of the PCIe signal to be tested can be tested, the signal quality problem of the PCIe signal can be found in time, the signal integrity of a PCIe link of the system to be tested is ensured, and the normal use of a graphic processor is ensured.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic diagram of a signal testing system according to the present invention;
FIG. 2 is a schematic view of a connector arrangement according to the present invention;
fig. 3 is a schematic structural diagram of another signal testing system provided by the present invention.
Detailed Description
The core of the invention is to provide a signal testing system, which can realize the test of the signal quality of the PCIe signal to be tested, can find the problem of the signal quality of the PCIe signal in time, ensure the signal integrity of a PCIe link of the system to be tested and ensure the normal use of a graphic processor.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a signal testing system provided in the present invention, the signal testing system including:
a PCIe signal interface MXM interface 1 with a first end suspended special for the switching graphics processor, which is used for connecting with an MXM interface to be tested on a mainboard to be tested;
the connectingwire 2 is used for connecting each signal in the MXM interface to be tested to theconnector 3 in a one-to-one correspondence manner, and the first end of the connectingwire 2 is connected with the second end of the switching MXM interface 1;
theconnectors 3 are used for respectively providing connection ports of signal channels in the MXM interfaces to be tested corresponding to the connectors;
and thesignal acquisition device 4 is connected with theconnector 3 and is used for acquiring the PCIe signal to be tested output by the MXM interface to be tested so as to test the PCIe signal of the high-speed serial computer expansion bus to be tested.
Specifically, in view of the technical problems in the background art as described above and in view of the different PCIe interfaces from the conventional PCIe interface, the MXM interface has a special shape, which can achieve the effect of reducing the size of the graphics processor, but at the same time, the problem that the PCIe signal in the MXM interface cannot be tested by using the conventional test system is also brought, so the signal test system in the embodiment of the present invention first includes a transit MXM interface 1, which is an MXM interface for transit, and it can be connected to the MXM interface to be tested, and functions to directly form a data connection path with the MXM interface to be tested, and then since the transit MXM interface 1 is convenient to wire, the transit MXM interface 1 and theconnector 3 can be connected by the connectingwire 2, so as to achieve the purpose of connecting each signal in the MXM interface to be tested to theconnector 3 one-to-one, in this way, eachconnector 3 corresponds to a connection port providing a signal channel corresponding to theconnector 3, and the signal in the signal channel corresponding to theconnector 3 can be acquired by connecting with the designatedconnector 3, so that thesignal acquisition device 4 can acquire the PCIe signal to be tested output by the MXM interface to be tested from theconnector 3, so as to test the PCIe signal of the high-speed serial computer expansion bus to be tested.
The manufacturing steps of the signal testing system in the application can comprise six parts, namely schematic diagram design, signal integrity simulation, Layout design, board beating, test verification and application, and because the signal testing system in the application is used for testing, firstly, the transmission of signals on a jig is ensured not to influence the signals, and according to the requirements of PCIe relevant specifications, the attenuation of a signal line of the jig is not more than 2 dB.
Specifically, a reasonable wiring rule can be specified according to a simulation result, wiring design is strictly carried out according to a Layout rule, a PCB manufacturer carries out board beating after the Layout design of the Layout is completed, tests such as impedance and Loss can be carried out after the board beating is completed, and the jig is ensured to meet the requirements of specification and design. And finally, connecting a signal test system with the equipment to be tested through the switching MXM interface 1, connecting the signal test system with an oscilloscope through an SMA-SMP cable, and carrying out test after the connection is finished.
Specifically, for better explaining the embodiment of the present invention, please refer to fig. 2, and fig. 2 is a distribution diagram of theconnectors 3 provided by the present invention, as shown in fig. 2, a signal path corresponding to eachconnector 3 in the present application mainly includes three parts, namely a signal output path, a signal receiving path, and a clock signal path, since the test for the MXM interface to be tested of the X16 path is shown in fig. 2, the signal output paths in fig. 2 are 16 groups (Tx path in fig. 2), the signal receiving paths are also 16 groups (Rx path in fig. 2), and the clock signal paths are one group (CLK path), since the PCIe signal can be led out through the connector 3 (e.g. SMP connector) in the present application, no other device is required to be added on the signal transmission path except for theconnector 3, so as to ensure the authenticity of the led-out signal.
Specifically, the number of the connectinglines 2 may be multiple, and each of the connectinglines 2 may be responsible for correspondingly connecting one signal channel in the transit MXM interface 1 to oneconnector 3, and the form of the connecting line may be multiple types, for example, the form of a trace on a PCB may be used, and the wiring manner may be multiple types, which is not limited herein.
Specifically, in the signal testing system in the embodiment of the present invention, theconnector 3 may provide a PCIe signal interface in the MXM interface to be tested to thesignal obtaining apparatus 4, and theconnector 3 and thesignal obtaining apparatus 4 may be connected by multiple types of cables, for example, by an SMP-SMA cable, so as to meet the relevant testing standard.
The MXM interface to be tested may be an MXM interface with a plurality of channels, for example, an MXM interface with an X16 channel, and the MXM interface may include 16 signal input channels and 16 signal output channels, and the embodiments of the present invention are not limited herein.
The invention provides a signal testing system, wherein a switching MXM interface and a connecting wire in the signal testing system can smoothly connect each signal in an MXM interface to be tested to a connector in a one-to-one correspondence manner, and a signal acquisition device can acquire a PCIe signal to be tested output by the MXM interface to be tested through the connector by being connected with the connector, so that the signal quality of the PCIe signal to be tested can be tested, the signal quality problem of the PCIe signal can be found in time, the signal integrity of a PCIe link of the system to be tested is ensured, and the normal use of a graphic processor is ensured.
For better explaining the embodiment of the present invention, please refer to fig. 3, fig. 3 is a schematic structural diagram of another signal testing system provided by the present invention, and on the basis of the above embodiment:
as a preferred embodiment, the signal testing system further comprises:
the codepattern switching device 5 is used for being connected with theconnector 3 corresponding to the appointed signal receiving channel and sending a code pattern switching signal to the appointed signal receiving channel through the code pattern switching device, so that the mainboard to be tested can output a PCIe signal to be tested with the appointed code pattern through the signal sending channel to be tested corresponding to the signal receiving channel;
thesignal acquiring device 4 is connected to theconnector 3 corresponding to the signal sending channel to be tested and theconnector 3 corresponding to the clock signal channel, respectively, and is configured to acquire the PCIe signal to be tested whose code pattern is output by the signal sending channel to be tested, so as to test the PCIe signal to be tested.
Specifically, the signal test on the MXM interface to be tested is actually a test on PCIe signals output by each group of signal output channels in the MXM interface to be tested, in the embodiment of the present invention, a plurality of rate levels of each group of signal output channels may be respectively tested, and signal patterns at each rate level are different, so that the codepattern switching device 5 may control the MXM interface to be tested to switch the code patterns of the output signals, thereby completing the test on PCIe signals at different rate levels of the signal output channels.
There may be many rate levels, for example, 1.0, 2.0, 3.0 rate, etc., and there is one code pattern in the 1.0 rate level, two code patterns in the 2.0 rate level, and many code patterns in the 3.0 rate level, but only one code pattern, preset 7, may be tested for the 3.0 rate level during the test, and the embodiment of the present invention is not limited thereto.
It should be noted that, in the specific test, each time the PCIe signal output by one of the signal output channels is tested, for example, when the PCIe signal output by the Tx0+ and Tx0 — in fig. 2 is tested, thesignal obtaining apparatus 4 may be connected to the Tx0+ and Tx0 — in fig. 2, theconnector 3, and the CLK + and CLK — in this case, and the codepattern switching apparatus 5 may be connected to the Rx0+ or Rx 0-connector 3.
As a preferred embodiment, the signal testing system further comprises:
and the processing device is connected with thesignal acquisition device 4 and is used for analyzing the waveform of the PCIe signal to be tested by adopting preset analysis software so as to obtain a signal quality test result of the PCIe signal to be tested.
Specifically, in order to facilitate rapid detection of the signal quality of the PCIe signal to be detected, in the embodiment of the present invention, the waveform of the PCIe signal to be detected may be analyzed by the processing device using the preset analysis software, so as to obtain a signal quality test result for the PCIe signal to be detected.
As a preferred embodiment, the signal testing system further comprises:
and the memory is connected with the processing device and used for storing the waveform of the PCIe signal to be tested.
Specifically, in order to facilitate a worker to call the waveform of the PCIe signal when needed, in the embodiment of the present invention, the memory is configured to store the waveform of the PCIe signal to be tested, so that the worker can directly call the waveform data in the signal test process of the MXM interface to be tested at a certain time and perform related analysis when needed.
As a preferred embodiment, the signal testing system further comprises:
and the prompter is connected with the processing device and used for prompting the signal quality test result under the control of the processing device.
Specifically, in order to facilitate the staff to know the signal quality test result quickly, the signal quality test result can be prompted at the first time through the prompter in the application, so that the staff does not need to actively acquire the signal quality test result and then check the signal quality test result, and the working efficiency is improved.
Of course, the waveform can also be prompted through the prompter, so that workers can conveniently check the waveform in real time to perform manual analysis and the like.
As a preferred embodiment, the whole of thesignal acquiring device 4, the processing device, the memory and the prompter is an oscilloscope.
Specifically, the oscilloscope has the advantages of powerful function, high accuracy, strong stability and the like.
Of course, thesignal acquiring device 4, the processing device, the memory and the prompter may be of other specific types besides the oscilloscope, and the embodiment of the present invention is not limited herein.
As a preferred embodiment, the analysis software is preset to Sigtest.
Specifically, the Sigtest has the advantages of high accuracy, strong stability, high processing speed and the like.
Of course, the preset analysis software may be of other types besides Sigtest, and the embodiment of the present invention is not limited herein.
As a preferred embodiment, theconnector 3 is an SMP connector or an SMA connector.
Specifically, the SMP connector and the SMA connector both have the advantages of small volume, simple structure, low cost and the like.
Of course, theconnector 3 may be of various types other than the SMP connector or the SMA connector, and the embodiment of the present invention is not limited herein.
As a preferred embodiment, the codepattern switching device 5 is a CLB (Common Logic Board) Board.
Specifically, the test fixture CLB board through conventional PCIe interface itself can be used for sending the code pattern switching signal, so that the CLB board can be used as the codepattern switching device 5, the use is convenient and fast, the sending of the code pattern switching signal through a computer and other equipment is not needed, and the working efficiency is improved.
When the CLB board is connected to theconnector 3, the CLB board can be connected to theconnector 3 in the signal testing system through itsown J85 connector 3.
Of course, the codetype switching device 5 may be of other types besides the CLB board, and the embodiment of the present invention is not limited herein.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. A signal testing system, comprising:
the special PCIe signal interface MXM interface with the first end suspended for the switching graphics processor is used for connecting with the MXM interface to be tested on the mainboard to be tested;
the first end of the connecting wire is connected with the second end of the switching MXM interface, the second end of the connecting wire is connected with the connector, and the connecting wire is used for connecting each signal in the to-be-tested MXM interface to the connector in a one-to-one correspondence manner;
the connectors are used for respectively providing connection ports of signal channels in the MXM interface to be tested corresponding to the connectors;
and the signal acquisition device is connected with the connector and used for acquiring the PCIe signal to be tested output by the MXM interface to be tested so as to test the PCIe signal of the high-speed serial computer expansion bus to be tested.
2. The signal testing system of claim 1, further comprising:
the code pattern switching device is used for being connected with the connector corresponding to the appointed signal receiving channel and sending a code pattern switching signal to the appointed signal receiving channel through the code pattern switching device, so that the mainboard to be tested can output a PCIe signal to be tested with the appointed code pattern through the signal sending channel to be tested corresponding to the signal receiving channel;
the signal acquisition device is connected with the connector corresponding to the signal sending channel to be tested and the connector corresponding to the clock signal channel respectively, and is used for acquiring the PCIe signal to be tested, of which the signal sending channel to be tested outputs the appointed code pattern, so as to test the PCIe signal to be tested.
3. The signal testing system of claim 2, further comprising:
and the processing device is connected with the signal acquisition device and used for analyzing the waveform of the PCIe signal to be tested by adopting preset analysis software so as to obtain a signal quality test result of the PCIe signal to be tested.
4. The signal testing system of claim 3, further comprising:
and the memory is connected with the processing device and used for storing the waveform of the PCIe signal to be tested.
5. The signal testing system of claim 4, further comprising:
and the prompter is connected with the processing device and used for prompting the signal quality test result under the control of the processing device.
6. The signal testing system of claim 5, wherein the signal acquisition device, the processing device, the memory, and the prompter are integrated into an oscilloscope.
7. The signal testing system of claim 4, wherein the predetermined analysis software is Sigtest.
8. The signal testing system of claim 2, wherein the connector is an SMP connector or an SMA connector.
9. The signal testing system of any one of claims 2 to 8, wherein the pattern switching means is a common logic board CLB board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202010956142.0ACN112162187A (en) | 2020-09-11 | 2020-09-11 | Signal test system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010956142.0ACN112162187A (en) | 2020-09-11 | 2020-09-11 | Signal test system |
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| CN112162187Atrue CN112162187A (en) | 2021-01-01 |
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| CN202010956142.0APendingCN112162187A (en) | 2020-09-11 | 2020-09-11 | Signal test system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113014339A (en)* | 2021-02-20 | 2021-06-22 | 山东英信计算机技术有限公司 | Quality test method, device and equipment for PCIe external plug-in card receiving channel |
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