CN112134138A - High-power vcsel chip and preparation method thereof - Google Patents

Abstract

The invention discloses a high-power vcsel chip and a preparation method thereof. The method comprises the following steps: a substrate; the buffer layer, the N-type Bragg reflector, the resonant cavity, the oxide layer and the P-type Bragg reflector are sequentially grown on the substrate; the channel is arranged at the bottom of the chip or the area of the bottom of the chip except for the light-emitting area; a metal film disposed on a surface of the channel. According to the high-power vcsel chip disclosed by the embodiment of the invention, the channel is arranged at the bottom of the chip to increase the heat dissipation area of the chip, the metal film with high thermal conductivity is arranged on the surface of the channel, and the heat of the chip is conducted out through the metal film on the surface of the channel of the chip, so that the heat dissipation efficiency is improved, the heat dissipation capacity of the chip is increased, and the performance and the service life of the chip are improved. The chip adopting the invention has lower temperature, higher output power and better performance than the common chip when in normal work.

Description

High-power vcsel chip and preparation method thereof

Technical Field

The invention relates to the fields of photoelectrons, microelectronics and power device technology, in particular to a high-power vcsel chip and a preparation method thereof.

Background

With the rapid development of electronic technology and high-power semiconductor laser technology in recent years, various electronic devices and semiconductor laser chip packages are gradually developed towards miniaturization and high power, so that the heat flux density generated inside components is rapidly increased, and the service life and reliability of the components are greatly influenced. Meanwhile, the problems of energy consumption and heat dissipation of the chip are also highlighted, the heating power and the power density of the semiconductor laser are increased sharply, if the heat dissipation is poor, the generated overhigh temperature not only can reduce the working stability of the chip, but also can generate overlarge thermal stress due to overlarge temperature difference between the inside of the module and the external environment, and the electrical property, the working frequency, the mechanical strength and the reliability of the chip are influenced. Particularly, a VCSEL chip is a vertical-cavity surface emitting laser, the cavity length is shorter, the heat dissipation of the chip is more important, the VCSEL chip is generally packaged on a DPC ceramic substrate made of a high-conductivity aluminum nitride material at present, so that the thermal resistance of the chip is high, and growing a high-quality high-thermal-conductivity substrate is also a big difficulty.

Disclosure of Invention

The present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, the invention aims to provide a high-power vcsel chip and a preparation method thereof. Various channels are etched at the bottom of the chip, and the surface of each channel is plated with a metal film with high thermal conductivity, so that the heat dissipation capacity of the chip is improved, and the heat dissipation capacity of the chip is greatly improved.

In one aspect of the invention, a high power vcsel chip is provided. According to an embodiment of the invention, the high power vcsel chip comprises:

a substrate;

the buffer layer, the N-type Bragg reflector, the resonant cavity, the oxide layer and the P-type Bragg reflector are sequentially grown on the substrate;

the channel is arranged in the region of the bottom of the chip except for the light-emitting region, and the depth of the channel does not exceed the depth of the P-type Bragg reflector;

a metal film disposed on a surface of the trench or filled in the trench.

According to the high-power vcsel chip disclosed by the embodiment of the invention, the channel is arranged at the bottom of the chip to increase the heat dissipation area of the chip, the metal film with high thermal conductivity is arranged on the surface of the channel, and the heat of the chip is conducted out through the metal film on the surface of the channel of the chip, so that the heat dissipation efficiency is improved, the heat dissipation capacity of the chip is increased, and the heat dissipation capacity of the chip is greatly improved. The chip adopting the invention has lower temperature, higher output power and better performance than the common chip when in normal work.

In addition, the high-power vcsel chip according to the above embodiment of the present invention may also have the following additional technical features:

in some embodiments of the invention, the depth of the trench does not exceed the N-type bragg mirror.

In some embodiments of the present invention, the depth of the trench does not exceed the thickness of the substrate and is not less than 3/4 of the substrate thickness.

In some embodiments of the invention, the metal is gold, titanium or platinum. Therefore, the metal film has high thermal conductivity, and the heat dissipation capacity of the chip is further improved.

In some embodiments of the invention, the channel comprises at least one annular channel disposed along a periphery of the light emitting region. Therefore, the heat dissipation capacity of the chip is further improved.

In some embodiments of the present invention, the channel comprises a plurality of deep-well channels arranged in a circle along the periphery of the light-emitting region. Therefore, the heat dissipation capacity of the chip is further improved.

In some embodiments of the invention, the channels comprise a plurality of sets of deep-well channels, each set comprising 2-4 deep-well channels. Therefore, the heat dissipation capacity of the chip is further improved.

In some embodiments of the invention, the deep well channel has a circular or polygonal cross-section.

In another aspect of the present invention, the present invention provides a method for preparing the above high power vcsel chip, including:

(1) etching the area of the bottom of the chip except the light-emitting area so as to obtain a channel;

(2) and plating a metal film on the surface of the channel or filling metal in the channel so as to obtain the high-power vcsel chip.

According to the method for preparing the high-power vcsel chip, disclosed by the embodiment of the invention, various channels are etched at the bottom of the chip, the heat dissipation area of the chip is increased, the metal film with high thermal conductivity is plated in the channels, and the heat of the chip is conducted out through the metal film on the surface of the chip channels, so that the heat dissipation capacity of the chip is increased, and the heat dissipation capacity of the chip is greatly improved by matching with the substrate with high thermal conductivity. The chip prepared by the method has lower temperature, higher output power and better performance than the common chip in normal work.

In a third aspect of the invention, the invention provides a high power vcsel chip. According to an embodiment of the invention, the high power vcsel chip comprises:

a substrate;

the buffer layer, the N-type Bragg reflector, the resonant cavity, the oxide layer and the P-type Bragg reflector are sequentially grown on the substrate;

the channel is arranged at the bottom of the chip, the depth of the channel arranged in a light-emitting area does not exceed the thickness of the substrate, and the depth of the channel arranged in a non-light-emitting area does not exceed the depth of the P-type Bragg reflector;

a metal film disposed on a surface of the trench or filled in the trench.

According to the high-power vcsel chip disclosed by the embodiment of the invention, the channel is arranged at the bottom of the chip to increase the heat dissipation area of the chip, the metal film with high thermal conductivity is arranged on the surface of the channel, and the heat of the chip is conducted out through the metal film on the surface of the channel of the chip, so that the heat dissipation efficiency is improved, the heat dissipation capacity of the chip is increased, and the heat dissipation capacity of the chip is greatly improved. The chip adopting the invention has lower temperature, higher output power and better performance than the common chip when in normal work. If the depth of the channel exceeds the depth of the substrate, the reflectivity of the N-side Bragg reflector can be influenced after the epitaxial layer is reached, so that light leakage of the chip on the side is caused, and the light extraction efficiency is influenced.

In addition, the high-power vcsel chip according to the above embodiment of the present invention may also have the following additional technical features:

in some embodiments of the present invention, the depth of the trench disposed in the non-light emitting region does not exceed the N-type bragg mirror.

In some embodiments of the present invention, the depth of the trench disposed in the non-light emitting region is not more than 3/4 the substrate and is not less than the thickness of the substrate.

In some embodiments of the present invention, the depth of the trench disposed in the light emitting region is not less than 3/4 the thickness of the substrate.

In some embodiments of the invention, the metal is gold or titanium or platinum. Therefore, the metal film has high thermal conductivity, and the heat dissipation capacity of the chip is further improved.

In some embodiments of the present invention, the channel comprises at least two annular channels, at least one annular channel disposed along a periphery of the light emitting region, at least one annular channel disposed within the light emitting region. Therefore, the heat dissipation capacity of the chip is further improved.

In some embodiments of the present invention, the trench includes a plurality of deep-well trenches, wherein a portion of the deep-well trenches are arranged in a circle along the light emitting region, and other deep-well trenches are disposed in the light emitting region. Therefore, the heat dissipation capacity of the chip is further improved.

In some embodiments of the invention, the deep well channel has a circular or polygonal cross-section.

In a fourth aspect of the present invention, the present invention provides a method for preparing the above high power vcsel chip, including:

(3) etching the bottom of the chip to obtain a channel;

(4) and plating a metal film on the surface of the channel or filling metal in the channel so as to obtain the high-power vcsel chip.

According to the method for preparing the high-power vcsel chip, disclosed by the embodiment of the invention, various channels are etched at the bottom of the chip, the heat dissipation area of the chip is increased, the metal film with high thermal conductivity is plated in the channels, and the heat of the chip is conducted out through the metal film on the surface of the chip channels, so that the heat dissipation capacity of the chip is increased, and the heat dissipation capacity of the chip is greatly improved by matching with the substrate with high thermal conductivity. The chip prepared by the method has lower temperature, higher output power and better performance than the common chip in normal work.

In a fifth aspect of the invention, the invention provides a VCSEL array chip. According to an embodiment of the invention, the VCSEL array chip has a high power VCSEL chip as described above. Therefore, compared with the common array chip, the VCSEL array chip has the advantages of lower temperature, higher output power and better heat dissipation performance.

Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.

Drawings

The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

FIG. 1 is a cross-sectional schematic view of a high power vcsel chip according to an embodiment of the invention.

FIG. 2 is a schematic bottom-etched cross-section of a high power vcsel chip in accordance with one embodiment of the present invention.

FIG. 3 is a schematic bottom-etched cross-sectional view of a high power vcsel chip according to a second embodiment of the present invention.

FIG. 4 is a schematic bottom-etched cross-sectional view of a high power vcsel chip according to a third embodiment of the invention.

FIG. 5 is a bottom schematic view of a high power vcsel chip according to an embodiment of the invention.

FIG. 6 is a bottom schematic view of a high power vcsel chip according to a second embodiment of the present invention.

FIG. 7 is a bottom schematic view of a high power vcsel chip according to a third embodiment of the present invention.

FIG. 8 is a schematic bottom-etched cross-sectional view of a high power vcsel chip according to a fourth embodiment of the invention.

FIG. 9 is a schematic bottom-etched cross-sectional view of a high power vcsel chip according to a fifth embodiment of the present invention.

FIG. 10 is a schematic bottom-etched cross-sectional view of a high power vcsel chip according to a sixth embodiment of the invention.

FIG. 11 is a bottom schematic view of a high power vcsel chip according to a fourth embodiment of the present invention.

FIG. 12 is a bottom schematic view of a fifth embodiment of the high power vcsel chip of the present invention.

Figure 13 is a schematic diagram of a VCSEL array chip in accordance with an embodiment of the present invention.

Detailed Description

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, four, five, six, etc., unless specifically limited otherwise.

In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.

In one aspect of the invention, a high power vcsel chip is provided. Referring to fig. 1 and 2, according to an embodiment of the present invention, the high power vcsel chip includes: the structure comprises asubstrate 6, and abuffer layer 5, an N-type Bragg reflector 4, aresonant cavity 3, anoxide layer 2, a P-type Bragg reflector 1, achannel 8 and ametal film 9 which are sequentially grown on the substrate.

According to the embodiment of the present invention, the material of thesubstrate 6 is not particularly limited, and one skilled in the art can select the material at will according to actual needs.

According to the embodiment of the present invention, the buffer layer, the N-type bragg mirror, the resonant cavity, the oxide layer, and the P-type bragg mirror are not particularly limited and may be arbitrarily selected according to the related art in the field.

According to the embodiment of the invention, thechannel 8 is arranged at the bottom of the chip except for the light-emittingregion 7, and the depth of thechannel 8 does not exceed the depth of the P-type bragg reflector 1, which is shown in fig. 2. Thelight emitting region 7 is provided at an intermediate position of the chip, with reference to fig. 1-4. Preferably, the depth of thetrench 8 does not exceed the depth of the N-type bragg reflector 4, as shown in fig. 3. As another preferred solution, the depth of thetrench 8 does not exceed 3/4 the thickness of thesubstrate 6 and is not less than the thickness of the substrate, refer to fig. 4. If the depth of thechannel 8 exceeds the thickness of the substrate, the reflectivity of the Bragg reflector on the N side is influenced, and the light emitting power of the chip is reduced; if 3/4 is smaller than the thickness of the substrate, the substrate will be thinned during chip fabrication, the channel structure will be reduced, and the heat dissipation structure will not exist in the fabricated chip structure.

In the embodiment of the present invention, the specific structure of thechannel 8 is not particularly limited, and a person skilled in the art may optionally select the channel according to actual needs, as a preferred scheme, the channel includes at least one annular channel, and the annular channel is disposed along the periphery of the light emitting region, as shown in fig. 5, a circle of annular channel is etched in a region outside the light exit aperture at the bottom of the chip, so as to further improve the heat dissipation capability of the chip itself. As another preferable scheme, the channel includes a plurality of deep-well channels, the deep-well channels are circularly arranged along the periphery of the light emitting region, as shown in fig. 6, the deep-well channels are etched in a region outside the light exit aperture at the bottom of the chip, and thus, the heat dissipation capability of the chip is further improved. As another preferred scheme, the channels include multiple groups of deep-well channels, each group includes 2 to 4 deep-well channels, more preferably, each group includes 3 deep-well channels, as shown in fig. 7, 5 groups of deep-well channels are etched in a region outside the light-emitting aperture at the bottom of the chip, and each group includes 3 deep-well channels, and surrounds the oxide aperture, thereby further improving the heat dissipation capability of the chip itself. In the embodiment of the present invention, the shape of the cross section of the deep well channel is not particularly limited, and a person skilled in the art may optionally select the cross section according to actual needs, and as a preferable scheme, the cross section of the deep well channel is a circle or a polygon (for example, may be a triangle, a quadrangle, a pentagon, a hexagon, etc.).

According to the embodiment of the present invention, themetal film 9 is disposed on the surface of thetrench 8 or filled in thetrench 8, and the specific kind of metal is not particularly limited as long as it has high thermal conductivity, and can be arbitrarily selected by those skilled in the art according to actual needs, and as a preferable scheme, the metal is gold, titanium or platinum, and more preferably gold. Therefore, the metal film has high thermal conductivity, and the heat dissipation capacity of the chip is further improved. Metals such as copper and aluminum are easily oxidized, and thus, the performance of the chip is affected.

According to the high-power vcsel chip disclosed by the embodiment of the invention, the channel is arranged at the bottom of the chip to increase the heat dissipation area of the chip, the metal film with high thermal conductivity is arranged on the surface of the channel, and the heat of the chip is conducted out through the metal film on the surface of the channel of the chip, so that the heat dissipation efficiency is improved, the heat dissipation capacity of the chip is increased, and the heat dissipation capacity of the chip is greatly improved. The chip adopting the invention has lower temperature, higher output power and better performance than the common chip when in normal work.

In a second aspect of the present invention, the present invention provides a method for preparing the above high power vcsel chip, comprising:

s100: etching the area of the bottom of the chip except the light-emitting area so as to obtain a channel;

in this step, the area of the bottom of the chip except the light-emitting area is etched to obtain thetrench 8, and the specific method of etching is not particularly limited, and can be arbitrarily selected by those skilled in the art according to actual needs.

S200: and plating a metal film on the surface of the channel or filling metal in the channel so as to obtain the high-power vcsel chip.

In this step, ametal film 9 is plated on the surface of thechannel 8 or metal is filled in thechannel 8, so as to obtain a high-power vcsel chip. The specific method of plating the metal film or the filler metal is not particularly limited and may be arbitrarily selected by those skilled in the art according to the actual need.

According to the method for preparing the high-power vcsel chip, disclosed by the embodiment of the invention, various channels are etched at the bottom of the chip, the heat dissipation area of the chip is increased, the metal film with high thermal conductivity is plated in the channels, and the heat of the chip is conducted out through the metal film on the surface of the chip channels, so that the heat dissipation capacity of the chip is increased, and the heat dissipation capacity of the chip is greatly improved by matching with the substrate with high thermal conductivity. The chip prepared by the method has lower temperature, higher output power and better performance than the common chip in normal work.

In a third aspect of the invention, another high power vcsel chip is presented. Referring to fig. 1 and 3, according to an embodiment of the present invention, the high power vcsel chip includes: the structure comprises asubstrate 6, and abuffer layer 5, an N-type Bragg reflector 4, aresonant cavity 3, anoxide layer 2, a P-type Bragg reflector 1, achannel 8 and ametal film 9 which are sequentially grown on the substrate.

According to the embodiment of the present invention, the material of thesubstrate 6 is not particularly limited, and one skilled in the art can select the material at will according to actual needs.

According to the embodiment of the present invention, the buffer layer, the N-type bragg mirror, the resonant cavity, the oxide layer, and the P-type bragg mirror are not particularly limited and may be arbitrarily selected according to the related art in the field.

According to the embodiment of the invention, thetrench 8 is arranged at the bottom of the chip, the depth of thetrench 8 arranged in the light-emittingregion 7 does not exceed the thickness of thesubstrate 6, and the depth of thetrench 8 arranged in the non-light-emitting region does not exceed the depth of the P-type bragg reflector 1, and refer to fig. 8 and 9. As a preferable mode, the depth of the trench provided in the non-light emitting region does not exceed the N-type bragg reflector, refer to fig. 10. Preferably, the depth of the trench provided in the non-light emitting region is not more than 3/4 times the thickness of the substrate. Preferably, the depth of thetrench 8 provided in the light emitting region is not less than 3/4 the thickness of the substrate. If 3/4 is smaller than the thickness of the substrate, the substrate will be thinned during chip fabrication, the channel structure will be reduced, and the heat dissipation structure will not exist in the fabricated chip structure.

In the embodiment of the present invention, the specific structure of thetrench 8 is not particularly limited, and a person skilled in the art may optionally select the trench according to actual needs, as a preferred scheme, the trench includes at least two annular trenches, at least one annular trench is disposed along the periphery of the light emitting region, and at least one annular trench is disposed in the light emitting region, as shown in fig. 11, two annular trenches are etched at the bottom of the chip, and the trench in the light emitting aperture region is not etched to a depth exceeding the thickness of the substrate, so that the heat dissipation capability of the chip itself is further improved. As another preferable scheme, the trench includes a plurality of deep-well trenches, wherein a part of the deep-well trenches are circularly arranged along the light-emitting region, and other deep-well trenches are arranged in the light-emitting region, as shown in fig. 12, two circles of the deep-well trenches are etched at the bottom of the chip, and thus, the heat dissipation capability of the chip itself is further improved. In the embodiment of the present invention, the shape of the cross section of the deep well channel is not particularly limited, and a person skilled in the art may optionally select the cross section according to actual needs, and as a preferable scheme, the cross section of the deep well channel is a circle or a polygon (for example, may be a triangle, a quadrangle, a pentagon, a hexagon, etc.).

According to the embodiment of the present invention, themetal film 9 is disposed on the surface of thetrench 8 or filled in the trench, and the specific kind of metal is not particularly limited as long as it has high thermal conductivity, and can be arbitrarily selected by those skilled in the art according to actual needs, and as a preferable scheme, the metal is gold, titanium or platinum, and more preferably gold. Therefore, the metal film has high thermal conductivity, and the heat dissipation capacity of the chip is further improved. Metals such as copper and aluminum are easily oxidized, and thus, the performance of the chip is affected.

According to the high-power vcsel chip disclosed by the embodiment of the invention, the channel is arranged at the bottom of the chip to increase the heat dissipation area of the chip, the metal film with high thermal conductivity is arranged on the surface of the channel, and the heat of the chip is conducted out through the metal film on the surface of the channel of the chip, so that the heat dissipation efficiency is improved, the heat dissipation capacity of the chip is increased, and the heat dissipation capacity of the chip is greatly improved. The chip adopting the invention has lower temperature, higher output power and better performance than the common chip when in normal work. If the depth of the channel exceeds the depth of the substrate, the reflectivity of the N-side Bragg reflector can be influenced after the epitaxial layer is reached, so that light leakage of the chip on the side is caused, and the light extraction efficiency is influenced.

In a fourth aspect of the present invention, the present invention provides a method for preparing the above high power vcsel chip, including:

s300: etching the bottom of the chip to obtain a channel, wherein the depth of the channel etched in the light-emitting region does not exceed the thickness of the substrate;

in this step, etching is performed on the bottom of the chip to obtain atrench 8, the depth of the trench etched in the light-emittingregion 7 does not exceed the thickness of thesubstrate 6, the specific method of etching is not particularly limited, and those skilled in the art can select the trench at will according to actual needs.

S400: and plating a metal film on the surface of the channel or filling metal in the channel so as to obtain the high-power vcsel chip.

In this step, ametal film 9 is plated on the surface of thechannel 8 or metal is filled in thechannel 8, so as to obtain a high-power vcsel chip. The specific method of plating the metal film or the filler metal is not particularly limited and may be arbitrarily selected by those skilled in the art according to the actual need.

According to the method for preparing the high-power vcsel chip, disclosed by the embodiment of the invention, various channels are etched at the bottom of the chip, the heat dissipation area of the chip is increased, the metal film with high thermal conductivity is plated in the channels, and the heat of the chip is conducted out through the metal film on the surface of the chip channels, so that the heat dissipation capacity of the chip is increased, and the heat dissipation capacity of the chip is greatly improved by matching with the substrate with high thermal conductivity. The chip prepared by the method has lower temperature, higher output power and better performance than the common chip in normal work.

In a fifth aspect of the invention, the invention provides a VCSEL array chip. According to the embodiment of the invention, the VCSEL array chip is a high-power VCSEL chip as described above, as shown in fig. 13. Therefore, compared with the common array chip, the VCSEL array chip has the advantages of lower temperature, higher output power and better heat dissipation performance.

In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.

Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.

Claims (10)

1. A high power vcsel chip, comprising:

a substrate;

the buffer layer, the N-type Bragg reflector, the resonant cavity, the oxide layer and the P-type Bragg reflector are sequentially grown on the substrate;

the channel is arranged in the region of the bottom of the chip except for the light-emitting region, and the depth of the channel does not exceed the depth of the P-type Bragg reflector;

a metal film disposed on a surface of the trench or filled in the trench.

2. The high power vcsel chip of claim 1, wherein the depth of the channel does not exceed the N-type bragg reflector;

preferably, the depth of the channel is not more than 3/4 the substrate and not less than the thickness of the substrate;

optionally, the metal is gold, titanium or platinum.

3. The high power vcsel chip of claim 1, wherein the channel comprises at least one annular channel disposed along a periphery of the light emitting region.

4. The high power vcsel chip of claim 1, wherein the channel comprises a plurality of deep well channels arranged in a circle along a periphery of the light emitting region;

optionally, the channels comprise multiple groups of deep-well channels, each group comprising 2-4 deep-well channels;

optionally, the deep well channel is circular or polygonal in cross-section.

5. A method of preparing the high power vcsel chip of any of claims 1-4, comprising:

(1) etching the area of the bottom of the chip except the light-emitting area so as to obtain a channel;

(2) and plating a metal film on the surface of the channel or filling metal in the channel so as to obtain the high-power vcsel chip.

6. A high power vcsel chip, comprising:

a substrate;

the buffer layer, the N-type Bragg reflector, the resonant cavity, the oxide layer and the P-type Bragg reflector are sequentially grown on the substrate;

the channel is arranged at the bottom of the chip, the depth of the channel arranged in a light-emitting area is not more than that of the substrate, and the depth of the channel arranged in a non-light-emitting area is not more than that of the P-type Bragg reflector;

a metal film disposed on a surface of the trench or filled in the trench.

7. The high power vcsel chip according to claim 6, wherein the depth of the channel disposed in the non-light emitting region does not exceed the N-type bragg reflector;

preferably, 3/4 the depth of the channel disposed in the non-light emitting region is not more than the substrate and not less than the thickness of the substrate;

optionally, 3/4 the depth of the channel disposed in the light emitting region is not less than the thickness of the substrate;

optionally, the metal is gold or titanium or platinum.

8. The high power vcsel chip of claim 6, wherein the channel comprises at least two annular channels, at least one annular channel disposed along a periphery of the light emitting region, at least one annular channel disposed within the light emitting region;

optionally, the channel comprises a plurality of deep-well channels, wherein a part of the deep-well channels are circularly arranged along the light-emitting region, and other deep-well channels are arranged in the light-emitting region;

optionally, the deep well channel is circular or polygonal in cross-section.

9. A method of manufacturing the high power vcsel chip of any of claims 6-8, comprising:

(3) etching the bottom of the chip to obtain a channel;

(4) and plating a metal film on the surface of the channel or filling metal in the channel so as to obtain the high-power vcsel chip.

10. A VCSEL array chip having the high power VCSEL chip of any of claims 1-4 or any of claims 6-8.

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