Disclosure of Invention
The application provides a data read-write method and related equipment of a memory, which can maximize the utilization of NandFlash capacity, can accommodate more ECC redundant data, improve error correction capability and enhance NandFlash data stability.
The first aspect of the present application provides a data read-write method of a memory, including:
acquiring a read instruction or a write instruction aiming at a memory, wherein the read instruction or the write instruction corresponds to target data;
determining bad column position information of the memory, wherein the bad column position information of the memory indicates position information of a bit bad column in the memory;
and responding to the reading instruction or the writing instruction, and performing reading operation or writing operation on the target data according to the bad column position information.
Optionally, the determining bad column location information of the memory includes:
writing test data into the memory;
reading the data of the memory to obtain first data;
comparing the first data with the test data to determine the bit bad column position of each page in the memory;
and determining position information corresponding to a target bit position as bad column position information of the memory, wherein the target bit position is the bit position with the same bit bad column position in a plurality of pages in the memory.
Optionally, the method further comprises:
determining a byte bad column set of the memory and a bit bad column corresponding to each byte bad column in the byte bad column set according to the bad column position information;
generating a byte bad column template corresponding to the memory according to the byte bad column set of the memory;
and generating a bit bad column template corresponding to the memory according to the bit bad column corresponding to each byte bad column in the byte bad column set.
Optionally, the responding to the writing instruction, writing the target data according to the bad column position information includes:
retrieving the byte bad column template to determine a byte bad column set in the memory;
searching the bit bad column template to determine a first bit bad column corresponding to each byte bad column in the byte bad column set;
inserting the first bit bad column into invalid data to obtain a second bit bad column;
and reorganizing the target data and the data corresponding to the second bad bit column and writing the reorganized target data and the data into the memory.
Optionally, in response to the read instruction, performing a read operation on the target data according to the bad column position information includes:
retrieving the byte bad column template to determine a byte bad column set in the memory;
searching the bit bad column template to determine a third bit bad column corresponding to each byte bad column in the byte bad column set;
reading the target data according to the reading instruction, wherein the target data is the data stored in the memory and corresponding to the reading instruction;
and carrying out data recombination on the data except the data corresponding to the third bit bad column in the target data so as to finish the reading operation of the target data.
A second aspect of the present application provides a data read-write device of a memory, including:
an acquisition unit configured to acquire a read instruction or a write instruction for a memory, the read instruction or the write instruction corresponding to target data;
a determining unit configured to determine bad column position information of the memory, the bad column position information of the memory indicating position information of a bit bad column in the memory;
and the processing unit is used for responding to the reading instruction or the writing instruction and carrying out reading operation or writing operation on the target data according to the bad column position information.
Optionally, the determining unit is specifically configured to:
writing test data into the memory;
reading the data of the memory to obtain first data;
comparing the first data with the test data to determine the bit bad column position of each page in the memory;
and determining position information corresponding to a target bit position as bad column position information of the memory, wherein the target bit position is the bit position with the same bit bad column position in a plurality of pages in the memory.
Optionally, the apparatus further comprises:
a template generating unit for:
determining a byte bad column set of the memory and a bit bad column corresponding to each byte bad column in the byte bad column set according to the bad column position information;
generating a byte bad column template corresponding to the memory according to the byte bad column set of the memory;
and generating a bit bad column template corresponding to the memory according to the bit bad column corresponding to each byte bad column in the byte bad column set.
Optionally, the processing unit is specifically configured to:
retrieving the byte bad column template to determine a byte bad column set in the memory;
searching the bit bad column template to determine a first bit bad column corresponding to each byte bad column in the byte bad column set;
inserting the first bit bad column into invalid data to obtain a second bit bad column;
and reorganizing the target data and the data corresponding to the second bad bit column and writing the reorganized target data and the data into the memory.
Optionally, the processing unit is further specifically configured to:
retrieving the byte bad column template to determine a byte bad column set in the memory;
searching the bit bad column template to determine a third bit bad column corresponding to each byte bad column in the byte bad column set;
reading the target data according to the reading instruction, wherein the target data is the data stored in the memory and corresponding to the reading instruction;
and carrying out data recombination on the data except the data corresponding to the third bit bad column in the target data so as to finish the reading operation of the target data.
A third aspect of the present application provides a computer apparatus comprising at least one connected processor and memory, wherein the memory is configured to store program code that is loaded and executed by the processor to implement the steps of the data read/write method of the memory described above.
A fourth aspect of the present application provides a computer readable storage medium comprising instructions which, when run on a computer, cause the computer to perform the steps of the data read-write method of a memory described above.
To sum up, in the embodiment provided by the application, the bit bad column position information in the NandFlash is determined, and then the read-write operation of the data is performed according to the bit bad column position information, so that the NandFlash capacity can be utilized to the maximum, and meanwhile, when error correction is performed through ECC, more ECC redundant data can be accommodated, the error correction capability is improved, and the NandFlash data stability is enhanced.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application.
The terms first, second and the like in the description and in the claims of the present application and in the above-described figures, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments described herein may be implemented in other sequences than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or modules is not necessarily limited to those explicitly listed but may include other steps or modules not expressly listed or inherent to such process, method, article, or apparatus, such that the division of modules by such means may occur in the present application by only one logical division, such that a plurality of modules may be combined or integrated in another system, or some feature vectors may be omitted, or not implemented, and further such that the coupling or direct coupling or communication connection between such displayed or discussed modules may be through some interfaces, such that indirect coupling or communication connection between such modules may be electrical or other similar, none of which are intended to be limiting in this application. The modules or sub-modules described as separate components may or may not be physically separate, or may be distributed in a plurality of circuit modules, and some or all of the modules may be selected according to actual needs to achieve the purposes of the present application.
Referring to fig. 1, fig. 1 is a schematic flow chart of a data reading and writing method of a memory according to an embodiment of the present application, which includes:
101. a read instruction or a write instruction for the memory is acquired.
In this embodiment, the data read/write device of the memory obtains a read instruction or a write instruction for the memory, where the read instruction or the write instruction corresponds to the target data, that is, the read instruction is an instruction for reading the target data from the memory, and the write instruction is an instruction for writing the target data into the memory. The method for acquiring the read instruction or the write instruction for the memory is not particularly limited, and for example, when the user needs to read data from the memory or write data into the memory, the read instruction or the write instruction corresponding to the user may be received. It is understood that the memory may be NandFlash.
In one embodiment, the operation of generating the read command or the write command includes at least one of a gesture operation, a sliding operation, a clicking operation, and a voice-controlled operation, for example, when the user performs the clicking operation, the data read/write device of the memory may receive the clicking operation, where the clicking operation generates the read command or the write command, that is, the operation command may be defined in advance, for example, the sliding operation is defined in advance to read the corresponding data or write the corresponding data from the memory (such as a left sliding operation, a right sliding operation, an up sliding operation, and a down sliding operation, etc.), or the clicking operation is defined to read the corresponding data or write the corresponding data from the memory (such as a double clicking operation, a mouse sliding operation, a long pressing operation, a single clicking operation, a left and right mouse button, and a wheel mouse button, etc.), or the gesture operation is defined to read the corresponding data or write the corresponding data from the memory (such as a left swinging wrist or an arm, a right swinging operation, a three-finger sliding operation, etc.), or the voice-controlled operation is defined to display an image display area and/or a voice-controlled operation is defined to read the data or write the corresponding data (such as a voice-controlled operation is not to be generated). Of course, the read instruction or the write instruction may also be generated by setting a corresponding shortcut key on an input device, for example, the input device is a keyboard, and the "ctrl+a key" on the keyboard is set as an operation for generating the read instruction or the write instruction, which is not specifically limited.
102. Bad column location information of the memory is determined.
In this embodiment, the data read/write device of the memory may determine to take the bad column position information of the memory, that is, the data read/write device of the memory may determine the bad column position information of the memory in advance by writing data into the memory and reading the data, and store the bad column position information. The memory stores the position information of the bad columns corresponding to the memory, namely the position information corresponding to the bad columns of the bits in the memory.
In one embodiment, the data read/write device of the memory determines bad column location information of the memory includes:
writing test data into the memory;
reading data from the memory to obtain first data;
comparing the first data with the test data to determine the bit bad column position of each page in the memory;
and determining the position information corresponding to the target bit position as bad column position information of the memory, wherein the target bit position is the bit position with the same bit bad column position in a plurality of pages in the memory.
In this embodiment, the data read/write device of the memory may write test data into the memory, then read data from the memory to obtain first data, and then compare the first data with the test data to determine a bad bit column position of each page in the memory, and determine position information corresponding to a target bit position as bad bit column position information of the memory, where the target bit position is a bit position with the same bad bit column position in a plurality of pages in the memory. Here, a case where a memory is taken as NandFlash is described as an example, test data is written into NandFlash when NandFlash is scanned, then the NandFlash is read out, and error-occurring bad column position information is found by comparing an abnormality between the written test data and the read-out data. The data of the NandFlash is stored in memory cells in a bit mode, and generally, only one bit can be stored in one cell. These cells are connected in bit lines in 8 or 16 units to form the bit width of the NAND Device. These lines will reorganize pages, each Page 528 bytes, each 32 pages forming a Block, and NandFlash reads and writes data in Page units and erases data in Block units. For NandFlash, the bad column position information of different pages is slightly different, and here, the bad column position information of all pages in a block is combined, so that a position with a high probability of bad column is found (that is, a Flash block is provided with a plurality of pages, which positions in each page are erroneous through data writing and then reading, if errors occur in the same positions of a plurality of different pages, the positions are considered to be real bad columns, the plurality of pages can be, for example, 5 pages, or can be set according to actual conditions, and the memory is not limited specifically, for example, the memory comprises 100 pages, wherein, errors occur in the same a positions of 20 pages, then the position information corresponding to the a position is the bad column position information corresponding to the memory, the above is only for illustration, and is not limiting, and the position is determined to be the real bad column, so that the bad column position information of the memory is obtained.
In one embodiment, the data read/write device of the memory further performs the following operations after determining bad column location information of the memory:
determining a byte bad column set of the memory according to the bad column position information, wherein each byte bad column in the byte bad column set corresponds to a bit bad column;
generating a byte bad column template corresponding to the memory according to the byte bad column set of the memory;
and generating a bit bad column template corresponding to the memory according to the bit bad column corresponding to each byte bad column in the byte bad column set.
In this embodiment, the data read/write device of the memory may determine, according to the bad column position information of the memory, a byte bad column set of the memory and a bit bad column corresponding to each byte bad column in the byte bad column set, that is, after knowing the bad column position information in the memory, it may be known that an error occurs in a byte belonging to the memory and an error occurs in a bit in the byte, and then may generate, according to the byte bad column set of the memory, a byte bad column template corresponding to the memory, and generate, according to a bit bad column corresponding to each byte bad column in the byte bad column set, a bit bad column template corresponding to the memory.
Referring to fig. 2, fig. 2 is a schematic diagram of a byte bad column template and a bit bad column template provided in an embodiment of the present application, 201 in fig. 2 is a byte bad column template, and 202 is a bit bad column template. For each byte in memory, if one or more bits are bad columns, the byte is marked as a byte bad column, thereby forming a one-level byte bad column template. Each element in this byte bad column template represents a non-bad column with 0 and a bad column with 1, as in 201 of fig. 2. For each byte bad column in the memory, writing the information of each bit bad column in the byte into a new table to form a two-level bit bad column template. Each bit bad column data needs to represent 8 bits of information, such as 202 in fig. 2, but generally, the bit bad columns of NandFlash are regular, and according to the regularity, each element in the two-level bit bad column template can be formed by 1/2/4/8 bits. That is, there are how many byte bad columns in the memory, i.e. how many byte bad column templates are generated, each byte bad column template corresponding to one bit bad column template.
103. And responding to the read instruction or the write instruction, and performing read operation or write operation on the target data according to the bad column position information.
In this embodiment, the data read/write device of the memory may respond to the read command or the write command, and perform a read operation or a write operation on the target data according to the bad column position information. The following describes the read operation or write operation in detail:
1. write operation:
the data read-write device of the memory responds to the write-in instruction, and the writing operation of the target data according to the bad column position information comprises the following steps:
retrieving a byte bad column template to determine a byte bad column set in a memory;
searching a bit bad column template to determine a first bit bad column corresponding to each byte bad column in the byte bad column set;
inserting the first bad bit column into invalid data to obtain a second bad bit column;
and reorganizing the target data and the data corresponding to the second bad bit column and writing the reorganized target data and the data into the memory.
In this embodiment, when writing data, the data read/write device of the memory may determine the bit bad column by detecting the byte bad column template and the bit bad column template, then insert the invalid data into the bit bad column, and reorganize the target data and the data of the bit bad column after inserting the invalid data, and then write the reorganized target data and the data of the bit bad column into the memory, thereby completing writing the data. It can be understood that when the data read-write device of the memory retrieves the bad column template, firstly, data is read from the first-level byte bad column template, whether each byte is a bad column is judged, if so, then, data is sequentially read from the second-level bit bad column template, which bits of the byte are bad columns, finally, the byte bad column set and the bit bad columns corresponding to each byte bad column in the byte bad column combination are determined, then, invalid data is inserted into all bad column positions, after the invalid data are recombined with valid data to be written, the valid data are written into NandFlash, for example, the real valid data to be written into NandFlash is 0xff, but the bit 7 position is a bad column, then, the bit 7 position needs to be filled with dummy data (such as 0) for recombination, and the data actually written into NandFlash after recombination is 0x7f.
2. Reading operation:
the data read-write device of the memory responds to the read instruction, and reads the target data according to the bad column position information, and the method comprises the following steps:
retrieving a byte bad column template to determine a byte bad column set in a memory;
searching a bit bad column template to determine a third bit bad column corresponding to each byte bad column in the byte bad column set;
reading target data according to the reading instruction, wherein the target data is data corresponding to the reading instruction stored in a memory;
and carrying out data recombination on data except the data corresponding to the third bit bad column in the target data so as to finish the reading operation of the target data.
In this embodiment, when the data read/write device of the memory reads data from the memory, the bit bad column can be determined by detecting the byte bad column template and the bit bad column template, then the invalid data is inserted into the bit bad column, and the target data and the data of the bit bad column after the invalid data is inserted are recombined and written into the memory, so as to complete writing of the data. It can be understood that when the data read-write device of the memory retrieves the bad column template, firstly, data is read from the first-level byte bad column template, whether each byte is a bad column is judged, if so, the data is sequentially read from the second-level bit bad column template, which bits of the byte are bad columns, finally, the bit bad columns corresponding to each byte bad column in the byte bad column set and the byte bad column combination are determined, the target data is read from the NandFlash, then, the data of the read bit bad column positions are discarded, and after the rest data is recombined, the complete effective data is formed. For example, when data 0x7f is read from NandFlash, but the bit 7 position is a bad column, the data at the bit 7 position (here, 0) needs to be discarded to form 7 bits of valid data, and the 7 bits of valid data are combined with valid data at other positions to form final data entirely composed of valid data, and then the final data is subjected to ECC error correction. It will be understood that the target data is the data written by the write operation in step 1, and the target data includes invalid data in the bit bad column position corresponding to the memory.
To sum up, in the embodiment provided by the application, the bit bad column position information in the NandFlash is determined, and then the read-write operation of the data is performed according to the bit bad column position information, so that the NandFlash capacity can be utilized to the maximum, and meanwhile, when error correction is performed through ECC, more ECC redundant data can be accommodated, the error correction capability is improved, and the NandFlash data stability is enhanced.
The present application is described above in terms of a data reading/writing method of a memory, and is described below in terms of a data reading/writing device of a memory.
Referring to fig. 2, fig. 2 is a schematic diagram of a virtual structure of a data read-write device of a memory according to an embodiment of the present application, including:
an acquisition unit 201 for acquiring a read instruction or a write instruction for a memory, the read instruction or the write instruction corresponding to target data;
a determining unit 202 configured to determine bad column position information of the memory, the bad column position information of the memory indicating position information of a bit bad column in the memory;
and the processing unit 203 is configured to respond to the read instruction or the write instruction, and perform a read operation or a write operation on the target data according to the bad column position information.
Optionally, the determining unit 202 is specifically configured to:
writing test data into the memory;
reading the data of the memory to obtain first data;
comparing the first data with the test data to determine the bit bad column position of each page in the memory;
and determining position information corresponding to a target bit position as bad column position information of the memory, wherein the target bit position is the bit position with the same bit bad column position in a plurality of pages in the memory.
Optionally, the apparatus further comprises:
a template generating unit 204 for:
determining a byte bad column set of the memory and a bit bad column corresponding to each byte bad column in the byte bad column set according to the bad column position information;
generating a byte bad column template corresponding to the memory according to the byte bad column set of the memory;
and generating a bit bad column template corresponding to the memory according to the bit bad column corresponding to each byte bad column in the byte bad column set.
Optionally, the processing unit 203 is specifically configured to:
retrieving the byte bad column template to determine a byte bad column set in the memory;
searching the bit bad column template to determine a first bit bad column corresponding to each byte bad column in the byte bad column set;
inserting the first bit bad column into invalid data to obtain a second bit bad column;
and reorganizing the target data and the data corresponding to the second bad bit column and writing the reorganized target data and the data into the memory.
Optionally, the processing unit 203 is further specifically configured to:
retrieving the byte bad column template to determine a byte bad column set in the memory;
searching the bit bad column template to determine a third bit bad column corresponding to each byte bad column in the byte bad column set;
reading the target data according to the reading instruction, wherein the target data is the data stored in the memory and corresponding to the reading instruction;
and carrying out data recombination on the data except the data corresponding to the third bit bad column in the target data so as to finish the reading operation of the target data.
To sum up, in the embodiment provided by the application, the bit bad column position information in the NandFlash is determined, and then the read-write operation of the data is performed according to the bit bad column position information, so that the NandFlash capacity can be utilized to the maximum, and meanwhile, when error correction is performed through ECC, more ECC redundant data can be accommodated, the error correction capability is improved, and the NandFlash data stability is enhanced.
Fig. 4 is a schematic diagram of a server structure provided in an embodiment of the present application, where the server 400 may vary considerably in configuration or performance, and may include one or more central processing units (central processing units, CPU) 422 (e.g., one or more processors) and memory 432, one or more storage media 430 (e.g., one or more mass storage devices) storing applications 442 or data 444. Wherein memory 432 and storage medium 430 may be transitory or persistent storage. The program stored on the storage medium 430 may include one or more modules (not shown), each of which may include a series of instruction operations on a server. Still further, the central processor 422 may be configured to communicate with the storage medium 430 and execute a series of instruction operations in the storage medium 430 on the server 400.
The server 400 may also include one or more power supplies 426, one or more wired or wireless network interfaces 450, one or more input/output interfaces 458, and/or one or more operating systems 441, such as Windows ServerTM, mac OS XTM, unixTM, linuxTM, freeBSDTM, and the like.
The steps performed by the defect detection device for ferromagnetic members in the above-described embodiment may be based on the server structure shown in fig. 4.
According to the method provided by the embodiment of the application, the application further provides a computer program product, which comprises: computer program code, when run on a computer, causes the computer to perform the data read and write methods of memory provided by one or more embodiments of the present application.
According to the method provided by the embodiment of the application, the application further provides a computer readable storage medium, and the computer readable storage medium stores program codes, and when the program codes run on a computer, the computer is caused to execute the data read-write method of the memory provided by one or more embodiments of the application.
In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the processes or functions described in accordance with embodiments of the present application are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a high-density digital video disc (digital video disc, DVD)), or a semiconductor medium (e.g., a Solid State Disk (SSD)), or the like.
The network device in the above-described respective apparatus embodiments corresponds to the terminal device and the network device or the terminal device in the method embodiments, the respective steps are performed by respective modules or units, for example, the communication unit (transceiver) performs the steps of receiving or transmitting in the method embodiments, and other steps than transmitting and receiving may be performed by the processing unit (processor). Reference may be made to corresponding method embodiments for the function of a specific unit. Wherein the processor may be one or more.
As used in this specification, the terms "component," "module," "system," and the like are intended to refer to a computer-related entity, either hardware, firmware, a combination of hardware and software, or software in execution. For example, a component may be, but is not limited to being, a process running on a processor, an object, an executable, a thread of execution, a program, and/or a computer. By way of illustration, both an application running on a computing device and the computing device can be a component. One or more components may reside within a process and/or thread of execution and a component may be localized on one computer and/or distributed between two or more computers. Furthermore, these components can execute from various computer readable media having various data structures stored thereon. The components may communicate by way of local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from two components interacting with one another in a local system, distributed system, and/or across a network such as the internet with other systems by way of the signal).
Those of ordinary skill in the art will appreciate that the various illustrative logical blocks (illustrative logical block) and steps (steps) described in connection with the embodiments disclosed herein can be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.