CN111863010A - A voice signal noise reduction device - Google Patents

Abstract

Translated fromChinese

本发明公开了一种语音信号降噪装置，涉及语音降噪技术领域，本发明包括FPGA单元、WM8978音频编解码器和LCD显示器，所述FPGA单元包括WM8978模块、噪声干扰模块、FIR滤波器模块、FFT模块、PLL锁相环模块和LCD模块，所述WM8978模块和WM8978音频编解码器电连接，所述WM8978模块和噪声干扰模块电连接，所述噪声干扰模块和FIR滤波器模块电连接，所述FIR滤波器模块和FFT模块电连接，所述FFT模块和LCD模块电连接，所述LCD模块和LCD显示器电连接，所述WM8978音频编解码器的输出端电连接有扬声器，输入端电连接有手机或麦克风；本发明具有处理速度快和CPU时间片占用少等优点。

The invention discloses a voice signal noise reduction device, which relates to the technical field of voice noise reduction. The invention includes an FPGA unit, a WM8978 audio codec and an LCD display. The FPGA unit includes a WM8978 module, a noise interference module, and a FIR filter module. , FFT module, PLL phase-locked loop module and LCD module, the WM8978 module is electrically connected with the WM8978 audio codec, the WM8978 module is electrically connected with the noise interference module, and the noise interference module is electrically connected with the FIR filter module, The FIR filter module is electrically connected with the FFT module, the FFT module is electrically connected with the LCD module, the LCD module is electrically connected with the LCD display, the output end of the WM8978 audio codec is electrically connected with a speaker, and the input end is electrically connected. A mobile phone or a microphone is connected; the invention has the advantages of fast processing speed and less CPU time slice occupation.

Description

Translated fromChinese

一种语音信号降噪装置A voice signal noise reduction device

技术领域technical field

本发明涉及语音降噪技术领域，更具体的是涉及一种语音信号降噪装置。The invention relates to the technical field of voice noise reduction, and more particularly to a voice signal noise reduction device.

背景技术Background technique

随着社会的发展，语音降噪、语音识别、语音合成和人声鉴定等语音信号处理技术得以迅速发展，其中，语音降噪主要通过降噪算法去除语音信号中的噪声。With the development of society, speech signal processing technologies such as speech noise reduction, speech recognition, speech synthesis, and human voice identification have developed rapidly. Among them, speech noise reduction mainly removes noise in speech signals through noise reduction algorithms.

现有技术中，基于ARM平台的华为C8800和三星i9100等手机具有良好的语音降噪功能，但是在串行计算的ARM平台上实现降噪算法，一方面需要占用大量CPU的时间片，另一方面只能处理采样率较低的数据流；专用的DSP语音芯片也能够实现语音降噪，但是其实时性较差。In the prior art, mobile phones such as Huawei C8800 and Samsung i9100 based on the ARM platform have good voice noise reduction functions, but to implement the noise reduction algorithm on the ARM platform of serial computing, on the one hand, it needs to occupy a large amount of CPU time slice, and on the other hand On the other hand, it can only process data streams with lower sampling rate; the dedicated DSP voice chip can also realize voice noise reduction, but its real-time performance is poor.

发明内容SUMMARY OF THE INVENTION

本发明的目的在于：为了解决现有ARM平台实现降噪算法存在的缺陷和DSP语音芯片存在的实时性较差的问题，本发明提供一种语音信号降噪装置。The purpose of the present invention is to provide a voice signal noise reduction device in order to solve the defects of the existing ARM platform to realize the noise reduction algorithm and the problem of poor real-time performance of the DSP voice chip.

本发明为了实现上述目的具体采用以下技术方案：The present invention specifically adopts the following technical solutions in order to achieve the above object:

一种语音信号降噪装置，其特征在于，包括FPGA单元、WM8978音频编解码器和LCD显示器，所述FPGA单元包括WM8978模块、噪声干扰模块、FIR滤波器模块、FFT模块、PLL锁相环模块和LCD模块，所述WM8978模块和WM8978音频编解码器电连接，所述WM8978模块和噪声干扰模块电连接，所述噪声干扰模块和FIR滤波器模块电连接，所述FIR滤波器模块和FFT模块电连接，所述FFT模块和LCD模块电连接，所述LCD模块和LCD显示器电连接，所述WM8978音频编解码器的输出端电连接有扬声器，输入端电连接有手机或麦克风，具体的，PLL锁相环模块用于产生系统所有模块需要的时钟信号。A voice signal noise reduction device, characterized in that it includes an FPGA unit, a WM8978 audio codec and an LCD display, and the FPGA unit includes a WM8978 module, a noise interference module, a FIR filter module, an FFT module, and a PLL phase-locked loop module and the LCD module, the WM8978 module is electrically connected with the WM8978 audio codec, the WM8978 module is electrically connected with the noise interference module, the noise interference module is electrically connected with the FIR filter module, and the FIR filter module is electrically connected with the FFT module Electrical connection, the FFT module is electrically connected with the LCD module, the LCD module is electrically connected with the LCD display, the output end of the WM8978 audio codec is electrically connected with a speaker, and the input end is electrically connected with a mobile phone or a microphone, specifically, The PLL phase-locked loop module is used to generate the clock signals required by all modules of the system.

进一步地，所述WM8978模块和FFT模块电连接，所述WM8978模块和FFT模块的连接线路上设有按键。Further, the WM8978 module and the FFT module are electrically connected, and a button is provided on the connection line between the WM8978 module and the FFT module.

本发明的有益效果如下：The beneficial effects of the present invention are as follows:

1、本发明通过WM8978音频编解码器对带有噪声干扰的模拟信号进行编码，之后通过WM8978模块输入FPGA单元，之后经过噪声干扰模块进行加噪处理，之后通过FIR滤波器模块进行降噪处理，滤除高频段的噪声干扰信号，保留低频段的有效语音信号，之后通过FFT模块对有效语音信号进行FFT快速傅里叶变换，得到有效语音信号的时域波形，通过LCD显示器显示其频谱，WM音频编解码器对有效语音信号进行解码，并输出到扬声器，通过扬声器播放有效语音信号；1. The present invention encodes the analog signal with noise interference through the WM8978 audio codec, and then enters the FPGA unit through the WM8978 module, then performs noise processing through the noise interference module, and then performs noise reduction processing through the FIR filter module, Filter out the noise interference signal in the high frequency band, keep the effective speech signal in the low frequency band, and then perform the FFT fast Fourier transform on the effective speech signal through the FFT module to obtain the time domain waveform of the effective speech signal, and display its spectrum through the LCD display, WM The audio codec decodes the valid voice signal and outputs it to the speaker, and plays the valid voice signal through the speaker;

2、本发明能够对正常人说话声音和音乐文件等外部语音信号进行降噪处理，具有处理速度快和CPU时间片占用少等优点。2. The present invention can perform noise reduction processing on external voice signals such as normal human speech and music files, and has the advantages of fast processing speed and less CPU time slice occupation.

附图说明Description of drawings

图1是本发明的原理框图；Fig. 1 is the principle block diagram of the present invention;

图2是WM8978音频编解码器的电路连接图；Fig. 2 is the circuit connection diagram of WM8978 audio codec;

图3为100KHz正弦波加噪波形；Figure 3 is a 100KHz sine wave plus noise waveform;

图4为图3的语音信号降噪后波形；Fig. 4 is the waveform after noise reduction of the speech signal of Fig. 3;

图5为高斯白噪声加噪波形；Figure 5 is the Gaussian white noise plus noise waveform;

图6为高斯白噪声降噪后的波形；Figure 6 is the waveform of Gaussian white noise after noise reduction;

具体实施方式Detailed ways

实施例1Example 1

如图1到2所示，本实施例提供一种语音信号降噪装置，其特征在于，包括FPGA单元、WM8978音频编解码器和LCD显示器，所述FPGA单元包括WM8978模块、噪声干扰模块、FIR滤波器模块、FFT模块、PLL锁相环模块和LCD模块，所述WM8978模块和WM8978音频编解码器电连接，所述WM8978模块和噪声干扰模块电连接，所述噪声干扰模块和FIR滤波器模块电连接，所述FIR滤波器模块和FFT模块电连接，所述FFT模块和LCD模块电连接，所述LCD模块和LCD显示器电连接，所述WM8978音频编解码器的LIP、LIN、RIP和RIN管脚电连接有麦克风，用来输入音频，ROUT1和LOUT1管脚电连接有音频线，ROUT2和LOUT2管脚电连接有扬声器，用来播放音频，通过I2C(IIC_SCL和IIC_SDA管脚)用于配置音频编解码芯片寄存器及工作时序，通过I2S总线(7-11号管脚)和FPGA进行数据交互。As shown in Figures 1 to 2, the present embodiment provides a voice signal noise reduction device, which is characterized in that it includes an FPGA unit, a WM8978 audio codec and an LCD display, and the FPGA unit includes a WM8978 module, a noise interference module, a FIR A filter module, an FFT module, a PLL phase-locked loop module and an LCD module, the WM8978 module is electrically connected to the WM8978 audio codec, the WM8978 module is electrically connected to the noise interference module, and the noise interference module is electrically connected to the FIR filter module Electrical connection, the FIR filter module is electrically connected to the FFT module, the FFT module is electrically connected to the LCD module, the LCD module is electrically connected to the LCD display, the LIP, LIN, RIP and RIN of the WM8978 audio codec The pin is electrically connected to a microphone for inputting audio, the ROUT1 and LOUT1 pins are electrically connected to an audio cable, the ROUT2 and LOUT2 pins are electrically connected to a speaker for audio playback, and are used for configuration through I2C (IIC_SCL and IIC_SDA pins) Audio codec chip registers and working timing, data exchange with FPGA through I2S bus (pins 7-11).

工作原理：通过WM8978音频编解码器对带有噪声干扰的模拟信号进行编码，之后通过WM8978模块输入FPGA单元，之后经过噪声干扰模块进行加噪处理，之后通过FIR滤波器模块进行降噪处理，滤除高频段的噪声干扰信号，保留低频段的有效语音信号，之后通过FFT模块对有效语音信号进行FFT快速傅里叶变换，得到有效语音信号的时域波形，通过LCD显示器显示其频谱，WM音频编解码器对有效语音信号进行解码，并输出到扬声器，通过扬声器播放有效语音信号。Working principle: The analog signal with noise interference is encoded by the WM8978 audio codec, and then input to the FPGA unit through the WM8978 module, and then the noise interference module is used for noise processing, and then the FIR filter module is used for noise reduction processing. In addition to the noise interference signal in the high frequency band, the effective speech signal in the low frequency band is reserved. After that, the FFT module is used to perform FFT fast Fourier transform on the effective speech signal to obtain the time domain waveform of the effective speech signal. The codec decodes the valid voice signal and outputs it to the speaker, and plays the valid voice signal through the speaker.

实施例2Example 2

如图1到2所示，本实施例在实施例1的基础上做了进一步改进，具体为所述WM8978模块和FFT模块电连接，所述WM8978模块和FFT模块的连接线路上设有按键，按下按键，便可停止FPGA对输入的音频信号进行降噪处理，输出掺杂噪声的信号。As shown in Figures 1 to 2, this embodiment is further improved on the basis ofEmbodiment 1. Specifically, the WM8978 module and the FFT module are electrically connected, and the connection line between the WM8978 module and the FFT module is provided with buttons. Press the button to stop the FPGA from performing noise reduction processing on the input audio signal and output the signal doped with noise.

如图3-图6所示，图3为100KHz正弦波加噪波形，图4为图3的语音信号降噪后波形，图5为高斯白噪声加噪波形，图6为高斯白噪声降噪后的波形，由上述波形可知，该降噪装置降噪效果好。As shown in Figure 3-Figure 6, Figure 3 is the waveform of 100KHz sine wave with noise added, Figure 4 is the waveform of the speech signal after noise reduction in Figure 3, Figure 5 is the waveform of Gaussian white noise plus noise, and Figure 6 is the noise reduction of Gaussian white noise It can be seen from the above waveforms that the noise reduction device has a good noise reduction effect.

Claims (2)

1. The utility model provides a voice signal noise reduction device, its characterized in that, includes FPGA unit, WM8978 audio frequency codec and LCD display, the FPGA unit includes WM8978 module, noise interference module, FIR filter module, FFT module, PLL phase-locked loop module and LCD module, WM8978 module and WM8978 audio frequency codec electricity are connected, WM8978 module and noise interference module electricity are connected, noise interference module and FIR filter module electricity are connected, FIR filter module and FFT module electricity are connected, FFT module and LCD module electricity are connected, LCD module and LCD display electricity are connected, WM8978 audio frequency codec's output electricity is connected with the speaker, and the input electricity is connected with cell-phone or microphone.

2. The speech signal noise reduction device according to claim 1, wherein the WM8978 module and the FFT module are electrically connected, and a button is provided on a connection line between the WM8978 module and the FFT module.

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