Disclosure of Invention
In view of the above, the present invention provides a current-type pixel cell circuit, method, combination and array for fast data writing, which improves the data writing speed by providing a write current adjusting circuit.
The invention provides a current type pixel unit circuit for fast data writing, which comprises: the pixel driving circuit and the writing current adjusting circuit are connected with the pixel driving circuit, and the writing current adjusting circuit is used for adjusting the writing current of the pixel driving circuit so as to improve the data writing speed.
Preferably, the write current adjusting circuit includes a fifth transistor, a gate and a drain of the fifth transistor are both connected to the pixel driving circuit, and a source of the fifth transistor is connected to a second power line.
Preferably, the pixel driving circuit is connected to the first power line, and the write current adjusting circuit is connected to the second power line.
Preferably, the pixel driving circuit includes a second transistor, a third transistor, a first transistor, a sample-hold capacitor, and a fourth transistor, where the second transistor and the third transistor implement writing of signals, the sample-hold capacitor holds signals, the first transistor is a driving transistor, and the fourth transistor is a switching transistor.
Preferably, the width-to-length ratio of the fifth transistor gate is greater than the width-to-length ratio of the first transistor gate.
Another aspect of the present invention provides a method for the above-mentioned current-mode pixel cell circuit for fast data writing, wherein the magnitude of the write current of the pixel driving circuit is adjusted by setting the fifth transistor width-to-length ratio.
Preferably, the magnitude of the write current of the pixel driving circuit is adjusted by adjusting the power supply voltage of the write current adjusting circuit.
Another aspect of the present invention provides a combination of current-mode pixel cell circuits for fast data writing, comprising a plurality of sets of pixel cell circuits according to any one of the preceding claims, wherein the switch control signal lines SMP, the switch control signal lines HLD, and the first power lines of the plurality of sets of pixel driving circuits are all connected in line, and the second power lines of the plurality of sets of write current adjusting circuits are also connected in line.
Preferably, the second power line is connected to the first power line through a transmission gate.
In another aspect, the present invention provides an array of fast data writing current-mode pixel cell circuits, including a plurality of groups of the fast data writing current-mode pixel cell circuit combinations described above.
The invention has the advantages and positive effects that: the invention is provided with a write current adjusting circuit, and the write current of the pixel driving circuit is adjusted by the write current adjusting circuit, so that the data writing speed is improved.
Detailed Description
For a better understanding of the present invention, the present invention is further described below with reference to specific examples and drawings.
As shown in fig. 1, the present invention provides a current-mode pixel unit circuit for fast data writing, comprising: a pixel driving circuit 10 and a write current adjusting circuit 20 connected to the pixel driving circuit 10, wherein the write current adjusting circuit 20 is used for adjusting the write current of the pixel driving circuit 10 so as to improve the data writing speed.
The pixel driving circuit 10 is connected to and drives a light emitting device OLED/LED, and in general, the driving current of the light emitting device OLED/LED ranges from-10 nA (nanoampere) to-1 uA (microampere), which is also a corresponding write current in the related art. In high resolution displays, however, the parasitic parameters are large, and such small currents often fail to complete the write operation in a short period of time.
In the invention, a write current adjusting circuit 20 is added to the pixel driving circuit 10, and the write current of the pixel driving circuit 10 is adjusted by the write current adjusting circuit 20 to increase the write speed.
Specifically, in a specific embodiment of the present invention, the pixel driving circuit 10 includes a second transistor M2, a third transistor M3, a first transistor M1, a sample-and-hold capacitor C1, and a fourth transistor M4, where the second transistor M2 and the third transistor M3 implement writing of signals, the sample-and-hold capacitor C1 holds signals, the first transistor M1 is a driving tube, and the fourth transistor M4 is a switching tube.
The drain electrode of the second transistor M2 is connected with a data signal line IDATA, the grid electrode of the second transistor M2 is connected with a switch control signal line SMP, and the source electrode of the second transistor M is connected with the lower polar plate of the sample hold capacitor C1;
the source electrode of the first transistor M1 is connected with a first power line VDD, and the drain electrode of the first transistor M4 is connected with the source electrode; the grid electrode is respectively connected with the source electrode of the second transistor M2 and the lower polar plate of the sampling holding capacitor C1;
the upper polar plate of the sample-hold capacitor C1 is connected with the first power line VDD;
the drain electrode of the third transistor M3 is connected with the data signal line IDATA, the grid electrode is connected with the switch control signal line SMP, and the drain electrode is connected with the source electrode of the fourth transistor M4;
the grid electrode of the fourth transistor M4 is connected with a switch control signal line HLD, and the drain electrode of the fourth transistor M is connected with the anode of the light-emitting device OLED/LED;
the basic working principle is as follows:
data current writing phase: when the SMP is low level and HLD is high level, the second transistor M2 and the third transistor M3 are turned on, the first transistor M1 forms a diode-connected structure, and the current flowing through it is equal to IDATA, and the corresponding driving voltage signal is stored on the sample-hold capacitor C1;
light emitting stage of display device: when SMP is high and HLD is low, the second transistor M2, the third transistor M3 are turned off and the fourth transistor M4 is turned on; the voltage stored in the sample-and-hold capacitor C1 drives the first transistor M1 to generate a corresponding current, and the corresponding current flows through the light emitting device OLED/LED and emits light, and the brightness of the emitted light corresponds to the written data voltage.
The driving current magnitude I1 of the light emitting device OLED/LED is in the range of-10 nA (nanoamperes) to-1 uA (microamperes), and the corresponding write current idata=i1 is also this range.
Further, the write current adjusting circuit 20 includes a fifth transistor M5, wherein a gate of the fifth transistor M5 is connected to the gate of the first transistor M1, a source of the fifth transistor M5 is connected to a second power line VDD2, and a drain is connected to the drain of the first transistor M1.
The specific working process is as follows:
data current writing phase: as shown in fig. 2, the SMP signal is low, the HLD signal is high, the second transistor M2, the second transistor M3, the first transistor M1, the fifth transistor M5 are turned on, and the fourth transistor M4 is turned off; at this time, the first transistor M1 and the fifth transistor M5 constitute a diode form, and the sum of the current I1 flowing through the first transistor M1 and the current I5 flowing through the fifth transistor M5 is equal to the written data current IDATA; after the data writing is completed, converting the data current into a voltage signal and storing the voltage signal on a sample-hold capacitor C1;
light emitting stage of display device: as shown in fig. 3, the SMP signal is high, the HLD signal is low, the fourth transistor M4 is turned on, the second transistor M2, and the third transistor M3; at the same time, the VDD2 power line is in a floating state by the control of an external signal, so that the fifth transistor M5 will remain in an off state, and therefore, compared with the data writing stage, there is only one current path from the first transistor M1, the fourth transistor M4 to the light emitting device OLED/LED at this time, and the magnitude of this current is I1.
The operation timing diagram of the pixel unit circuit is shown in fig. 4.
Idata=i1+i2 in the data current writing phase, that is, the current IDATA in the data writing phase is larger than the current level I1 when the device emits light. In addition, the sizes of I1 and I2 depend on the ratio of the width-to-length ratio (W/L, ratio of gate width to gate length) of the first transistor M1 and the fifth transistor M5, for example, if the width-to-length ratio of the fifth transistor M5 is 4 times that of the first transistor M1, that is:
then the current value of I2 will be 4 times I1, i.e. IDATA will be 5 times I1; if the light emitting device operates with a driving current of-10 nA to-1 uA, the data writing stage has a driving current of-50 nA to-5 uA.
The invention increases a write current adjusting circuit, adjusts the write current of the pixel driving circuit through the write current adjusting circuit, thereby improving the data writing speed, and adjusts the size of the write current of the pixel driving circuit through adjusting the width-to-length ratio of the grid electrode of the fifth transistor M5.
A second aspect of the present invention provides a method of a current-mode pixel cell circuit for fast data writing, which can adjust the magnitude of a write current of a pixel driving circuit by setting the aspect ratio of the gate of the fifth transistor M5.
On the other hand, in order to avoid the increase of the pixel cell area caused by the oversized fifth transistor M5, it may be set to be equal to the gate width-to-length ratio of the first transistor M1, at this time, the current I5 flowing through the fifth transistor M5 may be made larger than the current I1 flowing through the first transistor M1 by controlling the power supply voltage of the second power supply line VDD2 to be larger than the power supply voltage of the first power supply line VDD, thereby ensuring that the current in the data writing stage is far larger than the operating current of the actual light emitting device.
Therefore, the novel pixel circuit realizes that the writing current is larger than the actual working current of the pixel, thereby avoiding the problem of insufficient working speed caused by small current.
Another aspect of the present invention provides a combination of current-type pixel unit circuits for fast data writing, which includes a plurality of groups of the pixel unit circuits, wherein the pixel driving circuits 10 in the plurality of groups of pixel unit circuits are connected to a first power line VDD, and the write current adjusting circuit 20 is connected to a second power line VDD2.
FIG. 5 is a schematic diagram showing the connection of a row of pixel units when the second power line VDD2 is selected to be at the same level as the first power line VDD; in fig. 5, the switch control signal lines SMP, HLD, and the first power lines VDD of the pixel driving circuits 10 are all connected in line, the second power lines VDD2 of the write current adjusting circuits 20 are also connected in line, the second power lines VDD2 are connected to the first power line VDD1 through a transmission gate, and the control terminal of the transmission gate is connected to the switch control signal line SMP.
In the data writing stage, the switch control signal line SMP is low, the transmission gate is turned on, and VDD2 are shorted together at this time, that is, in the data writing stage, the power supply voltage of the first power supply line VDD is equal to the power supply voltage of the second power supply line VDD2, the fifth transistor M5 is turned on, and in this stage, the sum of the current I1 flowing through the first transistor M1 and the current I5 flowing through the fifth transistor M5 is equal to the written data current IDATA; in the light emitting stage of the display device, the switch control signal line SMP is at a high level, the transmission gate is in an off state, so that the second power line VDD2 is in a floating state (high resistance state), the fifth transistor M5 is turned off, in this stage, only one current path from the first transistor M1, the fourth transistor M4 to the light emitting device OLED/LED exists, and the magnitude of this current is I1; the circuit of the invention can improve the writing current of the pixel driving circuit and simultaneously does not influence the driving current.
The invention also provides an array of current-mode pixel unit circuits for fast data writing, which comprises a plurality of groups of current-mode pixel unit circuit combinations for fast data writing, wherein the groups of current-mode pixel unit circuit combinations for fast data writing form an N×M pixel unit circuit array, such as 1920×1080, 1280×1024, 1024×768, 800×600 and the like; the current-mode pixel unit circuits of each group of fast data writing are independently controlled, that is, the data signal line IDATA, the switch control line SMP, the switch control signal line HLD, the first power line VDD and the second power line VDD2 of each group of fast data writing are independently set.
In addition, the driving method can be applied to the driving of any current-type light emitting device besides the OLED and the LED.
The foregoing describes the embodiments of the present invention in detail, but the description is only a preferred embodiment of the present invention and should not be construed as limiting the scope of the invention. All equivalent changes and modifications within the scope of the present invention are intended to be covered by this patent.