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CN111681701B - Test progress indication method and device - Google Patents

Test progress indication method and device
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Publication number
CN111681701B
CN111681701BCN202010420899.8ACN202010420899ACN111681701BCN 111681701 BCN111681701 BCN 111681701BCN 202010420899 ACN202010420899 ACN 202010420899ACN 111681701 BCN111681701 BCN 111681701B
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current
sampling
sampling stage
working
characteristic
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CN111681701A (en
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李创锋
邹念锋
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Shenzhen Tigo Semiconductor Co ltd
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Shenzhen Tigo Semiconductor Co ltd
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Abstract

The application relates to a test progress indicating method and a test progress indicating device, wherein the method comprises the following steps: setting a plurality of sampling stages; acquiring working current after the solid state disk is subjected to power-on test through sampling, and acquiring characteristic current of each sampling stage in the solid state disk test process based on the change of the working current in sequence, wherein the characteristic current represents the end of the corresponding sampling stage; and when the characteristic current of the last sampling stage is acquired, indicating that the test of the solid state disk is finished. Through the method and the device, the test progress of the solid state disk is automatically monitored, whether the test is completed or not is automatically prompted, the operation is simple and convenient, the labor is saved, and the efficiency is high.

Description

Test progress indication method and device
Technical Field
The application relates to the technical field of solid state disks, in particular to a test progress indicating method and device.
Background
The solid state disk Reliability verification test (Reliability verification Testing) is abbreviated as RDT test. The RDT test is a process of testing flash granules by a self-test program in the solid state disk. Whether the RDT test is completed or not can be indicated by means of the flashing state of an LED positioned on the solid state disk. However, because the RDT test time of the solid state disk is long (4-10 hours), the prior art mainly depends on the operator to make a round trip to check whether the RDT test is completed, which is inefficient. And solid state disk is various, relies on experience to set for the alarm clock time, and the operation degree of difficulty is higher and loaded down with trivial details, does not have general suitability.
Disclosure of Invention
In order to solve the technical problems that whether the test is completed or not needs to be checked by depending on the back and forth inspection of an operator, and the efficiency is low in the solid state disk test, the embodiment of the application provides a test progress indicating method and device.
In a first aspect, an embodiment of the present application provides a test progress indicating method, which is applied to a solid state disk, and the method includes:
setting a plurality of sampling stages;
acquiring working current after the solid state disk is subjected to power-on test through sampling, and acquiring characteristic current of each sampling stage in the solid state disk test process based on the change of the working current in sequence, wherein the characteristic current represents the end of the corresponding sampling stage; the working current is a sampling current and is obtained by sampling voltage;
and when the characteristic current of the last sampling stage is acquired, indicating that the test of the solid state disk is finished.
Optionally, successively obtaining the characteristic current of each sampling stage in the testing process of the solid state disk based on the change of the working current includes:
acquiring a reference current corresponding to a sampling stage according to the characteristic current of the last sampling stage of the sampling stage, wherein the ratio of the reference current of the sampling stage to the characteristic current of the last sampling stage corresponding to the sampling stage is less than 1;
and acquiring the characteristic current corresponding to the sampling stage by combining the corresponding reference current based on the change of the working current acquired in the sampling stage.
Optionally, before obtaining the reference current of the corresponding sampling stage according to the characteristic current of the previous sampling stage of the sampling stages, the characteristic current of each sampling stage in the testing process of the solid state disk is successively obtained based on the change of the working current, further including:
and setting a current coefficient of each sampling stage, wherein the current coefficient is the ratio of the reference current of the sampling stage to the characteristic current of the last sampling stage of the corresponding sampling stage.
Optionally, if the sampling stage is the first sampling stage, obtaining the characteristic current corresponding to the sampling stage based on the change of the working current obtained by the sampling stage and by combining the corresponding reference current, including:
on the basis of the working current obtained by sampling in the first sampling stage, obtaining a first preset number of sequentially increasing first working currents by comparing current values, wherein the sequentially increasing first working currents are all larger than the reference current in the first sampling stage;
and taking the maximum current in the first working current with the first preset number and sequentially increasing as the characteristic current of the first sampling stage.
Optionally, if the sampling stage is a non-first sampling stage, obtaining the characteristic current corresponding to the sampling stage based on the change of the working current obtained by the sampling stage and by combining the corresponding reference current, including:
on the basis of the working current obtained by sampling in the corresponding non-first sampling stage, obtaining a second preset number of continuously decreased second working currents by comparing current values, wherein the continuously decreased second working currents are all smaller than the reference current in the corresponding non-first sampling stage;
and taking the minimum current in the second preset number of continuously decreased second working currents as the characteristic current of the corresponding non-first sampling stage.
Optionally, the plurality of sampling phases comprises three sampling phases.
Optionally, the indicating that the test of the solid state disk is completed includes:
and indicating the completion of the test of the solid state disk through at least one of sound prompt and light prompt.
Optionally, the method further comprises:
the display of the operating current is carried out,
or the like, or, alternatively,
and displaying the first working current and the second working current.
Optionally, the method further comprises:
indicating that the characteristic current for the corresponding sampling phase has been acquired.
In a second aspect, an embodiment of the present application provides a test progress indicating device, which is applied to a solid state disk, and the device includes: the sampling circuit, the control circuit and the indicating circuit are connected in sequence;
the sampling circuit is connected with the solid state disk and is used for collecting working current in the solid state disk testing process;
the control circuit is used for setting a plurality of sampling stages;
the control circuit is also used for acquiring the working current of the solid state disk after the power-on test through the sampling circuit, and acquiring the characteristic current of each sampling stage in the solid state disk test process in sequence based on the change of the working current, wherein the characteristic current represents the end of the corresponding sampling stage;
the control circuit is further used for outputting control information to control the indicating circuit to indicate that the test of the solid state disk is completed when the characteristic current of the last sampling stage is obtained.
In a third aspect, embodiments of the present application provide a computer-readable storage medium, on which a computer program is stored, which, when executed by a processor, causes the processor to perform the steps of the method according to any one of the preceding claims.
In a fourth aspect, embodiments of the present application provide a computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the program to perform the steps of the method according to any of the preceding claims.
Compared with the prior art, the technical scheme provided by the embodiment of the application has the following advantages:
the method comprises the steps of setting a plurality of sampling stages, obtaining working current after a solid state disk is subjected to power-on test through sampling, obtaining characteristic current of each sampling stage in the solid state disk testing process based on change of the working current in sequence, and representing the end of the corresponding sampling stage by the characteristic current; and when the characteristic current of the last sampling stage is acquired, indicating that the test of the solid state disk is finished. Through the method and the device, the test progress of the solid state disk is automatically monitored, whether the test is completed or not is automatically prompted, the operation is simple and convenient, the labor is saved, and the efficiency is high.
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The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
FIG. 1 is a flow diagram illustrating a method for indicating a progress of a test according to one embodiment;
FIG. 2 is a graph illustrating the variation of current during testing in one embodiment;
FIG. 3 is a block diagram of an exemplary test progress indicator;
FIG. 4 is a circuit diagram of a test progress indication apparatus in one embodiment;
FIG. 5 is a circuit diagram of a test progress indicator device in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
FIG. 1 is a flowchart illustrating a method for indicating a test progress according to an embodiment. Referring to fig. 1, the method includes the steps of:
s100: a plurality of sampling phases are set.
Specifically, the solid state disks are various in variety, and the same number of sampling stages can be uniformly set, or the number of respective sampling stages can be set according to the variety of the solid state disks. For example, the test of a solid state disk can set 3 sampling stages. The plurality of sampling phases are set by receiving a parameter setting instruction of a user.
S200: the working current after the solid state disk power-on test is obtained through sampling, the characteristic current of each sampling stage in the solid state disk test process is obtained successively based on the change of the working current, and the characteristic current represents the end of the corresponding sampling stage.
Specifically, the change of the working current is a change of a current in an operation process of a Reliability verification test (RDT test) of the solid state disk, an actual process of the RDT test is a read-write test of the main control single chip microcomputer on the storage IC, and the read and write currents are different, so that the change of the working current of the solid state disk in the test operation process can be represented by collecting a working voltage of the sampling resistor. The change in operating current also characterizes the test condition. The obtained working current is the ratio of the sampling voltage of the sampling resistor to the resistance value of the sampling resistor. The RDT test process has a current rising stage and a current falling stage, and the test progress is monitored by monitoring the change of the current in the test process. And when the characteristic current of the last sampling stage is obtained, the whole RDT test is finished. The working current is a sampling current and is obtained by sampling a voltage.
S300: and when the characteristic current of the last sampling stage is acquired, indicating that the test of the solid state disk is finished.
Specifically, when the characteristic current of the last sampling stage is obtained, the completion of the whole RDT test is represented, and the completion of the solid state disk test can be indicated by at least one of voice prompt and light prompt by controlling the operation of the voice prompt module and/or the light prompt module.
In one embodiment, the step S200 of successively obtaining the characteristic current of each sampling stage in the solid state disk test process based on the change of the working current includes:
acquiring a reference current corresponding to a sampling stage according to the characteristic current of the last sampling stage of the sampling stage, wherein the ratio of the reference current of the sampling stage to the characteristic current of the last sampling stage corresponding to the sampling stage is less than 1;
and acquiring the characteristic current corresponding to the sampling stage by combining the corresponding reference current based on the change of the working current acquired in the sampling stage.
Specifically, the reference current in the sampling phase is an upper limit value or a lower limit value of the current in the sampling phase, and the working current acquired in the sampling phase is smaller than the reference current in the sampling phase or larger than the reference current in the sampling phase. The reference current in the current sampling stage is smaller than the characteristic current in the previous sampling stage, for example, the reference current may be 70% or 80% of the characteristic current in the previous sampling stage, and the like; the ratio of the characteristic current of each sampling phase to the characteristic current of the previous sampling phase may also be individually constrained according to practical situations, for example, the reference current of the second sampling phase is 70% of the characteristic current of the first sampling phase, the reference current of the third sampling phase is 80% of the characteristic current of the second sampling phase, and the like are not limited thereto.
The characteristic current represents the end of the corresponding sampling stage, and the characteristic current is smaller than the corresponding reference current or larger than the corresponding reference current; in the current rising sampling stage, the characteristic current is larger than the corresponding reference current; in the sampling phase of the current drop, the characteristic current is smaller than the corresponding reference current.
In an embodiment, before obtaining the reference current of the corresponding sampling stage according to the characteristic current of the previous sampling stage of the sampling stages, the step S200 sequentially obtains the characteristic current of each sampling stage in the testing process of the solid state disk based on the change of the working current, and further includes:
and setting a current coefficient of each stage, wherein the current coefficient is the ratio of the reference current of the sampling stage to the characteristic current of the last sampling stage of the corresponding sampling stage.
Specifically, a current coefficient of each sampling stage may be preset, where the current coefficient is a ratio of a reference current of the sampling stage to a characteristic current of a previous sampling stage corresponding to the sampling stage; that is, the current coefficient is smaller than 1, and the current coefficient in each sampling phase may be the same or may be independently set to different values. For example: the reference current in the first sampling phase may be preset or 0, the current coefficient in the second sampling phase may be 70%, the current coefficient in the third sampling phase may be 80%, and the like, but is not limited thereto.
In one embodiment, if the sampling phase is the first sampling phase, acquiring the characteristic current corresponding to the sampling phase based on the change of the working current acquired by the sampling phase and by combining the corresponding reference current, includes:
on the basis of the working current obtained by sampling in the first sampling stage, obtaining a first preset number of sequentially increasing first working currents by comparing current values, wherein the sequentially increasing first working currents are all larger than the reference current in the first sampling stage;
and taking the maximum current in the first working current with the first preset number and sequentially increasing as the characteristic current of the first sampling stage.
Specifically, the reference current in the first sampling stage may be preset and may be set to be 0 or a smaller current value, the first sampling stage is a stage in which the current rises, when the current rises to enable the working current to rise synchronously to be greater than the reference current in the first sampling stage, the obtained reference current greater than the first sampling stage and the sequentially increasing working currents are used as first working currents, and after a first preset number of first working currents are obtained, the first sampling stage is characterized to be ended. Each first working current in the first preset number of first working currents is larger than the reference current in the first sampling stage, and the current values of the successively acquired first working currents are gradually increased.
For example: the first working current obtained in the second step is larger than the first working current obtained in the first step, the first working current obtained in the third step is larger than the first working current obtained in the second step, the first working current obtained in the fourth step is larger than the first working current obtained in the third step, and the like. The first operating current may or may not be continuously obtained. Specifically, a max variable may be set, an initial value of the max variable is a reference current in a first sampling stage, the reference current is compared with the initial value of the max variable after the first working current is obtained, if the first working current is greater than the initial value of the max variable, the first working current is assigned to the max variable as the first working current, and if the first working current is less than the initial value of the max variable, the first working current is discarded, and a second working current is continuously obtained; and obtaining a second working current, comparing the second working current with the max variable, if the second working current is greater than the max variable, assigning the second working current as the first working current to the max variable, and if the second working current is less than the max variable, giving up the second working current, and continuously obtaining a third working current until the max variable is changed by a first preset number of times, namely, obtaining the first working current of the first preset number. The resulting last first operating current is the largest of these first operating currents and is also the characteristic current of the first sampling phase, the last first operating current characterizing the end of the first sampling phase. Optionally, the first preset number may be 6, that is, 6 first operating currents sequentially increasing are acquired, and the max variable is assigned and changed 6 times.
In one embodiment, the sampling phase is a non-first sampling phase, and the obtaining of the characteristic current corresponding to the sampling phase based on the change of the working current obtained in the sampling phase and in combination with the corresponding reference current includes:
on the basis of the working current obtained by sampling in the corresponding non-first sampling stage, obtaining a second preset number of continuously decreased second working currents by comparing current values, wherein the continuously decreased second working currents are all smaller than the reference current in the corresponding non-first sampling stage;
and taking the minimum current in the second preset number of continuously decreased second working currents as the characteristic current of the corresponding non-first sampling stage.
Specifically, when the sampling phases are other sampling phases except the first sampling phase, the reference current of each non-first sampling phase is the product of the current coefficient of the non-first sampling phase and the characteristic current of the previous sampling phase.
And when the current is reduced to enable the working current to be synchronously reduced to be smaller than the reference current of the corresponding non-first sampling stage, the obtained reference current smaller than the non-first sampling stage and the continuously reduced working current are used as second working current, and after a second preset number of second working currents are obtained, the non-first sampling stage is represented to be ended. Each second working current in the second preset number of second working currents is smaller than the reference current in the non-first sampling stage, and the current values of the continuously acquired second working currents are gradually decreased.
For example: the second obtained second working current is smaller than the first obtained second working current, the third obtained second working current is smaller than the second obtained second working current, the fourth obtained second working current is smaller than the third obtained second working current, and so on. The second working current is continuously acquired, the working current which is acquired at the beginning of the non-second sampling stage and is larger than the reference current of the non-second sampling stage is abandoned, and a second preset number of second working currents are continuously acquired again.
Specifically, a min variable may be set, an initial value of the min variable is a reference current of the non-first sampling stage, the obtained first working current is compared with the initial value of the min variable, if the first working current is smaller than the initial value of the min variable, the first working current is assigned to the min variable as a second working current, and if the first working current is larger than the initial value of the min variable, the first working current is discarded, and the second working current is continuously obtained; obtaining a second working current, comparing the second working current with the min variable, if the second working current is smaller than the min variable, assigning the second working current as the second working current to the min variable, if the second working current is larger than the min variable, giving up the second working current, clearing the number of the obtained second working currents, accumulating the second working currents again, assigning the min variable as an initial value again, and continuously obtaining a third working current; obtaining a third working current, if the min variable is a second working current, comparing the third working current with the min variable, if the third working current is smaller than the min variable, assigning the third working current as the second working current to the min variable, if the third working current is larger than the min variable, abandoning the third working current, clearing the number of the obtained second working currents, accumulating again, assigning the min variable as an initial value again, and continuously obtaining a fourth working current; if the min variable is an initial value, comparing the third working current with the min variable, if the third working current is smaller than the min variable, assigning the third working current as the second working current to the min variable, if the third working current is larger than the min variable, giving up the third working current, clearing the number of the obtained second working currents, accumulating again, and continuously obtaining the fourth working current; and so on until the min variable is continuously changed for a second preset number of times, that is, a second working current of the second preset number is obtained. The resulting last second operating current is the smallest of the second operating currents and is also the characteristic current of the non-first sampling phase, the last second operating current characterizing the end of the non-first sampling phase. Optionally, the second preset number may be 6, that is, 6 second operating currents which decrease successively are obtained, and the min variable is continuously assigned and changed 6 times.
In one embodiment, the method further comprises displaying the operating current, or displaying the first operating current and the second operating current.
Specifically, each operating current may be displayed through a display screen or a nixie tube, or only the first operating current of the first sampling stage and/or the second operating current of the other sampling stages may be displayed. The test device is convenient for an operator to preliminarily judge whether the solid state disk test is normal or whether the solid state disk has major defects to cause test abnormity through the displayed current value of the working current.
In one embodiment, the method further comprises: indicating that the characteristic current for the corresponding sampling phase has been acquired.
Specifically, each sampling stage may be set to correspond to one light emitting diode, and after the characteristic current is obtained, the light emitting diode is controlled to indicate that the characteristic current corresponding to the sampling stage has been obtained. The operator can conveniently know the midway progress in the test process at any time.
It should be understood that, although the steps in the flowchart of fig. 1 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a portion of the steps in fig. 1 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
FIG. 2 is a graph illustrating the variation of current during testing in one embodiment; referring to fig. 2, 3 sampling stages are set, and the first characteristic current is the characteristic current of the first sampling stage and is the maximum current value in the working current obtained in the first sampling stage; the second characteristic current is the characteristic current of the second sampling stage; the third sampling phase follows the second characteristic current, and the current rises and falls in the third sampling phase, so the third characteristic current is acquired in the following current stable falling phase. The working current is obtained from the current change curve graph at each sampling stage according to a certain sampling frequency, and the characteristic current is obtained from the working current.
FIG. 3 is a block diagram of an exemplary test progress indicator; referring to fig. 3, the apparatus includes: thesampling circuit 100, thecontrol circuit 200 and the indicatingcircuit 300 are connected in sequence;
thesampling circuit 100 is connected with thesolid state disk 400 and is used for collecting working current in the testing process of thesolid state disk 400;
thecontrol circuit 200 is used to set a plurality of sampling phases;
thecontrol circuit 200 is further configured to obtain a working current of thesolid state disk 400 after the power-on test through thesampling circuit 100 by sampling, and obtain a characteristic current of each sampling stage in the test process of thesolid state disk 400 based on a change of the working current in sequence, where the characteristic current represents an end of the corresponding sampling stage;
thecontrol circuit 200 is further configured to output first control information to control theindication circuit 300 to indicate that the test of thesolid state disk 400 is completed when the characteristic current of the last sampling phase is obtained.
Specifically, a computer program for implementing the above-described test progress indication method is stored in thecontrol circuit 200, so that thecontrol circuit 200 can calculate the characteristic current of each sampling phase through an algorithm.
Thesampling circuit 100 may be a sampling resistor connected in series with thesolid state disk 400, the change of the working current of thesolid state disk 400 during the test is synchronous with the change of the sampling voltage of the sampling resistor, one end of the sampling resistor is grounded, and the other end of the sampling resistor is connected with one end of thesolid state disk 400 and one end of thecontrol circuit 200. The working current obtained by thecontrol circuit 200 is the ratio of the sampling voltage of the sampling resistor to the sampling resistor. Thecontrol circuit 200 may include a single chip microcomputer and a peripheral circuit thereof, and the peripheral circuit includes a crystal oscillator for controlling the frequency of the working current obtained by thecontrol circuit 200.
In one embodiment, the apparatus further comprises a characteristic current indicating circuit connected to thecontrol circuit 200;
thecontrol circuit 200 is further configured to output second control information when the characteristic current in the sampling stage is acquired;
the characteristic current indicating circuit is used for receiving second control information and indicating that the characteristic current of the corresponding sampling stage is acquired according to the second control information.
Specifically, the characteristic current indicating circuit includes a plurality of light emitting diodes, each of which is used to indicate whether the characteristic current of the corresponding sampling phase has been acquired. Thecontrol circuit 200 acquires the characteristic current of each sampling stage in sequence, and when the characteristic current of the first sampling stage is acquired, thecontrol circuit 200 outputs first and second control information to control the light emitting diode corresponding to the first sampling stage to emit light, so that the completion of the first sampling stage is indicated; when the characteristic current of the second sampling stage is obtained, thecontrol circuit 200 outputs second control information to control the light emitting diode corresponding to the second sampling stage to emit light, thereby indicating that the second sampling stage is completed; and repeating the steps until the characteristic current of the last sampling stage is obtained, and lighting the light emitting diode corresponding to the last sampling stage. In the process, after the light emitting diode in the current sampling stage is lighted, the light emitting diode in the previous sampling stage can be extinguished to save electricity, and the lighted state can be maintained completely.
In one embodiment, the apparatus further comprises a current display circuit connected to thecontrol circuit 200;
thecontrol circuit 200 is further configured to output third control information when the working current and/or the first working current and/or the second working current is obtained;
the current display circuit is used for receiving third control information and displaying the working current according to the third control information, or displaying the first working current and/or the second working current.
Specifically, the current display circuit is a nixie tube display circuit or a display screen display circuit. The working current or the first working current or the second working current is displayed through a nixie tube or a display screen. Of course, the sampled voltage may also be displayed.
In one embodiment, theindication circuit 300 includes a switch module, a prompt module;
one end of the switch module is connected with thecontrol circuit 200, and the other end is connected with the prompt module;
the switch module is used for being conducted when receiving the first control information of thecontrol circuit 200, and after being conducted, the switch module is controlled to be conducted to indicate that the test of the solid state disk is completed.
FIG. 4 is a circuit diagram of a test progress indication apparatus in one embodiment; referring to fig. 4, thecontrol circuit 200 includes a single chip microcomputer U1, a 8 th pin (P17) of the single chip microcomputer U1 is connected to one end of a sampling resistor R1 and one end of a solid state disk, the other end of the sampling resistor R1 is grounded, and the solid state disk is powered by VCC. The 32 th to 39 th pins (P00 to P07) of the single chip microcomputer U1 can be configured to be connected with a control end corresponding to a digital segment of a nixie tube display circuit (not shown in the figure), and the 1 st to 4 th pins (P10 to P13) of the single chip microcomputer U1 can be configured to be connected with a power supply end of the nixie tube display circuit to output a plurality of third control information to control the nixie tube display voltage or current; the 21 st to 28 th pins (P20 st to P27) of the single chip microcomputer U1 can be configured to be connected with a light emitting diode in a characteristic current indicating circuit (not shown) to output second control information to control the on and off of the light emitting diode; 18 th-20 th pins of the singlechip U1 can be configured to be connected with a crystal oscillator circuit (not shown in the figure); the 9 th pin of the singlechip U1 can be configured to connect with a reset circuit (not shown).
FIG. 5 is a circuit diagram of a test progress indication apparatus in one embodiment; referring to fig. 5, fig. 5 shows a specific embodiment of the indicatingcircuit 300. Referring to fig. 4, a 5 th pin (P14) of the single chip microcomputer U1 of fig. 4 is connected to one end of a resistor R5 of the indicating circuit 300 of fig. 5, the other end of the resistor R5 is connected to a base of a transistor Q2, an emitter of a transistor Q2 is connected to a power VCC, a collector is connected to one pin of a coil of a relay K1, a cathode of a diode D4, one end of the resistor R6, the other pin of a coil of a relay K1, and an anode of the diode D4 are grounded, the other end of the resistor R6 is sequentially connected to an anode and a cathode of the light emitting diode D3 through ground, a contact a of a relay K1 is connected to a connection point 1 of a connector JP3, a contact b is connected to a connection point 2 of the connector JP3, a contact c is connected to a connection point 3 of the connector JP3, a contact b and a contact c of the relay K1 are normally closed switches, corresponding connection points 2 and 3 are set in a floating state, when the 5 th pin (P14) of the single chip microcomputer U1 outputs first control information to the resistor R5, the triode is conducted, so that the coil of the relay K1 is electrified, the contacts a and b are connected, the connection points 1 and 2 of the plug connector JP3 are connected, the connection points 1 and 2 are connected with a circuit (not shown in the figure) of the prompting device, the circuit of the prompting device is conducted, and the prompting device works to send a prompting signal.
The prompting device may be a light emitting diode or a buzzer or a combination of a light emitting diode and a buzzer, but is not limited thereto.
After the single chip microcomputer U1 is initialized by the power-on reset circuit, the initial value of the parameter is reset, and the normal work of the single chip microcomputer U1 and peripheral circuits thereof is ensured; the setting of the register parameters is to set each key register, such as an A/D conversion channel register, so that the single chip microcomputer U1 can collect external voltage signals, and other registers have the purposes; the singlechip U1 also stores a nixie tube display program to control the display working current or the first working current and the second working current of the nixie tube. Of course, the nixie tube can also dynamically display the sampling voltage corresponding to the working current, the resistance value of the sampling resistor is constant, and the working current corresponds to the sampling voltage. By means of scanning, scanning is carried out once every a period of time. The brightness and definition of the character displayed by the nixie tube are related to the stay time of each lighting position and the number of times of switching on in the time of each display position.
In one embodiment, the test progress indication method provided by the application can be implemented in the form of a computer program.
In one embodiment, an electronic device is provided, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program: setting a plurality of sampling stages; acquiring working current after the solid state disk is subjected to power-on test through sampling, and acquiring characteristic current of each sampling stage in the solid state disk test process based on the change of the working current in sequence, wherein the characteristic current represents the end of the corresponding sampling stage; and when the characteristic current of the last sampling stage is acquired, indicating that the test of the solid state disk is finished.
In one embodiment, a readable storage medium is provided, having stored thereon a computer program which, when executed by a processor, performs the steps of: setting a plurality of sampling stages; acquiring working current after the solid state disk is subjected to power-on test through sampling, and acquiring characteristic current of each sampling stage in the solid state disk test process based on the change of the working current in sequence, wherein the characteristic current represents the end of the corresponding sampling stage; and when the characteristic current of the last sampling stage is acquired, indicating that the test of the solid state disk is finished.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a non-volatile computer-readable storage medium, and can include the processes of the embodiments of the methods described above when the program is executed. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

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