CN111477623B - Three-dimensional stacked fully transparent microprocessor - Google Patents

Abstract

Translated fromChinese

本发明公开了一种三维堆叠的全透明微处理器，其部分或全部电路可执行指令控制及算术逻辑的功能，三维堆叠的全透明微处理器由多个不同功能的透明电路层直接堆叠构成，每层电路层均由透明薄膜晶体管构成，不同透明电路层之间通过绝缘层屏蔽，并通过开设通孔及沉积透明导电材料实现层间互连。所述的微处理器还包含有反相器，所述的反相器是由两个为增强型薄膜晶体管、两个耗尽型薄膜晶体管构成的反馈型反相器；本发明的微处理器采用三维堆叠的结构，相较传统CMOS技术和薄膜晶体管技术减少了75％的面积，降低了成本，提高了片内数据传输速度，所采用的反相器电路采用高增益、大噪声容限的设计，提高了电路性能。

The invention discloses a three-dimensional stacked full-transparent microprocessor, part or all of which can execute instruction control and arithmetic logic functions, and the three-dimensional stacked full-transparent microprocessor is formed by directly stacking a plurality of transparent circuit layers with different functions , each circuit layer is composed of transparent thin film transistors, different transparent circuit layers are shielded by insulating layers, and interlayer interconnection is realized by opening through holes and depositing transparent conductive materials. The microprocessor also includes an inverter, and the inverter is a feedback type inverter composed of two enhanced thin film transistors and two depletion thin film transistors; the microprocessor of the present invention Using a three-dimensional stacked structure, compared with traditional CMOS technology and thin film transistor technology, it reduces the area by 75%, reduces the cost, and improves the on-chip data transmission speed. The inverter circuit adopted adopts high gain and large noise tolerance design, improves circuit performance.

Description

Translated fromChinese

三维堆叠的全透明微处理器Three-dimensional stacked fully transparent microprocessor

技术领域technical field

本发明涉及电子产品等具有数字智能化的设备的全透明微处理器，特别是一种采用三维堆叠结构的全透明微处理器。The invention relates to a fully transparent microprocessor of digital intelligent equipment such as electronic products, in particular to a fully transparent microprocessor adopting a three-dimensional stacking structure.

背景技术Background technique

1971年，英特尔公司推出了世界上第一款微处理器4004。自此以后的四十多年间，微处理器技术特别是个人电脑终端的CPU发展迅速，到如今技术已经十分成熟。但传统硅基CMOS与金属互连线技术使得现有的微处理器技术再继续按照既定思路发展下去时遇到了很大的瓶颈，一方面随着沟道长度的不断减小，摩尔定律即将失效，另一方面片外与片内的低速度数据交互严重制约了CPU的高速度工作，使得微处理器没法发挥出极致的性能。在追求性能和速度的今天，这样的技术妥协的弊端越来越多的展现在我们面前，因此提高数据传输速率成为关键。同样，在微处理器作为核心模块的智能家电、IOT设备以及个人穿戴设备等消费电子领域，传统CMOS技术的高成本使得现有的智能设备不得不在成本和性能的博弈上做出妥协，制约了其市场占有率。而且现有的移动端微处理器体积大、不透明，难于集成在穿戴设备上，进而厂商很难进一步缩小其产品体积，也很难进一步提高穿戴设备工作的准确性和穿戴的舒适性。就如现在的智能眼镜，虽然其已经成功做到了智能化，但是由于硅基CMOS技术的限制，导致其主体体积依然很大，如果微处理器能够集成在镜片玻璃上，那么这样既能不遮挡视线，又可以完成智能化工作。因此，开发出一种低成本、体积小又便于集成的三维堆叠的全透明微处理器技术必将获得巨大的商业价值与应用前景。In 1971, Intel introduced the 4004, the world's first microprocessor. Since then, for more than 40 years, microprocessor technology, especially the CPU of personal computer terminals, has developed rapidly, and the technology has become very mature now. However, the traditional silicon-based CMOS and metal interconnection technology makes the existing microprocessor technology encounter a big bottleneck when it continues to develop according to the established ideas. On the one hand, as the channel length continues to decrease, Moore's Law is about to fail. On the other hand, the low-speed data interaction between off-chip and on-chip seriously restricts the high-speed work of the CPU, making it impossible for the microprocessor to exert its ultimate performance. In today's pursuit of performance and speed, the disadvantages of such technical compromise are more and more revealed to us, so increasing the data transmission rate becomes the key. Similarly, in the field of consumer electronics, such as smart home appliances, IOT devices, and personal wearable devices, where the microprocessor is the core module, the high cost of traditional CMOS technology forces existing smart devices to compromise on cost and performance. its market share. Moreover, the existing mobile microprocessors are bulky and opaque, making it difficult to integrate them into wearable devices, making it difficult for manufacturers to further reduce the size of their products, and it is also difficult to further improve the working accuracy and wearing comfort of wearable devices. Just like today's smart glasses, although they have successfully achieved intelligence, due to the limitation of silicon-based CMOS technology, their main body is still very large. If the microprocessor can be integrated on the lens glass, then it will not block the Line of sight, and can complete intelligent work. Therefore, the development of a low-cost, small-volume and easy-to-integrate three-dimensional stacked fully transparent microprocessor technology will surely gain huge commercial value and application prospects.

发明内容Contents of the invention

本发明的主要目的是提供一种三维堆叠的全透明微处理器。该微处理器采用全堆叠结构实现，且采用特制的具有高增益、大噪声容限的反相器。The main purpose of the present invention is to provide a fully transparent microprocessor stacked in three dimensions. The microprocessor is implemented with a fully stacked structure, and uses a special inverter with high gain and large noise margin.

为了实现上述目的，本发明采用的技术方案是：In order to achieve the above object, the technical scheme adopted in the present invention is:

一种三维堆叠的全透明微处理器，其部分或全部电路可执行指令控制及算术逻辑的功能，三维堆叠的全透明微处理器由多个不同功能的透明电路层直接堆叠构成，每层电路层均由透明薄膜晶体管构成，不同透明电路层之间通过绝缘层屏蔽，并通过开设通孔及沉积透明导电材料实现层间互连。A three-dimensional stacked fully transparent microprocessor, some or all of its circuits can perform instruction control and arithmetic logic functions. The three-dimensional stacked fully transparent microprocessor is composed of multiple transparent circuit layers with different functions. Each layer of circuit The layers are all composed of transparent thin film transistors, and the different transparent circuit layers are shielded by insulating layers, and the interlayer interconnection is realized by opening through holes and depositing transparent conductive materials.

上述技术方案中，所述的微处理器中包含反相器，所述的反相器由四个薄膜晶体管构成，其中两个为增强型，两个为耗尽型；第一耗尽型晶体管漏极接电源，第二增强型晶体管栅极接输入，源极接地，漏极接第一耗尽型晶体管源极，第三耗尽型晶体管漏极接电源，栅极接第一耗尽型晶体管源极和第二增强型晶体管的漏极，源极接第一耗尽型晶体管栅极、第四增强型晶体管漏极共同接输出，第四增强型晶体管栅极接输入，源极接地。In the above technical solution, the microprocessor includes an inverter, and the inverter is composed of four thin film transistors, two of which are enhancement type and two are depletion type; the first depletion type transistor The drain is connected to the power supply, the gate of the second enhancement transistor is connected to the input, the source is grounded, the drain is connected to the source of the first depletion transistor, the drain of the third depletion transistor is connected to the power supply, and the gate is connected to the first depletion transistor The source of the transistor and the drain of the second enhancement transistor are connected to the gate of the first depletion transistor, the drain of the fourth enhancement transistor is connected to the output, the gate of the fourth enhancement transistor is connected to the input, and the source is grounded.

进一步的，所述的增强型薄膜晶体管的有源层为以下元素中的一种组成的氧化物或多种复合组成的氧化物：锌、锡、铟、铝、铜、镓、银。Further, the active layer of the enhancement-mode thin film transistor is an oxide composed of one of the following elements or an oxide composed of multiple composites: zinc, tin, indium, aluminum, copper, gallium, silver.

进一步的，所述的耗尽型薄膜晶体管是对增强型薄膜晶体管的有源层实施离子注入或紫外波长光源照射得到的。Further, the depletion mode thin film transistor is obtained by performing ion implantation or ultraviolet light source irradiation on the active layer of the enhancement mode thin film transistor.

进一步的，所述离子注入时注入粒子为氟或氘的轻质量离子，紫外光源波长为350nm-150nm。Further, during the ion implantation, the implanted particles are light-weight ions of fluorine or deuterium, and the wavelength of the ultraviolet light source is 350nm-150nm.

进一步的，所述的微处理器中还包括多路选择器，所述的多路选择器由多个增强型薄膜晶体管构成，所有的栅极用于接入控制信号，源极漏极作为数据传输线。Further, the microprocessor also includes a multiplexer, the multiplexer is composed of a plurality of enhanced thin film transistors, all gates are used to access control signals, and the source and drain are used as data Transmission line.

进一步的，所述的不同功能的透明电路层包括输入输出层、存储层、逻辑运算层及接口层。Further, the transparent circuit layer with different functions includes an input and output layer, a storage layer, a logical operation layer and an interface layer.

进一步的，所述的透明导电材料至少为以下氧化物中的一种：氧化锌铝AZO、氧化铟锡ITO、掺氟氧化锡FTO。Further, the transparent conductive material is at least one of the following oxides: aluminum zinc oxide AZO, indium tin oxide ITO, and fluorine-doped tin oxide FTO.

进一步的，所述的绝缘层至少为以下氧化物中的一种：氧化铝、二氧化硅、二氧化铪、氧化铪铝。Further, the insulating layer is at least one of the following oxides: aluminum oxide, silicon dioxide, hafnium dioxide, and hafnium aluminum oxide.

本发明的有益效果是：The beneficial effects of the present invention are:

1)针对不同应用的不同需要设计了可用于不同基底上的全透明微处理器，易于集成在各种IOT等智能电子产品中。1) According to the different needs of different applications, a fully transparent microprocessor that can be used on different substrates is designed, which is easy to integrate into various intelligent electronic products such as IOT.

2)采用三维堆叠的结构，相较传统CMOS技术和薄膜晶体管技术减少了75％的面积，降低了成本，提高了片内数据传输速度。2) Using a three-dimensional stacked structure, compared with traditional CMOS technology and thin film transistor technology, the area is reduced by 75%, the cost is reduced, and the on-chip data transmission speed is improved.

3)反相器电路采用高增益、大噪声容限的设计，提高了电路性能。3) The inverter circuit adopts the design of high gain and large noise tolerance, which improves the circuit performance.

4)多路选择器利用薄膜晶体管级联的阵列实现，结构简单，所用晶体管少，易于实现。4) The multiplexer is implemented by cascaded arrays of thin film transistors, has a simple structure, uses fewer transistors, and is easy to implement.

附图说明Description of drawings

图1是本发明的系统结构示意图；Fig. 1 is a schematic diagram of the system structure of the present invention;

图2是本发明的逻辑架构框图和数据通路；Fig. 2 is a logical architecture block diagram and a data path of the present invention;

图3A与3B与3C是三种不同衬底上设计的三维堆叠结构的全透明微处理器的截面图；3A, 3B and 3C are cross-sectional views of fully transparent microprocessors with three-dimensional stacked structures designed on three different substrates;

图4A与4B与4C是三种不同设计的反相器；4A, 4B and 4C are inverters of three different designs;

图5是一种多路选择器(一位8路选择器)的设计；Fig. 5 is the design of a kind of multiplexer (one 8-way selector);

符号说明Symbol Description

21：输入线 22：初始寄存器组21: Input lines 22: Initial register set

23：4选1选择器 24：运算器单元ALU23: 4 to 1 selector 24: Arithmetic Unit ALU

25：运算寄存器 26：输出寄存器25: Operation register 26: Output register

27：指令、时钟模块 31：金属氧化物27: instruction, clock module 31: metal oxide

32：ITO材料 33：氧化铝材料32: ITO material 33: Aluminum oxide material

41：8个1位输入线 42：6条控制线41: 8 1-bit input lines 42: 6 control lines

43：一位输出线43: One bit output line

具体实施方式Detailed ways

下面结合附图和具体实施例对本发明作进一步详述。The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

本发明三维堆叠结构的全透明微处理器每层电路功能层均由薄膜晶体管基电路组成，不同功能层的电路由绝缘层隔开，不同层的互连通过刻蚀出通孔并沉积透明导电材料实现，相对传统技术，电路节省了75％的面积，降低了成本，也减小了电路互连的阻抗，提高了交互效率。如图1实例所示，该微处理器不同功能层主要包括有输入输出层、存储层、逻辑运算层以及接口层。每层电路均由金属氧化物作为有源层的薄膜晶体管构成。不同层之间通过沉积绝缘层氧化铝屏蔽，通过刻蚀通孔，沉积透明导电材料ITO实现片内互连。Each circuit functional layer of the fully transparent microprocessor with a three-dimensional stacked structure of the present invention is composed of thin film transistor-based circuits, circuits of different functional layers are separated by insulating layers, and the interconnections of different layers are etched through holes and deposited transparent conductive Material implementation, compared with traditional technology, the circuit saves 75% of the area, reduces the cost, also reduces the impedance of circuit interconnection, and improves the interaction efficiency. As shown in the example in Fig. 1, the different functional layers of the microprocessor mainly include an input and output layer, a storage layer, a logical operation layer and an interface layer. Each layer of circuit is composed of thin film transistors with metal oxide as the active layer. Different layers are shielded by depositing an insulating layer of aluminum oxide, through holes are etched, and transparent conductive material ITO is deposited to realize on-chip interconnection.

本发明的微处理器的架构通常如图2所示，主要包含多路选择器、运算器、寄存器等构成。在微处理器工作时，数据是从输入端2路选择器21选入，被选择性存入四个初始寄存器22中的一个。随后运算单元ALU24通过四路选择器23选择初始寄存器内存入的值进行取反等单值计算或与运算寄存器25的值进行加减乘除等双值运算。计算得到的值被存入运算寄存器25，根据指令可以被存入输出寄存器26中，也可以调用其进入运算单元执行计算，也可以调用其进入输入选择器模块，存入初始寄存器中。输入输出可以通过接口层与其他模块如传感器连接，实现传感器的感知和响应。运算所需的控制指令和时钟信号来自指令、时钟模块27。The architecture of the microprocessor of the present invention is generally shown in FIG. 2 , which mainly includes a multiplexer, an arithmetic unit, a register, and the like. When the microprocessor is working, the data is selected from the two-way selector 21 at the input end, and is selectively stored in one of the fourinitial registers 22 . Then the arithmetic unit ALU24 selects the value stored in the initial register through the four-way selector 23 to perform single-valued calculations such as negation or to perform double-valued calculations such as addition, subtraction, multiplication, and division with the value of thearithmetic register 25 . The calculated value is stored in theoperation register 25, and can be stored in theoutput register 26 according to the instruction, or it can be called to enter the operation unit to perform calculation, or it can be called to enter the input selector module and stored in the initial register. The input and output can be connected with other modules such as sensors through the interface layer to realize sensor perception and response. The control instructions and clock signals required for operation come from the instruction andclock module 27 .

如图3A、3B、3C所示，本发明主要针对不同需要设计了3种不同基底的三维堆叠结构的全透明微处理器。具体结构可以从截面中看到，ITO材料32构成薄膜晶体管的源漏极，金属氧化物31构成了薄膜晶体管的有源层，氧化铝33作为薄膜晶体管的有源层保护层和栅氧层，栅极依旧采用ITO材料32。在完成第一层电路的制作后，沉积氧化铝33作为不同层的屏蔽层，然后按照以上步骤再完成薄膜晶体管电路的沉积、退火以及制作，不同层的互连通过通孔沉积ITO材料32实现，重复以上步骤就可以实现三维堆叠的薄膜晶体管电路。针对不同应用的需要，三维堆叠的透明薄膜晶体管微处理器的基底可以选择图3A的铝硅玻璃、图3B的PET以及图3C的PI，图3A采用了耐刮抗摔的铝硅玻璃作为三维堆叠的全透明微处理器的基底，一方面能够实现非常好的透明度，另一方面玻璃基底极高的耐受温度能够使得微处理器有较高的制作工艺温度，进而让微处理器能够获得非常好的性能。图3B采用了透明度高、柔韧性好的PET材料作为三维堆叠的全透明微处理器的基底，能够满足穿戴设备所需的柔性，减小了外挂体积，增加了穿戴设备的舒适性，透明度高也使得其易于集成。图3C采用了透明度较好、柔性好、耐受温度高的PI材料作为三维堆叠的全透明微处理器的基底，在既能满足柔性和透明性的要求下，还能做到和铝硅玻璃类似的工艺温度，使得电路的电气性能得到提高。As shown in Figures 3A, 3B, and 3C, the present invention mainly designs fully transparent microprocessors with three-dimensional stacked structures on three different substrates for different needs. The specific structure can be seen from the cross section, theITO material 32 forms the source and drain electrodes of the thin film transistor, themetal oxide 31 forms the active layer of the thin film transistor, and thealuminum oxide 33 serves as the active layer protection layer and the gate oxide layer of the thin film transistor, The gate is still made ofITO material 32 . After the fabrication of the first layer of circuit is completed,aluminum oxide 33 is deposited as the shielding layer of different layers, and then the deposition, annealing and fabrication of the thin film transistor circuit are completed according to the above steps, and the interconnection of different layers is realized by depositingITO material 32 through through holes A three-dimensional stacked thin film transistor circuit can be realized by repeating the above steps. According to the needs of different applications, the substrate of the three-dimensional stacked transparent thin film transistor microprocessor can choose the aluminosilicate glass in Figure 3A, the PET in Figure 3B, and the PI in Figure 3C. The substrate of the stacked fully transparent microprocessor can achieve very good transparency on the one hand, and on the other hand, the extremely high temperature resistance of the glass substrate can make the microprocessor have a higher manufacturing process temperature, so that the microprocessor can obtain very good performance. Figure 3B uses PET material with high transparency and good flexibility as the base of the three-dimensional stacked fully transparent microprocessor, which can meet the flexibility required by wearable devices, reduce the external volume, increase the comfort of wearable devices, and have high transparency Also makes it easy to integrate. Figure 3C uses a PI material with good transparency, good flexibility, and high temperature resistance as the substrate of a three-dimensional stacked fully transparent microprocessor, which can meet the requirements of flexibility and transparency, and can also be combined with aluminosilicate glass A similar process temperature improves the electrical performance of the circuit.

本发明还提供一种具有特殊反相器的三维堆叠全透明微处理器，即其中的运算模块或其他需要缓冲或者反向的模块采用了如图4A所示的反相器，图4A、图4B和图4C分别展示了反馈型反相器、耗尽型负载反相器以及伪CMOS反相器。其中，depletion是耗尽型晶体管，enhancement是增强型晶体管。耗尽型晶体管是对增强型薄膜晶体管的有源层实施离子注入(如在等离子体增强化学的气相沉积设备中进行10分钟，功率65-70W的氘离子注入后得到)或紫外波长光源照射得到的。本发明设计的反相器(图4A)由四个薄膜晶体管构成，其中两个为增强型，两个为耗尽型；第一耗尽型晶体管漏极接电源，第二增强型晶体管栅极接输入，源极接地，漏极接第一耗尽型晶体管源极，第三耗尽型晶体管漏极接电源，栅极接第一耗尽型晶体管源极和第二增强型晶体管的漏极，源极接第一耗尽型晶体管栅极、第四增强型晶体管漏极共同接输出，第四增强型晶体管栅极接输入，源极接地。采用这种结构比常规的反相器具有更高增益和更大噪声容限，性能更佳，如表1。The present invention also provides a three-dimensional stacked fully transparent microprocessor with a special inverter, that is, the arithmetic module or other modules that need to be buffered or reversed adopt the inverter as shown in Figure 4A, Figure 4A, Figure 4A 4B and 4C show a feedback inverter, a depletion load inverter, and a pseudo-CMOS inverter, respectively. Among them, depletion is a depletion transistor, and enhancement is an enhancement transistor. The depletion mode transistor is obtained by ion implantation (such as deuterium ion implantation with a power of 65-70W in a plasma-enhanced chemical vapor deposition equipment for 10 minutes) or ultraviolet wavelength light source irradiation to the active layer of the enhanced thin film transistor. of. The inverter designed in the present invention (Fig. 4A) is made of four thin film transistors, two of them are enhancement type, two are depletion type; Connect to the input, the source is grounded, the drain is connected to the source of the first depletion-mode transistor, the drain of the third depletion-mode transistor is connected to the power supply, and the gate is connected to the source of the first depletion-mode transistor and the drain of the second enhancement-mode transistor , the source is connected to the gate of the first depletion transistor, the drain of the fourth enhancement transistor is connected to the output, the gate of the fourth enhancement transistor is connected to the input, and the source is grounded. Adopting this structure has higher gain and larger noise margin than the conventional inverter, and the performance is better, as shown in Table 1.

表1 三种反相器的参数比较Table 1 Comparison of parameters of three inverters

此外，本发明的微处理器还可以包括有如下的多路选择器，该多路选择器由多个增强型薄膜晶体管的阵列构成，栅极接控制信号，源极漏极作为数据传输线，利用透明薄膜晶体管的开关功能实现多路选择的功能。其中一个一位的8路选择器如图5所示。该多路选择器采用了增强型晶体管的开关功能实现。图5中的一位8路选择器，包括24个晶体管，8条1位输入线41，6条控制线42，一条一位输出线43。工作时，数据从8条1位输入线输入，6条控制线输入分别是一个三位控制指令及其反相后对应的值，这六个值与晶体管的栅极连接，当栅极是高电平时，晶体管的源漏导通，因此一个三位控制指令每次只能让8条链路中的一个链路上的晶体管全部导通，进而能够将输入值传输到输出值中，从而实现8路选择器的功能。In addition, the microprocessor of the present invention may also include the following multiplexer, the multiplexer is composed of a plurality of enhanced thin film transistor arrays, the gate is connected to the control signal, and the source and drain are used as data transmission lines. The switching function of the transparent thin film transistor realizes the function of multiple selection. One of the 8-way selectors is shown in Figure 5. The multiplexer is realized by using the switching function of the enhancement mode transistor. The one-bit 8-way selector in FIG. 5 includes 24 transistors, eight one-bit input lines 41 , sixcontrol lines 42 , and one one-bit output line 43 . When working, the data is input from 8 1-bit input lines, and the 6 control line inputs are a three-bit control command and its corresponding value after inversion. These six values are connected to the gate of the transistor. When the gate is high When the level is high, the source and drain of the transistor are turned on, so a three-bit control command can only make all the transistors on one of the 8 links turn on at a time, so that the input value can be transmitted to the output value, thereby realizing 8-way selector function.

以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Anyone skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present invention. All should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be determined by the protection scope of the claims.

Claims (7)

Translated fromChinese

1.一种三维堆叠的全透明微处理器，其部分或全部电路可执行指令控制及算术逻辑的功能，其特征在于，三维堆叠的全透明微处理器由多个不同功能的透明电路层直接堆叠构成，每层电路层均由透明薄膜晶体管构成，不同透明电路层之间通过绝缘层屏蔽，并通过开设通孔及沉积透明导电材料实现层间互连；所述的不同功能的透明电路层包括输入输出层、存储层、逻辑运算层及接口层；所述的微处理器中包含反相器，所述的反相器由四个薄膜晶体管构成，其中两个为增强型薄膜晶体管，两个为耗尽型薄膜晶体管；第一耗尽型薄膜晶体管漏极接电源，第二增强型薄膜晶体管栅极接输入，源极接地，漏极接第一耗尽型薄膜晶体管源极，第三耗尽型薄膜晶体管漏极接电源，栅极接第一耗尽型薄膜晶体管源极和第二增强型薄膜晶体管的漏极，源极接第一耗尽型薄膜晶体管栅极、第四增强型薄膜晶体管漏极共同接输出，第四增强型薄膜晶体管栅极接输入，源极接地。1. A fully transparent microprocessor of three-dimensional stacking, its part or all circuits can perform instruction control and the function of arithmetic logic, it is characterized in that, the fully transparent microprocessor of three-dimensional stacking is directly formed by a plurality of transparent circuit layers of different functions Stacked structure, each circuit layer is composed of transparent thin film transistors, different transparent circuit layers are shielded by insulating layers, and interlayer interconnection is realized by opening through holes and depositing transparent conductive materials; the transparent circuit layers with different functions It includes an input and output layer, a storage layer, a logical operation layer and an interface layer; the microprocessor includes an inverter, and the inverter is composed of four thin film transistors, two of which are enhanced thin film transistors, and two One is a depletion-type thin film transistor; the drain of the first depletion-type thin-film transistor is connected to the power supply, the gate of the second enhancement-type thin-film transistor is connected to the input, the source is grounded, the drain is connected to the source of the first depletion-type thin-film transistor, and the third The drain of the depletion TFT is connected to the power supply, the gate is connected to the source of the first depletion TFT and the drain of the second enhancement TFT, the source is connected to the gate of the first depletion TFT, the gate of the fourth enhancement TFT The drains of the thin film transistors are commonly connected to the output, the gate of the fourth enhanced thin film transistor is connected to the input, and the source is grounded.2.如权利要求1所述三维堆叠的全透明微处理器，其特征在于，所述的增强型薄膜晶体管的有源层为以下元素中的一种组成的氧化物或多种复合组成的氧化物：锌、锡、铟、铝、铜、镓、银。2. The fully transparent microprocessor stacked in three dimensions according to claim 1, wherein the active layer of the enhanced thin film transistor is an oxide composed of one of the following elements or an oxide composed of multiple composites Substances: zinc, tin, indium, aluminum, copper, gallium, silver.3.如权利要求1所述三维堆叠的全透明微处理器，其特征在于，所述的耗尽型薄膜晶体管是对增强型薄膜晶体管的有源层实施离子注入或紫外波长光源照射得到的。3 . The three-dimensionally stacked fully transparent microprocessor according to claim 1 , wherein the depletion mode thin film transistor is obtained by performing ion implantation or ultraviolet light source irradiation on the active layer of the enhancement mode thin film transistor. 4 .4.如权利要求3所述三维堆叠的全透明微处理器，其特征在于，所述离子注入时注入粒子为氟或氘的轻质量离子，紫外光源波长为350nm-150nm。4 . The three-dimensionally stacked fully transparent microprocessor according to claim 3 , wherein the particles implanted during the ion implantation are light-weight ions of fluorine or deuterium, and the wavelength of the ultraviolet light source is 350nm-150nm.5.如权利要求1所述的三维堆叠的全透明微处理器，其特征在于，所述的微处理器中还包括多路选择器，所述的多路选择器由多个增强型薄膜晶体管构成，所有的栅极用于接入控制信号，源极漏极作为数据传输线。5. The fully transparent microprocessor of three-dimensional stacking as claimed in claim 1, is characterized in that, also comprises multiplexer in the described microprocessor, and described multiplexer is made up of a plurality of enhanced thin film transistors Composition, all the gates are used to access control signals, and the source and drain are used as data transmission lines.6.如权利要求1所述的三维堆叠的全透明微处理器，其特征在于，所述的透明导电材料至少为以下氧化物中的一种：氧化锌铝AZO、氧化铟锡ITO、掺氟氧化锡FTO。6. The three-dimensionally stacked fully transparent microprocessor according to claim 1, wherein the transparent conductive material is at least one of the following oxides: zinc aluminum oxide AZO, indium tin oxide ITO, fluorine-doped Tin oxide FTO.7.如权利要求1所述的三维堆叠的全透明微处理器，其特征在于，所述的绝缘层至少为以下氧化物中的一种：氧化铝、二氧化硅、二氧化铪、氧化铪铝。7. The fully transparent microprocessor stacked in three dimensions according to claim 1, wherein the insulating layer is at least one of the following oxides: aluminum oxide, silicon dioxide, hafnium dioxide, hafnium oxide aluminum.

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