CN111426872B - A short-circuit protection method under high-frequency high-voltage pulses for detecting multi-level voltage dips - Google Patents
A short-circuit protection method under high-frequency high-voltage pulses for detecting multi-level voltage dipsDownload PDFInfo
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Abstract
Translated fromChinese
Description
Translated fromChinese技术领域technical field
本发明属于变频电机绝缘耐电晕测试的短路保护技术领域，具体地讲，是涉及一种检测多级电压突降的高频高压脉冲下短路保护方法。The invention belongs to the technical field of short-circuit protection for the insulation corona resistance test of variable frequency motors, and in particular relates to a short-circuit protection method under high-frequency high-voltage pulses for detecting multi-level voltage sudden drops.
背景技术Background technique
随着电力电子技术的发展，变频电机广泛应用于风力发电、高速铁路、新能源汽车和舰船驱动等领域。变频电机工作在脉宽调制(PWM)电压下，绝缘系统承受与PWM开断频率相同的高频脉冲电压的冲击，由于定子端部阻抗不匹配等原因，容易产生过电压，当此过电压在电机绕组内部分配不均时，局部区域电压易超过局部放电的起始放电电压，从而发生局部放电，加快变频电机绝缘的电老化，导致变频电机绝缘早期失效事故。With the development of power electronics technology, variable frequency motors are widely used in fields such as wind power generation, high-speed railways, new energy vehicles and ship drives. The variable frequency motor works under the pulse width modulation (PWM) voltage, and the insulation system is subjected to the impact of the high frequency pulse voltage with the same PWM breaking frequency. When the internal distribution of the motor windings is uneven, the voltage in the local area is likely to exceed the initial discharge voltage of the partial discharge, resulting in partial discharge, accelerating the electrical aging of the insulation of the variable frequency motor, and causing the early failure of the insulation of the variable frequency motor.
为避免变频电机绝缘系统早期失效，国际电工技术委员会(IEC)提出变频电机在投入使用前，应在重复脉冲电压下，分别对低压散绕和高压成型电机，测试局部放电起始放电电压及耐电晕寿命，作为评估变频电机绝缘系统的重要参数。In order to avoid the early failure of the insulation system of the variable frequency motor, the International Electrotechnical Commission (IEC) proposed that before the variable frequency motor is put into use, the low-voltage random winding and high-voltage forming motors should be tested under the repeated pulse voltage. Corona life, as an important parameter to evaluate the insulation system of variable frequency motor.
在对变频电机绝缘进行局部放电起始放电电压及耐电晕测试时，实时监测并判断试样是否击穿，并且在击穿后及时关断脉冲电源设备是保证设备安全及测试人员安全的重要技术。监测试样的击穿状态即等效于监测高压脉冲电源的输出负载短路状态，并将此短路状态反馈给脉冲电源使其快速关断输出。When performing partial discharge initial discharge voltage and corona resistance tests on the insulation of variable frequency motors, it is important to monitor and judge whether the sample is broken down in real time, and to turn off the pulse power equipment in time after the breakdown is important to ensure the safety of the equipment and the safety of the testers. technology. Monitoring the breakdown state of the sample is equivalent to monitoring the short-circuit state of the output load of the high-voltage pulse power supply, and feeding this short-circuit state to the pulse power supply to quickly turn off the output.
重复脉冲电压连接容性待测绝缘系统工作时，由于充放电瞬间的电流幅值和短路时的幅值基本相同，系统工作在电力电子器件开断产生的强电磁干扰环境下，传统正弦及直流电压下阈值短路保护电路存在以下问题，即仅有单个电压比较阈值存在，如阈值设定较高，会降低保护运动的灵敏度，如阈值设定较低，在强电磁干扰环境下易产生误动作，因此传统正弦和直流电压下的短路保护技术在重复脉冲电压下已不再适用。目前国内外对脉冲电源进行耐电晕测试的短路保护措施报道较少，多集中在对电力电子器件的短路保护，已有的短路保护方案无法适用于电力电子器件封装完整的模块式设备，且短路后实施保护措施的时间较长，不利于保护器件和人身安全。When the repetitive pulse voltage is connected to the capacitive insulation system to be tested, since the current amplitude at the moment of charging and discharging is basically the same as the amplitude during short circuit, the system works in the environment of strong electromagnetic interference generated by the breaking of power electronic devices. The short-circuit protection circuit with lower threshold value has the following problems, that is, only a single voltage comparison threshold exists. If the threshold value is set higher, the sensitivity of the protection movement will be reduced. , so traditional short-circuit protection techniques under sinusoidal and DC voltages are no longer applicable under repetitive pulse voltages. At present, there are few reports on short-circuit protection measures for corona resistance test of pulsed power supply at home and abroad, and most of them focus on the short-circuit protection of power electronic devices. It takes a long time to implement protective measures after a short circuit, which is not conducive to protecting devices and personal safety.
发明内容SUMMARY OF THE INVENTION
为了克服现有技术中的不足，本发明提供一种检测多级电压突降的高频高压脉冲下短路保护方法，能够实时监测试样击穿状态并在击穿后的微秒级时间内启动短路保护，保护设备和人身安全。In order to overcome the deficiencies in the prior art, the present invention provides a short-circuit protection method under high-frequency high-voltage pulses for detecting multi-level voltage dips, which can monitor the breakdown state of the sample in real time and start within microseconds after the breakdown. Short circuit protection to protect equipment and personal safety.
为了实现上述目的，本发明采用的技术方案如下：In order to achieve the above object, the technical scheme adopted in the present invention is as follows:
一种检测多级电压突降的高频高压脉冲下短路保护方法，包括如下步骤：A short-circuit protection method under high-frequency high-voltage pulses for detecting multi-level voltage dips, comprising the following steps:
(S1)通过电压传感器来采集试样两端的脉冲电压信号，并按比例缩小后反馈到核心控制板；(S1) Collect the pulse voltage signal at both ends of the sample through the voltage sensor, and feed it back to the core control board after scaling down;
(S2)对采集到的脉冲电压信号经运算放大电路做跟随处理；(S2) follow-up processing is performed on the collected pulse voltage signal through the operational amplifier circuit;
(S3)通过获取跟随处理后的脉冲电压信号从而得到分别代表正、负极性的两个脉冲电压信号；(S3) two pulse voltage signals representing positive and negative polarities are obtained by acquiring the pulse voltage signal after the follow-up processing;
(S4)对分别代表正、负极性的脉冲电压信号经过多级并列且幅值由小到大的电压比较器进行处理，从而输出多个高、低电平信号给FPGA的IO口；(S4) The pulse voltage signals representing positive and negative polarities respectively are processed through multi-level parallel voltage comparators with amplitudes from small to large, thereby outputting multiple high and low level signals to the IO ports of the FPGA;
(S5)FPGA检测接收到的代表正、负极性的高、低电平信号，由此实时确定电压等级，并根据电压等级的降落级数判断是否启动短路保护。(S5) The FPGA detects the received high and low level signals representing positive and negative polarities, thereby determining the voltage level in real time, and judging whether to activate short-circuit protection according to the drop level of the voltage level.
进一步地，所述步骤(S1)中的比例为1000:1。Further, the ratio in the step (S1) is 1000:1.
进一步地，所述步骤(S2)中经运算放大电路做跟随处理包括同相跟随与反相跟随。Further, in the step (S2), the follow-up processing performed by the operational amplifier circuit includes in-phase follow-up and anti-phase follow-up.
进一步地，所述步骤(S4)中由于高压脉冲测试设备输出的电压为占空比50％的双极性方波脉冲，当同相跟随处理后的代表正极性的电压信号峰值高于相应的电压比较器的比较值时，比较器输出50％占空比的高、低电平信号给FPGA；若正极性电压信号峰值低于相应的电压比较器的比较值时，比较器持续输出低电平信号给FPGA；当反相跟随处理后的代表负极性的电压信号峰值高于相应的电压比较器的比较值时，比较器输出50％占空比的高、低电平信号给FPGA；若电压信号峰值低于相应的电压比较器的比较值时，比较器持续输出低电平信号给FPGA。Further, in the step (S4), since the voltage output by the high-voltage pulse test equipment is a bipolar square wave pulse with a duty cycle of 50%, the peak value of the voltage signal representing the positive polarity after the in-phase follow-up processing is higher than the corresponding voltage. When the comparison value of the comparator, the comparator outputs high and low level signals with a 50% duty cycle to the FPGA; if the peak value of the positive voltage signal is lower than the comparison value of the corresponding voltage comparator, the comparator continues to output a low level signal to the FPGA; when the peak value of the voltage signal representing the negative polarity after the inversion follow-up process is higher than the comparison value of the corresponding voltage comparator, the comparator outputs a high and low level signal with a 50% duty cycle to the FPGA; if the voltage When the peak value of the signal is lower than the comparison value of the corresponding voltage comparator, the comparator continues to output a low level signal to the FPGA.
具体地，所述步骤(S5)中当电压大幅减少，电压等级下降，原先已达到电压等级对应的电压比较器输出端的50％占空比的高、低电平信号变为持续的低电平信号，FPGA由此判断电压等级发生下降，当电压等级在短时间内降落超过两级时，则判定试样被击穿，启动短路保护；并且当电压等级本就处于最低一级时，一级信号消失时同样认定试样击穿，启动短路保护。Specifically, in the step (S5), when the voltage is greatly reduced and the voltage level is lowered, the high and low level signals of the 50% duty cycle of the output terminal of the voltage comparator that have previously reached the voltage level corresponding to the voltage level become a continuous low level Signal, the FPGA judges that the voltage level has dropped. When the voltage level drops more than two levels in a short time, it is judged that the sample is broken down and short-circuit protection is activated; and when the voltage level is already at the lowest level, the first level When the signal disappears, it is also determined that the sample is broken down, and short-circuit protection is activated.
与现有技术相比，本发明具有以下有益效果：Compared with the prior art, the present invention has the following beneficial effects:
(1)本发明由于设定多个电压比较器，无需反复调节电压比较器的比较值，对短路状态判断更加快速灵活，而设定电压等级下降超过两级时引发短路保护是为了避免脉冲电压上升沿、下降沿处的过电压在经过某级电压比较器处理后产生信号毛刺输入到FPGA，解决了传统短路保护误动作的问题，使本发明可应用在电力电子器件开断产生的强电磁干扰环境下。(1) In the present invention, since multiple voltage comparators are set, there is no need to repeatedly adjust the comparison value of the voltage comparators, and the judgment of the short-circuit state is more rapid and flexible, and the short-circuit protection is triggered when the set voltage level drops more than two levels to avoid pulse voltage. The overvoltage at the rising edge and the falling edge is processed by a certain level of voltage comparator to generate signal glitches and input to the FPGA, which solves the problem of malfunction of traditional short-circuit protection, so that the present invention can be applied to the strong electromagnetic field generated by the breaking of power electronic devices. in an interfering environment.
(2)本发明的保护为双极性保护，比单极性保护更加快速稳定可靠，避免了单极性保护中保护延时的问题，可有效保护系统和测试人员的安全。(2) The protection of the present invention is bipolar protection, which is more rapid, stable and reliable than unipolar protection, avoids the problem of protection delay in unipolar protection, and can effectively protect the safety of the system and testers.
附图说明Description of drawings
图1为本发明的系统结构示意图。FIG. 1 is a schematic diagram of the system structure of the present invention.
图2为本发明电压保护的比较器电压转换信号。FIG. 2 is a comparator voltage conversion signal for voltage protection of the present invention.
图3为本发明电压保护的多级电压信号转换电路。FIG. 3 is a multi-level voltage signal conversion circuit for voltage protection of the present invention.
图4为本发明电压保护下的试样击穿瞬间输出脉冲变化过程。FIG. 4 is the change process of the output pulse at the instant of breakdown of the sample under the voltage protection of the present invention.
具体实施方式Detailed ways
下面结合附图和实施例对本发明作进一步说明，本发明的实施方式包括但不限于下列实施例。The present invention will be further described below with reference to the accompanying drawings and examples. The embodiments of the present invention include but are not limited to the following examples.
实施例Example
如图1所示，一种检测多级电压突降的高频高压脉冲下短路保护方法，包括在试样两端设置电压传感器来采集脉冲电压信号，将采集的信号按1000:1的比例缩小后通过信号线传输到核心控制板。脉冲电压信号到达控制板后经运算放大电路分别做同相跟随及反相跟随处理，得到了分别代表正、负极性的两个脉冲电压信号。在运算放大电路后设置多级并列的电压比较器，比较幅值由小到大分布。两个分别代表正、负极性的脉冲电压信号同时经多级电压比较器处理，输出分别代表正、负极性的多个高、低电平信号到FPGA，通过FPGA内部软件逻辑开关锁定最高电压等级，最后判断最高电压等级在短时间内突降超过两级或是最高电压等级处于最低一级然后下降为零级时即可判断试样击穿状态。As shown in Figure 1, a short-circuit protection method under high-frequency high-voltage pulses for detecting multi-level voltage dips includes setting voltage sensors at both ends of the sample to collect pulsed voltage signals, and reducing the collected signals by a ratio of 1000:1 Then it is transmitted to the core control board through the signal line. After the pulse voltage signal reaches the control board, it is processed by the operational amplifier circuit to follow in-phase and in-phase, respectively, and two pulse voltage signals representing positive and negative polarities are obtained. A multi-stage parallel voltage comparator is set after the operational amplifier circuit, and the comparison amplitude is distributed from small to large. Two pulse voltage signals representing positive and negative polarities are simultaneously processed by a multi-level voltage comparator, and multiple high and low level signals representing positive and negative polarities are output to the FPGA, and the highest voltage level is locked through the internal software logic switch of the FPGA , and finally judge the breakdown state of the sample when the highest voltage level suddenly drops more than two levels in a short time or when the highest voltage level is at the lowest level and then drops to zero level.
如图2所示，电压比较器将不规则的脉冲电压信号转换为幅值一定的标准方波电压信号输入到FPGA中，当处理后的脉冲电压峰值高于比较器的比较值，则输出周期性的50％占空比的高、低方波电平。因为脉冲电压是占空比为50％的双极性电压，对于正极性端的电压比较器，当外加电压处于正极性时刻且处理后的电压信号峰值大于电压比较值时，比较器输出高电平信号，当外加电压翻转为负极性后，处理后的电压信号峰值必小于正极性端的比较器的比较值，所以输出低电平信号，从而得到了周期性的50％占空比的高、低方波电平；而当脉冲电压处于正极性时刻且处理后的电压信号峰值低于比较器的比较值，则比较器持续输出低电平信号。通过对不同电压比较器输出的方波信号的高电平脉宽计数，即可判定当前正极性电压所处的电压等级，从而根据电压等级的降落判定短路状态。而负极性电压与其比较器输出的高、低电平信号同理。As shown in Figure 2, the voltage comparator converts the irregular pulse voltage signal into a standard square wave voltage signal with a certain amplitude and inputs it into the FPGA. When the processed pulse voltage peak value is higher than the comparison value of the comparator, the output cycle High and low square wave levels for a characteristic 50% duty cycle. Because the pulse voltage is a bipolar voltage with a duty cycle of 50%, for a voltage comparator with positive polarity, when the applied voltage is at a positive polarity moment and the peak value of the processed voltage signal is greater than the voltage comparison value, the comparator outputs a high level When the applied voltage is reversed to negative polarity, the peak value of the processed voltage signal must be less than the comparison value of the comparator at the positive polarity end, so a low level signal is output, thereby obtaining a periodic high and low duty cycle of 50%. Square wave level; and when the pulse voltage is at a positive polarity moment and the peak value of the processed voltage signal is lower than the comparison value of the comparator, the comparator continues to output a low level signal. By counting the high-level pulse widths of the square wave signals output by different voltage comparators, the voltage level of the current positive voltage can be determined, and the short-circuit state can be determined according to the drop of the voltage level. The negative voltage is the same as the high and low level signals output by its comparator.
如图3所示为多级电压信号转换原理。当表示正极性的脉冲电压信号经过多级比较电路，电压峰值大于第一级比较器的比较值时，第一级比较器输出周期性的50％占空比的高、低电平信号到FPGA，电压峰值大于第二级比较器的比较值时，第二级比较器也输出周期性的50％占空比的高、低电平信号到FPGA，电压峰值未大于相应比较器的比较值时，则持续输出低电平信号到FPGA，以此类推，负极性的电压信号同理。由此，FPGA会接收到多个代表电压等级的电平信号。当相应IO口输入周期性的50％占空比的高、低电平，即检测到高电平信号存在时，则对应的电压等级存在，实时检测刷新当前存在的最高一级的电压信号，当试样被击穿以后，电压快速下降，相应比较器的输出由50％占空比高、低电平变为持续低电平，由此可判断电压的下降。当短时内电压等级下降超过两级，则认定试样击穿，启动短路保护。而当电压等级本就处于最低一级时，一级信号消失时同样认定试样击穿，启动短路保护。Figure 3 shows the principle of multi-level voltage signal conversion. When the pulse voltage signal representing the positive polarity passes through the multi-stage comparison circuit, and the voltage peak value is greater than the comparison value of the first-stage comparator, the first-stage comparator outputs periodic high and low level signals of 50% duty cycle to the FPGA , when the voltage peak value is greater than the comparison value of the second-stage comparator, the second-stage comparator also outputs periodic high and low-level signals of 50% duty cycle to the FPGA, and when the voltage peak value is not greater than the comparison value of the corresponding comparator , the low-level signal is continuously output to the FPGA, and so on, the same is true for the negative voltage signal. As a result, the FPGA will receive multiple level signals representing voltage levels. When the corresponding IO port inputs periodic high and low levels of 50% duty cycle, that is, when the presence of a high level signal is detected, the corresponding voltage level exists, and the current highest level voltage signal is detected and refreshed in real time. When the sample is broken down, the voltage drops rapidly, and the output of the corresponding comparator changes from a high and low level of a 50% duty cycle to a continuous low level, from which the voltage drop can be judged. When the voltage level drops by more than two levels in a short time, it is determined that the sample is broken down and short-circuit protection is activated. When the voltage level is already at the lowest level, when the level-1 signal disappears, it is also determined that the sample is broken down, and short-circuit protection is activated.
设置多级电压保护，是因为理想状态下高压脉冲耐电晕测试系统负载电容试样击穿瞬间，试样端电压信号会骤然降为零，但在极不均匀电场下，试样击穿之前可能会首先经历电晕放电到火花放电，再过渡到电弧放电直至击穿的过程。如图4所示，高压脉冲耐电晕测试系统输出脉冲电压信号变化过程，理想状态下，不存在此过渡过程或者过渡时间极短，负载电容试样击穿时电压可迅速降为零，但实际可能是一个曲折下降的过程。在曲折下降的过程中，若只有单级电压比较器存在，则当电压比较值设定较低时，电压信号峰值超过比较值较多，试样被击穿时，电压下降缓慢，要较长时间才能低于电压比较值，FPGA的输入信号才发生改变，引发短路保护；若电压比较值设定较高，当外加电压峰值一直小于电压比较值时，则输入FPGA的电平信号持续为低电平，无法判断击穿状态启动短路保护，因此设定多个电压比较器，从而避免了反复调节电压比较器的比较值，使对短路状态的判断更加快速灵活。为避免脉冲电压上升沿、下降沿处的过电压在经过某级电压比较器处产生的毛刺影响逻辑判断，而引发电压保护误动作，设定电压等级下降超过两级时触发短路保护。双极性保护比单极性保护更加快速稳定可靠，避免了单极性保护设置在正极性侧，试样击穿发生在负极性侧，需等待电压极性反转为正极性后才能检测到电平信号变化，启动保护。Multi-level voltage protection is set up because in ideal conditions, when the load capacitor sample of the high-voltage pulse corona resistance test system breaks down, the voltage signal at the sample terminal will suddenly drop to zero, but under the extremely uneven electric field, before the sample breaks down It may first experience corona discharge to spark discharge, then transition to arc discharge until breakdown. As shown in Figure 4, the high-voltage pulse corona resistance test system outputs the pulse voltage signal change process. Under ideal conditions, there is no such transition process or the transition time is extremely short. When the load capacitor sample breaks down, the voltage can quickly drop to zero, but It may actually be a tortuous downward process. In the process of tortuous drop, if only a single-stage voltage comparator exists, when the voltage comparison value is set to a lower value, the peak value of the voltage signal exceeds the comparison value more, and when the sample is broken down, the voltage drops slowly and takes a longer time. The time can be lower than the voltage comparison value, and the input signal of the FPGA changes, causing short-circuit protection; if the voltage comparison value is set higher, when the peak value of the applied voltage is always lower than the voltage comparison value, the level signal input to the FPGA continues to be low. Therefore, multiple voltage comparators are set to avoid repeated adjustment of the comparison value of the voltage comparators, making the judgment of the short-circuit state more rapid and flexible. In order to avoid the overvoltage at the rising edge and falling edge of the pulse voltage passing through a certain level of voltage comparator, it will affect the logic judgment and cause the malfunction of the voltage protection. The short circuit protection is triggered when the voltage level drops more than two levels. Bipolar protection is faster, more stable and more reliable than unipolar protection. It avoids that the unipolar protection is set on the positive side, and the sample breakdown occurs on the negative side. It can only be detected after the voltage polarity is reversed to positive polarity. When the level signal changes, the protection is activated.
上述实施例仅为本发明的优选实施例，并非对本发明保护范围的限制，但凡采用本发明的设计原理，以及在此基础上进行非创造性劳动而做出的变化，均应属于本发明的保护范围之内。The above-mentioned embodiments are only the preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention. Any changes made by adopting the design principles of the present invention and non-creative work on this basis shall belong to the protection of the present invention. within the range.
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