CN111323952A - LCD mother board - Google Patents

Abstract

The invention provides a liquid crystal display mother board, which comprises a substrate and a plurality of display units distributed on the substrate in an array manner, wherein each display unit comprises a display area and a functional signal line which surrounds the display area and is arranged on the surface of the display area; the same function signal line of adjacent display element passes through concatenation line electrical contact, and wherein, the concatenation line is formed with a plurality of smooth structures including overlapping the first portion and the second portion that set up mutually on the edge in overlap region, and this smooth structure is obtuse angle or circular arc, is difficult for accumulating electric charge, avoids forming the point discharge condition and takes place, promotes the production yield of liquid crystal display mother board, reduction in production cost.

Description

LCD mother board

Technical Field

The invention relates to the technical field of display, in particular to a liquid crystal display mother board.

Background

With the diversity of the types of the thin film transistor displays, the early market demand and the consideration of the matching of factory capacity, more and more panel manufacturers mix and design the liquid crystal display panels with different sizes on the same mother board for preparation and cutting.

A plurality of liquid crystal display panels are arranged on a mother board in an array mode, and in order to reduce the time of testing and liquid crystal curing, test signal lines of different exposure areas in the plurality of liquid crystal display panels need to be spliced together. Because the width of the signal line on the left side and the width of the signal line on the right side are smaller, the precision in the splicing process cannot be completely consistent with the theoretical design, the deviation from top to bottom and left to right exists, wrinkles are caused, sharp corners are easily formed on the splicing seams, and point discharge occurs.

Therefore, in the prior art, when signal lines between a plurality of liquid crystal panels are spliced, a sharp corner is easily formed on a splicing seam, charges are easily accumulated at the sharp corner, and an electrostatic phenomenon easily occurs in the simultaneous preparation process of the plurality of liquid crystal panels, so that the production yield of each liquid crystal panel is directly influenced, and improvement is needed.

Disclosure of Invention

The embodiment of the application provides a liquid crystal display mother board, can solve among the prior art when the signal line concatenation between a plurality of liquid crystal display panels, form the closed angle easily on the concatenation seam, this closed angle extremely easy accumulated charge, the easy emergence electrostatic phenomenon in a plurality of liquid crystal display panels simultaneous preparation process, the technical problem of the production yield of every liquid crystal display panel of direct influence.

In order to solve the above problems, the technical scheme provided by the invention is as follows:

the invention provides a liquid crystal display mother board, which comprises a substrate and a plurality of display units distributed on the substrate in an array manner, wherein each display unit comprises a display area and a functional signal line which surrounds the display area and is arranged on the surface of the display area;

the same function signal line of the adjacent display units is electrically contacted through a splicing line, wherein the splicing line comprises a first part and a second part which are arranged in an overlapped mode, and a plurality of smooth structures are formed on the edge of an overlapped area.

According to a preferred embodiment of the present invention, a first zooming portion is disposed at an end of the first portion, a second zooming portion is disposed at an end of the second portion, the first zooming portion forms a first smooth structure on a surface of the second portion, the second zooming portion forms a second smooth structure on a surface of the first portion, and both the first smooth structure and the second smooth structure form an obtuse angle or an arc.

According to a preferred embodiment of the present invention, the first zooming part and the second zooming part are both one or two combined patterns of a triangle, a trapezoid and an arc.

According to a preferred embodiment of the present invention, the width of the first portion and the width of the second portion are equal and are arranged in parallel to form the smooth structure, and the smooth structure is a straight angle.

According to a preferred embodiment of the invention, said first part and said second part are attached together in the overlapping area by soldering, pressing or anisotropic conductive glue.

According to a preferred embodiment of the present invention, the splicing line and the source/drain electrode in the display unit are disposed on the same layer, and the splicing line and the source/drain electrode are prepared by the same mask.

According to a preferred embodiment of the present invention, a shielding structure is disposed between any two adjacent splicing lines, and the shielding structure is a color resistance layer.

According to a preferred embodiment of the present invention, the functional signal line is provided with a plurality of test signal access points, and the test signal access points are electrically contacted with the test signal terminals at the edge of the display area.

According to a preferred embodiment of the present invention, when the liquid crystal display motherboard performs the driving circuit detection process, the functional signal lines sequentially access the detection signals and control the test signal access points to close, so as to individually detect adjacent driving circuits in the display unit.

According to a preferred embodiment of the present invention, when the liquid crystal display mother board performs the alignment process, the functional signal lines simultaneously access the same alignment signal and control the test signal access point to open, so as to input the same alignment signal to the liquid crystal in the display unit.

The invention has the beneficial effects that: the liquid crystal display mother board comprises a substrate and a plurality of display units distributed on the substrate in an array manner, wherein each display unit comprises a display area and a functional signal line which surrounds the display area and is arranged on the surface of the display area; the same function signal line of adjacent display element passes through concatenation line electrical contact, and wherein, the concatenation line is formed with a plurality of smooth structures including overlapping the first portion and the second portion that set up mutually on the edge in overlap region, and this smooth structure is obtuse angle or circular arc, is difficult for accumulating electric charge, avoids forming the point discharge condition and takes place, promotes the production yield of liquid crystal display mother board, reduction in production cost.

Drawings

In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a liquid crystal display mother panel according to an embodiment of the present application;

fig. 2 is a schematic view of a partial structure of a mother board for a liquid crystal display according to an embodiment of the present disclosure;

FIG. 3 is a schematic diagram of a splicing structure of splicing lines in a liquid crystal display mother board according to an embodiment of the present application;

FIG. 4 is a schematic diagram of another splicing structure of a liquid crystal display mother board according to an embodiment of the present disclosure;

fig. 5 is a schematic diagram of another splicing structure of a splicing line in a liquid crystal display mother board according to an embodiment of the present application.

Detailed Description

The following description of the various embodiments refers to the accompanying drawings that illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals, and broken lines in the drawings indicate that the elements do not exist in the structures, and only the shapes and positions of the structures are explained.

The invention aims at the technical problems that in the prior art, when signal lines among a plurality of liquid crystal panels are spliced, sharp corners are easily formed on splicing seams, charges are easily accumulated at the sharp corners, static phenomena easily occur in the process of simultaneously preparing the plurality of liquid crystal panels, and the production yield of each liquid crystal panel is directly influenced.

As shown in fig. 1, an embodiment of the present application provides a structural schematic diagram of a liquid crystaldisplay mother board 100, which includes asubstrate 1001 and a plurality of display units distributed in an array on thesubstrate 1001, for example, each of thedisplay units 101, 201, 301, 401, 501, and 601 includes a display area a and a display area B, where the size of the display area a is larger than that of the display area B. According to the display panel, the display areas with different sizes are designed on the same substrate in a mixed mode, and therefore the utilization rate of thesubstrate 1001 is improved.

Each display unit includes the display area and surrounds the function signal line of display area and surface setting, and the same function signal line of adjacent display unit passes through splice line electric contact, and the splice line is formed with a plurality of smooth structures including overlapping the first portion and the second portion that set up mutually on the edge in overlap area, and this smooth structure is difficult to the accumulated charge, avoids the condition of discharging to take place, promotes the production yield of liquid crystal display mother board, reduction in production cost. For example, thefunction signal line 1031 of thedisplay unit 101, thefunction signal line 2031 of thedisplay unit 201, and thefunction signal line 2031 of thedisplay unit 301 are each inputted with a drive circuit detection signal. Thefunctional signal wire 1031 array test pad C, thefunctional signal wire 2031 array test pad C and thefunctional signal wire 3031 array test pad C are electrically contacted through splicing wires; the liquid crystal alignment signal is input to thefunctional signal line 1032 of thedisplay unit 101, thefunctional signal line 2032 of thedisplay unit 201, and thefunctional signal line 2032 of thedisplay unit 301. Thefunctional signal line 1032, thefunctional signal line 2032, and thefunctional signal line 3032 are electrically connected to each other via a bonding line.

Referring to fig. 2, a schematic diagram of a partial structure of a liquid crystal display mother panel is provided in an embodiment of the present application, and the applicant selectsadjacent display units 101 and 201 from a liquid crystaldisplay mother panel 100 to illustrate the invention of the present application.

Thedisplay unit 101 includes afirst display area 1021 and asecond display area 1022, thedisplay unit 201 includes athird display area 2021 and afourth display area 2022, the size of thefirst display area 1021 is equal to the size of thethird display area 2021, the size of thesecond display area 1022 is equal to the size of thefourth display area 2022, the size of thefirst display area 1021 is larger than that of thesecond display area 1022, and the size of thethird display area 2021 is larger than that of thefourth display area 2022.

When thefirst display area 1021, thesecond display area 1022, thethird display area 2021 and thefourth display area 2022 are used for driving circuit test, an external electric signal is required to input a scanning voltage and a data signal to the display areas to light up the pixel units, the driving circuit test of the display areas is performed, meanwhile, a liquid crystal alignment signal is also required to be input externally, different electric signals are provided for the common electrode and the pixel electrode on one side of the liquid crystal box, an electric field is generated to solidify the chip integrated circuit, the rubber frame and the liquid crystal in different areas in the liquid crystal box, therefore, the left sides of thefirst display area 1021 and thesecond display area 1022 are respectively provided with a drivingtest signal terminal 1041 and a drivingtest signal terminal 1042, the right sides of thefirst display area 1021 and thesecond display area 1022 are respectively provided with a liquid crystalalignment signal terminal 1043 and a liquid crystal alignment signal terminal, the functional signal lines are provided with a plurality of test signal access points, and the left sides of thethird display area 2021 and thefourth display area 2022 are respectively in one-to one correspondence with a A drivingtest signal terminal 2041 and a drivingtest signal terminal 2042 are provided, and a liquid crystalalignment signal terminal 2043 and a liquid crystalalignment signal terminal 2044 are provided on the right side of thethird display region 2021 and thefourth display region 2022, respectively. Thefunctional signal line 1031 is electrically contacted with the drivingtest signal terminal 1041 and the drivingtest signal terminal 1042, thefunctional signal line 2031 is electrically contacted with the drivingtest signal terminal 2041 and the drivingtest signal terminal 2042, thefunctional signal line 1032 is electrically contacted with the liquid crystalalignment signal terminal 1043 and the liquid crystalalignment signal terminal 1044, thefunctional signal line 2032 is electrically contacted with the liquid crystalalignment signal terminal 2043 and the liquid crystalalignment signal terminal 2044, thefunctional signal line 1031 is electrically contacted with thefunctional signal line 2031 through thesplicing line 105, and thefunctional signal line 1032 is electrically contacted with thefunctional signal line 2032 through thesplicing line 205.

The functional signal line is provided with a plurality of test signal access points, and the test signal access points are electrically contacted with the test signal terminals at the edge of the related display area. When the liquid crystal display mother board carries out a circuit detection process, the functional signal lines are sequentially connected with detection signals and control the test signal access points to be closed, and adjacent driving circuits in each display unit are independently detected. For example, the plurality of test signal access points in thefunctional signal line 1031 are electrically contacted with the drivingtest signal terminal 1041 and the drivingtest signal terminal 1042 respectively, the plurality of test signal access points in thefunctional signal line 2031 are electrically contacted with the drivingtest signal terminal 2041 and the drivingtest signal terminal 2042 respectively, and the test signal access points are sequentially closed, so as to individually detect each driving circuit in thefirst display area 1021, thesecond display area 1022, thethird display area 2021, and thefourth display area 2022.

When the liquid crystal display mother board carries out the alignment process, the functional signal lines are simultaneously connected with the same alignment signals and control the test signal access points to be opened, so that the same liquid crystal alignment signals are input into the adjacent display units. For example, the plurality of test signal access points in thefunctional signal line 1032 are electrically contacted with the liquid crystalalignment signal terminal 1043 and the liquid crystalalignment signal terminal 1044 respectively, the plurality of test signal access points in thefunctional signal line 2032 are electrically contacted with the liquid crystalalignment signal terminal 2043 and the liquid crystalalignment signal terminal 2044 respectively, and the plurality of test signal access points are simultaneously opened, so as to simultaneously align the liquid crystals in thefirst display area 1021, thesecond display area 1022, thethird display area 2021, and thefourth display area 2022.

Since a plurality of display regions are simultaneously arranged on one substrate, the exposure position accuracy between the display regions cannot be completely consistent with the theoretical design, but there is a case where there is a vertical and horizontal deviation from the theoretical value. Therefore, the display unit is in the in-process of actual production, same function signal line passes through concatenation line electrical contact, the closed angle appears in the possible concatenation seam of concatenation line, this closed angle department is the easy accumulated charge discharge extremely, and then cause the static blast injury on the processing procedure, seriously influence the production yield of product, so set the concatenation line to overlap the first part and the second part that set up mutually, be formed with a plurality of smooth structures on the edge in overlap area, the preferred circular arc of smooth structure or obtuse angle, avoid the discharge condition to take place, promote the production yield of liquid crystal display mother board, and the production cost is reduced.

As shown in fig. 3, an embodiment of the present application provides a schematic diagram of a splicing structure of a splicing line in a liquid crystal display motherboard, and since the splicing structure of thesplicing line 105 is similar to that of thesplicing line 205, the embodiment selects thesplicing line 105 to describe an invention point of the splicing line.

Thesplicing line 105 includes afirst portion 1051 and asecond portion 1052 which are overlapped with each other, an end of thefirst portion 1051 is provided with afirst zooming portion 1054, an end of thesecond portion 1052 is provided with asecond zooming portion 1055, thefirst portion 1051 and thesecond portion 1052 are attached together in an overlappingarea 1053 by welding, pressing or anisotropic conductive adhesive, thefirst zooming portion 1054 is formed with a first smooth structure S1 on a surface of thesecond portion 1052, thesecond zooming portion 1055 is formed with a second smooth structure S2 on a surface of thefirst portion 1051, the first smooth structure S1 and the second smooth structure S2 are both obtuse angles or arcs, the first smooth structure S1 and the second smooth structure S2 are not easy to accumulate charges, thereby avoiding a discharge situation, improving a production yield of a liquid crystal display mother board, and reducing a production cost.

Wherein thefirst zooming portion 1054 and thesecond zooming portion 1055 are preferably symmetrically disposed on both sides of the first portion and the second portion, respectively, and thefirst zooming portion 1054 and thesecond zooming portion 1055 are both triangular in shape. As shown in fig. 4, the shapes of thefirst zooming portion 1054 and thesecond zooming portion 1055 can be one or two of a triangle, a trapezoid, and an arc.

As shown in fig. 5, in another embodiment, the widths of thefirst portion 1051 and thesecond portion 1052 are equal, and thefirst portion 1051 and thesecond portion 1052 are disposed in parallel in theoverlapping region 1053 to form a smooth structure, the smooth structure is a flat angle, the flat angle is less prone to accumulating charges, the occurrence of discharge is avoided, the production yield of the lcd mother board is improved, and the production cost is reduced.

Thesplicing lines 105 are not only one but also multiple, shielding structures are arranged among thesplicing lines 105, the shielding structures are color-resistant layers, twoadjacent splicing lines 105 are mutually independent and do not interfere with each other, and one or more than one of silver, copper, aluminum, molybdenum and titanium is preferably selected as the material of thesplicing lines 105. Thestitching line 105 is disposed on the same layer as the source/drain of thedisplay unit 101, and thestitching line 105 and the source/drain are prepared by the same mask.

The invention has the beneficial effects that: the liquid crystal display mother board comprises a substrate and a plurality of display units distributed on the substrate in an array manner, wherein each display unit comprises a display area and a functional signal line which surrounds the display area and is arranged on the surface of the display area; the same function signal line of adjacent display element passes through concatenation line electrical contact, and wherein, the concatenation line is formed with a plurality of smooth structures including overlapping the first portion and the second portion that set up mutually on the edge in overlap region, and this smooth structure is obtuse angle or circular arc, is difficult for accumulating electric charge, avoids forming the point discharge condition and takes place, promotes the production yield of liquid crystal display mother board, reduction in production cost.

In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.

Claims (10)

1. The liquid crystal display mother board is characterized by comprising a substrate and a plurality of display units distributed on the substrate in an array mode, wherein each display unit comprises a display area and a functional signal line which surrounds the display area and is arranged on the surface of the display area;

the same function signal line of the adjacent display units is electrically contacted through a splicing line, wherein the splicing line comprises a first part and a second part which are arranged in an overlapped mode, and a plurality of smooth structures are formed on the edge of an overlapped area.

2. The lcd mother panel of claim 1, wherein a first zooming portion is disposed at an end of the first portion, a second zooming portion is disposed at an end of the second portion, the first zooming portion has a first smooth structure formed on a surface of the second portion, the second zooming portion has a second smooth structure formed on a surface of the first portion, and both the first smooth structure and the second smooth structure are obtuse angles or circular arcs.

3. The mother board of claim 2, wherein the first and second zooming portions are both one or two of a triangle, a trapezoid, and an arc.

4. The liquid crystal display mother panel according to claim 1, wherein the first portion and the second portion have the same width and are disposed in parallel to form the smooth structure, and the smooth structure is a straight angle.

5. The liquid crystal display mother panel according to claim 1, wherein the first portion and the second portion are attached together in an overlapping region by soldering, pressing, or anisotropic conductive adhesive.

6. The mother board of claim 1, wherein the stitching line is disposed on the same layer as source/drain electrodes of the display unit, and the stitching line and the source/drain electrodes are formed by the same mask.

7. The mother panel of claim 1, wherein a shielding structure is disposed between any two adjacent splicing lines, and the shielding structure is a color resist layer.

8. The mother board of claim 1, wherein the functional signal lines have a plurality of test signal access points, and the test signal access points are electrically connected to the test signal terminals at the edge of the display area.

9. The lcd motherboard of claim 8, wherein when the lcd motherboard performs the driving circuit detection process, the functional signal lines sequentially access the detection signals and control the test signal access points to close, so as to individually detect the adjacent driving circuits in the display unit.

10. The mother liquid crystal display panel according to claim 8, wherein when the mother liquid crystal display panel performs the alignment process, the functional signal lines simultaneously receive the same alignment signal and control the test signal access points to open, so as to input the same alignment signal to the liquid crystal in the display unit.

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