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CN111212008A - Synchronization signal transmission method and device - Google Patents

Synchronization signal transmission method and device
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Publication number
CN111212008A
CN111212008ACN201811391264.9ACN201811391264ACN111212008ACN 111212008 ACN111212008 ACN 111212008ACN 201811391264 ACN201811391264 ACN 201811391264ACN 111212008 ACN111212008 ACN 111212008A
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synchronization signal
pss
sss
ofdm symbols
primary synchronization
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龚秋莎
冯绍鹏
申博
王栋
徐宏
池连刚
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Potevio Information Technology Co Ltd
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Potevio Information Technology Co Ltd
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Abstract

Translated fromChinese

本发明实施例提供一种同步信号发送方法和装置。该方法包括根据预设规则生成同步信号,所述同步信号至少包括主同步信号PSS和辅同步信号SSS,以及分别与所述主同步信号PSS和辅同步信号SSS对应的循环前缀CP;发送所述同步信号;其中,所述主同步信号PSS、辅同步信号SSS以及分别与所述主同步信号PSS和辅同步信号SSS对应的循环前缀CP,共同占用12个OFDM符号。本发明实施例提供的同步信号发送方法和装置,在兼容现有系统的基础上,通过修改现有的PSS和SSS的映射,使其尽可能用更少的OFDM符号承载以节约下行占用资源。

Figure 201811391264

Embodiments of the present invention provide a method and apparatus for sending a synchronization signal. The method includes generating a synchronization signal according to a preset rule, the synchronization signal includes at least a primary synchronization signal PSS and a secondary synchronization signal SSS, and a cyclic prefix CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS respectively; sending the A synchronization signal; wherein the primary synchronization signal PSS, the secondary synchronization signal SSS, and the cyclic prefix CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS respectively occupy 12 OFDM symbols. The synchronization signal sending method and device provided by the embodiments of the present invention are compatible with the existing system, by modifying the existing PSS and SSS mapping, so that it is carried by fewer OFDM symbols as much as possible to save downlink occupied resources.

Figure 201811391264

Description

Synchronization signal sending method and device
Technical Field
The embodiment of the invention relates to the technical field of wireless communication, in particular to a method and a device for sending a synchronous signal.
Background
Authorized frequency points of the power communication network are discretely distributed on the frequency band of 223.525 MHz-231.65 MHz, each bandwidth is 25KHz, and the authorized frequency points are called as physical sub-bands. Fig. 1 is a schematic diagram of a synchronization signal structure in the prior art, and as shown in fig. 1, in a conventional power communication system, a synchronization channel is composed of a primary synchronization signal PSS and a secondary synchronization signal SSS. In the time domain, the auxiliary synchronization signal SSS is arranged in front and occupies 462 sampling points; the primary synchronization signal PSS is arranged after the secondary synchronization signal SSS, taking 463 sampling points. The two synchronization signals are connected end to form 925 sampling points (925 is the number of time domain sampling points of 13 OFDM symbols in each sub-band).
The primary synchronization signal PSS is generated by a Zadoff-Chu sequence, and the primary synchronization signal PSS with a length of 62 points is divided into 7 segments, each segment has a length of 4, 11, and 3 subcarriers, and is mapped to 7 OFDM symbols, and the two ends of the OFDM symbols occupy 4/3 subcarriers. The frequency domain data of 7 OFDM symbols are respectively subjected to 64-point IFFT to generate time domain data of 448 sampling points. Finally, 15 CP points are uniformly added to total 463 sampling points. The secondary synchronization signal SSS is formed by interleaving and connecting two binary sequences with the length of 31 in series, the secondary synchronization signal SSS with the length of 62 points is divided into 7 sections, the length of each section is 4, 11 and 3 subcarriers, the subcarriers are respectively mapped to 7 OFDM symbols, and the two ends of each section are the OFDM symbols occupying 4/3 subcarriers. The frequency domain data of 7 OFDM symbols are respectively subjected to 64-point IFFT to generate time domain data of 448 sampling points. Finally, uniformly adding 14 CP points to obtain 462 sampling points.
For coverage supplement of the LTE230 system, an LTE D2D system is considered to be designed, and the system is composed of Relay UEs and Remote UEs. According to the frame structure design requirement of the LTE D2D system, a downlink frame occupies 12 symbols. Therefore, the existing synchronization signal structure cannot satisfy the requirements.
Disclosure of Invention
Aiming at the technical problems in the prior art, the embodiment of the invention provides a method and a device for sending a synchronization signal.
In a first aspect, an embodiment of the present invention provides a synchronization signal sending method, including:
generating a synchronization signal according to a preset rule, wherein the synchronization signal at least comprises a primary synchronization signal PSS and a secondary synchronization signal SSS, and cyclic prefixes CP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS;
transmitting the synchronization signal; the primary synchronization signal PSS, the secondary synchronization signal SSS, and the cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS respectively occupy 12 OFDM symbols together.
In a second aspect, an embodiment of the present invention provides a synchronization signal transmitting apparatus, including:
the first processing module is used for generating synchronization signals according to a preset rule, wherein the synchronization signals at least comprise a primary synchronization signal PSS and a secondary synchronization signal SSS, and cyclic prefixes CP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS;
the second processing module is used for sending the synchronous signal; the primary synchronization signal PSS, the secondary synchronization signal SSS, and the cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS respectively occupy 12 OFDM symbols together.
In a third aspect, an embodiment of the present invention provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the steps of the method provided in the first aspect when executing the program.
In a fourth aspect, an embodiment of the present invention provides a non-transitory computer readable storage medium, on which a computer program is stored, which when executed by a processor, implements the steps of the method as provided in the first aspect.
The synchronization signal sending method and the synchronization signal sending device provided by the embodiment of the invention have the advantages that on the basis of being compatible with the existing system, the existing mapping of the PSS and the SSS is modified, so that the existing PSS and SSS can be borne by fewer OFDM symbols as far as possible, and the downlink occupied resources can be saved.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 is a diagram illustrating a structure of a synchronization signal in the prior art;
fig. 2 is a schematic flow chart of a method for sending a synchronization signal according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a synchronization signal structure according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a synchronization signal structure according to another embodiment of the present invention;
FIG. 5 is a diagram illustrating a structure of a synchronization signal according to still another embodiment of the present invention;
fig. 6 is a schematic diagram of a synchronization signal structure according to another embodiment of the present invention;
FIG. 7 is a diagram illustrating a structure of a synchronization signal according to another embodiment of the present invention;
FIG. 8 is a diagram illustrating a structure of a synchronization signal according to another embodiment of the present invention;
fig. 9 is a schematic diagram illustrating a synchronization signal transmitting apparatus according to an embodiment of the present invention;
fig. 10 is a schematic physical structure diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 2 is a schematic flow chart of a method for sending a synchronization signal according to an embodiment of the present invention, as shown in fig. 2, the method includes the following steps:
200, generating synchronous signals according to a preset rule, wherein the synchronous signals at least comprise a primary synchronous signal PSS and a secondary synchronous signal SSS, and cyclic prefixes CP respectively corresponding to the primary synchronous signal PSS and the secondary synchronous signal SSS;
step 201, transmitting the synchronization signal.
In the embodiment of the invention, the network side equipment generates the synchronous signals according to the preset rule, wherein the synchronous signals comprise a primary synchronous signal PSS, a secondary synchronous signal SSS, a cyclic prefix CP arranged in front of the primary synchronous signal PSS, and a cyclic prefix CP arranged in front of the secondary synchronous signal SSS. In the time domain, the secondary synchronization signal SSS is arranged in front of the primary synchronization signal PSS, and the primary synchronization signal PSS is arranged behind the secondary synchronization signal SSS, and in order to meet the frame structure requirements of the LTE D2D system while being compatible with the existing system synchronization signal design as much as possible, simplifying the system design, the embodiments of the present invention provide a new synchronization channel structure, and the primary synchronization signal PSS, the secondary synchronization signal SSS, and the cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS, respectively, jointly occupy 12 OFDM symbols. On the basis of being compatible with the existing system, the synchronization signal provided by the embodiment of the invention can be carried by using fewer OFDM symbols as far as possible by modifying the existing mapping of the PSS and the SSS so as to save the downlink occupied resources.
Further, the 12 OFDM symbols are mapped to the 6 th OFDM symbol of the second subframe to the 8 th OFDM symbol of the third subframe, respectively.
On the basis of the above method embodiment, the preset rule includes: the primary synchronization signal PSS is divided into 7 segments which are mapped to 7 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 6 segments which are respectively mapped to 6 OFDM symbols; and the cyclic prefixes CP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS occupy 21 sampling points in total. Specifically, fig. 3 is a schematic diagram of a synchronization signal structure according to an embodiment of the present invention, as shown in fig. 3, a primary synchronization signal PSS is generated by a Zadoff-Chu sequence, and the primary synchronization signal PSS with a length of 62 points is divided into 7 segments, where the length of each segment is 4, 11, and 3 subcarriers, and the segments are respectively mapped onto 7 OFDM symbols, and two ends of each segment are OFDM symbols occupying 4/3 subcarriers. The frequency domain data of 7 OFDM symbols are respectively subjected to 64-point IFFT to generate time domain data of 448 sampling points. Finally, uniformly adding 11 CP points to obtain 459 sampling points. The secondary synchronization signal SSS is formed by interleaving and concatenating two binary sequences with a length of 31, and divides the secondary synchronization signal with a length of 62 points into 6 segments, where each segment has a length of 9, 11, 9 subcarriers, and is mapped to 6 OFDM symbols, and two ends are OFDM symbols occupying 9 subcarriers. And respectively carrying out 64-point IFFT on the frequency domain data of the 6 OFDM symbols to generate time domain data of 384 sampling points. Finally, there are 394 sampling points uniformly added with 10 CP. The auxiliary synchronization signals SSS are arranged in front, the main synchronization signals PSS are arranged behind the auxiliary synchronization signals SSS, and the two synchronization signals are connected end to form 853 sampling points. As can be seen from fig. 3, 12 OFDM symbols occupied by the synchronization signal are mapped to the 6 th OFDM symbol of the second subframe to the 8 th OFDM symbol of the third subframe, respectively.
The PSS and the SSS multiplex sequences used by the base station, but the generation parameters are different, and the relay cell ID is configured by the base station. The main synchronous signal detection can only carry out coherent detection in a time domain, and the design of a terminal receiving module can be simplified by keeping the same with the existing design. After the primary synchronization signal detection is finished, symbol timing and frame timing are finished, secondary synchronization signal detection is carried out on the basis, and frequency domain coherent detection can be carried out.
On the basis of the above method embodiment, the preset rule may further include: the primary synchronization signal PSS is divided into 6 segments which are mapped to 6 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 6 segments which are respectively mapped to 6 OFDM symbols; and the Cyclic Prefixes (CP) respectively corresponding to the Primary Synchronization Signal (PSS) and the Secondary Synchronization Signal (SSS) occupy 85 sampling points in total. Specifically, fig. 4 is a schematic diagram of a synchronization signal structure according to another embodiment of the present invention, as shown in fig. 4, a primary synchronization signal PSS is generated by a Zadoff-Chu sequence, the primary synchronization signal PSS with a length of 62 points is divided into 6 segments, the length of each segment is 9, 11, and 9 subcarriers, and the segments are respectively mapped onto 6 OFDM symbols, and two ends of each segment are OFDM symbols occupying 9 subcarriers. And respectively carrying out 64-point IFFT on the frequency domain data of the 6 OFDM symbols to generate time domain data of 384 sampling points. Finally, the 43 CP points are uniformly added to obtain 427 sampling points. Two binary sequences with the length of 31 are connected in a staggered and serial mode to form a secondary synchronization signal with the length of 62 points, the signal with the length of 62 points is divided into 6 sections, the length of each section is 9, 11 and 9 subcarriers, the two sections are respectively mapped to 6 OFDM symbols, and the two ends of each section are the OFDM symbols occupying 9 subcarriers. And respectively carrying out 64-point IFFT on the frequency domain data of the 6 OFDM symbols to generate time domain data of 384 sampling points, and finally uniformly adding 42-point CP to obtain 426 sampling points. The auxiliary synchronization signals SSS are arranged in front, the main synchronization signals PSS are arranged behind the auxiliary synchronization signals SSS, and the two synchronization signals are connected end to form 853 sampling points.
On the basis of the above method embodiment, the preset rule may further include: the primary synchronization signal PSS is divided into 6 segments which are mapped to 6 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 7 segments which are respectively mapped to 7 OFDM symbols; and the cyclic prefixes CP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS occupy 21 sampling points in total. Specifically, fig. 5 is a schematic diagram of a synchronization signal structure according to still another embodiment of the present invention, as shown in fig. 5, a primary synchronization signal PSS is generated by a Zadoff-Chu sequence, the primary synchronization signal PSS with a length of 62 points is divided into 6 segments, the length of each segment is 9, 11, and 9 subcarriers, and the segments are respectively mapped onto 6 OFDM symbols, and two ends of each segment are OFDM symbols occupying 9 subcarriers. And respectively carrying out 64-point IFFT on the frequency domain data of the 6 OFDM symbols to generate time domain data of 384 sampling points. Finally, uniformly adding 11 CP points to make 395 sampling points. Two binary sequences with the length of 31 are connected in an interlaced and serial mode to form a secondary synchronization signal with the length of 62 points, the signal with the length of 62 points is divided into 7 sections, the length of each section is respectively 4, 11, and 3 subcarriers, the two sections are respectively mapped to 7 OFDM symbols, and the two ends of each section are the OFDM symbols occupying 4/3 subcarriers. The frequency domain data of 7 OFDM symbols are respectively subjected to 64-point IFFT to generate time domain data of 448 sampling points. Finally, uniformly adding 10 CP points to obtain 458 sampling points. The auxiliary synchronization signals SSS are arranged in front, the main synchronization signals PSS are arranged behind the auxiliary synchronization signals SSS, and the two synchronization signals are connected end to form 853 sampling points.
On the basis of the above method embodiment, the synchronization signal may include, in addition to a primary synchronization signal PSS and a secondary synchronization signal SSS, cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS, respectively, and a guard interval GP between the primary synchronization signal PSS and an uplink signal. Correspondingly, the primary synchronization signal PSS, the secondary synchronization signal SSS, the cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS, respectively, and the guard interval GP jointly occupy 12 OFDM symbols.
On the basis of the above method embodiment, the preset rule includes: the primary synchronization signal PSS is divided into 7 segments which are mapped to 7 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 6 segments which are respectively mapped to 6 OFDM symbols; and the cyclic prefixes CP and the guard intervals GP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS occupy 21 sampling points in total. Specifically, fig. 6 is a schematic diagram of a synchronization signal structure according to still another embodiment of the present invention, as shown in fig. 6, a primary synchronization signal PSS is generated by a Zadoff-Chu sequence, the primary synchronization signal PSS with a length of 62 points is divided into 7 segments, each segment has a length of 4, 11, and 3 subcarriers, and is mapped to 7 OFDM symbols, and two ends of the OFDM symbols occupy 4/3 subcarriers. The frequency domain data of 7 OFDM symbols are respectively subjected to 64-point IFFT to generate time domain data of 448 sampling points. Finally, 461 sample points are uniformly added with 9-point CP and 4-point GP. The secondary synchronization signal SSS is formed by interleaving and concatenating two binary sequences with a length of 31, the secondary synchronization signal SSS with a length of 62 points is divided into 6 segments, the length of each segment is 9, 11, 9 subcarriers, and each segment is mapped to 6 OFDM symbols, and OFDM symbols occupying 9 subcarriers are arranged at two ends. And respectively carrying out 64-point IFFT on the frequency domain data of the 6 OFDM symbols to generate time domain data of 384 sampling points. Finally, add 8 CP uniformly for 392 samples. The auxiliary synchronization signals SSS are arranged in front, the main synchronization signals PSS are arranged behind the auxiliary synchronization signals SSS, and the two synchronization signals are connected end to form 853 sampling points. It is understood that the synchronization signal structure shown in fig. 3 is a specific example of the synchronization signal structure shown in fig. 6, i.e., GP is 0.
On the basis of the above method embodiment, the preset rule includes: the primary synchronization signal PSS is divided into 6 segments which are mapped to 6 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 6 segments which are respectively mapped to 6 OFDM symbols; the cyclic prefixes CP and the guard intervals GP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS occupy 85 sampling points in total. Specifically, fig. 7 is a schematic diagram of a synchronization signal structure according to another embodiment of the present invention, as shown in fig. 7, a primary synchronization signal PSS is generated by a Zadoff-Chu sequence, the primary synchronization signal PSS with a length of 62 points is divided into 6 segments, the length of each segment is 9, 11, and 9 subcarriers, and each segment is mapped to 6 OFDM symbols, and two ends are OFDM symbols occupying 9 subcarriers. And respectively carrying out 64-point IFFT on the frequency domain data of the 6 OFDM symbols to generate time domain data of 384 sampling points. Finally, 449 sampling points are uniformly added for 21-point CP and 44-point GP. Two binary sequences with the length of 31 are connected in a staggered and serial mode to form a secondary synchronization signal with the length of 62 points, the signal with the length of 62 points is divided into 6 sections, the length of each section is 9, 11 and 9 subcarriers, the two sections are respectively mapped to 6 OFDM symbols, and the two ends of each section are the OFDM symbols occupying 9 subcarriers. And respectively carrying out 64-point IFFT on the frequency domain data of the 6 OFDM symbols to generate time domain data of 384 sampling points, and finally uniformly adding 20 CP points to obtain 404 sampling points. The auxiliary synchronization signals SSS are arranged in front, the main synchronization signals PSS are arranged behind the auxiliary synchronization signals SSS, and the two synchronization signals are connected end to form 853 sampling points. It is understood that the synchronization signal structure shown in fig. 4 is a specific example of the synchronization signal structure shown in fig. 7, i.e., GP is 0.
On the basis of the above method embodiment, the preset rule includes: the primary synchronization signal PSS is divided into 6 segments which are mapped to 6 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 7 segments which are respectively mapped to 7 OFDM symbols; and the cyclic prefixes CP and the guard intervals GP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS occupy 21 sampling points in total. Specifically, fig. 8 is a schematic diagram of a synchronization signal structure according to another embodiment of the present invention, as shown in fig. 8, a primary synchronization signal PSS is generated by a Zadoff-Chu sequence, the primary synchronization signal PSS with a length of 62 points is divided into 6 segments, the length of each segment is 9, 11, and 9 subcarriers, and each segment is mapped to 6 OFDM symbols, and two ends are OFDM symbols occupying 9 subcarriers. And respectively carrying out 64-point IFFT on the frequency domain data of the 6 OFDM symbols to generate time domain data of 384 sampling points. Finally, 461 are added uniformly with 9-point CP and 4-point GP. Two binary sequences with the length of 31 are connected in an interlaced and serial mode to form a secondary synchronization signal with the length of 62 points, the signal with the length of 62 points is divided into 7 sections, the length of each section is respectively 4, 11, and 3 subcarriers, the two sections are respectively mapped to 7 OFDM symbols, and the two ends of each section are the OFDM symbols occupying 4/3 subcarriers. The frequency domain data of 7 OFDM symbols are respectively subjected to 64-point IFFT to generate time domain data of 448 sampling points. Finally, add 8 CP uniformly for 392 samples. The auxiliary synchronization signals SSS are arranged in front, the main synchronization signals PSS are arranged behind the auxiliary synchronization signals SSS, and the two synchronization signals are connected end to form 853 sampling points. It is understood that the synchronization signal structure shown in fig. 5 is a specific example of the synchronization signal structure shown in fig. 8, i.e., GP is 0.
The above embodiments only provide several practical examples to satisfy the structural requirement that the downlink of the LTE D2D system frame occupies 12 symbols, but are not limited thereto. On the basis of being compatible with the existing system, the synchronization signal provided by the embodiment of the invention can be carried by using fewer OFDM symbols as far as possible by modifying the existing mapping of the PSS and the SSS so as to save the downlink occupied resources.
Fig. 9 is a schematic diagram of a synchronization signal transmitting apparatus according to an embodiment of the present invention, and as shown in fig. 9, the apparatus includes afirst processing module 901 and asecond processing module 902, where thefirst processing module 901 is configured to generate synchronization signals according to a preset rule, where the synchronization signals at least include a primary synchronization signal PSS and a secondary synchronization signal SSS, and cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS, respectively; thesecond processing module 902 is configured to send the synchronization signal; the primary synchronization signal PSS, the secondary synchronization signal SSS, and the cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS respectively occupy 12 OFDM symbols together.
The embodiment of the apparatus may be specifically configured to execute the embodiment of the method, and specific functions are described in the embodiment of the method for details, which are not described herein again. .
Fig. 10 is a schematic physical structure diagram of an electronic device according to an embodiment of the present invention, and as shown in fig. 10, the electronic device may include: a processor (processor)1010, a communication Interface (Communications Interface)1020, a memory (memory)1030, and a communication bus 1040, wherein the processor 1010, thecommunication Interface 100, and the memory 1030 communicate with each other via the communication bus 1040. Processor 1010 may invoke a computer program stored on memory 1030 and executable on processor 1010 to perform the transmission methods provided by the various embodiments described above, including, for example: generating a synchronization signal according to a preset rule, wherein the synchronization signal at least comprises a primary synchronization signal PSS and a secondary synchronization signal SSS, and cyclic prefixes CP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS; transmitting the synchronization signal; the primary synchronization signal PSS, the secondary synchronization signal SSS, and the cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS respectively occupy 12 OFDM symbols together.
Furthermore, the logic instructions in the memory 1030 can be implemented in software functional units and stored in a computer readable storage medium when the logic instructions are sold or used as independent products. Based on such understanding, the technical solutions of the embodiments of the present invention may be essentially implemented or make a contribution to the prior art, or may be implemented in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the methods described in the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
Embodiments of the present invention further provide a non-transitory computer-readable storage medium, on which a computer program is stored, where the computer program is implemented to perform the transmission method provided in the foregoing embodiments when executed by a processor, and the method includes: generating a synchronization signal according to a preset rule, wherein the synchronization signal at least comprises a primary synchronization signal PSS and a secondary synchronization signal SSS, and cyclic prefixes CP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS; transmitting the synchronization signal; the primary synchronization signal PSS, the secondary synchronization signal SSS, and the cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS respectively occupy 12 OFDM symbols together.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (12)

1. A synchronization signal transmission method, comprising:
generating a synchronization signal according to a preset rule, wherein the synchronization signal at least comprises a primary synchronization signal PSS and a secondary synchronization signal SSS, and cyclic prefixes CP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS;
transmitting the synchronization signal; the primary synchronization signal PSS, the secondary synchronization signal SSS, and the cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS respectively occupy 12 OFDM symbols together.
2. The method of claim 1, wherein the preset rules comprise:
the primary synchronization signal PSS is divided into 7 segments which are mapped to 7 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 6 segments which are respectively mapped to 6 OFDM symbols; and the cyclic prefixes CP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS occupy 21 sampling points in total.
3. The method of claim 1, wherein the preset rules comprise:
the primary synchronization signal PSS is divided into 6 segments which are mapped to 6 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 6 segments which are respectively mapped to 6 OFDM symbols; and the Cyclic Prefixes (CP) respectively corresponding to the Primary Synchronization Signal (PSS) and the Secondary Synchronization Signal (SSS) occupy 85 sampling points in total.
4. The method of claim 1, wherein the preset rules comprise:
the primary synchronization signal PSS is divided into 6 segments which are mapped to 6 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 7 segments which are respectively mapped to 7 OFDM symbols; and the cyclic prefixes CP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS occupy 21 sampling points in total.
5. The method of claim 1, wherein the synchronization signals comprise at least a Primary Synchronization Signal (PSS) and a Secondary Synchronization Signal (SSS), a Cyclic Prefix (CP) corresponding to the Primary Synchronization Signal (PSS) and the Secondary Synchronization Signal (SSS), respectively, and a Gap (GP) corresponding to the Primary Synchronization Signal (PSS);
correspondingly, the primary synchronization signal PSS, the secondary synchronization signal SSS, the cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS, respectively, and the guard interval GP between the primary synchronization signal PSS and the uplink signal jointly occupy 12 OFDM symbols.
6. The method of claim 5, wherein the preset rules comprise:
the primary synchronization signal PSS is divided into 7 segments which are mapped to 7 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 6 segments which are respectively mapped to 6 OFDM symbols; the cyclic prefixes CP and the interval GP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS occupy 21 sampling points in total.
7. The method of claim 5, wherein the preset rules comprise:
the primary synchronization signal PSS is divided into 6 segments which are mapped to 6 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 6 segments which are respectively mapped to 6 OFDM symbols; the cyclic prefixes CP and the intervals GP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS occupy 85 sampling points in total.
8. The method of claim 5, wherein the preset rules comprise:
the primary synchronization signal PSS is divided into 6 segments which are mapped to 6 OFDM symbols respectively; the secondary synchronization signal SSS is divided into 7 segments which are respectively mapped to 7 OFDM symbols; the cyclic prefixes CP and the interval GP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS occupy 21 sampling points in total.
9. The method according to any of claims 1 to 8, wherein the 12 OFDM symbols are mapped to the 6 th OFDM symbol of the second subframe to the 8 th OFDM symbol of the third subframe, respectively.
10. A synchronization signal transmission apparatus, comprising:
the first processing module is used for generating synchronization signals according to a preset rule, wherein the synchronization signals at least comprise a primary synchronization signal PSS and a secondary synchronization signal SSS, and cyclic prefixes CP respectively corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS;
the second processing module is used for sending the synchronous signal; the primary synchronization signal PSS, the secondary synchronization signal SSS, and the cyclic prefixes CP corresponding to the primary synchronization signal PSS and the secondary synchronization signal SSS respectively occupy 12 OFDM symbols together.
11. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method according to any of claims 1 to 9 are implemented when the processor executes the program.
12. A non-transitory computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 9.
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