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CN111083854B - LED display screen compensation circuit and method thereof - Google Patents

LED display screen compensation circuit and method thereof
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Publication number
CN111083854B
CN111083854BCN202010026192.9ACN202010026192ACN111083854BCN 111083854 BCN111083854 BCN 111083854BCN 202010026192 ACN202010026192 ACN 202010026192ACN 111083854 BCN111083854 BCN 111083854B
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compensation
pwm
reference voltage
signal
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CN111083854A (en
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周杨
冯奕
唐茂洁
邢向明
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China Key System and Integrated Circuit Co Ltd
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China Key System and Integrated Circuit Co Ltd
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Abstract

The invention discloses a compensation circuit and a compensation method for an LED display screen, and belongs to the technical field of LED display. The LED display screen compensation circuit comprises a reference voltage regulation module, a compensation enabling control module, a current mirror module, a PWM compensation module and a PWM transmission module; the reference voltage adjusting module sets different compensation levels according to the reference voltage and performs compensation in different degrees; the compensation enabling control module enables a low gray-white balance adjusting function of a non-first line and an adjusting function of a first line which is dark through pulling up an enabling signal, and enables the PWM transmission module and the current mirror module to be started; the current mirror module outputs current outwards under the control of the compensation enabling control module; the PWM compensation module compensates low gray-white balance and the first line darkness according to requirements, and transmits a compensated PWM signal to the current mirror module to control current output; the PWM transmission module outputs a compensated PWM signal, and simultaneously, an output signal PD controls whether the current of the current mirror module is output or not.

Description

LED display screen compensation circuit and method thereof
Technical Field
The invention relates to the technical field of LED display, in particular to a compensation circuit of an LED display screen and a method thereof.
Background
In recent years, with the development of LED display screen technology and the increase of market demand, large LED screens have become visible everywhere in public places such as shopping malls and train stations, and are used for displaying information such as pictures, characters, videos, and the like. The LED display screen is a large-size flat panel display device consisting of light emitting diodes and display driving chips. The display driving chip is used for receiving digital image information from the system, driving the diode on the display screen to light up, and realizing the display of images or videos. Therefore, the display driving chip plays a decisive role in the display effect of the display screen. For better display effect, two key problems in display, namely low gray-white balance color cast and first line dark, need to be solved in the design of the LED driving chip.
When displaying a low gray image, the on-current of the red diode in red, green and blue is larger than that of the green and blue, so that the whole image is red, resulting in white balance color shift. The low gray image is an image when the LED on time is far shorter than the LED off time, and is represented by light green, light blue, light red and the like; in low gray images, especially in the case of high row-scan high refresh rates, the LED on-time is very short, only a few hundred nanoseconds or even tens of nanoseconds. At such on-times, the effect of the magnitude of the parasitic capacitances on the different color LEDs on the on-time becomes extremely significant. Worse, the parasitic capacitance of the same-color LED in the same batch may fluctuate greatly due to process fluctuations.
Fig. 1 shows the difference between the conduction currents of the red, green and blue diodes under the square wave driving signal, where the conduction current of the red diode has the smallest delay compared with the driving signal, and the difference between the conduction current of the red diode and the driving signal is blue and the difference between the conduction current of the red diode and the driving signal is the largest, so that different colors in the low gray image need to be compensated to different degrees. The first row of LEDs that is scanned in multiple rows over the first row will appear darker than the remaining rows. Parasitic capacitance can be generated between the wires on the PCB where the diodes are located, because the LED display panel is continuously developed on a road with a small dot pitch, the distance between the PCB wires is smaller and smaller, the board-level parasitic capacitance is larger and larger, and meanwhile, the LEDs have certain parasitic capacitance, so that the parasitic effect can be very obvious.
Fig. 2 is a schematic diagram of the position of the parasitic capacitor. After the first row scanning is finished, the parasitic capacitance on the column is charged when each row of diodes is conducted, so that when the second row scanning is started, the voltage drop V on the first row of diodesrow-VcolumnWill be lower than normal value, after the first row display is finished, the charge on the parasitic capacitance of the column is released, and the voltage drop V on the diode behind the second rowrow-VcolumnReturning to the normal value, the first row will appear darker than the other rows. In order to achieve better display effect of the LED screen, it is necessary to improve the problem of the dark first line.
Disclosure of Invention
The invention aims to provide an LED display screen compensation circuit and a method thereof, which are used for solving the problems of low gray-white balance color bias and dark first line in the design of the conventional LED driving chip.
In order to solve the above technical problem, the present invention provides a compensation circuit for an LED display screen, comprising:
the device comprises a reference voltage adjusting module, a compensation enabling control module, a current mirror module, a PWM (pulse width modulation) compensation module and a PWM transmission module; wherein,
the reference voltage adjusting module sets different compensation levels according to the reference voltage and performs compensation in different degrees;
the compensation enabling control module enables a low gray-white balance adjusting function of a non-first line and an adjusting function of a first line which is dark through pulling up an enabling signal, and enables the PWM transmission module and the current mirror module to be started;
the current mirror module outputs current outwards under the control of the compensation enabling control module;
the PWM compensation module compensates low gray-white balance and the first line darkness according to requirements, and transmits a compensated PWM signal to the current mirror module to control current output;
the PWM transmission module outputs a compensated PWM signal, and simultaneously, an output signal PD controls whether the current of the current mirror module is output or not.
Optionally, the reference voltage adjusting module includes a low gray-white balance color shift compensation reference voltage VREF1, a first row dark reference voltage VREF2, enabling switching tubes NM1 and NM2, and an operational amplifier;
the low gray-white balance color shift compensation reference voltage VREF1 and the first row dark reference voltage VREF2 are respectively connected to the sources of the enable switch tubes NM1 and NM2, the grid of the enable switch tube NM1 is connected with an enable signal EN1, the grid of the enable switch tube NM2 is connected with an enable signal EN2, and the drains of the enable switch tubes NM1 and NM2 are both connected to the positive input end of the operational amplifier;
and the output end of the operational amplifier is connected with the inverter.
Optionally, the compensation enable control module includes a NOR gate NOR and an inverter INV connected in series, and the low gray-white balanced enable signal EN1 and the first row dark enable signal EN2 are used as input signals and respectively connected to two input terminals of the NOR gate NOR; the output end of the inverter INV is connected to the PWM transmission module and the current mirror module.
Optionally, the PWM compensation module includes a capacitor C1 and a switching tube NM2, and a positive terminal of the capacitor C1 is connected to the output terminal of the current mirror circuit and the negative input terminal of the operational amplifier; the negative end of the capacitor C1 is connected with the source of theswitch tube NM 2.
Optionally, a port a of the PWM transmission module is connected to an output end of the reference voltage adjustment module, a port B of the PWM transmission module is connected to an externally transmitted PWM signal, a port EN of the PWM transmission module is connected to an INV output end of the inverter, a port Y1 of the PWM transmission module outputs the compensated PWM signal, and a port Y2 of the PWM transmission module outputs a signal PD for controlling whether the current of the current mirror module is output.
The invention also provides a compensation method of the LED display screen, which comprises the following steps:
the first row is adjusted through a first row dark reference voltage VREF2, and the adjustment of a low gray white balance color shift compensation reference voltage VREF1 is added under the condition of low gray, so that the original 4-bit adjustment of the first row and the low gray white balance color shift compensation reference voltage are summed and combined into a 5-bit adjustment FST <4:0 >.
Optionally, the adjustment of the first row to dark is divided into the following two cases:
(1) when the first line is adjusted only in the non-low ash case, FST <4:0> -10000 + Reg1<7:4 >;
(2) when regulating first line under low ash conditions, FST <4:0> -Reg 1<7:4> + Reg3<3:0> -1;
the non-first row in the low ash case is opened, still conditioned with Reg1<3:0> of VREF 1.
The invention provides an LED display screen compensation circuit and a method thereof, wherein the LED display screen compensation circuit comprises a reference voltage regulation module, a compensation enabling control module, a current mirror module, a PWM compensation module and a PWM transmission module; the reference voltage adjusting module sets different compensation levels according to the reference voltage and performs compensation in different degrees; the compensation enabling control module enables a low gray-white balance adjusting function of a non-first line and an adjusting function of a first line which is dark through pulling up an enabling signal, and enables the PWM transmission module and the current mirror module to be started; the current mirror module outputs current outwards under the control of the compensation enabling control module; the PWM compensation module compensates low gray-white balance and the first line darkness according to requirements, and transmits a compensated PWM signal to the current mirror module to control current output; the PWM transmission module outputs a compensated PWM signal, and simultaneously, an output signal PD controls whether the current of the current mirror module is output or not.
The invention compensates for low gray balance color cast, lengthens the conducting time of the diodes of two colors of green and blue under a low gray image to a certain extent, and reduces the degree of color cast. The degree of compensation required is different because the two colors green and blue have different degrees of color shift in low gray images, with the green compensation being somewhat greater and the blue compensation being somewhat less. Aiming at the problem that the first row is darker, the conduction time of the diodes in the first row is compensated, and the conduction time of the diodes in the first row is increased, so that the brightness of an image can be improved, and the first row cannot be darker visually. The low gray white balance color cast and the low gray compensation are combined on the same circuit and distinguished through different control signals, no additional circuit design is needed, the circuit structure is simple, and the layout area is reduced.
Drawings
FIG. 1 is a comparison graph of the conduction currents of RGB diodes;
FIG. 2 is a diagram of an LED layout;
FIG. 3 is a schematic diagram of a compensation circuit of an LED display screen according to the present invention;
FIG. 4 is a schematic diagram of a compensation circuit structure of an LED display screen according to the present invention;
FIG. 5 is a diagram of a MOS switch gating array;
fig. 6 is a structural diagram of the current mirror circuit.
Detailed Description
The following describes an LED display panel compensation circuit and a method thereof in detail with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Example one
The invention provides an LED display screen compensation circuit, which is structurally shown in FIG. 3 and comprises a referencevoltage regulation module 1, a compensation enablingcontrol module 2, acurrent mirror module 3, aPWM compensation module 4 and aPWM transmission module 5. Specifically, the referencevoltage adjusting module 1 sets different compensation levels according to the reference voltage, and performs compensation in different degrees; the compensation enablingcontrol module 2 enables thePWM transmission module 5 and thecurrent mirror module 3 to be started by pulling up an enabling signal to start a low gray-white balance adjusting function of a non-first line and an adjusting function of a first line which is dark; thecurrent mirror module 3 outputs current to the outside under the control of the compensation enablingcontrol module 2; thePWM compensation module 4 compensates low gray-white balance and first line dimming according to requirements, and transmits compensated PWM signals to thecurrent mirror module 3 to control current output; thePWM transmission module 5 outputs the compensated PWM signal, and simultaneously outputs a signal PD to control whether the current of thecurrent mirror module 3 is output.
Specifically, please refer to fig. 4, which is a schematic diagram of a specific circuit structure of the compensation circuit of the LED display panel. The referencevoltage adjusting module 1 comprises a low gray-white balance color shift compensation reference voltage VREF1, a first row dark reference voltage VREF2, enabling switch tubes NM1 and NM2 and an operational amplifier; the low gray-white balance color shift compensation reference voltage VREF1 and the first row dark reference voltage VREF2 are respectively connected to the sources of the enable switch tubes NM1 and NM2, the grid of the enable switch tube NM1 is connected with an enable signal EN1, the grid of the enable switch tube NM2 is connected with an enable signal EN2, and the drains of the enable switch tubes NM1 and NM2 are both connected to the positive input end of the operational amplifier; the operational amplifier amp uses a basic two-stage amplification structure, and the output of the operational amplifier is connected to an inverter, which is already integrated in the operational amplifier amp in fig. 4 and is not shown in the figure, because the compensated low level part of the PWM is compensated.
In the referencevoltage adjusting module 1, different compensation levels are set according to the low gray-white balance color shift compensation reference voltage VREF1 and the head line dark reference voltage VREF2, different MOS transistor switch groups are gated through a configuration register so as to control the compensation levels, and the higher the reference voltage is, the higher the compensation level is, and the larger the compensation degree is. As shown in fig. 5, which is a diagram of a gated array of MOS switches for generating the low gray-white balance color shift compensation reference voltage VREF1 and the first row of the darker reference voltage VREF2, the array is formed by resistors and MOS transistors, each resistor has the same resistance value, 32 resistors in total provide 32 reference levels, the low gray-white balance color shift compensation reference voltage VREF1 is gated by a 4-bit control signal, and the first row of the darker reference voltage VREF2 is gated by a 5-bit control signal.
With continuing reference to fig. 4, the compensation enablecontrol module 2 includes a NOR gate NOR and an inverter INV connected in series, a low gray-white balance enable signal EN1 and a first row dark enable signal EN2 as input signals, respectively connected to two input terminals of the NOR gate NOR; the output end of the inverter INV is connected to thePWM transmission module 5 and thecurrent mirror module 3, and thePWM transmission module 5 and thecurrent mirror module 3 are started. The low gray balance enable signal EN1 is used to adjust the low gray balance of all non-leading rows, and the leading row dim enable signal EN2 is used to control the leading row dim adjustment in all cases, including the leading row in low gray conditions. All the non-leading low gray-white balance adjusting functions and leading line dimming adjusting functions are started by pulling up enabling signals (including a low gray-white balance enabling signal EN1 and a leading line dimming enabling signal EN2), so that thePWM transmission module 5 is enabled to be started on one hand, and thecurrent mirror module 3 is enabled to be started on the other hand.
Thecurrent mirror module 3 comprises a current mirror circuit, as shown in fig. 6, and the BIAS voltage BIAS may be given by different BIAS circuits. When the signal at the EN port is low, thecurrent mirror module 3 does not operate, and there is no output current. When the signal of the EN port is high, the PD signal controls whether to output current, if the PD is high, the current is not output, and if the PD is low, the current is output externally. Thecurrent mirror module 3 is controlled by the compensation enablingcontrol module 2, when one of the enabling signal EN1 of low gray-white balance and the enabling signal EN2 of the first row which is darker is high, thecurrent mirror module 3 works to output current to the outside, and the output current reaches thePWM compensation module 4, and charges the capacitor C1 in thePWM compensation module 4.
Specifically, thePWM compensation module 4 includes a capacitor C1 and a switching tube NM2, the capacitor C1 is a charge-discharge capacitor, and a positive end of the capacitor C1 is connected to an output end of the current mirror circuit and a negative input end of the operational amplifier; the negative end of the capacitor C1 is connected with the source of theswitch tube NM 2. ThePWM compensation module 4 mainly controls the pulse width of the PWM low level through the charging time of the capacitor C1, so as to control the conducting time of the switch tube NM2, and compensate the low gray-white balance and the first line bias darkness according to the requirement, thePWM compensation module 4 is controlled by the compensation enablingcontrol module 2 and thePWM transmission module 5, the compensated PWM signal is transmitted to thecurrent mirror 3 through themodule 4 to control the current output, and is controlled by the referencevoltage adjusting module 1, the larger the reference voltage (comprising the low gray-white balance color bias compensation reference voltage VREF1 and the first line bias darkness reference voltage VREF2) is, the longer the charging and discharging time of the capacitor C1 is, and the longer the pulse width of the PWM low level is, the larger the compensation degree is.
ThePWM transmission module 5 is configured to output a compensated PWM signal, as shown in fig. 4, thePWM transmission module 5 is a PWM transmission module I1, a port a of thePWM transmission module 5 is connected to an output end of the operational amplifier amp, and an output signal of the operational amplifier amp adjusts a low level pulse width of PWM; the port B is connected with a PWM signal transmitted from the outside, the port EN is connected with the output end of the inverter INV, the output signal PWM _ OUT of the port Y1 is a compensated PWM signal, the output signal PD of the port Y2 controls whether the current of thecurrent mirror module 3 is output, the port Y2 is simultaneously connected with the grid electrode of the switch tube NM2, and the capacitor C1 is controlled to discharge.
TABLE 1 logic truth table of PWM transmission module
ENY1Y2
0B0
1AB
Table 1 is a logic truth table of thePWM transmission module 5, when the signal of the EN port is 0, the entire compensation circuit does not operate, thePWM transmission module 5 transmits the PWM signal a without compensation, and when the signal of the EN port is 1, the entire compensation circuit operates, and thePWM transmission module 5 transmits the compensated PWM signal B.
The working logic of the LED display screen compensation circuit is as follows:
when the enable signal EN1 with low gray-white balance and the enable signal EN2 with the darker first row are both low, the signal at the EN port is low, the Y2 port does not output, the PWM _ OUT signal follows the PWM, that is, the PWM is directly output without any compensation;
when one of the enable signal EN1 with low gray-white balance and the enable signal EN2 with the darker first row is high, the signal of the EN port is high, and when the PWM input is low, the output of the Y2 port is low, the switch tube MN1 is closed, the negative input end of the operational amplifier is only controlled by the output currents of the capacitors C1 and I2 (namely, the current mirror module 3), so that the voltage of the negative input end of the operational amplifier is slowly increased until the negative input end of the operational amplifier is equal to the reference voltage (namely, the reference voltage VREF1 or VREF2), and the output of the operational amplifier is converted into low;
when one of the enable signal EN1 with low gray-white balance and the enable signal EN2 with the first row being darker is high, the signal at the EN port is high, and when the PWM input is high, I2 is turned off because the Y2 port is high, and at the same time, the switch tube MN1 is turned on, and the charge on the capacitor C1 is discharged through theswitch tube MN 1. The reference voltages VREF1 and VREF2 are respectively controlled by an enable signal EN1 for low gray-white balance and an enable signal EN2 for the first row which is darker. The higher the reference voltage, the longer the time it takes for the output of the operational amplifier to transition low and the longer the time the PWM _ OUT signal goes low, i.e., providing different compensation times.
Example two
The invention provides an LED display screen compensation method, based on the LED display screen compensation circuit provided by the first embodiment, the method comprises the following steps:
the first row is adjusted through a first row dark reference voltage VREF2, and the adjustment of a low gray white balance color shift compensation reference voltage VREF1 is added under the condition of low gray, so that the original 4-bit adjustment of the first row and the low gray white balance color shift compensation reference voltage are summed and combined into a 5-bit adjustment FST <4:0 >. The first row dark adjustment is divided into the following two cases:
(1) when the first line is adjusted only in the non-low ash case, FST <4:0> -10000 + Reg1<7:4 >;
(2) when regulating first line under low ash conditions, FST <4:0> -Reg 1<7:4> + Reg3<3:0> -1;
the non-first row in the low ash case is opened, still conditioned with Reg1<3:0> ofVREF 1.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.

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CN112187237B (en)*2020-09-292021-12-21西安博瑞集信电子科技有限公司Enabling circuit
CN113674661B (en)*2021-07-072024-02-02杭州华橙软件技术有限公司Debugging circuit, debugging method and device for reference voltage of display module
CN114299853B (en)*2021-12-242023-05-09杭州海康威视数字技术股份有限公司LED display screen adjusting system, method, equipment and readable storage medium

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