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CN110972254A - Clock synchronization system - Google Patents

Clock synchronization system
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Publication number
CN110972254A
CN110972254ACN201811163062.9ACN201811163062ACN110972254ACN 110972254 ACN110972254 ACN 110972254ACN 201811163062 ACN201811163062 ACN 201811163062ACN 110972254 ACN110972254 ACN 110972254A
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clock
clock signal
base station
normal
module
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CN201811163062.9A
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Chinese (zh)
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章贵
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Datang Mobile Communications Equipment Co Ltd
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Datang Mobile Communications Equipment Co Ltd
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Priority to CN201811163062.9ApriorityCriticalpatent/CN110972254A/en
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Abstract

The embodiment of the invention provides a clock synchronization system, wherein the system comprises: the system comprises at least two first-class base stations, a clock source device and a clock source device, wherein the first-class base stations correspond to the clock source device, and the clock source device is used for providing clock signals for the first-class base stations; at least one base station of a second type; the first type base station and each base station in the second type base station are connected in cascade and form a ring structure so as to synchronize clock signals among the base stations, and the first type base station comprises: and the second clock judging module of the first clock judging module is used for respectively judging whether the first clock signal and the second clock signal are normal or not, and respectively sending the first clock signal and the second clock signal to the first clock synchronizing module and the second clock synchronizing module of the subordinate cascaded base station. When one clock source is in a problem, other clock sources are adopted to provide clock signals for the subordinate base stations, and the communication quality is improved.

Description

Clock synchronization system
Technical Field
The invention relates to the technical field of communication, in particular to a clock synchronization system.
Background
For mobile communication systems, especially for TDD (Time Division Duplex) systems, clock synchronization between different base stations has a great influence on communication quality, so that an accurate clock source needs to be provided for the base stations. An external GPS (Global positioning System) antenna and a receiver are usually used to provide a clock source for a base station, however, many application scenarios do not have the condition for installing a GPS antenna.
In the prior art, for an application scenario without a condition for installing a GPS antenna, a clock source may be provided for a subordinate base station in a base station cascade connection manner. As shown in fig. 1, the GPS1 and the receiver are installed in the base station a and provide a clock source to the base station a, the base station a provides a clock source to the subordinate base station B in a cascade manner, the base station B provides a clock source to the subordinate base station C, and the base station C provides a clock source to the subordinate base station D.
Analyzing the networking structure, when a network among the GPS1, the receiver, or the base stations fails, the failed base station and all the subordinate base stations cannot obtain clock sources. Each base station can adopt a crystal oscillator to keep clock synchronization within 24 hours, and the time of the base station after 24 hours cannot be guaranteed, so that the communication quality is influenced.
Disclosure of Invention
In view of the above, the present invention has been developed to provide a clock synchronization system that solves the above problems, or at least partially solves the above problems.
According to a first aspect of the present invention, there is provided a clock synchronization system, the system comprising:
the system comprises at least two first-class base stations, a clock source device and a clock source device, wherein the first-class base stations correspond to the clock source device, and the clock source device is used for providing clock signals for the first-class base stations;
at least one base station of a second type;
the first base station and each base station in the second base station are connected in a cascade way and form a ring structure so as to synchronize clock signals among the base stations;
the first type base station comprises:
the first clock judging module is used for judging whether a first clock signal generated by the clock source device corresponding to the first class base station is normal or not;
the first clock synchronization module is used for taking the first clock signal as a standard clock signal and sending the first clock signal to a subordinate base station cascaded with the first class base station under the condition that the first clock signal is normal;
the second clock judging module is used for receiving a second clock signal sent by a superior base station cascaded with the first class of base stations under the condition that the first clock signal is abnormal and judging whether the second clock signal is normal or not;
and the second clock synchronization module is used for taking the second clock signal as a standard clock signal and sending the second clock signal to a subordinate base station cascaded with the first base station under the condition that the second clock signal is normal.
Optionally, the first type base station further includes:
and the third clock judging module is used for periodically judging whether the second clock signal is abnormal or not under the condition that the first clock signal is normal.
The first early warning reporting module is used for reporting first early warning information under the condition that the first clock signal or the second clock signal is abnormal;
and the second early warning reporting module is used for reporting second early warning information under the condition that the first clock signal is abnormal and the second clock signal is abnormal, wherein the early warning level corresponding to the second early warning information is higher than that of the first early warning information.
Optionally, the second class of base stations includes:
the fourth clock judging module is used for receiving a third clock signal sent by a superior base station cascaded with the second base station and judging whether the third clock signal is normal or not;
and the third clock synchronization module is used for taking the third clock signal as a standard clock signal and sending the third clock signal to a subordinate base station cascaded with the second base station under the condition that the third clock signal is normal.
Optionally, the second class of base station further includes:
and the third early warning reporting module is used for reporting the first early warning information under the condition that the third clock signal is abnormal.
Optionally, the clock source device includes an external receiving sub-device and an internal receiving sub-device, where the external receiving sub-device is installed outside, and the internal receiving sub-device is installed inside the first type of base station.
Optionally, the external receiving sub-device includes one of a GPS antenna, a compass antenna, and a 1588 network.
Optionally, the first clock signal or the second clock signal includes a pulse per second signal and a time of day signal.
Optionally, the first clock determining module includes:
and the first clock normality determining submodule is used for determining that the first clock signal is normal if the pulse per second state of the time of day signal in the first clock signal corresponds to the available state.
Optionally, the second clock determining module includes:
and the second clock normality determining submodule is used for determining that the first clock signal is normal if the pulse per second state of the time of day signal in the second clock signal corresponds to the available state.
Optionally, the base stations are cascaded through a network cable.
The embodiment of the invention has the following advantages:
a clock synchronization system according to an embodiment of the present invention includes: the system comprises at least two first-class base stations, a clock source device and a clock source device, wherein the first-class base stations correspond to the clock source device, and the clock source device is used for providing clock signals for the first-class base stations; at least one base station of a second type; the first base station and each base station in the second base station are connected in a cascade way and form a ring structure so as to synchronize clock signals among the base stations; the first type base station comprises: the first clock judging module is used for judging whether a first clock signal generated by the clock source device corresponding to the first class base station is normal or not; the first clock synchronization module is used for taking the first clock signal as a standard clock signal and sending the first clock signal to a subordinate base station cascaded with the first class base station under the condition that the first clock signal is normal; the second clock judging module is used for receiving a second clock signal sent by a superior base station cascaded with the first class of base stations under the condition that the first clock signal is abnormal and judging whether the second clock signal is normal or not; and the second clock synchronization module is used for taking the second clock signal as a standard clock signal and sending the second clock signal to a subordinate base station cascaded with the first base station under the condition that the second clock signal is normal. When one clock source is in a problem, other clock sources are adopted to provide clock signals for the subordinate base stations, and the communication quality is improved.
The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 shows a block diagram of a prior art clock synchronization system;
FIG. 2 is a block diagram of a first embodiment of a clock synchronization system according to the present invention;
FIG. 3 illustrates an example block diagram of a clock synchronization system in an embodiment of the invention;
fig. 4 shows a block diagram of a second embodiment of a clock synchronization system according to the invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
Example one
Referring to fig. 1, a block diagram of a first embodiment of a clock synchronization system according to the present invention is shown, which is described in detail as follows.
The base station comprises at least two first-class base stations 101 and at least one second-class base station 102, wherein the first-class base station corresponds to aclock source device 1011, theclock source device 1011 is used for providing clock signals for the first-class base stations 101, and the first-class base stations 101 are connected with each base station in the second-class base stations 102 in a cascading manner and form a ring structure so as to synchronize the clock signals among the base stations.
The embodiment of the invention is used for clock synchronization between base stations in a mobile communication network.
The clock source device is used for acquiring a clock signal, and the clock signal is used for clock synchronization of each base station.
It can be understood that the first type base station and the second type base station both have basic communication capability, that is, receive a communication request sent by the mobile terminal, and send the communication request to the core network; and then sending the data sent by the core network to the mobile terminal. In addition, the first type base station and the second type base station are different in that the first type base station corresponds to a clock source device, and the second type base station does not.
As shown in fig. 3, the base stations A, B, C, D are connected in cascade to form a ring. The base station A, C has corresponding GPS1 and GPS2 as clock source devices, and the base station B, D has no clock source device, so that the base station A, C is a first type base station and the base station B, C is a second type base station.
It can be seen that the clock signal of the first base station a can be derived from the clock source device GPS1 or base station D, and the clock signal of the second base station B can be derived from only base station a. By analogy, the clock signal of the first type base station C may be derived from the clock source device GPS2 or the base station B, and the clock signal of the second type base station D may be derived from only the base station C.
Therefore, when the GPS1 is abnormal, a link GPS2- > base station C- > base station D- > base station A- > base station B is formed, so that clock synchronization of the base stations A and B is guaranteed, and the clock synchronization abnormality of the base stations A and B caused by the abnormality of the GPS1 is avoided.
For another example, when the GPS1 is normal and the base station D is abnormal, a link GPS1- > base station a- > base station B- > base station C- > base station D is formed.
The firsttype base station 101 includes:
a first clock determining module 1012, configured to determine whether the first clock signal generated by theclock source device 1011 corresponding to the firstclass base station 101 is normal.
Specifically, the clock signal includes a PPS (Pulse Per Second) whose rising edge represents the entire Second time and a TOD signal; TOD (Time Of Date) mainly represents the specific whole second Time value Of PPS and has a specific frame structure form. The base station completes absolute clock synchronization and wireless air interface synchronization between the base stations through the PPS and the TOD.
The pulse per second state of the TOD signal is used for judging whether the PPS signal is available or not.
The first clock synchronization module 1013 is configured to, when the first clock signal is normal, take the first clock signal as a standard clock signal and send the first clock signal to a lower base station cascaded with the first base station.
It can be understood that the clock signal obtained by the clock source device is preferably used for clock synchronization.
It is to be understood that the subordinate base stations may be base stations of a first type or base stations of a second type.
The second clock determining module 1014 is configured to receive a second clock signal sent by a higher-level base station cascaded with the first-class base station when the first clock signal is abnormal, and determine whether the second clock signal is normal.
It is understood that the superordinate base station may be a base station of the first type or a base station of the second type.
The second clock synchronization module 1015 is configured to, when the second clock signal is normal, use the second clock signal as a standard clock signal, and send the second clock signal to a subordinate base station that is cascaded with the first class base station.
In the embodiment of the invention, for the first type base station, when the clock signal obtained by the clock source device is abnormal, the clock signal sent by the last cascaded base station is adopted for clock synchronization, so that the probability of abnormal clock synchronization can be reduced.
A clock synchronization system according to an embodiment of the present invention includes: the system comprises at least two first-class base stations, a clock source device and a clock source device, wherein the first-class base stations correspond to the clock source device, and the clock source device is used for providing clock signals for the first-class base stations; at least one base station of a second type; the first base station and each base station in the second base station are connected in a cascade way and form a ring structure so as to synchronize clock signals among the base stations; the first type of base station comprises: the first clock judging module is used for judging whether a first clock signal generated by the clock source device corresponding to the first class base station is normal or not; the first clock synchronization module is used for taking the first clock signal as a standard clock signal and sending the first clock signal to a subordinate base station cascaded with the first class base station under the condition that the first clock signal is normal; the second clock judging module is used for receiving a second clock signal sent by a superior base station cascaded with the first class of base stations under the condition that the first clock signal is abnormal and judging whether the second clock signal is normal or not; and the second clock synchronization module is used for taking the second clock signal as a standard clock signal and sending the second clock signal to a subordinate base station cascaded with the first base station under the condition that the second clock signal is normal. When one clock source is in a problem, other clock sources are adopted to provide clock signals for the subordinate base stations, and the communication quality is improved.
Example two
Referring to fig. 4, a structural diagram of a second embodiment of a clock synchronization system according to the present invention is shown, specifically as follows:
thebase stations 201 of the first type and thebase stations 202 of the second type are connected in cascade, and form a ring structure, so as to synchronize clock signals among the base stations.
Optionally, in another embodiment of the present invention, the base stations are cascaded through a network cable.
The network cable is used for transmitting clock signals, and the specification and the type of the network cable are not limited in the embodiment of the invention.
The firsttype base station 201 comprises:
a firstclock determining module 2012, configured to determine whether the first clock signal generated by theclock source device 2011 corresponding to the firsttype base station 201 is normal.
The module can refer to the detailed description of the first clock determination module 1012 in the first embodiment, and is not described herein again.
Optionally, in another embodiment of the present invention, the firstclock determining module 2012 includes:
and the first clock normality determining submodule is used for determining that the first clock signal is normal if the pulse per second state of the time of day signal in the first clock signal corresponds to the available state.
It is to be understood that the abnormality of the first clock signal is determined when the pulse-per-second state corresponds to the unavailable state.
In practical applications, the PPS and the TOD are paired, and if the pulse per second state is not available, the PPS signal is not available, and thus the corresponding TOD is not available.
A firstclock synchronization module 2013, configured to, when the first clock signal is normal, use the first clock signal as a standard clock signal, and send the first clock signal to a subordinate base station that is cascaded with the first class base station.
The module can refer to the detailed description of the first clock synchronization module 1013 in the first embodiment, and is not described herein again.
A secondclock determining module 2014, configured to receive a second clock signal sent by a higher base station cascaded with the first class base station when the first clock signal is abnormal, and determine whether the second clock signal is normal.
The module can refer to the detailed description of the second clock determining module 1014 in the first embodiment, and is not described herein again.
Optionally, in another embodiment of the present invention, the secondclock determining module 2014 includes:
and the second clock normality determining submodule is used for determining that the first clock signal is normal if the pulse per second state of the time of day signal in the second clock signal corresponds to the available state.
The determination that the second clock signal is sufficiently abnormal is the same as the determination of the first clock signal.
A secondclock synchronization module 2015, configured to, when the second clock signal is normal, take the second clock signal as a standard clock signal, and send the second clock signal to a subordinate base station that is cascaded with the first class base station.
The module can refer to the detailed description of the second clock synchronization module 1015 in the first embodiment, and is not described herein again.
Optionally, in another embodiment of the present invention, thefirst base station 201 further includes:
a third clock determining module 2016, configured to periodically determine whether the second clock signal is abnormal or not when the first clock signal is normal.
In the embodiment of the invention, in order to further reduce the probability of clock synchronization abnormality, when the first clock signal is normal, the second clock signal is periodically judged to be abnormal so as to deal with the abnormality in advance.
It can be understood that the smaller the time period for judging whether the second clock signal is abnormal is, the more the abnormality can be found in time, but a great amount of operation complexity is introduced; the larger the time period for judging whether the second clock signal is abnormal or not is, the lower the operation complexity is, but the lower the timeliness for finding the abnormality is. Thus, the time period may be set to a suitable value according to practical applications, and the embodiment of the present invention does not limit the time period.
A first warning reporting module 2017, configured to report first warning information when the first clock signal or the second clock signal is abnormal.
Specifically, the first early warning information is reported to the central server, so that maintenance personnel can process the first early warning information in time.
It is understood that the first warning information may include base station information, warning level, etc.
A second earlywarning reporting module 2018, configured to report second early warning information when both the first clock signal and the second clock signal are abnormal, where an early warning level corresponding to the second early warning information is higher than an early warning level of the first early warning information.
It is understood that the second warning information may include base station information, warning level, etc. In practical application, the early warning level of the second early warning information may be severe, and the early warning level of the first early warning information may be normal.
Optionally, in another embodiment of the present invention, thesecond base station 202 includes:
a fourthclock determining module 2021, configured to receive a third clock signal sent by a superior base station cascaded with the second class of base stations, and determine whether the third clock signal is normal.
Whether the third clock signal is normal or not is determined by the same method as the first and second clock signals, which is not described herein again.
A thirdclock synchronization module 2022, configured to, when the third clock signal is normal, use the third clock signal as a standard clock signal, and send the third clock signal to a lower base station cascaded with the second base station.
It is understood that the clock signal of the second type base station is only originated from the superior base station. When the clock signal of the upper base station is abnormal, the base station cannot realize clock synchronization.
Optionally, in another embodiment of the present invention, thesecond base station 202 further includes:
a thirdwarning reporting module 2023, configured to report the first warning information when the third clock signal is abnormal.
In the embodiment of the invention, when the second type base station reports the first early warning information, the second type base station cannot realize clock synchronization.
Optionally, in another embodiment of the present invention, theclock source device 2011 includes an external receiving sub-device and an internal receiving sub-device, the external receiving sub-device is installed outside, the internal receiving sub-device is installed inside the first type base station, and the external receiving sub-device is communicatively connected to the internal receiving sub-device.
The external receiving sub-device may be an antenna for receiving signals from the outside and sending the external receiving signals to the internal receiving sub-device.
The internal receiving sub-means may be a receiver, processing the signal.
Optionally, in another embodiment of the present invention, the external receiving sub-device includes one of a GPS antenna, a compass antenna, and a 1588 network.
A clock synchronization system according to an embodiment of the present invention includes: the system comprises at least two first-class base stations, a clock source device and a clock source device, wherein the first-class base stations correspond to the clock source device, and the clock source device is used for providing clock signals for the first-class base stations; at least one base station of a second type; the first base station and each base station in the second base station are connected in a cascade way and form a ring structure so as to synchronize clock signals among the base stations; the first type base station comprises: the first clock judging module is used for judging whether a first clock signal generated by the clock source device corresponding to the first class base station is normal or not; the first clock synchronization module is used for taking the first clock signal as a standard clock signal and sending the first clock signal to a subordinate base station cascaded with the first class base station under the condition that the first clock signal is normal; the second clock judging module is used for receiving a second clock signal sent by a superior base station cascaded with the first class of base stations under the condition that the first clock signal is abnormal and judging whether the second clock signal is normal or not; and the second clock synchronization module is used for taking the second clock signal as a standard clock signal and sending the second clock signal to a subordinate base station cascaded with the first base station under the condition that the second clock signal is normal. When one clock source is in a problem, other clock sources are adopted to provide clock signals for the subordinate base stations, and the communication quality is improved. In addition, the potential clock signal abnormity of the user can be prompted through the early warning information of different levels, the accurate clock source receiving can be realized through the inner part device and the outer part device, the external receiving sub-device is diversified, and whether the clock signal is normal or not can be judged through fields in the time of day signal.
The algorithms and displays presented herein are not inherently related to any particular computer, virtual machine, or other apparatus. Various general purpose systems may also be used with this teaching. The required structure for constructing such a system will be apparent from the description above. Moreover, the present invention is not directed to any particular programming language. It is appreciated that a variety of programming languages may be used to implement the teachings of the present invention as described herein, and any descriptions of specific languages are provided above to disclose the best mode of the invention.
In the description provided herein, numerous specific details are set forth. It is understood, however, that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be interpreted as reflecting an intention that: that the invention as claimed requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.
Those skilled in the art will appreciate that the modules in the device in an embodiment may be adaptively changed and disposed in one or more devices different from the embodiment. The modules or units or components of the embodiments may be combined into one module or unit or component, and furthermore they may be divided into a plurality of sub-modules or sub-units or sub-components. All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or elements of any method or apparatus so disclosed, may be combined in any combination, except combinations where at least some of such features and/or processes or elements are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Furthermore, those skilled in the art will appreciate that while some embodiments described herein include some features included in other embodiments, rather than other features, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. For example, in the following claims, any of the claimed embodiments may be used in any combination.
The various component embodiments of the invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art will appreciate that a microprocessor or Digital Signal Processor (DSP) may be used in practice to implement some or all of the functions of some or all of the components in a clock synchronization apparatus according to embodiments of the present invention. The present invention may also be embodied as apparatus or device programs (e.g., computer programs and computer program products) for performing a portion or all of the methods described herein. Such programs implementing the present invention may be stored on computer-readable media or may be in the form of one or more signals. Such a signal may be downloaded from an internet website or provided on a carrier signal or in any other form.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The usage of the words first, second and third, etcetera do not indicate any ordering. These words may be interpreted as names.

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN113316245A (en)*2021-04-302021-08-27新华三技术有限公司Method and device for aligning air interface system frame

Citations (6)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US20010006516A1 (en)*1999-12-302001-07-05Hyundai-Electronics Industries Co., Ltd.Base station controller in IMT-2000 system
CN1652520A (en)*2004-02-022005-08-10华为技术有限公司 A method for networking of distributed base stations
CN101136711A (en)*2007-09-292008-03-05中兴通讯股份有限公司Optical terminal service, clock, cross service high integration veneer service smooth switch system of SDH system
CN101488803A (en)*2009-02-182009-07-22华为技术有限公司Satellite time clock synchronization method, system and base station
CN102014481B (en)*2010-12-132015-06-03中兴通讯股份有限公司Method and system for maintaining network link clock
CN107231208A (en)*2017-07-192017-10-03京信通信系统(中国)有限公司A kind of clock synchronizing method and system

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US20010006516A1 (en)*1999-12-302001-07-05Hyundai-Electronics Industries Co., Ltd.Base station controller in IMT-2000 system
CN1652520A (en)*2004-02-022005-08-10华为技术有限公司 A method for networking of distributed base stations
CN101136711A (en)*2007-09-292008-03-05中兴通讯股份有限公司Optical terminal service, clock, cross service high integration veneer service smooth switch system of SDH system
CN101488803A (en)*2009-02-182009-07-22华为技术有限公司Satellite time clock synchronization method, system and base station
CN102014481B (en)*2010-12-132015-06-03中兴通讯股份有限公司Method and system for maintaining network link clock
CN107231208A (en)*2017-07-192017-10-03京信通信系统(中国)有限公司A kind of clock synchronizing method and system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
中国移动: "中国移动高精度时间同步1PPS+TOD接口规范V1.0", 《中国移动通信企业标准》*

Cited By (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN113316245A (en)*2021-04-302021-08-27新华三技术有限公司Method and device for aligning air interface system frame

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