Method for manufacturing multiple mask layerTechnical Field
the invention belongs to the field of semiconductor manufacturing, and particularly relates to a method for manufacturing a multiple mask layer.
Background
As semiconductor technology continues to evolve, integrated circuits become smaller and denser, which provides many advantages to the performance of integrated circuits, but at the same time, due to the limitations of manufacturing equipment, the production of smaller and denser integrated circuits becomes increasingly difficult and expensive to manufacture. Improved processes are therefore used to reduce feature size, thereby increasing the density of integrated circuits.
Pitch doubling or pitch multiplication is one method that can extend the capabilities of the lithography technique beyond its minimum pitch. The existing manufacturing method of the pitch multiplication mask layer comprises the following steps:
1) Providing a substrate 101, and forming a bottom mask layer 102 on the substrate;
2) Forming a patterned photoresist layer on the bottom mask layer 102, wherein the photoresist layer comprises a plurality of photoresist units 103, and two adjacent photoresist units have a first gap 104;
3) Depositing a silicon dioxide layer 105 on the bottom mask layer 102, wherein the silicon dioxide layer 105 covers the sidewalls of the photoresist units 103, and covers the bottom of the first gaps 104 and the surfaces of the photoresist units 103;
4) Etching to remove the surface of the photoresist unit 103 and the silicon dioxide layer 105 at the bottom of the first gap 104, and reserving the silicon dioxide layer 105 on the side wall of the photoresist unit 103;
5) removing the photoresist unit 103, and reserving the silicon dioxide layer 105 on the side wall of the photoresist unit 103;
6) Etching the bottom mask layer 102 by using the silicon dioxide layer 105 as a mask until the substrate 101 is exposed, so as to form a second gap 106 in the bottom mask layer 102;
7) The silicon dioxide layer 105 is removed.
In the above manufacturing method, a "ox horn" similar structure, such as the silicon dioxide layer 105 shown in fig. 4, may be formed in the process of forming the pitch-multiplied mask layer, and when the bottom mask layer 102 is etched by using the "ox horn" similar structure, the etching accuracy may be reduced, which is not favorable for improving the mask layer manufacturing accuracy. In addition, the above method can only manufacture double mask layers, and cannot meet the production requirement under the condition that the distance needs to be further reduced.
Based on the above, it is necessary to provide a method for manufacturing a multiple mask layer, which can effectively improve the accuracy of the multiple mask layer and further reduce the pitch.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for fabricating a multiple mask layer, which is used to solve the problems of the prior art that the multiple mask layer is not precise and it is difficult to further reduce the pitch.
in order to achieve the above and other related objects, the present invention provides a method for manufacturing a multiple mask layer, the method comprising: 1) providing a substrate, and forming a first mask layer on the substrate, wherein the first mask layer comprises a plurality of imaging mask units, and imaging gaps are formed among the imaging mask units on the substrate; 2) depositing a second mask layer on the substrate, wherein the second mask layer covers the top surface and the side wall of the imaging mask unit and the bottom of the imaging gap so as to form a first groove in the imaging gap in a self-alignment manner, and the bottom of the first groove is lower than the top surface of the imaging mask unit; 3) depositing a third mask layer on the second mask layer, wherein the third mask layer at least fills the first grooves and comprises a plurality of first medium mask units positioned in the first grooves; 4) thinning the third mask layer and the second mask layer until the imaging mask unit is exposed, and simultaneously exposing the second mask layer and the third mask layer, wherein the thinned second mask layer has a size corresponding to the imaging gap, and the first intermediate mask unit of the third mask layer is separated and embedded in the second mask layer; 5) selectively etching to remove the imaging mask unit of the first mask layer so as to form a reverse imaging gap on the substrate; 6) depositing a fourth mask layer on the substrate, wherein the fourth mask layer covers the top surface and the side wall of the second mask layer, the top surface of the first intermediate mask unit and the bottom of the reverse imaging gap to form a second groove in the reverse imaging gap in a self-alignment manner, and the bottom of the second groove is lower than the top surface of the second mask layer and is not higher than the bottom surface of the first intermediate mask unit; 7) depositing a fifth mask layer on the fourth mask layer, wherein the fifth mask layer at least fills the second grooves, and the fifth mask layer comprises a plurality of second medium mask units positioned in the second grooves; 8) thinning the fifth mask layer and the fourth mask layer until the second mask layer is exposed, and simultaneously exposing the first intermediate mask unit, the fourth mask layer and the fifth mask layer, wherein the thinned fourth mask layer has a size corresponding to the inverse imaging gap, and the second intermediate mask unit of the fifth mask layer is separated and embedded in the fourth mask layer; 9) patterning and etching the second mask layer based on the first intermediate mask unit of the third mask layer to form a division gap on the substrate and in the imaging gap, wherein one side of the first division gap comprises a side wall of the first intermediate mask unit, and the other side of the first division gap comprises a side wall of the thinned fourth mask layer; 10) selectively etching to remove the second intermediate mask unit of the fifth mask layer in the second groove; and 11) etching the fourth mask layer based on the second groove in a self-alignment manner until the substrate is exposed at the second groove, so that a second division spacer is formed on the substrate and in the inverse imaging gap on the fourth mask layer, and a second division gap is formed between the division spacers.
Preferably, step 1) further comprises the step of mask trimming the imaging mask unit to reduce the width of the imaging mask unit.
Preferably, the mask trimming method includes one or two of the group consisting of isotropic dry etching and anisotropic wet etching.
Preferably, in the step 5), an etching selection ratio of the first mask layer to the second mask layer is not less than 10: 1, and an etching selection ratio of the first mask layer to the third mask layer is not less than 10: 1.
Preferably, in step 9), an etching selection ratio of the second mask layer to the third mask layer is not less than 10: 1, an etching selection ratio of the second mask layer to the fourth mask layer is not less than 10: 1, and an etching selection ratio of the second mask layer to the fifth mask layer is not less than 10: 1.
Preferably, in the step 10), an etching selection ratio of the fifth mask layer to the third mask layer is not less than 10: 1, and an etching selection ratio of the fifth mask layer to the fourth mask layer is not less than 10: 1.
Preferably, the material of the first mask layer includes one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the second mask layer is made of one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the material of the third mask layer comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the fourth mask layer is made of one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the material of the fifth mask layer comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon.
preferably, the method further includes step 12) of etching to remove the third mask layer, so as to form a multiple mask layer including the first multiple-time gap and the multiple-time spacer, which are included in the imaging gap and separated by the second mask layer, of the fourth mask layer at the side of the reverse imaging gap.
Preferably, the width of the first division gap is adjusted by controlling the thickness of the second mask layer deposited on the sidewall of the imaging mask unit, and the width of the second division gap is adjusted by controlling the width of the second groove.
Preferably, the thickness of the second mask layer is controlled to be equal to the width of the second groove, so that the width of the first division gap is equal to the width of the second division gap.
The invention also provides a manufacturing method of the multiple mask layer, which comprises the following steps: 1) providing a substrate, and forming a first mask layer on the substrate, wherein the first mask layer comprises a plurality of imaging mask units, and imaging gaps are formed among the imaging mask units on the substrate; 2) depositing a second mask layer on the substrate, wherein the second mask layer covers the top surface and the side wall of the imaging mask unit and the bottom of the imaging gap so as to form a first groove in the imaging gap in a self-alignment manner, and the bottom of the first groove is lower than the top surface of the imaging mask unit; 3) depositing a third mask layer on the second mask layer, wherein the third mask layer at least fills the first grooves and comprises a plurality of first medium mask units positioned in the first grooves; 4) thinning the third mask layer and the second mask layer until the imaging mask unit is exposed, and simultaneously exposing the second mask layer and the third mask layer, wherein the thinned second mask layer has a size corresponding to the imaging gap, and the first intermediate mask unit of the third mask layer is separated and embedded in the second mask layer; 5) etching the second mask layer based on the third mask layer to form a first back imaging gap on the substrate; 6) depositing a fourth mask layer on the substrate, wherein the fourth mask layer covers the first mask layer, the third mask layer and the first reverse imaging gap, and the fourth mask layer comprises a plurality of second intermediate mask units located in the first reverse imaging gap; 7) thinning the fourth mask layer until the first mask layer and the third mask layer are exposed, and reserving the second intermediate mask unit in the first inverse imaging gap, wherein the second intermediate mask unit is separated and embedded in the first inverse imaging gap so as to simultaneously expose the first mask layer, the third mask layer and the second intermediate mask unit; 8) selectively etching to remove the first mask layer to form a second anti-imaging gap on the substrate; 9) selectively etching to remove the third mask layer and the second mask layer to form a third reverse imaging gap on the substrate; 10) depositing a fifth mask layer on the substrate, wherein the fifth mask layer covers the top surface and the side wall of the second intermediate mask unit, the bottom of the second inverse imaging gap and the bottom of the third inverse imaging gap so as to form a second groove in the second inverse imaging gap in a self-alignment manner and form a third groove in the third inverse imaging gap in a self-alignment manner, and the bottoms of the second groove and the third groove are lower than the top surface of the second intermediate mask unit; 11) depositing a sixth mask layer on the fifth mask layer, wherein the sixth mask layer at least fills the second groove and the third groove, and the sixth mask unit layer comprises a plurality of third intermediate mask units positioned in the second groove and a plurality of fourth intermediate mask units positioned in the third groove; 12) thinning the sixth mask layer and the fifth mask layer until the fourth mask layer is exposed, wherein the third intermediate mask unit is reserved in the second groove, and the fourth intermediate mask unit is reserved in the third groove, so that the fourth mask layer, the fifth mask layer, the third intermediate mask unit and the fourth intermediate mask unit are exposed at the same time; and 13) etching the fifth mask layer based on the third intermediate mask unit and the fourth intermediate mask unit to form a first division gap and a second division gap on the substrate, wherein the first division gap is located in the second inverse imaging gap, and the second division gap is located in the third inverse imaging gap.
Preferably, step 1) further comprises the step of mask trimming the imaging mask unit to reduce the width of the imaging mask unit.
Preferably, the mask trimming method includes one or two of the group consisting of isotropic dry etching and anisotropic wet etching.
Preferably, in the step 5), an etching selection ratio of the second mask layer to the first mask layer is not less than 10: 1, and an etching selection ratio of the second mask layer to the third mask layer is not less than 10: 1.
Preferably, in step 8), an etching selection ratio of the first mask layer to the fourth mask layer is not less than 10: 1, in step 9), an etching selection ratio of the second mask layer to the fourth mask layer is not less than 10: 1, and an etching selection ratio of the third mask layer to the fourth mask layer is not less than 10: 1.
preferably, in the step 13), an etching selection ratio of the fifth mask layer to the fourth mask layer is not less than 10: 1, and an etching selection ratio of the fifth mask layer to the sixth mask layer is not less than 10: 1.
Preferably, the material of the first mask layer includes one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the second mask layer is made of one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the material of the third mask layer comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the fourth mask layer is made of one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the material of the fifth mask layer comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the material of the sixth mask layer comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon.
preferably, the width of the first division gap and the width of the second division gap are adjusted by controlling the thickness of the fifth mask layer deposited on the sidewall of the fourth mask layer.
Preferably, the width of the first division gap is equal to the width of the second division gap.
The invention also provides a manufacturing method of the multiple mask layer, which comprises the following steps: 1) providing a substrate, forming a bottom mask layer on the substrate, and forming a first mask layer on the bottom mask layer, wherein the first mask layer comprises a plurality of imaging mask units, and imaging gaps on the bottom mask layer are formed among the imaging mask units;
2) depositing a second mask layer on the bottom mask layer, wherein the second mask layer covers the top surface and the side wall of the imaging mask unit and the bottom of the imaging gap, and simultaneously self-aligning to form a first groove in the imaging gap, and the bottom of the first groove is lower than the top surface of the imaging mask unit; 3) depositing a third mask layer on the second mask layer, wherein the third mask layer covers the bottom and the side wall of the first groove so as to form a second groove in the first groove in a self-alignment manner; 4) depositing a fourth mask layer on the third mask layer, wherein the fourth mask layer at least fills the second grooves, and the fourth mask layer comprises a plurality of first medium mask units positioned in the second grooves; 5) thinning the fourth mask layer until the third mask layer is exposed, wherein the first intermediate mask unit is reserved in the second groove; 6) etching the third mask layer based on the first intermediate mask unit to form a first back imaging gap on the second mask layer; 7) further etching the second mask layer based on the first reverse imaging gap until the bottom mask layer is exposed at the first reverse imaging gap, wherein the second mask layer is reserved on the side wall of the imaging mask unit; 8) selectively etching to remove the first mask layer to form a second reverse imaging gap on the bottom mask layer, wherein the second reverse imaging gap is larger than the first reverse imaging gap; 9) selectively etching the bottom mask layer to transfer the first inverse imaging gap into the bottom mask layer to form a first division gap, and to transfer the second inverse imaging gap into the bottom mask layer to form a third inverse imaging gap; 10) selectively etching to remove the second mask layer, the third mask layer and the fourth mask layer; 11) depositing a fifth mask layer on the bottom mask layer, wherein the fifth mask layer fills the first division gap and simultaneously forms a third groove in the third inverse imaging gap in a self-alignment manner based on the fact that the third inverse imaging gap is larger than the first division gap, and the bottom of the third groove is lower than the top surface of the bottom mask layer; 12) depositing a sixth mask layer on the fifth mask layer, wherein the sixth mask layer at least fills the third groove, and the sixth mask layer comprises a plurality of second medium mask units positioned in the third groove; 13) thinning the sixth mask layer and the fifth mask layer until the bottom mask layer is exposed, wherein the second intermediate mask unit is reserved in the third groove, so that the bottom mask layer, the fifth mask layer and the second intermediate mask unit are exposed at the same time; and 14) etching the fifth mask layer in the third inverse imaging gap based on the second intermediate mask unit to form a second division gap on the substrate, and simultaneously removing the fifth mask layer in the first division gap to form a first division gap on the substrate.
preferably, step 1) further comprises the step of mask trimming the imaging mask unit to reduce the width of the imaging mask unit.
preferably, the mask trimming method includes one or two of the group consisting of isotropic dry etching and anisotropic wet etching.
Preferably, in step 7), the second mask layer is further etched based on the first reverse imaging gap until the bottom mask layer is exposed at the first reverse imaging gap, and the second mask layer on the upper surface of the first mask layer is simultaneously removed to expose the first mask layer.
Preferably, in step 6), an etching selection ratio of the third mask layer to the fourth mask layer is not less than 10: 1, and in step 7), an etching selection ratio of the second mask layer to the fourth mask layer is not less than 10: 1.
Preferably, the material of the first mask layer includes one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the second mask layer is made of one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the material of the third mask layer comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the fourth mask layer is made of one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the material of the fifth mask layer comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon; the material of the sixth mask layer comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon.
preferably, the width of the first division gap is adjusted by controlling the thickness of the third mask layer on both sides of the second groove.
Preferably, the width of the second division gap is adjusted by controlling the thickness of the fifth mask layer on both sides of the third groove.
The invention also provides a multiple mask layer, comprising: the imaging spacer, the equal interval forms on the base, said imaging spacer has imaging interval of the negative among them, the width of said imaging spacer of negative is smaller than the minimum exposure development size; and a division spacer formed on the substrate, wherein each of the inverse imaging gaps has two divided dividers spaced apart from each other, a first division gap is formed between the inverse imaging spacer and the division spacer, a second division gap is formed between the two division spacers, and the width of the division spacer is smaller than the minimum exposure development size.
preferably, the width of the first division gap is equal to the width of the second division gap.
Preferably, the width of the counter imaging spacer is equal to one third of the minimum exposure and development dimension, and the width of the double spacer is equal to one third of the minimum exposure and development dimension.
the invention also provides a multiple mask layer, comprising: the imaging device comprises anti-imaging spacers, a first imaging device and a second imaging device, wherein the anti-imaging spacers are formed on a substrate at equal intervals, first imaging gaps and second imaging gaps are alternately arranged among the anti-imaging spacers, and the width of each anti-imaging spacer is less than half of the minimum exposure development size; a first division spacer formed on the substrate within the first inverse imaging gap, the first division spacer having a first division gap with the inverse imaging spacer, the first division spacer having a width less than half of the minimum exposure development dimension; and a second division spacer formed on the substrate within the second inverse imaging gap, the second division spacer and the inverse imaging spacer having a second division gap therebetween, the second division spacer having a width less than half of the minimum exposure development dimension.
Preferably, the width of the first division gap is equal to the width of the second division gap.
Preferably, the width of the counter imaging spacer is equal to one fourth of the minimum exposure and development dimension, the width of the first division spacer is equal to one fourth of the minimum exposure and development dimension, and the width of the second division spacer is equal to one fourth of the minimum exposure and development dimension. .
the invention also provides a multiple mask layer, comprising: the back imaging spacers are formed on the substrate, every three back imaging spacers are in a back imaging spacer group, a first time division gap is reserved between every two back imaging spacers in the back imaging spacer group, a back imaging gap is reserved between every two adjacent back imaging gap groups, and the width of each back imaging spacer is less than half of the minimum exposure development size; and a division spacer formed on the substrate, one division spacer being provided in each of the inverse imaging gaps, a second division spacer being provided between the division spacer and the adjacent inverse imaging spacer, and a width of the division spacer being less than half of the minimum exposure development size.
Preferably, the width of the first division gap is not equal to the width of the second division gap.
preferably, the width of the counter imaging spacer is equal to one fourth of the minimum exposure and development dimension and the width of the double spacer is equal to one fourth of the minimum exposure and development dimension.
As described above, the method for manufacturing a multiple mask layer of the present invention has the following beneficial effects:
1) the manufacturing method of the multiple mask layer does not form a structure similar to a 'ox horn' in the manufacturing process of the distance multiplication, and can greatly improve the accurate etching of the multiple mask layer.
2) The invention utilizes the different laminated configurations of the multiple mask layers and the selection of the etching rate ratio, and is based on the method of forming the groove by self-alignment to manufacture the multiple mask layers, thereby effectively reducing the characteristic size of the device and increasing the characteristic density of the device.
3) The invention can realize the interval multiplication of 3 times and 4 times, and can realize the width adjustment of the gap by controlling the thickness of each layer of mask layer.
4) The invention can also realize two or more gaps with different widths in the same multiple mask layer, thereby greatly expanding the application range of the multiple mask layer.
drawings
Fig. 1 to 6 are schematic structural diagrams showing steps of a method for manufacturing a pitch-multiplied mask layer in the prior art.
Fig. 7 to 19 are schematic structural diagrams showing steps of a method for manufacturing a multiple mask layer in embodiment 1 of the present invention.
Fig. 20 to 33 are schematic structural diagrams showing steps of a method for manufacturing a multiple mask layer in embodiment 2 of the present invention.
fig. 34 to 48 are schematic structural views showing steps of a method for manufacturing a multiple mask layer in embodiment 3 of the present invention.
Fig. 49 is a schematic structural diagram of a multiple mask layer in embodiment 4 of the present invention.
Fig. 50 is a schematic structural diagram of a multiple mask layer in embodiment 5 of the present invention.
Fig. 51 is a schematic structural diagram of a multiple mask layer in embodiment 6 of the present invention.
Description of the element reference numerals
101 substrate
102 bottom mask layer
103 photoresist unit
104 first gap
105 silicon dioxide layer
106 second gap
201 substrate
202 bottom mask layer
203 first mask layer
2031 imaging mask unit
204 imaging gap
205 second mask layer
206 first groove
207 third mask layer
209 fourth mask layer
210 second groove
211 fifth mask layer
212 first division gap
213 second division gap
214 inverse imaging gap
215 first anti-imaging gap
216 sixth mask layer
217 second anti-imaging gap
218 third inverse imaging gap
221 third groove
301 first intermediate mask unit
302 second intermediate mask unit
303 times partition body
304 third intermediate mask unit
305 fourth intermediate mask unit
401 substrate
402 inverse imaging spacer
403 times of spacer
404 back imaging gap
501 substrate
502 anti-imaging spacer
503 first time division spacer
504 second quarter spacer
505 first anti-imaging gap
506 second inverse imaging gap
601 base
602 inverse imaging spacer
603 inverse imaging spacer group
604 times the spacer
605 back imaging gap
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 7 to 51. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
The invention may be used in the manufacture of any integrated circuit, which is particularly advantageous for forming a repeating pattern or array of semiconductor devices, including arrays of memory cells of volatile and non-volatile memory devices, such as DRAM, phase change RAM, Programmable Conductor (PCRAM), ROM or flash memory, or integrated circuits having logic arrays.
Example 1
As shown in fig. 7 to 19, the present embodiment provides a method for manufacturing a multiple mask layer, where the method includes:
As shown in fig. 7 to 8, step 1) is performed first, a substrate 201 is provided, a first mask layer 203 is formed on the substrate 201, the first mask layer 203 includes a plurality of imaging mask units 2031, an imaging gap 204 is formed between the imaging mask units 2031 on the substrate 201, and the size of the imaging mask units 2031 depends on the capability of the minimum exposure and development size.
the substrate 201 includes a layer to be etched, which may be a semiconductor substrate material, a dielectric material, a metal material, or various stacked materials composed of the above materials.
The material of the first mask layer 203 comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. In this embodiment, the material of the first mask layer 203 may be a photoresist, and a spin coating process is first used to form a photoresist layer on the substrate 201, and then a photolithography process is used to pattern the photoresist layer to form a plurality of photoresist imaging mask units 2031.
After forming the plurality of imaging mask units 2031 by photolithography, a step of mask trimming the imaging mask units 2031 is further included to reduce the width of the imaging mask units 2031. For example, the mask trimming method includes one or two of the group consisting of isotropic dry etching and anisotropic wet etching.
As shown in fig. 9, step 2) is then performed to deposit a second mask layer 205 on the substrate 201, where the second mask layer 205 covers the top surface and the sidewalls of the imaging mask unit 2031 and the bottom of the imaging gap 204, so as to form a first recess 206 in the imaging gap 204 in a self-aligned manner, and the bottom of the first recess 206 is lower than the top surface of the imaging mask unit 2031.
By selecting a deposition process and a deposition rate, the cross-sectional shape of the first groove 206 is controlled to be rectangular, so that the accuracy of subsequent mask layer manufacturing can be effectively improved.
The above-mentionedThe material of the second mask layer 205 comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. Preferably, the second mask layer 205 is selected to be a material having an etching selectivity ratio of not less than 10: 1 with respect to the first mask layer 203, for example, the material of the second mask layer 205 may be silicon dioxide (SiO)2). The second mask layer 205 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
by controlling the thickness of the second mask layer 205, the second mask layer 205 covers the top and sidewalls of the imaging mask unit 2031 and the bottom of the imaging gap 204, so as to form a first recess 206 in the imaging gap 204 in a self-aligned manner. In the subsequent process, the width of the first sub-gap 212 may be adjusted by controlling the thickness of the second mask layer 205 deposited on the sidewall of the imaging mask unit 2031.
As shown in fig. 10, a step 3) is then performed to deposit a third mask layer 207 on the second mask layer 205, wherein the third mask layer 207 at least fills the first recesses 206, and the third mask layer 207 comprises a plurality of first intermediate mask units 301 located in the first recesses.
The material of the third mask layer 207 comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. By selecting the material of the third mask layer 207, the etching selection ratio of the first mask layer 203 to the third mask layer 207 is not less than 10: 1, and simultaneously, the etching selection ratio of the second mask layer 205 to the third mask layer 207 is not less than 10: 1, for example, when the first mask layer 203 is selected as a photoresist, the second mask layer 205 is selected as silicon dioxide (SiO) (SiO is selected as the second mask layer 205)2) In this embodiment, the material of the third mask layer 207 may be silicon nitride (SiN), silicon oxynitride (SiON), polysilicon (Si poly), or the like. The third mask layer 207 may be formed by a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD)And (4) obtaining.
As shown in fig. 11, step 4) is performed to thin the third mask layer 207 and the second mask layer 205 until the imaging mask unit 2031 is exposed, and simultaneously the second mask layer 205 and the third mask layer 207 are exposed, after the thinning, the second mask layer 205 has a size corresponding to the imaging gap 204, and the first intermediate mask unit 301 of the third mask layer 207 is separated and embedded in the second mask layer 205.
for example, the third mask layer 207 and the second mask layer 205 may be thinned by a chemical mechanical polishing process or an etching process until the first mask layer 203 is exposed, and since the bottom of the first recess 206 is lower than the top surface of the first mask layer 203, the first recess 206 retains the first intermediate mask unit 301 after thinning.
As shown in fig. 12, step 5) follows, selectively etching to remove the imaging mask unit 2031, so as to form a reverse imaging gap 214 on the substrate 201.
Since the etching selection ratio of the first mask layer 203 to the second mask layer 205 is not less than 10: 1, and the etching selection ratio of the first mask layer 203 to the third mask layer 207 is not less than 10: 1, the second mask layer 205 and the third mask layer 207 can be almost completely remained after the first mask layer 203 is completely etched and removed.
As shown in fig. 13, step 6) is then performed to deposit a fourth mask layer 209 on the substrate 201, wherein the fourth mask layer 209 covers the top surface and the sidewalls of the second mask layer 205, the top surface of the first intermediate mask unit 301, and the bottom of the reverse imaging gap, so as to form a second recess 210 in the reverse imaging gap 214 in a self-aligned manner, and the bottom of the second recess 210 is lower than the top surface of the second mask layer 205 and not higher than the bottom surface of the first intermediate mask unit 301.
the fourth mask layer 209 is made of a material selected from the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. By selecting the material of the fourth mask layer 209, the second mask layerthe etching selection ratio of the second mask layer 205 and the fourth mask layer 209 is not less than 10: 1, for example, the second mask layer 205 is silicon dioxide (SiO)2) In this embodiment, the fourth mask layer 209 may be made of silicon oxynitride (SiON) or polysilicon (Si poly), and the fourth mask layer 209 may be made of silicon oxynitride (SiON). The fourth mask layer 209 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
By selecting a deposition process and a deposition rate, the cross section of the second groove 210 is controlled to be rectangular, so that the precision of subsequent mask layer manufacturing can be effectively improved.
as shown in fig. 14, step 7) is then performed to deposit a fifth mask layer 211 on the fourth mask layer 209, wherein the fifth mask layer 211 at least fills the second recesses 210, and the fifth mask layer 211 includes a plurality of second intermediate mask units 302 located in the second recesses 210.
The material of the fifth mask layer 211 includes one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. For the above materials, the material of the fifth mask layer 211 is selected according to the following formula: the etching selection ratio of the second mask layer 205 to the fifth mask layer 211 is not less than 10: 1, the etching selection ratio of the fifth mask layer 211 to the third mask layer 207 is not less than 10: 1, and the etching selection ratio of the fifth mask layer 211 to the fourth mask layer 209 is not less than 10: 1. In this embodiment, the material of the fifth mask layer 211 is selected to be polysilicon.
As shown in fig. 15, step 8) is performed to thin the fifth mask layer 211 and the fourth mask layer 209 until the second mask layer 205 is exposed, and simultaneously the first intermediate mask unit 301, the fourth mask layer 209 and the fifth mask layer 211 are exposed, after the thinning, the fourth mask layer 209 has a size corresponding to the reverse imaging gap 214, and the second intermediate mask unit 302 of the fifth mask layer 211 is separated and embedded in the fourth mask layer 209.
For example, the fifth mask layer 211 and the fourth mask layer 209 may be thinned by a chemical mechanical polishing process or an etching process until the second mask layer 205 is exposed, and since the bottom of the second groove 210 is lower than the top surface of the second mask layer 205, the fifth mask layer 211 remains in the second groove 210 after thinning.
As shown in fig. 16, step 9) is performed to pattern-etch the second mask layer 205 based on the first intermediate mask unit 301 of the third mask layer 207 to form a first sub-gap 212 in the imaging gap 204 on the substrate 201, wherein one side of the first sub-gap 212 includes a sidewall of the first intermediate mask unit 301, and the other side of the first sub-gap 212 includes a sidewall of the thinned fourth mask layer 209.
The etching selection ratio of the second mask layer 205 to the third mask layer 207 is not less than 10: 1, the etching selection ratio of the second mask layer 205 to the fourth mask layer 209 is not less than 10: 1, and the etching selection ratio of the second mask layer 205 to the fifth mask layer 211 is not less than 10: 1. Based on the etching selection ratio, the second mask layer 205 is etched, and after the first sub-gap 212 is formed on the substrate 201, the third mask layer 207, the fourth mask layer 209, and the fifth mask layer 211 can be almost completely retained, and the second mask layer 205 shielded below the third mask layer 207 can also be retained.
As shown in fig. 17, a step 10) is performed to selectively etch the second intermediate mask unit 302 of the fifth mask layer 211 in the second recess 210.
The etching selection ratio of the fifth mask layer 211 to the third mask layer 207 is not less than 10: 1, and the etching selection ratio of the fifth mask layer 211 to the fourth mask layer 209 is not less than 10: 1. Based on the above etching selection ratio, after the fifth mask layer 211 in the second groove 210 is removed by etching, the third mask layer 207 and the fourth mask layer 209 may be almost completely remained.
As shown in fig. 18, step 11) is performed to self-align and etch the fourth mask layer 209 based on the second groove 210 until the substrate 201 is exposed at the second groove 210, so that the fourth mask layer 209 is formed with multiple spacers 303 on the substrate and in the anti-imaging gap, and the multiple spacers have second multiple gaps 213 therebetween.
The width of the second division gap 213 is adjusted by controlling the width of the second groove 210.
In the above manufacturing process, the thickness of the second mask layer 205 and the width of the second recess 210 are controlled to be equal, so that the width of the first sub-gap 212 and the width of the second sub-gap 213 are equal.
Of course, the width of the first sub-gap 212 and the width of the second sub-gap 213 can be different by controlling the thickness of the second mask layer 205 and the width of the second groove 210.
As shown in fig. 19, step 12) is finally performed to etch away the third mask layer 207, so as to form a multiple mask layer including the second mask layer 205 and the fourth mask layer 209.
In the embodiment, a structure similar to a 'ox horn' cannot be formed in the manufacturing process of pitch multiplication, and the accurate etching of the multiple mask layer can be greatly improved. The embodiment can realize the pitch multiplication by 3 times, and can realize the width adjustment of the gap by controlling the thickness of each layer of mask layer.
Example 2
As shown in fig. 20 to 33, the present embodiment provides a method for manufacturing a multiple mask layer, where the method includes:
As shown in fig. 20 to 21, step 1) is performed to provide a substrate 201, and a first mask layer 203 is formed on the substrate 201, where the first mask layer 203 includes a plurality of imaging mask units 2031, and an imaging gap 204 is formed between the imaging mask units 2031 on the substrate 201.
The substrate 201 includes a layer to be etched, which may be a semiconductor substrate material, a dielectric material, a metal material, or various stacked materials composed of the above materials.
the material of the first mask layer 203 comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. In this embodiment, the material of the first mask layer 203 may be a photoresist, and a spin coating process is first used to form a photoresist layer on the substrate 201, and then a photolithography process is used to pattern the photoresist layer to form a plurality of photoresist imaging mask units 2031.
After forming the plurality of imaging mask units 2031 by photolithography, a step of mask trimming the imaging mask units 2031 is further included to reduce the width of the imaging mask units 2031. For example, the mask trimming method includes one or two of the group consisting of isotropic dry etching and anisotropic wet etching.
As shown in fig. 22, step 2) is then performed to deposit a second mask layer 205 on the substrate 201, where the second mask layer 205 covers the top surface and the sidewalls of the imaging mask unit 2031 and the bottom of the imaging gap 204, and a first recess 206 is formed in the imaging gap 204 in a self-aligned manner, where the bottom of the first recess 206 is lower than the top surface of the imaging mask unit 2031.
by selecting a deposition process and a deposition rate, the cross-sectional shape of the first groove 206 is controlled to be rectangular, so that the accuracy of subsequent mask layer manufacturing can be effectively improved.
the material of the second mask layer 205 includes one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. Preferably, the second mask layer 205 is selected to be a material having an etching selectivity ratio of not less than 10: 1 with respect to the first mask layer 203, for example, the material of the second mask layer 205 may be silicon dioxide (SiO)2). The second mask layer 205 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
By controlling the thickness of the second mask layer 205, the second mask layer 205 covers the imaging mask unit 2031 and the imaging gap 204, and a first recess 206 is formed in the imaging gap 204 in a self-aligned manner.
as shown in fig. 23, a step 3) is then performed to deposit a third mask layer 207 on the second mask layer 205, wherein the third mask layer 207 at least fills the first recesses 206, and the third mask layer 207 comprises a plurality of first intermediate mask units 301 located in the first recesses.
The material of the third mask layer 207 comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. By selecting the material of the third mask layer 207, the etching selection ratio of the first mask layer 203 to the third mask layer 207 is not less than 10: 1, for example, when the first mask layer 203 is selected as a photoresist, the material of the third mask layer 207 may be selected as silicon nitride (SiN), silicon oxynitride (SiON), polysilicon (sipo), or the like, and in this embodiment, the material of the third mask layer 207 may be selected as silicon nitride (SiN). The third mask layer 207 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
As shown in fig. 24, step 4) is performed to thin the third mask layer 207 and the second mask layer 205 until the imaging mask unit 2031 is exposed, and simultaneously the second mask layer 205 and the third mask layer 207 are exposed, after the thinning, the second mask layer 205 has a size corresponding to the imaging gap, and the first intermediate mask unit 301 of the third mask layer 207 is separated and embedded in the second mask layer 205.
for example, the third mask layer 207 and the second mask layer 205 may be thinned by a chemical mechanical polishing process or an etching process until the first mask layer 203 is exposed, and since the bottom of the first groove 206 is lower than the top surface of the first mask layer 203, the third mask layer 207 remains in the first groove 206 after thinning.
As shown in fig. 25, step 5) is performed next, and the second mask layer 205 is etched based on the third mask layer 207 to form a first anti-imaging gap 215 on the substrate 201.
The etching selection ratio of the second mask layer 205 to the first mask layer 203 is not less than 10: 1, and the etching selection ratio of the second mask layer 205 to the third mask layer 207 is not less than 10: 1. Based on the above etching selection ratio, after the second mask layer 205 is etched to form the first reverse imaging gap 215 on the substrate 201, the third mask layer 207 and the first mask layer 203 may be almost completely retained, and the second mask layer 205, which is located below the third mask layer 207 and is shielded, may also be retained.
As shown in fig. 26, step 6) is then performed to deposit a fourth mask layer 209 on the substrate 201, wherein the fourth mask layer 209 covers the first mask layer 203, the third mask layer 207 and the first reverse imaging gap 215, and the fourth mask layer 209 includes a plurality of second intermediate mask units 302 located in the first reverse imaging gap 215.
The fourth mask layer 209 is made of a material selected from the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. By selecting the material of the fourth mask layer 209, the etching selection ratio of the first mask layer 203 to the fourth mask layer 209 is not less than 10: 1, the etching selection ratio of the second mask layer 205 to the fourth mask layer 209 is not less than 10: 1, and the etching selection ratio of the third mask layer 207 to the fourth mask layer 209 is not less than 10: 1, for example, the material of the fourth mask layer 209 may be silicon oxynitride (SiON) or polysilicon (Si poly), and in this embodiment, the material of the fourth mask layer 209 may be silicon oxynitride (SiON). The fourth mask layer 209 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
As shown in fig. 27, step 7) is performed next to thin the fourth mask layer 209 until the first mask layer 203 and the third mask layer 207 are exposed, and the second intermediate mask unit 302 in the first reverse imaging gap 215 is remained, the second intermediate mask unit is separated and embedded in the first reverse imaging gap 215, so as to simultaneously expose the first mask layer 203, the third mask layer 207 and the second intermediate mask unit 302.
For example, a chemical mechanical polishing process or an etching process may be used to thin the fourth mask layer 209 until the first mask layer 203 and the third mask layer 207 are exposed, and the fourth mask layer 209 in the first reverse imaging gap 215 is remained.
As shown in fig. 28, step 8) is performed next, and a selective etching is performed to remove the first mask layer 203, so as to form a second anti-imaging gap 217 on the substrate 201.
The etching selection ratio of the first mask layer 203 to the fourth mask layer 209 is not less than 10: 1, the etching selection ratio of the first mask layer 203 to the third mask layer 207 is not less than 10: 1, and based on the etching selection ratio, the first mask layer 203 is etched to form a second inverse imaging gap 217 on the substrate 201, the third mask layer 207 and the fourth mask layer 209 can be almost completely reserved, and the second mask layer 205 which is located below the third mask layer 207 and is shielded can also be almost completely reserved.
As shown in fig. 29, step 9) is performed to selectively etch and remove the third mask layer 207 and the second mask layer 205, so as to form a third anti-imaging gap 218 on the substrate 201;
The etching selection ratio of the second mask layer 205 to the fourth mask layer 209 is not less than 10: 1, the etching selection ratio of the third mask layer 207 to the fourth mask layer 209 is not less than 10: 1, and based on the etching selection ratio, the third mask layer 207 and the second mask layer 205 are etched to form a third reverse imaging gap 218 on the substrate 201, and then the fourth mask layer 209 can be almost completely remained.
As shown in fig. 30, step 10) is then performed to deposit a fifth mask layer 211 on the substrate 201, wherein the fifth mask layer 211 covers the top surface and sidewalls of the second intermediate mask unit 302 and the second inverse imaging gap 217 and the third inverse imaging gap 218 to self-align a second recess 210 in the second inverse imaging gap 217 and a third recess 219 in the third inverse imaging gap 218, wherein the bottoms of the second recess 210 and the third recess 219 are lower than the top surface of the second intermediate mask unit 302.
The material of the fifth mask layer 211 includes one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. By selecting the material of the fifth mask layer 211, the etching selection ratio of the fifth mask layer 211 to the fourth mask layer 209 is not less than 10: 1, for example, the material of the fifth mask layer 211 may be silicon dioxide (SiO)2) Silicon oxynitride (SiON) or polysilicon (Si poly), etc., in this embodiment, the material of the fifth mask layer 211 may be silicon dioxide (SiO) in some embodiments2). The fifth mask layer 211 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
By selecting a deposition process and a deposition rate, the cross-sectional shapes of the second groove 210 and the third groove 219 are controlled to be rectangular, so that the accuracy of subsequent mask layer manufacturing can be effectively improved.
As shown in fig. 31, step 11) is performed next, a sixth mask layer 216 is deposited on the fifth mask layer 211, the sixth mask layer 216 at least fills the second recesses 210 and the third recesses 219, and the sixth mask unit layer 216 includes a plurality of third intermediate mask units 304 located in the second recesses 210 and a plurality of fourth intermediate mask units 305 located in the third recesses 219.
The material of the sixth mask layer 216 includes one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. By selecting the material of the sixth mask layer 216, the etching selection ratio of the fifth mask layer 211 to the sixth mask layer 216 is not less than 10: 1, for example, the material of the sixth mask layer 216 may be selected from photoresist or polysilicon (Si poly), and in this embodiment, the material of the sixth mask layer 216 may be selected from polysilicon. The sixth mask layer 216 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
As shown in fig. 32, step 12) is performed to thin the sixth mask layer 216 and the fifth mask layer 211 until the fourth mask layer 209 is exposed, the third intermediate mask unit 304 is retained in the second recess 210, and the fourth intermediate mask unit 305 is retained in the third recess 219, so as to simultaneously expose the fourth mask layer 209, the fifth mask layer 211, the third intermediate mask unit 304, and the fourth intermediate mask unit 305.
since the bottoms of the second recess 210 and the third recess 219 are lower than the top surface of the fourth mask layer 209, the sixth mask layer 216 and the fifth mask layer 211 are thinned until the fourth mask layer 209 is exposed, the third intermediate mask unit 304 remains in the second recess 210, and the fourth intermediate mask unit 305 remains in the third recess 219.
As shown in fig. 33, finally, step 13) is performed to etch the fifth mask layer 211 based on the third intermediate mask unit 304 and the fourth intermediate mask unit 305 to form a first sub-gap 212 and a second sub-gap 213 on the substrate 201, wherein the first sub-gap 212 is located in the second anti-imaging gap 217 and the second sub-gap 213 is located in the third anti-imaging gap 218.
The etching selection ratio of the fifth mask layer 211 to the fourth mask layer 209 is not less than 10: 1, the etching selection ratio of the fifth mask layer 211 to the sixth mask layer 216 is not less than 10: 1, and the fourth mask layer 209 and the sixth mask layer 216 can be almost completely retained after the fifth mask layer 211 is etched based on the sixth mask layer 216 to form the first division gap 212 and the second division gap 213 on the substrate 201, and the fifth mask layer 211 hidden under the sixth mask layer can also be almost completely retained.
In the above manufacturing process, the width of the first sub-gap 212 and the width of the second sub-gap 213 are adjusted by controlling the thickness of the fifth mask layer 211 deposited on the sidewall of the fourth mask layer 209, and the finally obtained width of the first sub-gap 212 is equal to the width of the second sub-gap 213.
in the embodiment, a structure similar to a 'ox horn' cannot be formed in the manufacturing process of pitch multiplication, and the accurate etching of the multiple mask layer can be greatly improved. In the embodiment, multiple mask layers are manufactured by utilizing different laminated configurations of the multiple mask layers and selection of etching rate ratios and a method for forming the grooves based on self-alignment, so that the characteristic size of a device can be effectively reduced, and the characteristic density of the device can be increased. The embodiment can realize 4 times of equal spacing, and the width adjustment of the gap can be realized by controlling the thickness of each layer of mask layer.
Example 3
as shown in fig. 34 to 48, the present embodiment provides a method for manufacturing a multiple mask layer, where the method includes:
As shown in fig. 34 to 35, step 1) is first performed to provide a substrate 201, form a bottom mask layer 202 on the substrate 201, and form a first mask layer 203 on the bottom mask layer 202, where the first mask layer 203 includes a plurality of imaging mask units 2031, and imaging gaps 204 are formed between the imaging mask units 2031 on the bottom mask layer 202.
The substrate 201 includes a layer to be etched, which may be a semiconductor substrate material, a dielectric material, a metal material, or various stacked materials composed of the above materials.
The material of the first mask layer 203 comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. In this embodiment, the material of the first mask layer 203 may be a photoresist, and a spin coating process is first used to form a photoresist layer on the substrate 201, and then a photolithography process is used to pattern the photoresist layer to form a plurality of photoresist imaging mask units 2031.
After forming the plurality of imaging mask units 2031 by photolithography, a step of mask trimming the imaging mask units 2031 is further included to reduce the width of the imaging mask units 2031. For example, the mask trimming method includes one or two of the group consisting of isotropic dry etching and anisotropic wet etching.
As shown in fig. 36, step 2) is then performed to deposit a second mask layer 205 on the bottom mask layer 202, where the second mask layer 205 covers the imaging mask unit 2031 and the imaging gap 204, and a first recess 206 is formed in the imaging gap 204 in a self-aligned manner, where a bottom of the first recess 206 is lower than a top surface of the first mask layer 203.
By selecting a deposition process and a deposition rate, the cross-sectional shape of the first groove 206 is controlled to be rectangular, so that the accuracy of subsequent mask layer manufacturing can be effectively improved.
the material of the second mask layer 205 includes one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. For example, the material of the second mask layer 205 can be selected from silicon dioxide (SiO)2). The second mask layer 205 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
As shown in fig. 37, step 3) is then performed to deposit a third mask layer 207 on the second mask layer 205, wherein the third mask layer 207 covers the bottom and sidewalls of the first recess 206, so as to self-align and form a second recess 210 in the first recess 206.
By selecting a deposition process and a deposition rate, the cross section of the second groove 210 is controlled to be rectangular, so that the precision of subsequent mask layer manufacturing can be effectively improved.
the material of the third mask layer 207 comprises one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. For example, the material of the third mask layer 207 may be selected to be silicon nitride (SiN). The third mask layer 207 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
As shown in fig. 38, a step 4) is then performed to deposit a fourth mask layer 209 on the third mask layer 207, wherein the fourth mask layer 209 at least fills the second recesses 210, and the fourth mask layer 209 includes a plurality of first intermediate mask units 301 located in the second recesses 210.
The fourth mask layer 209 is made of a material selected from the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. By selecting the material of the fourth mask layer 209, the etching selection ratio of the third mask layer 207 to the fourth mask layer is not less than 10: 1, and the etching selection ratio of the second mask layer 205 to the fourth mask layer 209 is not less than 10: 1. For example, the material of the fourth mask layer 209 may be selected from silicon oxynitride (SiON) or polysilicon (sipo), and in this embodiment, the material of the fourth mask layer 209 may be selected from silicon oxynitride (SiON). The fourth mask layer 209 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
As shown in fig. 39, step 5) is performed to thin the fourth mask layer 209 until the third mask layer 207 is exposed, and the first intermediate mask unit 301 remains in the second recess 210.
As shown in fig. 40, step 6) is then performed to etch the third mask layer 207 based on the first intermediate mask unit 301 to form a first anti-imaging gap 215 on the second mask layer 205.
The etch selectivity of the third mask layer 207 to the fourth mask layer is not less than 10: 1, and the fourth mask layer 209 and the third mask layer 207 masked under the fourth mask layer 209 may remain almost intact after the third mask layer 207 is etched based on the etch selectivity to form the first anti-imaging gap 215 on the second mask layer 205.
As shown in fig. 41, step 7) is performed, the second mask layer 205 is further etched based on the first reverse imaging gap 215 until the bottom mask layer 202 is exposed at the first reverse imaging gap 215, and the second mask layer 205 remains on the sidewalls of the imaging mask unit 2031.
The etching selection ratio of the second mask layer 205 to the fourth mask layer 209 is not less than 10: 1, and based on the etching selection ratio, the second mask layer 205 is etched until the fourth mask layer 209 and the third mask layer 207 and the second mask layer 205 which are hidden under the fourth mask layer 209 can be almost completely remained after the bottom mask layer 202 is exposed at the first reverse imaging gap 215.
Moreover, since the height of the second mask layer 205 on the sidewall of the imaging mask unit 2031 is greater than the height of the second mask layer 205 on the remaining positions, the second mask layer 205 remains on the sidewall of the imaging mask unit 2031. Meanwhile, the second mask layer 205 is further etched based on the first reverse imaging gap 215 until the bottom mask layer 202 is exposed at the first reverse imaging gap 215, and the second mask layer 205 on the upper surface of the first mask layer 203 is simultaneously removed to expose the first mask layer 203.
As shown in fig. 42, step 8) is performed to selectively etch away the first mask layer 203 to form a second anti-imaging gap 217 on the bottom mask layer 202, wherein the second anti-imaging gap 217 is larger than the first anti-imaging gap 215.
As shown in fig. 43, step 9) is then performed to selectively etch the bottom mask layer 202 to transfer the first back imaging gap 215 into the bottom mask layer 202 to form a first division gap 212 and to transfer the second back imaging gap 217 into the bottom mask layer 202 to form a third back imaging gap 218.
As shown in fig. 44, step 10) is performed, and a selective etching is performed to remove the second mask layer 205, the third mask layer 207, and the fourth mask layer 209.
As shown in fig. 45, step 11) is performed next, a fifth mask layer 211 is deposited on the bottom mask layer 202, and based on the third inverse imaging gap 218 being larger than the first division gap 212, the fifth mask layer 211 fills the first division gap 212, and a third groove 219 is formed in the third inverse imaging gap 218 in a self-aligned manner, where the bottom of the third groove 219 is lower than the top surface of the bottom mask layer 202.
Since the third reverse imaging gap 218 is larger than the first double split gap 212, a third recess 219 can be formed in the third reverse imaging gap 218 in a self-aligned manner while the fifth mask layer 211 fills the first double split gap 212. By selecting a deposition process and a deposition rate, the cross-sectional shape of the third groove 219 is controlled to be rectangular, so that the accuracy of subsequent mask layer manufacturing can be effectively improved.
The material of the fifth mask layer 211 includes one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. By selecting the material of the fifth mask layer 211, the etching selection ratio of the fifth mask layer 211 to the fourth mask layer 209 is not less than 10: 1, for example, the material of the fifth mask layer 211 may be silicon dioxide (SiO)2) Silicon oxynitride (SiON) or polysilicon (Si poly), etc., in this embodiment, the material of the fifth mask layer 211 may be silicon dioxide (SiO) in some embodiments2). The fifth mask layer 211 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
As shown in fig. 46, a sixth mask layer 216 is deposited on the fifth mask layer 211, wherein the sixth mask layer 216 at least fills the third recesses 219, and the sixth mask layer 216 includes a plurality of second intermediate mask units 302 located in the third recesses 219.
The material of the sixth mask layer 216 includes one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride, and polysilicon. By selecting the material of the sixth mask layer 216, the etching selection ratio of the fifth mask layer 211 to the sixth mask layer 216 is not less than 10: 1, for example, the material of the sixth mask layer 216 may be selected from photoresist or polysilicon (Si poly), and in this embodiment, the material of the sixth mask layer 216 may be selected from polysilicon. The sixth mask layer 216 may be formed using a vapor deposition process such as sputtering, Chemical Vapor Deposition (CVD), and Atomic Layer Deposition (ALD).
As shown in fig. 47, step 13) is performed to thin the sixth mask layer 216 and the fifth mask layer 211 until the bottom mask layer 202 is exposed, and the second intermediate mask unit 302 remains in the third groove 219, so as to simultaneously expose the bottom mask layer 202, the fifth mask layer 211 and the second intermediate mask unit 302.
Since the bottom of the third groove 219 is lower than the top surface of the bottom mask layer 202, the sixth mask layer 216 and the fifth mask layer 211 are thinned until the second intermediate mask unit 302 remains in the third groove 219 when the bottom mask layer 202 is exposed.
As shown in fig. 48, step 14) is then performed to etch the fifth mask layer 211 in the third inverse imaging gap 218 based on the second intermediate mask unit 302 to form a second division gap 213 on the substrate 201, and simultaneously remove the fifth mask layer 211 in the first division gap 212 to form a first division gap 212 on the substrate 201.
In the above manufacturing process, the width of the first division gap 212 may be adjusted by controlling the thickness of the third mask layer 207 at two sides of the second groove 210, and the width of the second division gap 213 may be adjusted by controlling the thickness of the fifth mask layer 211 at two sides of the third groove 219.
In the embodiment, multiple mask layers are manufactured by utilizing different laminated configurations of the multiple mask layers and selection of etching rate ratios and a method for forming the grooves based on self-alignment, so that the characteristic size of a device can be effectively reduced, and the characteristic density of the device can be increased. This embodiment can realize 4 times of unequal pitches, and, by controlling the thickness of each layer of mask layer, can realize the width adjustment of the gap. The embodiment can realize two or more gaps with different widths in the same multiple mask layer, and greatly expands the application range of the multiple mask layer.
example 4
As shown in fig. 49, the present embodiment provides a multiple mask layer, including: inverse imaging spacers 402 formed on the substrate 401 at equal intervals, the inverse imaging spacers 402 having inverse imaging gaps 404 therebetween, the inverse imaging spacers 402 having a width less than a minimum exposure development dimension; and a division spacer 403 formed on the substrate 201, two division spacers 403 spaced apart from each other in each of the inverse image forming gaps 404, a first division gap 212 between the inverse image forming spacer 402 and the division spacer 403, a second division gap 213 between the division spacers 403, and a width of the division spacer 403 being smaller than a minimum exposure and development dimension.
As an example, the width of the first division gap 212 is equal to the width of the second division gap 213.
Illustratively, the width of the counter imaging spacer 402 is equal to one third of the minimum exposure and development dimension, and the width of the division spacer 403 is equal to one third of the minimum exposure and development dimension.
This embodiment can realize a mask layer 3 times pitch multiplication with higher accuracy.
It should be noted that the multiple mask layer of this embodiment can be manufactured by the method for manufacturing the multiple mask layer as described in embodiment 1.
Example 5
As shown in fig. 50, the present embodiment provides a multiple mask layer, including: the spacer comprises anti-imaging spacers 502 which are formed on the substrate 501 at equal intervals, wherein first anti-imaging gaps 505 and second anti-imaging gaps 506 are alternately arranged between the anti-imaging spacers 502, and the width of the anti-imaging spacers 502 is less than half of the minimum exposure development size; a first division spacer 503 formed on the substrate 501 in the first inverse imaging gap 505, the first division spacer 503 and the inverse imaging spacer 502 having a first division gap 212 therebetween, the first division spacer 503 having a width less than half of the minimum exposure and development dimension; and a second division spacer 504 formed on the substrate 501 within the second anti-imaging gap 506, the second division spacer 504 and the anti-imaging spacer 502 having a second division gap 213 therebetween, the second division spacer 504 having a width less than half of the minimum exposure development dimension.
Preferably, the width of the first division gap 212 is equal to the width of the second division gap 213.
Preferably, the width of the counter imaging spacer 502 is equal to one fourth of the minimum exposure and development dimension, and the widths of the first division spacer 503 and the second division spacer 504 are equal to one fourth of the minimum exposure and development dimension.
This embodiment can realize pitch multiplication of 4 times the equal pitch of the mask layer with higher accuracy.
It should be noted that the multiple mask layer of this embodiment can be manufactured by the method for manufacturing the multiple mask layer as described in embodiment 2.
Example 6
As shown in fig. 51, the present invention further provides a multiple mask layer, including: a counter-imaging spacer 602 formed on the substrate 601, every three counter-imaging spacers 602 being a set of counter-imaging spacers 603, the counter-imaging spacers 602 in a set having a first multiple gap 212 therebetween, and two adjacent sets of counter-imaging gaps 603 having a counter-imaging gap 605 therebetween, the width of the counter-imaging spacers 602 being less than half of a minimum exposure development dimension; and a division spacer 604 formed on the substrate 601, one division spacer 604 being provided in each of the inverse imaging gaps 605, a second division gap 213 being provided between the division spacer 604 and the adjacent inverse imaging spacer 602, and a width of the division spacer 604 being less than half of the minimum exposure development size.
preferably, the width of the first division gap 212 is not equal to the width of the second division gap 213.
Preferably, the width of the anti-imaging spacer 602 is equal to one-fourth of the minimum exposure and development dimension and the width of the multiple spacer 604 is equal to one-fourth of the minimum exposure and development dimension.
This embodiment can realize pitch multiplication of 4 times equal pitch or unequal pitch of the mask layer with higher precision.
It should be noted that the multiple mask layer of this embodiment can be manufactured by the method for manufacturing the multiple mask layer as described in embodiment 3.
As described above, the method for manufacturing a multiple mask layer of the present invention has the following beneficial effects:
1) The manufacturing method of the multiple mask layer does not form a structure similar to a 'ox horn' in the manufacturing process of the distance multiplication, and can greatly improve the accurate etching of the multiple mask layer.
2) the invention utilizes the different laminated configurations of the multiple mask layers and the selection of the etching rate ratio, and is based on the method of forming the groove by self-alignment to manufacture the multiple mask layers, thereby effectively reducing the characteristic size of the device and increasing the characteristic density of the device.
3) The invention can realize the pitch multiplication of 2 times, 3 times, 4 times or higher, and can realize the width adjustment of the gap by controlling the thickness of each layer of mask layer.
4) The invention can also realize two or more gaps with different widths in the same multiple mask layer, thereby greatly expanding the application range of the multiple mask layer.
Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.