技术领域technical field
本发明涉及微控制单元领域，尤其涉及一种集成3D存储器的微控制单元，用于物联网中的AI应用场景。The invention relates to the field of micro-control units, in particular to a micro-control unit integrating 3D memory, which is used for AI application scenarios in the Internet of Things.
背景技术Background technique
微控制器单元(MCU)主要应用于嵌入式系统和物联网中，其具体架构如附图1所示，具体包括处理单元1_1、存储单元1_2、通讯模块1_3和A/D转换模块1_4，所述存储单元一般为嵌入式存储器，比如嵌入式闪存。传统MCU由于要处理和存储的数据较少，因此所述存储单元的容量较小，一般为KB或MB级别。而随着信息化、智能化时代逐步发展，物联网的传感器节点要存储的信息越来越多，同时目前在物联网节点做数据处理和机器学习的越来越迫切，因此必须有大容量的存储器来存储这些信息。The microcontroller unit (MCU) is mainly used in embedded systems and the Internet of Things, and its specific architecture is shown in Figure 1, which specifically includes a processing unit 1_1, a storage unit 1_2, a communication module 1_3 and an A/D conversion module 1_4. The storage unit is generally an embedded memory, such as an embedded flash memory. Since the traditional MCU has less data to process and store, the capacity of the storage unit is small, generally at the level of KB or MB. With the gradual development of the information and intelligent era, the sensor nodes of the Internet of Things need to store more and more information. At the same time, it is more and more urgent to do data processing and machine learning in the nodes of the Internet of Things. Therefore, there must be large-capacity sensors. memory to store this information.
目前的大容量存储器一般为独立式存储器，比如NAND型闪存，其容量一般为GB级，特别是3D-NAND技术的发展，堆叠的层数越来越多，容量越来越大，但是目前的大容量独立式存储器并不能直接用于物联网节点用于存储数据，虽然目前的大容量独立式存储器中也具有一控制器，但是其功能比较简单，只是用于阵列数据的读出写入以及相应的擦除操作。The current large-capacity memory is generally a stand-alone memory, such as NAND-type flash memory, whose capacity is generally GB-level, especially with the development of 3D-NAND technology, the number of stacked layers is increasing, and the capacity is getting larger and larger, but the current Large-capacity stand-alone memory cannot be directly used for IoT nodes to store data. Although the current large-capacity stand-alone memory also has a controller, its function is relatively simple, and it is only used for reading and writing of array data and corresponding erase operation.
基于以上两点，本发明提出了一种将微控制器单元和大容量存储器实现在同一个硅衬底上，即可以将大容量存储器应用于物联网节点，进而可以利用本发明提出的结构进行物联网节点大量数据的存储和处理，实现边缘学习的能力。Based on the above two points, the present invention proposes a method to realize the microcontroller unit and the large-capacity memory on the same silicon substrate, that is, the large-capacity memory can be applied to the nodes of the Internet of Things, and then the structure proposed by the present invention can be used for The storage and processing of large amounts of data in IoT nodes enables edge learning capabilities.
发明内容SUMMARY OF THE INVENTION
本发明提出一种微控制器单元，具体包含微控制器和3D非易失性存储阵列，所述微控制器和所述3D非易失性存储阵列实现在同一个硅衬底上，具体如附图2所示，由于3D非易失性存储阵列的存储容量很大，因此可以存储更多的数据，所述微控制器通过金属线读写所述3D非易失性存储阵列中存储的数据，因此本发明提出的方法相对传统的利用接口进行读写数据的架构具有更高的带宽，更低的读写延时和更高的性能。在这里需要说明的是，本发明所述的微控制器并不是所述3D非易失性存储器本身所含有的处理器，所述3D非易失性存储器中的处理器功能比较简单，只用于数据的读取、写入以及相应的擦除操作，并不能用于物联网节点的数据处理以及学习。The present invention provides a microcontroller unit, which specifically includes a microcontroller and a 3D non-volatile storage array. The microcontroller and the 3D non-volatile storage array are implemented on the same silicon substrate. As shown in FIG. 2, since the storage capacity of the 3D non-volatile storage array is large, more data can be stored, and the microcontroller reads and writes the data stored in the 3D non-volatile storage array through metal wires. Therefore, the method proposed by the present invention has higher bandwidth, lower read and write delay and higher performance than the traditional architecture that uses an interface to read and write data. It should be noted here that the microcontroller described in the present invention is not the processor contained in the 3D non-volatile memory itself. The function of the processor in the 3D non-volatile memory is relatively simple. It is used for data reading, writing and corresponding erasing operations, and cannot be used for data processing and learning of IoT nodes.
优选地，对于目前的3D非易失性存储阵列来说，其多采用CuA(CMOS under Array)的架构，即将逻辑电路实现在存储阵列的下面以减小3D非易失性存储阵列的面积，因此本发明提出的结构中，所述微控制器也可以实现在所述3D非易失性存储阵列下，具体如附图3所示以进一步降低面积和成本。所述3D非易失性存储阵列包括N-1层存储单元，分别为3_1、3_2、……、3_N-2和3_N-1，其中N≥3。图中3_N为3D非易失性存储阵列的处理器和外围读写电路，比如译码电路、读写电路、控制电路和输入输出电路等，所述微控制器实现在所述3D非易失性存储器的存储阵列的下面。Preferably, for the current 3D non-volatile storage array, it mostly adopts the CuA (CMOS under Array) architecture, that is, the logic circuit is implemented under the storage array to reduce the area of the 3D non-volatile storage array, Therefore, in the structure proposed by the present invention, the microcontroller can also be implemented under the 3D non-volatile memory array, as shown in FIG. 3 to further reduce the area and cost. The 3D non-volatile memory array includes N-1 layers of memory cells, which are 3_1, 3_2, . . . , 3_N-2, and 3_N-1, where N≥3. 3_N in the figure is the processor and peripheral read-write circuit of the 3D non-volatile memory array, such as decoding circuit, read-write circuit, control circuit and input and output circuit, etc. The microcontroller is implemented in the 3D non-volatile memory array. below the storage array of the memory.
优选地，本发明所述的微控制器单元也可以实现在3D非易失性存储阵列的旁边，3D非易失性存储阵列可以拥有自己的微控制器单元(一般为8-bit)用于读写擦除操作，也可由本发明所述的微控制器单元(16-bit,32-bit,64-bit或更高)负责存储阵列的读写擦除操作。Preferably, the microcontroller unit of the present invention can also be implemented beside the 3D non-volatile memory array, and the 3D non-volatile memory array can have its own microcontroller unit (generally 8-bit) for The read, write and erase operations can also be performed by the microcontroller unit (16-bit, 32-bit, 64-bit or higher) of the present invention to be responsible for the read, write and erase operations of the storage array.
本发明所述的一种微控制器单元，包括3D非易失性存储阵列，且所述微控制器单元和3D非易失性存储单元集成在同一个硅衬底上。微控制器单元实现在3D非易失性存储阵列的下面，或者微控制器单元实现在3D非易失性存储阵列的侧面。所述微控制单元内部分或全部存储单元由3D非易失性存储阵列。3D非易失性存储阵列包括3D PCM和/或3D NAND和/或3D RRAM。利用所述微控制器单元读取存储在所述3D非易失性存储阵列中的数据进行处理，所述处理包括机器学习和/或查询和/或去重等操作。A microcontroller unit according to the present invention includes a 3D non-volatile storage array, and the microcontroller unit and the 3D non-volatile storage unit are integrated on the same silicon substrate. The microcontroller unit is implemented below the 3D non-volatile memory array, or the microcontroller unit is implemented on the side of the 3D non-volatile memory array. Some or all of the memory cells in the micro-control unit are composed of a 3D non-volatile memory array. 3D non-volatile memory arrays include 3D PCM and/or 3D NAND and/or 3D RRAM. Using the microcontroller unit to read data stored in the 3D non-volatile storage array for processing, the processing includes operations such as machine learning and/or query and/or deduplication.
本发明提出的微控制器单元结构一方面可以解决传统微控制器中存储容量较小，不能存储大量数据的缺点，另一方面解决了大容量存储器不能应用于物联网中的缺点。因此可以基于本发明提出的结构应用于物联网节点的计算和机器学习等。同时通过将所述微控制器单元与所述3D非易失性存储阵列集成在同一个衬底上，实现了存储器阵列与微控制器的直接相连，不仅节约了面积，同时可以提高性能。The micro-controller unit structure proposed by the present invention can solve the shortcomings of the traditional micro-controllers that the storage capacity is small and cannot store a large amount of data on the one hand; Therefore, the structure proposed by the present invention can be applied to computing and machine learning of IoT nodes. At the same time, by integrating the microcontroller unit and the 3D non-volatile storage array on the same substrate, the direct connection between the storage array and the microcontroller is realized, which not only saves area, but also improves performance.
附图说明Description of drawings
参考所附附图，以更加充分地描述本发明。然而，所附附图仅用于说明和阐述，并不构成对本发明范围的限制。The present invention is more fully described with reference to the accompanying drawings. However, the accompanying drawings are for illustration and illustration only, and are not intended to limit the scope of the present invention.
图1是传统的微控制器单元(MCU)架构图；Fig. 1 is a traditional microcontroller unit (MCU) architecture diagram;
图2是本发明提出的基于同一硅衬底的微控制器和三维非易失性存储器架构图；2 is an architecture diagram of a microcontroller and a three-dimensional non-volatile memory based on the same silicon substrate proposed by the present invention;
图3是本发明提出的三维非易失性存储器存储阵列下集成微处理器的架构图；Fig. 3 is the architecture diagram of the integrated microprocessor under the three-dimensional non-volatile memory storage array proposed by the present invention;
图4是本发明基于同一硅衬底的微控制器和三维NAND架构图；4 is a schematic diagram of a microcontroller and a three-dimensional NAND architecture based on the same silicon substrate of the present invention;
图5是本发明提出的三维NAND存储阵列下集成微控制器的架构图。FIG. 5 is a structural diagram of an integrated microcontroller under the three-dimensional NAND memory array proposed by the present invention.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.
需要说明的是，在不冲突的情况下，本发明中的实施例及实施例中的特征可以相互组合。It should be noted that the embodiments of the present invention and the features of the embodiments may be combined with each other under the condition of no conflict.
下面结合附图和具体实施例对本发明作进一步说明，但不作为本发明的限定。The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but it is not intended to limit the present invention.
本发明提出一种微控制器单元结构，具体包含微控制器和3D非易失性存储阵列，所述微控制器为目前物联网节点的嵌入式微控制器，比如基于ARM、MIPS和Open-V指令集的微控制器，并不是所述3D非易失性存储阵列中自身所含有的处理器。所述3D非易失性存储阵列可以为3D-NAND、3D-Xpoint和3D-RRAM等。假设本发明中，所述微控制器基于ARM指令集，所述3D非易失性存储阵列为3D-NAND，其来自国内某晶圆厂，所述微控制器并不是所述3D-NAND中自身所含有的处理器，具体如附图4所示，所述微控制器单元和所述3D-NAND实现在同一硅衬底上，从而实现物联网节点具有大容量存储的能力和物联网节点处理学习能力。The present invention proposes a microcontroller unit structure, which specifically includes a microcontroller and a 3D non-volatile storage array. The microcontroller is an embedded microcontroller of a current IoT node, such as based on ARM, MIPS and Open-V The microcontroller of the instruction set is not the processor itself contained in the 3D non-volatile memory array. The 3D non-volatile storage array can be 3D-NAND, 3D-Xpoint, 3D-RRAM, and the like. Assuming that in the present invention, the microcontroller is based on the ARM instruction set, the 3D non-volatile storage array is 3D-NAND, which comes from a domestic fab, and the microcontroller is not in the 3D-NAND The processor it contains, as shown in Figure 4, the microcontroller unit and the 3D-NAND are implemented on the same silicon substrate, so that the IoT node has the capability of large-capacity storage and the IoT node deal with learning ability.
优选的，可以将所述微控制器实现在所述3D-NAND的存储阵列的下面，具体如附图5所示。假设所述3D-NAND具有32层存储单元，分别为5_1、5_2、……、5_32，图中5_33为3D-NAND的外围读写电路。Preferably, the microcontroller can be implemented under the 3D-NAND storage array, as shown in FIG. 5 . It is assumed that the 3D-NAND has 32 layers of memory cells, which are 5_1, 5_2, .
优选地，本发明所述的微控制器单元也可以实现在3D非易失性存储阵列的旁边，3D非易失性存储阵列可以拥有自己的微控制器单元(一般为8-bit)用于读写擦除操作，也可由本发明所述的微控制器单元(16-bit,32-bit,64-bit或更高)负责存储阵列的读写擦除操作。Preferably, the microcontroller unit of the present invention can also be implemented beside the 3D non-volatile memory array, and the 3D non-volatile memory array can have its own microcontroller unit (generally 8-bit) for The read, write and erase operations can also be performed by the microcontroller unit (16-bit, 32-bit, 64-bit or higher) of the present invention to be responsible for the read, write and erase operations of the storage array.
以上所述仅为本发明较佳的实施例，并非因此限制本发明的实施方式及保护范围，对于本领域技术人员而言，应当能够意识到凡运用本发明说明书及图示内容所作出的等同替换和显而易见的变化所得到的方案，均应当包含在本发明的保护范围内。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the embodiments and protection scope of the present invention. For those skilled in the art, they should be able to realize that all equivalents made by using the description and illustrations of the present invention The solutions obtained by substitutions and obvious changes shall all be included in the protection scope of the present invention.
| Application Number | Priority Date | Filing Date | Title |
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| CN201810403982.7ACN110413563A (en) | 2018-04-28 | 2018-04-28 | a microcontroller unit |
| Application Number | Priority Date | Filing Date | Title |
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| CN201810403982.7ACN110413563A (en) | 2018-04-28 | 2018-04-28 | a microcontroller unit |
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| CN110413563Atrue CN110413563A (en) | 2019-11-05 |
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| CN201810403982.7APendingCN110413563A (en) | 2018-04-28 | 2018-04-28 | a microcontroller unit |
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