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CN110265489A - Single-photon avalanche photodiode and preparation method thereof with ring grid protection ring - Google Patents

Single-photon avalanche photodiode and preparation method thereof with ring grid protection ring
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CN110265489A
CN110265489ACN201910575735.XACN201910575735ACN110265489ACN 110265489 ACN110265489 ACN 110265489ACN 201910575735 ACN201910575735 ACN 201910575735ACN 110265489 ACN110265489 ACN 110265489A
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金湘亮
汪洋
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Hunan Normal University
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Abstract

The invention discloses a kind of single-photon avalanche photodiodes with ring grid protection ring; including substrate P-Sub; substrate P-Sub is equipped with the area NBL; the area NBL is equipped with the first area DN-Well; it is equipped with the injection region N+ in first area DN-Well, the area P-EPI is equipped on the inside of the first area DN-Well, the area P-EPI is equipped with annular 2nd area DN-Well; it is equipped with the area N-Well in 2nd area DN-Well, is equipped with the injection region P+ in the area N-Well;The injection region P+, the area N-Well, the 2nd area DN-Well, the area NBL constitute fully- depleted region.Fully- depleted region of the invention can make the quantum efficiency of device improve, and have wider spectral response range, and wide depletion region can make photon detection probability improve, to improve the detectability to different-waveband photon.

Description

Translated fromChinese
具有环栅保护环的单光子雪崩光电二极管及其制作方法Single-photon avalanche photodiode with gate-all-around guard ring and method of making same

技术领域technical field

本发明涉及一种二极管,特别涉及一种具有环栅保护环的单光子雪崩光电二极管及其制作方法。The invention relates to a diode, in particular to a single-photon avalanche photodiode with a ring protection ring and a manufacturing method thereof.

背景技术Background technique

在当代微电子技术、工艺的不断发展与创新的背景下,基于传统硅基CMOS工艺制作的雪崩光电二极管在响应度、量子效率、集成度方面的性能得到了明显的改善,为了进一步提高光电二极管的性能,提出的工作在盖革模式的单光子雪崩光电二极管结构可以获取更高灵敏度、响应度和量子效率。单光子探测应用于当代社会的方方面面,比如在微弱信号检测、高灵敏度传感器等方面。单光子探测器现在主要有光电倍增管、单光子雪崩光电二极管等等。在使用单光子雪崩光电二极管的单光子探测系统中,光子探测概率、暗计数、量子效率等性能是衡量器件优劣的关键性因素。因此设计具有高灵敏度、高响应度、低暗计数率、高量子效率的光电二极管器件结构具有非常重要的意义。Under the background of continuous development and innovation of contemporary microelectronics technology and technology, the performance of avalanche photodiodes based on traditional silicon-based CMOS technology has been significantly improved in terms of responsivity, quantum efficiency, and integration. In order to further improve the performance of photodiodes The performance of the proposed single-photon avalanche photodiode structure working in the Geiger mode can obtain higher sensitivity, responsivity and quantum efficiency. Single-photon detection is used in all aspects of contemporary society, such as weak signal detection and high-sensitivity sensors. Single-photon detectors now mainly include photomultiplier tubes, single-photon avalanche photodiodes, and so on. In single-photon detection systems using single-photon avalanche photodiodes, performances such as photon detection probability, dark count, and quantum efficiency are key factors to measure the pros and cons of devices. Therefore, it is of great significance to design photodiode device structures with high sensitivity, high responsivity, low dark count rate, and high quantum efficiency.

传统的响应可见光波长的单光子雪崩光电二极管的结构示意图如图1所示,传统器件结构发生雪崩击穿的倍增区域主要是由一个重掺杂区域与轻掺杂的阱构成,因此器件的耗尽层较薄,无法获得较高的量子效率,导致光子检测概率较低,并且只能对单一波长的光子进行响应,不具有多波长选择的灵活性。而且传统器件结构的倍增区域靠近材料表面区域,当器件工作在盖革模式,发生雪崩效应后,大量的载流子流过单光子雪崩光电二极管,一些载流子被表面氧化层材料中的低能级缺陷捕获,当雪崩被淬灭后,这些陷阱复合中心开始释放载流子,此时当单光子雪崩光电二极管两端的电压再次大于雪崩电压时,这些载流子会再次触发一次雪崩效应,产生与前一次雪崩脉冲无差别的后脉冲效应,在没有光子到达时引起一次暗计数,造成检测信号的不准确。所以,研究一种具有高灵敏度、高响应度、低暗计数率、高量子效率和高光子检测概率的器件结构及其重要。The schematic diagram of the structure of a traditional single-photon avalanche photodiode responding to visible light wavelengths is shown in Figure 1. The multiplication region where avalanche breakdown occurs in the traditional device structure is mainly composed of a heavily doped region and a lightly doped well, so the power consumption of the device is The thinner layer cannot obtain higher quantum efficiency, resulting in a lower probability of photon detection, and can only respond to photons of a single wavelength, without the flexibility of multi-wavelength selection. Moreover, the multiplication region of the traditional device structure is close to the surface area of the material. When the device works in the Geiger mode and the avalanche effect occurs, a large number of carriers flow through the single-photon avalanche photodiode, and some carriers are absorbed by the low-energy material in the surface oxide layer. When the avalanche is quenched, these trap recombination centers begin to release carriers. At this time, when the voltage across the single-photon avalanche photodiode is greater than the avalanche voltage again, these carriers will trigger an avalanche effect again, resulting in The post-pulse effect, which is indistinguishable from the previous avalanche pulse, causes a dark count when no photon arrives, resulting in inaccurate detection signals. Therefore, it is extremely important to study a device structure with high sensitivity, high responsivity, low dark count rate, high quantum efficiency and high photon detection probability.

发明内容Contents of the invention

为了解决上述技术问题,本发明提供一种结构简单的具有环栅保护环的单光子雪崩光电二极管,并提供其制作方法。In order to solve the above-mentioned technical problems, the present invention provides a single-photon avalanche photodiode with a ring-gate guard ring and a manufacturing method thereof with a simple structure.

本发明解决上述问题的技术方案是:一种具有环栅保护环的单光子雪崩光电二极管,包括衬底P-Sub、NBL区、第一DN-Well区、第二DN-Well区、P-EPI区、N-Well区、N+注入区、P+注入区、多晶硅环栅;The technical solution of the present invention to solve the above problems is: a single photon avalanche photodiode with a ring-gate protection ring, including a substrate P-Sub, an NBL region, a first DN-Well region, a second DN-Well region, a P- EPI area, N-Well area, N+ implantation area, P+ implantation area, polysilicon ring gate;

所述衬底P-Sub上设有NBL区,NBL区上设有环形第一DN-Well区,第一DN-Well区中设有环形N+注入区,所述第一DN-Well区内侧设有环形P-EPI区,P-EPI区内侧设有环形第二DN-Well区,第二DN-Well区中设有N-Well区,N-Well区中设有P+注入区;所述P+注入区、N-Well区、第二DN-Well区、NBL区构成全耗尽区域;The substrate P-Sub is provided with an NBL area, and the NBL area is provided with an annular first DN-Well area, an annular N+ implantation area is provided in the first DN-Well area, and an inner side of the first DN-Well area is provided There is an annular P-EPI area, an annular second DN-Well area is arranged inside the P-EPI area, an N-Well area is arranged in the second DN-Well area, and a P+ injection area is arranged in the N-Well area; the P+ The injection region, the N-Well region, the second DN-Well region, and the NBL region constitute a fully depleted region;

所述P+注入区引出用作单光子雪崩光电二极管的阳极;所述N+注入区引出用作单光子雪崩光电二极管的阴极。The extraction of the P+ injection region is used as the anode of the single photon avalanche photodiode; the extraction of the N+ injection region is used as the cathode of the single photon avalanche photodiode.

上述具有环栅保护环的单光子雪崩光电二极管,所述第一DN-Well区中设有环形第一场氧隔离区,第一场氧隔离区的内、外侧分别与N+注入区外侧边缘、第一DN-Well区外侧边缘接触。In the above-mentioned single photon avalanche photodiode with a ring-gate protection ring, the first DN-Well region is provided with an annular first field oxygen isolation region, and the inner and outer sides of the first field oxygen isolation region are respectively connected to the outer edge of the N+ injection region, The outer edge of the first DN-Well region is in contact.

上述具有环栅保护环的单光子雪崩光电二极管,所述P+注入区周围设有多晶硅环栅,多晶硅环栅外侧设有环形第二场氧隔离区,所述多晶硅环栅内侧与P+注入区外侧边缘接触,多晶硅环栅外侧与第二场氧隔离区内侧边缘接触,第二场氧隔离区外侧与N+注入区内侧边缘接触,第二场氧隔离区横跨第二DN-Well区、P-EPI区、第一DN-Well区。In the above-mentioned single photon avalanche photodiode with a ring gate protection ring, a polysilicon ring gate is arranged around the P+ injection region, and an annular second field oxygen isolation region is arranged outside the polysilicon ring gate, and the inside of the polysilicon ring gate and the outside of the P+ injection region Edge contact, the outer side of the polysilicon ring gate is in contact with the inner edge of the second field oxygen isolation region, the outer side of the second field oxygen isolation region is in contact with the inner edge of the N+ implantation region, and the second field oxygen isolation region spans the second DN-Well region, P- EPI area, the first DN-Well area.

一种具有环栅保护环的单光子雪崩光电二极管的制作方法,包括以下步骤:A method for manufacturing a single-photon avalanche photodiode with a gate-ring protection ring, comprising the following steps:

步骤一:第一次光刻,在衬底P-Sub的表面制作NBL区;Step 1: the first photolithography, making the NBL area on the surface of the substrate P-Sub;

步骤二:第二次光刻,在NBL区上由外而内依次形成环形第一DN-Well区、环形P-EPI区和环形第二DN-Well区;Step 2: second photolithography, forming the ring-shaped first DN-Well region, the ring-shaped P-EPI region and the ring-shaped second DN-Well region sequentially from outside to inside on the NBL region;

步骤三:第三次光刻,在第二DN-Well区中形成N-Well区;Step 3: third photolithography, forming an N-Well region in the second DN-Well region;

步骤四:第四次光刻,在N-Well区中形成P+注入区;Step 4: the fourth photolithography, forming a P+ implantation region in the N-Well region;

步骤五:第五次光刻,在第一DN-Well区中形成环形N+注入区;Step five: the fifth photolithography, forming an annular N+ implantation region in the first DN-Well region;

步骤六:在N+注入区外侧边缘与第一DN-Well区外侧边缘之间形成第一场氧隔离区;Step 6: forming a first field oxygen isolation region between the outer edge of the N+ implantation region and the outer edge of the first DN-Well region;

步骤七:在P+注入区外侧边缘与N+注入区内侧边缘之间形成多晶硅环栅和环形第二场氧隔离区;Step 7: forming a polysilicon ring gate and an annular second field oxygen isolation region between the outer edge of the P+ implantation region and the inner edge of the N+ implantation region;

步骤八:将P+注入区引出用作单光子雪崩光电二极管的阳极;将N+注入区引出用作单光子雪崩光电二极管的阴极。Step 8: extracting the P+ implantation region as the anode of the single photon avalanche photodiode; extracting the N+ implantation region as the cathode of the single photon avalanche photodiode.

本发明的有益效果在于:The beneficial effects of the present invention are:

1、本发明的单光子雪崩光电二极管中,P+注入区、N-Well区、第二DN-Well区、NBL区构成全耗尽区域,该全耗尽区域会使得器件的量子效率提高,并且具有较宽的光谱响应范围,宽的耗尽区会使得光子检测概率提高,从而提高对不同波段光子的检测能力,可以通过改变器件的偏置电压,来获取不同波长的高响应度。1. In the single photon avalanche photodiode of the present invention, the P+ injection region, the N-Well region, the second DN-Well region, and the NBL region constitute a fully depleted region, which will increase the quantum efficiency of the device, and With a wide spectral response range, the wide depletion region will increase the probability of photon detection, thereby improving the ability to detect photons in different wavelength bands. High responsivity at different wavelengths can be obtained by changing the bias voltage of the device.

2、本发明的单光子雪崩光电二极管中,采用多晶硅环栅短接器件阳极,当器件正常工作时,栅极产生电场力形成部分耗尽区,分担中心平面结的部分场强,起到保护环的作用,并且多晶硅环栅还可以有效将平面结与第二场氧隔离区进行隔离,大幅度降低材料缺陷引起的能级捕获问题,降低所述器件的暗计数率,降低雪崩停止后的后脉冲事件的发生概率。由NBL区,第一DN-Well区,第二DN-Well区来隔离衬底噪声,达到器件结构整体低噪声的目的。2. In the single photon avalanche photodiode of the present invention, a polysilicon ring gate is used to short-circuit the anode of the device. When the device works normally, the gate generates an electric field force to form a partial depletion region, which shares part of the field strength of the central plane junction and protects the device. ring, and the polysilicon ring gate can also effectively isolate the planar junction from the second field oxygen isolation region, greatly reducing the energy level trapping problem caused by material defects, reducing the dark count rate of the device, and reducing the avalanche stop. The probability of an afterpulse event occurring. The substrate noise is isolated by the NBL area, the first DN-Well area, and the second DN-Well area, so as to achieve the purpose of low noise of the device structure as a whole.

3、本发明中单光子雪崩光电二极管的制作方法过程简单,操作方便,器件版图绘制成圆形同心环形状,用于增大感光面积。制作的器件不会违反版图设计基本规则也不会运用到标准高压BCD工艺以外的技术,可以有效提高单光子雪崩光电二极管的量子效率、光子检测概率,降低暗计数率,灵活选择波长响应,提高器件性能。3. The manufacturing method of the single-photon avalanche photodiode in the present invention is simple and easy to operate, and the device layout is drawn in the shape of circular concentric rings to increase the photosensitive area. The manufactured devices will not violate the basic rules of layout design and will not be applied to technologies other than the standard high-voltage BCD process, which can effectively improve the quantum efficiency and photon detection probability of single-photon avalanche photodiodes, reduce the dark count rate, flexibly select wavelength response, and improve device performance.

附图说明Description of drawings

图1为传统单光子雪崩光电二极管的剖面图和寄生结构示意图。Fig. 1 is a cross-sectional view and a schematic diagram of a parasitic structure of a traditional single-photon avalanche photodiode.

图2为本发明实施例中的具有环栅保护环的单光子雪崩光电二极管的剖面图和电路连接图。FIG. 2 is a cross-sectional view and a circuit connection diagram of a single photon avalanche photodiode with a gate-all-around guard ring in an embodiment of the present invention.

图3为本发明实施例中的具有环栅保护环的单光子雪崩光电二极管的寄生结构示意图与工作原理图。FIG. 3 is a schematic diagram of a parasitic structure and a working principle diagram of a single photon avalanche photodiode with a gate-all-around guard ring in an embodiment of the present invention.

图4为本发明实施例中的具有环栅保护环的单光子雪崩光电二极管的俯视图。FIG. 4 is a top view of a single photon avalanche photodiode with a gate-all-around guard ring in an embodiment of the present invention.

具体实施方式Detailed ways

下面结合附图和实施例对本发明作进一步的说明。The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

如图2-图4所示,一种具有环栅保护环的单光子雪崩光电二极管,包括衬底P-Sub101、NBL区102、第一DN-Well区103、第二DN-Well区104、P-EPI区105、N-Well区106、N+注入区107、P+注入区108、多晶硅环栅203。P-Sub为P型衬底区域,NBL为N型埋层区域,DN-Well为深型N阱区域,P-EPI为P型外延层区域。As shown in Fig. 2-Fig. 4, a single photon avalanche photodiode with a ring gate protection ring includes a substrate P-Sub101, an NBL region 102, a first DN-Well region 103, a second DN-Well region 104, P-EPI region 105 , N-Well region 106 , N+ implantation region 107 , P+ implantation region 108 , polysilicon ring gate 203 . P-Sub is a P-type substrate region, NBL is an N-type buried layer region, DN-Well is a deep N well region, and P-EPI is a P-type epitaxial layer region.

所述衬底P-Sub101上设有NBL区102,NBL区102上设有环形第一DN-Well区103,第一DN-Well区103中设有环形N+注入区107,所述第一DN-Well区103内侧设有环形P-EPI区105,P-EPI区105内侧设有环形第二DN-Well区104,第二DN-Well区104中设有N-Well区106,N-Well区106中设有P+注入区108;所述P+注入区108、N-Well区106、第二DN-Well区104、NBL区102构成全耗尽区域;该全耗尽区域能够使得器件具有较宽的耗尽层,从而实现高量子效率、光子检测概率和灵活的波长选择性。并且由于短接阳极的多晶硅环栅203结构的存在,栅极的电场效应产生栅下部分的耗尽区域,用于分担平面感光结的电场场强,从而使得场强峰值集中于平面结的区域,提高量子效率,有效防止边缘击穿效应的发生。器件的具体工作示意图和寄生结构示意图如图3所示。多晶硅环栅203结构还会有效将平面感光结与场氧隔离区分开,大幅度降低由于材料陷阱的能级捕获产生的暗计数率,达到低暗计数率的目的。器件结构较宽的耗尽层,使得入射光很容易进入材料内部而被充分吸收产生电子-空穴对,因此器件机构的光电转换效率与灵敏度也将会得到提高。The substrate P-Sub101 is provided with an NBL region 102, and an annular first DN-Well region 103 is arranged on the NBL region 102, and an annular N+ implantation region 107 is arranged in the first DN-Well region 103, and the first DN -The inner side of the Well area 103 is provided with an annular P-EPI area 105, the inner side of the P-EPI area 105 is provided with an annular second DN-Well area 104, and the second DN-Well area 104 is provided with an N-Well area 106, N-Well A P+ implantation region 108 is provided in the region 106; the P+ implantation region 108, the N-Well region 106, the second DN-Well region 104, and the NBL region 102 constitute a fully depleted region; the fully depleted region can make the device have a relatively high Wide depletion layer, resulting in high quantum efficiency, photon detection probability, and flexible wavelength selectivity. And due to the existence of the polysilicon ring gate 203 structure that is short-circuited to the anode, the electric field effect of the gate produces a depletion region in the lower part of the gate, which is used to share the electric field strength of the planar photosensitive junction, so that the peak field intensity is concentrated in the region of the planar junction , improve the quantum efficiency, and effectively prevent the occurrence of edge breakdown effect. The specific working diagram and parasitic structure diagram of the device are shown in Fig. 3 . The polysilicon ring gate 203 structure can also effectively separate the planar photosensitive junction from the field oxygen isolation area, greatly reducing the dark count rate caused by the energy level capture of material traps, and achieving the purpose of low dark count rate. The wide depletion layer of the device structure makes it easy for incident light to enter the material and be fully absorbed to generate electron-hole pairs, so the photoelectric conversion efficiency and sensitivity of the device mechanism will also be improved.

器件结构可以通过调节所述P+注入区108、所述N-Well区106、所述第二DN-Well区104、所述NBL区102的几何参数,来调节所述器件结构的耗尽区宽度,达到改变光子检测概率的目的。并且还可以控制器件两极的偏置电压来实现对不同波段的光子检测。The device structure can adjust the depletion region width of the device structure by adjusting the geometric parameters of the P+ implant region 108, the N-Well region 106, the second DN-Well region 104, and the NBL region 102 , to achieve the purpose of changing the photon detection probability. Moreover, the bias voltage at the two poles of the device can also be controlled to realize photon detection in different wavebands.

所述P+注入区108通过接触孔与金属层1的第一金属层206相连接,所述多晶硅环栅203通过接触孔与金属层1的第二金属层205相连接,在金属层2的第四金属层301上设有金属通孔302,金属层1的所述第一金属层206和所述第二金属层205通过所述金属通孔302与金属层2的所述第四金属层301相连接,用作器件的阳极;所述N+注入区107通过接触孔与金属层1的第三金属层204相连接,在金属层2的第五金属层303上设有金属通孔304,金属层1的所述第三金属层204通过所述金属通孔304与金属层2的所述第五金属层303相连接,用作器件的阴极。The P+ injection region 108 is connected to the first metal layer 206 of the metal layer 1 through a contact hole, and the polysilicon ring gate 203 is connected to the second metal layer 205 of the metal layer 1 through a contact hole. A metal via 302 is provided on the metal layer 301, and the first metal layer 206 and the second metal layer 205 of the metal layer 1 pass through the metal via 302 and the fourth metal layer 301 of the metal layer 2. The N+ injection region 107 is connected to the third metal layer 204 of the metal layer 1 through a contact hole, and a metal through hole 304 is provided on the fifth metal layer 303 of the metal layer 2, and the metal The third metal layer 204 of the layer 1 is connected to the fifth metal layer 303 of the metal layer 2 through the metal via 304 and serves as a cathode of the device.

所述第一DN-Well区103中设有环形第一场氧隔离区201,第一场氧隔离区201的内、外侧分别与N+注入区107外侧边缘、第一DN-Well区103外侧边缘接触。The first DN-Well region 103 is provided with an annular first field oxygen isolation region 201, and the inner and outer sides of the first field oxygen isolation region 201 are respectively connected to the outer edge of the N+ implantation region 107 and the outer edge of the first DN-Well region 103. touch.

所述P+注入区108周围设有多晶硅环栅203,多晶硅环栅203外侧设有环形第二场氧隔离区202,所述多晶硅环栅203内侧与P+注入区108外侧边缘接触,多晶硅环栅203外侧与第二场氧隔离区202内侧边缘接触,第二场氧隔离区202外侧与N+注入区107内侧边缘接触,第二场氧隔离区202横跨第二DN-Well区104、P-EPI区105、第一DN-Well区103。A polysilicon ring gate 203 is arranged around the P+ implantation region 108, and an annular second field oxygen isolation region 202 is arranged outside the polysilicon ring gate 203. The inner side of the polysilicon ring gate 203 is in contact with the outer edge of the P+ implantation region 108. The outer side is in contact with the inner edge of the second field oxygen isolation region 202, the outer side of the second field oxygen isolation region 202 is in contact with the inner edge of the N+ implantation region 107, and the second field oxygen isolation region 202 spans the second DN-Well region 104, P-EPI Zone 105, the first DN-Well zone 103.

单光子雪崩光电二极管的的工作原理为:The working principle of single photon avalanche photodiode is:

在对器件施加光照的条件下,所述器件结构工作在大于雪崩击穿电压的盖革模式时,即所述阳极接高电位,所述阴极接地电位,所述P+注入区108、N-Well区106、第二DN-Well区104、NBL区102构成全耗尽区域,产生较宽的耗尽层,当施加光照后,光子达到耗尽区将会产生光生载流子,光生电子和光生空穴在电场的作用下被加速,获得较高的能量,进而与晶格发生猛烈碰撞,使得晶格中的电子电离,形成新的电子-空穴对。如此反复,类似雪崩一样,使势垒区内载流子的数量和光电流的数值迅速增大,从而实现对单光子的检测。由于所述器件结构的耗尽区较宽,因此入射光很容易进入材料内部而被充分吸收而产生大量光生电子 - 空穴对,因而可以大幅度提高器件的量子效率和光子检测概率,灵敏度也得以提高。所述P+注入区108与所述NBL区102相比所述N-Well区106和所述第二DN-Well区104较薄,因而光生电流中主要以漂移运动为主,从而大大提高器件结构的响应速度。所述N-Well区106和所述第二DN-Well区104的存在,明显提高了耗尽层的厚度,这将会有利于缩短载流子的扩散过程。较宽的耗尽层也可以明显减少结电容从而使电路常数减小。并且耗尽区加宽还有利于对长波区的吸收。将器件版图设置成圆形同心环,以此增大感光面积。Under the condition of applying light to the device, when the device structure works in the Geiger mode greater than the avalanche breakdown voltage, that is, the anode is connected to a high potential, the cathode is connected to a ground potential, and the P+ injection region 108, N-Well The region 106, the second DN-Well region 104, and the NBL region 102 constitute a fully depleted region, which produces a wider depletion layer. When light is applied, photons reaching the depletion region will generate photogenerated carriers, photogenerated electrons and photogenerated electrons. The holes are accelerated under the action of the electric field, gain higher energy, and then violently collide with the lattice, ionizing the electrons in the lattice to form new electron-hole pairs. Repeatedly, like an avalanche, the number of carriers in the potential barrier region and the value of the photocurrent increase rapidly, thereby realizing the detection of single photons. Due to the wide depletion region of the device structure, the incident light can easily enter the material and be fully absorbed to generate a large number of photogenerated electron-hole pairs, so the quantum efficiency and photon detection probability of the device can be greatly improved, and the sensitivity is also improved. be improved. The P+ injection region 108 is thinner than the NBL region 102 and the N-Well region 106 and the second DN-Well region 104, so the photo-generated current is mainly dominated by drift motion, thereby greatly improving the device structure. response speed. The presence of the N-Well region 106 and the second DN-Well region 104 obviously increases the thickness of the depletion layer, which will help shorten the carrier diffusion process. A wider depletion layer can also significantly reduce the junction capacitance and thus reduce the circuit constant. And the widening of the depletion region is also conducive to the absorption of the long-wave region. The device layout is set as a circular concentric ring to increase the photosensitive area.

基于所述P+注入区108、N-Well区106、第二DN-Well区104、NBL区102构成的单光子雪崩光电二极管结构,在传统的单光子雪崩光电二极管结构的基础上,所述添加NBL区102和所述第二DN-Well区104来提高耗尽区的宽度,所述多晶硅环栅203作为器件的保护环结构,由于短接阳极的多晶硅环栅203产生竖直向上的电场力,形成栅下的部分耗尽区域,用于分担感光部位平面结形成的场强,有效防止器件耗尽区发生边缘击穿效应,并且还可以与第二场氧隔离区202进行隔离,因此大幅度降低材料缺陷引起的能级捕获问题。器件的衬底噪声由所述第一DN-Well区103,第二DN-Well区104,NBL区102进行隔离,从而提高器件的透明性,降低噪声对器件产生的影响。Based on the single photon avalanche photodiode structure formed by the P+ injection region 108, the N-Well region 106, the second DN-Well region 104, and the NBL region 102, on the basis of the traditional single photon avalanche photodiode structure, the added The NBL region 102 and the second DN-Well region 104 increase the width of the depletion region, and the polysilicon ring gate 203 is used as a guard ring structure of the device, and the polysilicon ring gate 203 short-circuiting the anode generates a vertical upward electric field force , forming a partially depleted region under the gate, which is used to share the field strength formed by the planar junction of the photosensitive part, effectively preventing the edge breakdown effect of the depleted region of the device, and can also be isolated from the second field oxygen isolation region 202, so the Amplitude reduces energy level trapping problems caused by material defects. The substrate noise of the device is isolated by the first DN-Well region 103, the second DN-Well region 104, and the NBL region 102, thereby improving the transparency of the device and reducing the impact of noise on the device.

一种具有多晶硅环栅203保护环的高量子效率低暗计数率的单光子雪崩光电二极管的制作方法,包括以下步骤:A method for manufacturing a single-photon avalanche photodiode with high quantum efficiency and low dark count rate having a polysilicon ring gate 203 guard ring, comprising the following steps:

步骤一:第一次光刻,在衬底P-Sub101的表面制作NBL区102;Step 1: the first photolithography, making the NBL region 102 on the surface of the substrate P-Sub101;

步骤二:第二次光刻,在NBL区102上由外而内依次形成环形第一DN-Well区103、环形P-EPI区105和环形第二DN-Well区104;Step 2: second photolithography, forming the ring-shaped first DN-Well region 103, the ring-shaped P-EPI region 105 and the ring-shaped second DN-Well region 104 sequentially from outside to inside on the NBL region 102;

步骤三:第三次光刻,在第二DN-Well区104中形成N-Well区106;Step 3: the third photolithography, forming the N-Well region 106 in the second DN-Well region 104;

步骤四:第四次光刻,在N-Well区106中形成P+注入区108;Step 4: the fourth photolithography, forming the P+ implantation region 108 in the N-Well region 106;

步骤五:第五次光刻,在第一DN-Well区103中形成环形N+注入区107;Step five: the fifth photolithography, forming an annular N+ implantation region 107 in the first DN-Well region 103;

步骤六:在N+注入区107外侧边缘与第一DN-Well区103外侧边缘之间形成第一场氧隔离区201;Step 6: forming a first field oxygen isolation region 201 between the outer edge of the N+ implantation region 107 and the outer edge of the first DN-Well region 103;

步骤七:在P+注入区108外侧边缘与N+注入区107内侧边缘之间形成多晶硅环栅203和环形第二场氧隔离区202;Step 7: Forming a polysilicon ring gate 203 and an annular second field oxygen isolation region 202 between the outer edge of the P+ implantation region 108 and the inner edge of the N+ implantation region 107;

步骤八:将P+注入区108引出用作单光子雪崩光电二极管的阳极;将N+注入区107引出用作单光子雪崩光电二极管的阴极。Step 8: extracting the P+ implantation region 108 to be used as the anode of the single photon avalanche photodiode; extracting the N+ implantation region 107 to be used as the cathode of the single photon avalanche photodiode.

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