Summary of the invention
The present invention is at least part in order to solve the above problems and completes, and can be used as mode below or applicationExample is realized.
The electro-optical device of (application examples 1) the application example is characterized in that the electro-optical device includes scan line；Signal wire；PicturePlain circuit is arranged in correspondence with the infall of the scan line and the signal wire；1st equipotential line is supplied to the 1st electricityPosition；2nd equipotential line is supplied to the 2nd current potential；And the 3rd equipotential line, it is supplied to the 3rd current potential, the pixel circuit includes:Light-emitting component；Storage circuit configures between the 1st equipotential line and the 2nd equipotential line；1st transistor, grid withThe storage circuit electrical connection；And the 2nd transistor, grid are electrically connected with the scan line, the 2nd transistor configuration existsBetween the storage circuit and the signal wire, the light-emitting component and the 1st transistor are configured in series in the 2nd electricityBetween bit line and the 3rd equipotential line, the 1st current potential is less than described relative to the current potential absolute value of the difference of the 2nd current potentialCurrent potential absolute value of the difference of 3rd current potential relative to the 2nd current potential.
According to the structure of the application example, pixel circuit includes storage electricity of the configuration between the 1st equipotential line and the 2nd equipotential lineRoad, the 2nd transistor are configured between storage circuit and signal wire, are configured in series between the 2nd equipotential line and the 3rd equipotential lineThe grid of 1st transistor and light-emitting component, the 1st transistor is electrically connected with storage circuit, the grid of the 2nd transistor and scanningLine electrical connection.Therefore, the digital signal write storage circuit that can will be showed with the two-value of conduction and cut-off via the 2nd transistor,It is controlled via luminous and non-luminescent ratio of the 1st transistor to light-emitting component and carries out gray scale and show.As a result, due to notThe influence of the deviation of voltage-current characteristic or threshold voltage vulnerable to each transistor, so, even if also can without compensation circuitEnough reduce the offset of the deviation or gray scale of the brightness between pixel.In addition, in digital drive, by opening image in display oneField in increase as the quantity to shine with the subfield of the non-luminescent unit controlled to light-emitting component, even if without capacitorElement also can easily improve grey.In addition, due to the biggish capacity cell of need not have capacitor, it is able to carry outThe miniaturization of pixel.High resolution is realized thereby, it is possible to be miniaturize to pixel, and can reduce and capacity cellThe associated power consumption of charge and discharge.
Also, the 1st current potential relative to the 2nd current potential for being supplied to storage circuit current potential absolute value of the difference less than the 3rd current potentialCurrent potential absolute value of the difference relative to the 2nd current potential for being supplied to light-emitting component and the 1st transistor.That is, utilizing the 1st current potential and the 2ndThe low-voltage system power supply of current potential acts storage circuit, and the high-voltage system power supply using the 3rd current potential and the 2nd current potential makesLight-emitting component shines.Therefore, storage circuit can be miniaturize and realizes high speed motion, further, it is possible to improve the member that shinesThe light emission luminance of part.Thereby, it is possible to make the write-in of picture signal, rewrite high speed, also, keep display more bright.Its resultIt is the electro-optical device that may be implemented to show the image of bright, high-resolution and the high quality of more gray scales with low power.
The electro-optical device of (application examples 2) the application example is preferably, the storage circuit include the 3rd transistor, the described 3rdThe grid length of transistor is shorter than the grid length of the 1st transistor.
According to the structure of the application example, the grid length ratio and light-emitting component string of the 3rd transistor for including in storage circuitConnection ground configuration the 1st transistor grid length it is short, therefore, though the 3rd transistor less than the 1st transistor, also can be to storageCircuit is miniaturize.Therefore, storage circuit can be made to carry out high speed motion, and send out light-emitting component with higher voltageLight.
The electro-optical device of (application examples 3) the application example is preferably, the area of the channel formation region of the 3rd transistorArea than the channel formation region of the 1st transistor is small.
According to the structure of the application example, the transistor capacitance for the 3rd transistor for including in storage circuit is less than the 1st transistorTransistor capacitance, therefore, can make the write-in to the picture signal of storage circuit, rewrite high speed.
The electro-optical device of (application examples 4) the application example is preferably, the source electrode and the 2nd current potential of the 1st transistorLine electrical connection, the light-emitting component configuration is between the drain electrode and the 3rd equipotential line of the 1st transistor.
According to the structure of the application example, the source potential of the 1st transistor is fixed as the 2nd current potential, therefore, in the 1st transistorWhen as on state, even if the absolute value of the source drain voltage of the 1st transistor is smaller, it is also capable of increasing the 1st transistorElectric conductivity.That is, the 1st transistor substantial linear can be made when the 1st transistor becomes on state to make light-emitting component shineGround is acted (hreinafter referred to as line movement).Electricity as the 2nd current potential and the 3rd current potential of high-voltage system power supply as a result,The major part of potential difference is applied to light-emitting component, so, when making light-emitting component shine, it is not easily susceptible to the threshold value electricity of the 1st transistorThe influence of the deviation of pressure.As a result, it is possible to improve the uniformity of the brightness between pixel.
The electro-optical device of (application examples 5) the application example is preferably, and the conducting resistance of the 1st transistor is lower than the hairThe conducting resistance of optical element.
According to the structure of the application example, light-emitting component can be made to make the 1st when shining making the 1st transistor on stateTransistor carries out line movement.As a result, the major part of the potential difference generated in light-emitting component and the 1st transistor is applied to hairOptical element, so, when making light-emitting component shine, it is not easily susceptible to the influence of the deviation of the threshold voltage of the 1st transistor.As a result,The offset of the deviation, gray scale of the brightness between pixel can be reduced.
The electro-optical device of (application examples 6) the application example is preferably, the pole of the 1st transistor and the 2nd transistorProperty is identical.
According to the structure of the application example, for example, the feelings when the 1st transistor is the signal of N-type, "high" as on stateUnder condition, the 2nd transistor also N-type, "high" signal when become on state.The grid from scan line to the 2nd transistor can be setThe current potential of the selection signal of pole supply is the 1st current potential, highest 3rd current potential, non-select signal are in the 2nd current potential and the 3rd current potentialTherefore the potential setting of selection signal can must be compared image by the 2nd minimum current potential in the 1st current potential, the 2nd current potential and the 3rd current potentialThe current potential (the 1st current potential or the 2nd current potential) of signal is high.Therefore, it is written to storage circuit making the 2nd transistor on stateWhen picture signal, the gate-source voltage of the 2nd transistor can be made to increase the high amount of selection signal, therefore, even if source potentialDue to picture signal write-in and rise (even if the 1st current potential of supply hot side is as picture signal), also can be brilliant by the 2ndThe conducting resistance of body pipe maintains lower.
Equally, the 1st transistor be p-type, " low " signal when become on state in the case where, the 2nd transistor is also in PType, " low " signal when become on state.The electricity of the selection signal supplied from scan line to the grid of the 2nd transistor can be setPosition is the 3rd current potential minimum in the 1st current potential, the 2nd current potential and the 3rd current potential, non-select signal is the 1st current potential, the 2nd current potential and the 3rdHighest 2nd current potential in current potential, therefore, can by the potential setting of selection signal be than picture signal current potential (the 1st current potential orThe 2nd current potential of person) it is low.Therefore, make the 2nd transistor on state when picture signal is written to storage circuit, the 2nd can be madeThe gate-source voltage of transistor increases the low amount of selection signal, therefore, even if source potential due to picture signal write-in andDecline (even if the 1st current potential of supply low potential side is as picture signal), can also maintain the conducting resistance of the 2nd transistorIt is lower.Thereby, it is possible to carry out the write-in to the picture signal of storage circuit at a high speed and reliably, rewrite.
The electro-optical device of (application examples 7) the application example is preferably, which has control line, the pixel circuitComprising the 4th transistor, the grid of the 4th transistor is electrically connected with the control line, the light-emitting component, the 1st transistor,4th transistor is configured in series between the 2nd equipotential line and the 3rd equipotential line.
According to the structure of the application example, can be independently controlled by control line and the 2nd transistor with light-emitting component and4th transistor of the 1st transistor arranged in series.That is, independently controlling makes the 2nd transistor on state and writes to storage circuitDuring entering picture signal and makes the 4th transistor on state and make light-emitting component as can be during luminance.Therefore,In each pixel, light-emitting component non-luminescent state can be made during by picture signal write storage circuit, in storage electricityIt is written with after picture signal in road, if light-emitting component is made to become the state that can be shone during the defined time is display, becauseThis, can be driven by the time-division and realize accurate expressing gradation.
The electro-optical device of (application examples 8) the application example is preferably, the drain electrode of the 4th transistor and the light-emitting componentElectrical connection.
According to the structure of the application example, the drain electrode of the 4th transistor is electrically connected with light-emitting component, and light-emitting component configuration is theBetween 1 transistor and the 3rd equipotential line, the source electrode of the 1st transistor is electrically connected with the 2nd equipotential line.Therefore, if the 4th transistorFor N-type, then the configuration of the 4th transistor is in the position for leaning on low potential side than light-emitting component, if the 4th transistor is p-type, the 4th is brilliantThe configuration of body pipe is in the position for leaning on hot side than light-emitting component, therefore, when the 4th transistor becomes on state, even if the 4th is brilliantThe source drain voltage of body pipe is smaller, is also capable of increasing the electric conductivity of the 4th transistor.That is, becoming on state in the 4th transistorAnd when light-emitting component being made to shine, the 4th transistor can be made to carry out line movement.As a result, as the 2nd electricity of high-voltage system power supplyPosition and the major part of the potential difference of the 3rd current potential are applied to light-emitting component, so, when making light-emitting component shine, it is not easily susceptible to the 4thThe influence of the deviation of the threshold voltage of transistor.As a result, it is possible to improve the uniformity of the brightness between pixel.
The electro-optical device of (application examples 9) the application example is preferably, and the conducting resistance of the 4th transistor is lower than the hairThe conducting resistance of optical element.
According to the structure of the application example, light-emitting component is set to shine making the 1st transistor and the 4th transistor on stateWhen, the 4th transistor can be made to carry out line movement.As a result, generated in light-emitting component, the 1st transistor and the 4th transistorThe major part of potential difference is applied to light-emitting component, so, when making light-emitting component shine, it is not easily susceptible to the threshold value of the 4th transistorThe influence of the deviation of voltage.Thereby, it is possible to reduce the offset of the deviation of the brightness between pixel, gray scale.
The electro-optical device of (application examples 10) the application example is preferably, the pole of the 1st transistor and the 4th transistorProperty is opposite.
According to the structure of the application example, the source electrode of the source electrode of the 1st transistor and the 4th transistor respectively with different potentialsEquipotential line electrical connection.Therefore, the source potential of the 1st transistor and the source potential of the 4th transistor are fixed as respective current potential, becauseThis, can increase the electric conductivity of two transistors and carry out line movement when two transistors become on state.
The electro-optical device of (application examples 11) the application example is preferably, described when the 2nd transistor is on state4th transistor is off state.
According to the structure of the application example, make the 2nd transistor on state and from signal wire to storage circuit write-in figureWhen as signal, makes the 4th transistor off state and make the non-luminescent state of light-emitting component, it therefore, can be reliable with low-power consumptionAnd (or rewriting) is write a signal at high speed to storage circuit.Thereby, it is possible to inhibit due to not writing correctly in storage circuitEnter the decline of the display of mistake caused by picture signal, the quality that image is shown.
The electro-optical device of (application examples 12) the application example is preferably, any one in the scan line, which is supplied to, to be madeDuring 2nd transistor becomes the 1st of the selection signal of on state the, the control line, which is supplied to, makes the 4th transistorInactive signal as off state.
According to the structure of the application example, during making the 2nd transistor become the 1st of on state the using selection signal, the 4thTransistor becomes off state, therefore, light-emitting component can be made not send out during by the 1st of picture signal write storage circuit theLight.
The electro-optical device of (application examples 13) the application example is preferably, and being supplied in the control line makes the 4th crystalDuring pipe becomes the 2nd of the activation signal of on state the, the scan line, which is supplied to, makes the 2nd transistor become off stateNon-select signal.
According to the structure of the application example, during making the 4th transistor become the 2nd of on state the using activation signal, the 2ndTransistor becomes off state, therefore, can stop the picture signal to storage circuit during the 2nd that light-emitting component can shineWrite-in.Furthermore it is possible to during independently controlling the 1st and during the 2nd, it therefore, can regardless of the length during the 1stThe length for the 2nd period for making light-emitting component that can shine is different in various ways.Thereby, it is possible to drive to realize using digital time-divisionThe display of higher gray scale.Also, due to can share in a plurality of pixels to control line supply signal (activation signal, it is non-swashSignal living), so, even if the subfield short in the presence of a vertical period of multi-strip scanning line more all than having selected during making the 2nd,Also easily electro-optical device can be driven.
The electro-optical device of (application examples 14) the application example is preferably, and the 1st transistor is N-type, the 4th transistorFor p-type, set the 1st current potential as V1, the 2nd current potential be V2, the 3rd current potential is V3 when, be supplied to the control lineThe activation signal current potential be V3- (V1-V2) below.
According to the structure of the application example, the source electrode of the 1st transistor of N-type is electrically connected with the 2nd equipotential line, the 4th crystal of p-typeThe source electrode of pipe and the 3rd equipotential line, therefore, the 3rd current potential are higher than the 2nd current potential.When supplying the activation signal of " low " to grid, the 4thTransistor becomes on state, therefore, make the current potential V3- (V1-V2) of activation signal below, that is, ratio as the 4th transistor3rd current potential of source potential reduces low-voltage system supply voltage, therefore, can reliably make the 4th crystal using activation signalPipe becomes on state.In addition, more reducing the current potential of activation signal, the gate-source voltage of the 4th transistor is more towards negative directionIncrease, therefore the conducting resistance decline of the 4th transistor under on state, when making light-emitting component shine, is not easily susceptible to the 4thThe influence of the deviation of the threshold voltage of transistor.
The electro-optical device of (application examples 15) the application example is preferably, and the current potential of the activation signal is the 2nd current potential.
According to the structure of the application example, between the 1st current potential of current potential, the 2nd current potential and the 3rd current potential by making activation signalThe 2nd minimum current potential, without importing new current potential.Moreover, can fully increase the exhausted of the gate-source voltage of the 4th transistorTo value.Therefore, the conducting resistance that can fully reduce the 4th transistor under on state, can substantially eliminate the 4th transistorThe deviation of threshold voltage the light emission luminance bring of light-emitting component is influenced.
The electro-optical device of (application examples 16) the application example is preferably, and the 1st transistor and the 2nd transistor are NType, the current potential for being supplied to the selection signal of the scan line is the 1st current potential or more.
According to the structure of the application example, when from storage circuit of the configuration between the 1st equipotential line and the 2nd equipotential line to gridWhen supplying the signal of "high", the 1st transistor of N-type becomes on state, and therefore, the 1st current potential is higher than the 2nd current potential, and the of the N-typeThe source electrode of 1 transistor is electrically connected with the 2nd equipotential line.The source potential of 2nd transistor of N-type is between the 1st current potential and the 2nd current potentialCurrent potential, but the current potential of the selection signal supplied from scan line to the grid of the 2nd transistor be the 1st current potential more than, therefore, canThe 2nd transistor is set reliably to become on state.In addition, more making the current potential of selection signal be higher than the 1st current potential, under on stateThe conducting resistance of 2nd transistor more declines, therefore, can high speed and error-free motion, reliably carry out image to storage circuitThe write-in of signal is rewritten.
The electro-optical device of (application examples 17) the application example is preferably, and the current potential of the selection signal is the 3rd current potential.
According to the structure of the application example, between the 1st current potential of current potential, the 2nd current potential and the 3rd current potential by making selection signalHighest 3rd current potential, without importing new current potential.Moreover, can fully increase the gate-source voltage of the 2nd transistor, becauseThis, can fully reduce the conducting resistance of the 2nd transistor under on state, can high speed and error-free motion, reliably intoWrite-in, rewriting of the row to the picture signal of storage circuit.
The electro-optical device of (application examples 18) the application example is preferably, and the 1st transistor is p-type, the 4th transistorFor N-type, set the 1st current potential as V1, the 2nd current potential be V2, the 3rd current potential is V3 when, be supplied to the control lineThe activation signal current potential be V3+ (V2-V1) more than.
According to the structure of the application example, the source electrode of the 1st transistor of p-type is electrically connected with the 2nd equipotential line, the 4th crystal of N-typeThe source electrode of pipe is electrically connected with the 3rd equipotential line, and therefore, the 3rd current potential is lower than the 2nd current potential.When the activation signal to grid supply "high"When, the 4th transistor become on state, but make activation signal current potential V3+ (V2-V1) or more, i.e., than as the 4th crystal3rd current potential of the source potential of pipe improves low-voltage system supply voltage, therefore, can reliably make the 4th using activation signalTransistor becomes on state.In addition, more improving the current potential of activation signal, the gate-source voltage of the 4th transistor more increases, leadsThe conducting resistance of the 4th transistor under logical state more declines, and therefore, when making light-emitting component shine, is not easily susceptible to the 4th transistorThreshold voltage deviation influence.
The electro-optical device of (application examples 19) the application example is preferably, and the current potential of the activation signal is the 2nd current potential.
According to the structure of the application example, between the 1st current potential of current potential, the 2nd current potential and the 3rd current potential by making activation signalHighest 2nd current potential, without importing new current potential.Moreover, can fully increase the gate-source voltage of the 4th transistor.CauseThis, can fully reduce the conducting resistance of the 4th transistor under on state, can substantially eliminate the threshold value of the 4th transistorThe deviation of voltage influences the light emission luminance bring of light-emitting component.
The electro-optical device of (application examples 20) the application example is preferably, and the 1st transistor and the 2nd transistor are PType, the current potential for being supplied to the selection signal of the scan line is the 1st current potential or less.
According to the structure of the application example, when from storage circuit of the configuration between the 1st equipotential line and the 2nd equipotential line to gridWhen supplying the signal of " low ", the 1st transistor of p-type becomes on state, and therefore, the 1st current potential is lower than the 2nd current potential, and the of the p-type1 transistor source is electrically connected with the 2nd equipotential line.The source potential of 2nd transistor of p-type is between the 1st current potential and the 2nd current potentialCurrent potential, but the current potential of the selection signal supplied from scan line to the grid of the 2nd transistor is the 1st current potential hereinafter, therefore, Neng GoukeThe 2nd transistor is set to become on state by ground.In addition, more make the current potential of selection signal lower than the 1st current potential, under on state theThe conducting resistance of 2 transistors more declines, therefore, can high speed and error-free motion, reliably carry out to the image of storage circuit letterNumber write-in, rewrite.
The electro-optical device of (application examples 21) the application example is preferably, and the current potential of the selection signal is the 3rd current potential.
According to the structure of the application example, between the 1st current potential of current potential, the 2nd current potential and the 3rd current potential by making selection signalThe 3rd minimum current potential, without importing new current potential.Moreover, can fully increase the gate-source voltage of the 2nd transistor, becauseThis, can fully reduce the conducting resistance of the 2nd transistor under on state, can high speed and error-free motion, reliably intoWrite-in, rewriting of the row to the picture signal of storage circuit.
The electronic equipment of (application examples 22) the application example is characterized in that thering is electro-optical device described in above application examples.
According to the structure of the application example, such as it can be realized the high-quality of the image for being shown in the electronic equipments such as head-mounted displayAmount.
Specific embodiment
Hereinafter, using attached drawing, embodiments of the present invention will be described.In the following figures, in order to make each layer or eachComponent becomes the size for the degree that can be identified on attached drawing, keeps scale bar different according to each layer or each component.
" summary of electronic equipment "
Firstly, being illustrated referring to Fig.1 to the summary of electronic equipment.Fig. 1 is the electronic equipment for illustrating present embodimentThe figure of summary.
Head-mounted display 100 is an example of the electronic equipment of present embodiment, has electro-optical device 10 (referring to Fig. 3).As shown in Figure 1, head-mounted display 100 has appearance as glasses.Keep the user for having worn the head-mounted display 100 visualAs the image light GL (referring to Fig. 3) of image, and make user's visual ambient light in a manner of having an X-rayed.In short, wearing displayThe perspective function that device 100, which has, makes ambient light and image light GL is overlappingly shown, the head-mounted display 100 have wide visual field angle andHigh-performance, and small-size light-weight.
Head-mounted display 100 includes perspective component 101, by the covering at the moment of user；Frame 102, bearing perspectiveComponent 101；And the 1st built-in portion 105a and the 2nd built-in portion 105b, they are attached to from the left and right of frame 102 twoIn the cover portion at end to the part of the leg section (temple) at rear.
Perspective component 101 is the covering at the moment by user and (penetrates eye with the optical component of thicker thickness flexureCover), it is divided into the 1st opticator 103a and the 2nd opticator 103b.In Fig. 1, by the 1st opticator 103a in left side and the 1stThe 1st display equipment 151 that built-in portion 105a is composed is to show the part of the right eye virtual image with having an X-rayed, and can also individually be madeIt is functioned for the electronic equipment with display function.Also, it is filled as built in the 2nd opticator 103b on right side and the 2nd in Fig. 1The 2nd display equipment 152 that the portion 105b of setting is composed is to form the part of the left eye virtual image with having an X-rayed, can also be aobvious separately as bandShow that the electronic equipment of function functions.It is shown in equipment 152 in the 1st display equipment 151 and the 2nd and is assembled with electro-optical device 10(referring to Fig. 3).
" internal structure of electronic equipment "
Fig. 2 is the in-built figure for illustrating the electronic equipment of present embodiment.Fig. 3 is the electronics for illustrating present embodimentThe figure of the optical system of equipment.Then, the internal structure of electronic equipment and optical system are illustrated referring to Fig. 2 and Fig. 3.SeparatelyOutside, the 1st display equipment 151 is illustrated as the example of electronic equipment in figure 2 and figure 3, but the 2nd display equipment 152 and1st display equipment, 151 bilateral symmetry, has almost the same construction.Therefore, the 1st display equipment 151 is illustrated, is omittedThe detailed description of 2nd display equipment 152.
As shown in Fig. 2, the 1st display equipment 151 has projection arrangement for perspective 170 and electro-optical device 10 (referring to Fig. 3).ProjectionArrangement for perspective 170 has the projection lens 130 as the prism 110 of light guide member, light-transmissive member 150, imaging, and (reference is schemed3).Prism 110 and light-transmissive member 150 are integrated by engagement, and for example with the upper surface 110e and frame of prism 110The mode that 161 lower surface 161e connects is firmly fixed at the downside of frame 161.
Projection lens 130 is fixed on the end of prism 110 by the lens barrel 162 for storing the projection lens 130.Projection is saturatingPrism 110 and light-transmissive member 150 in view apparatus 170 are equivalent to the 1st opticator 103a in Fig. 1, project arrangement for perspective170 projection lens 130 and electro-optical device 10 is equivalent to the 1st built-in portion 105a in Fig. 1.
Prism 110 in projection arrangement for perspective 170 be in plan view along the component of the curved arc-shaped of face, canConsider the 2nd component prism 112 of the 1st component prism 111 for being divided into the center side close to nose and the perimeter sides far from nose.TheFor the configuration of 1 component prism 111 in light emitting side, being used as with the 1st face S11 (referring to Fig. 3), the 2nd face S12 and the 3rd face S13 has lightLearn the side of function.
In light incident side, there is the 4th face S14 (referring to Fig. 3) and the 5th face S15 to be used as has the configuration of 2nd component prism 112The side of optical function.Wherein, the 1st face S11 is adjacent with the 4th face S14, and the 3rd face S13 is adjacent with the 5th face S15, in the 1st face S11The 2nd face S12 is configured between the 3rd face S13.Also, prism 110 has the upper surface adjacent with the 1st face S11 to the 4th face S14110e。
Prism 110 is formed by the resin material for showing higher photopermeability in the visible range, for example, by mouldThermoplastic resin is injected in tool and is solidified and is formed.The main part 110s (referring to Fig. 3) of prism 110 is integrally formedProduct, but be contemplated that and be divided into the 1st component prism 111 and the 2nd component prism 112.1st component prism 111 can guide and project shadowAs light GL, and extraneous x ray fluoroscopy x can be made.2nd component prism 112 can be incident and guides image light GL.
Light-transmissive member 150 is fixed as one with prism 110.Light-transmissive member 150 is the perspective function of auxiliary prism 110Component (auxiliary prism).Light-transmissive member 150 is formed by resin material, which shows higher in the visible rangePhotopermeability, have the refractive index roughly the same with the main part 110s of prism 110.Light-transmissive member 150 for example passes throughThe molding of thermoplastic resin is formed.
As shown in figure 3, projection lens 130 is along incident side optical axis for example with 3 lens 131,132,133.Each lens131,132,133 be the light incident surface about lens the symmetrical lens of center axis rotation, more than at least one be asphericalMirror.
Projection lens 130 is incident on the image light GL projected from electro-optical device 10 in prism 110 and makes eye E Y againImaging.In short, projection lens 130 be for make from each pixel of electro-optical device 10 project image light GL via prism 110 andMake the relay optical system of eye E Y reimaging.Projection lens 130 is maintained in lens barrel 162, and electro-optical device 10 is fixed on mirrorOne end of cylinder 162.2nd component prism 112 of prism 110 links with the lens barrel 162 of projection lens 130 is kept, and supports indirectlyProjection lens 130 and electro-optical device 10.
The head of user is being worn on as head-mounted display 100 and by the electronic equipment of the type covered at the momentIn, it is desirable that small-sized and lightweight.In addition, in the electro-optical device 10 used in the electronic equipment such as head-mounted display 100, it is desirable thatHigh resolution (miniaturization of pixel), more gray processings of display and low power consumption.
[structure of electro-optical device]
Then, it is illustrated referring to structure of the Fig. 4 to electro-optical device.Fig. 4 is the electro-optical device for showing the 1st embodimentThe approximate vertical view of structure.It in the present embodiment, is that there is organic EL element having as light-emitting component using electro-optical device 10It is illustrated in case where machine EL device.As shown in figure 4, the electro-optical device 10 of present embodiment has device substrate 11 and protectsProtect substrate 12.Colour filter (not shown) is provided on device substrate 11.Device substrate 11 and protective substrate 12 are across not shownFiller be oppositely disposed and bond together.
Device substrate 11 is for example made of single crystalline semiconductor substrate (such as monocrystalline silicon substrate).Device substrate 11 has displayThe region E and non-display area D for surrounding display area E.In the E of display area, for example, issuing the sub-pixel of blue (B) light58B, the sub-pixel 58G for issuing green (G) light, issue red (R) light sub-pixel 58R be for example arranged in it is rectangular.In sub- picturePlain 58B, sub-pixel 58G, light-emitting component 20 is respectively arranged in sub-pixel 58R (referring to Fig. 6).In electro-optical device 10, with packetThe pixel 59 of 58B containing sub-pixel, sub-pixel 58G and sub-pixel 58R are the unit of display, provide the display of full color.
In addition, in the present specification, not distinguished sometimes to sub-pixel 58B, sub-pixel 58G and sub-pixel 58R, general nameFor sub-pixel 58.Display area E is the region for making the light issued from sub-pixel 58 penetrate, facilitate display.Non-display area D isThe light issued from sub-pixel 58 is not set to penetrate, be helpless to the region of display.
Device substrate 11 is bigger than protective substrate 12, arranges along the 1st side of the device substrate 11 exposed from protective substrate 12There are multiple external connection terminals 13.It is driven in multiple external connections with signal wire is provided between terminal 13 and display area ECircuit 53.With the 1st while the vertical the other 2nd while and display area E between be provided with scan line drive circuit 52.In addition,Be provided between the 3rd side and display area E control line drive circuit 54, the 3rd it is vertical while with the 1st and with the 2nd side phaseIt is right.
Protective substrate 12 is smaller than device substrate 11, is configured to expose external connection terminal 13.Protective substrate 12 is lightQuartz base plate or glass substrate etc. can be used for example in the substrate of permeability.Protective substrate 12 has to be protected in the E of display areaIt is configured at the effect that the light-emitting component 20 of sub-pixel 58 does not damage, is configured at least opposite with display area E.
In addition, colour filter can be set on the light-emitting component 20 in device substrate 11, also can be set in protective substrate12.In the case where issuing from light-emitting component 20 with the structure of assorted corresponding light, colour filter is not required.In addition, protectionSubstrate 12 is not required, and is also possible to replace protective substrate 12 and be provided with protection light-emitting component 20 on device substrate 11The structure of protective layer.
In the present specification, X-direction will be set as along the direction on above-mentioned 1st side for being arranged with external connection terminal 13(line direction) will be set along with the 1st in the direction (column direction) of vertical and relative to each other other both sides (when the 2nd, the 3rd side)For Y-direction.In the present embodiment, for example, using the configuration of so-called band-like (stripe) mode: obtaining same colorThe sub-pixel 58 of light is arranged along column direction (Y-direction), and the sub-pixel 58 for obtaining the light of different colours is arranged along line direction (X-direction)Column.
In addition, the configuration of the sub-pixel 58 on line direction (X-direction) is not limited to the sequence of B, G, R shown in Fig. 4, such asIt can be the sequence of R, G, B.In addition, the configuration of sub-pixel 58 is not limited to ribbon-like manner, it is also possible to delta mode, the side BayerBand-like (S-stripe) mode of formula, S, in addition, the shape of sub-pixel 58B, 58G, 58R, size be also not necessarily limited to it is identical.
(the 1st embodiment)
" circuit structure of electro-optical device "
Then, it is illustrated referring to circuit structure of the Fig. 5 to electro-optical device.Fig. 5 is the electro-optical device of present embodimentCircuit block diagram.As shown in figure 5, being formed with multi-strip scanning line 42 intersected with each other and more in the display area E of electro-optical device 10Signal line 43, also, sub-pixel 58 and each infall of scan line 42 and signal wire 43 be accordingly arranged in it is rectangular.ForEach sub-pixel 58 is provided with the pixel circuit 41 comprising light-emitting component 20 (referring to Fig. 8) etc..
In the display area E of electro-optical device 10, control line 44 is accordingly formed with each scan line 42.42 He of scan lineControl line 44 extends in line direction (X-direction).Also, in the E of display area, accordingly it is formed with each signal wire 43 complementarySignal wire 45.Signal wire 43 and complementary signal line 45 extend in column direction (Y-direction).
In electro-optical device 10, M row × N column sub-pixel 58 is configured to rectangular in the E of display area.Specifically,M scan line 42, M control line 44, N signal line 43 and N complementary signal line 45 are formed in the E of display area.SeparatelyOutside, the integer that M and N is 2 or more, in the present embodiment, as an example, M=720, N=1280 × p.P be 1 or more it is wholeNumber indicates the quantity of the Essential colour of display.In the present embodiment, with p=3, i.e. the Essential colour of display for R, G, B 3 colorsIt is illustrated for situation.
Electro-optical device 10 has driving portion 50 outside the E of display area.It is each on the E of display area from driving portion 50 to being arranged inPixel circuit 41 supplies various signals, and with pixel 59 (sub-pixels 58 of 3 colors) for the unit of display, figure is shown in the E of display areaPicture.Driving portion 50 includes driving circuit 51 and control device 55.Control device 55 supplies display signal to driving circuit 51.It drivesDynamic circuit 51 is according to display signal, via multi-strip scanning line 42, a plurality of signal wire 43 and a plurality of control line 44 to each pixelCircuit 41 supplies driving signal.
Also, in non-display area D and display area E configured with the 1st as the 1st equipotential line for being supplied to the 1st current potentialHigh potential line 47, as the 2nd equipotential line for being supplied to the 2nd current potential low potential line 46, as be supplied to the 3rd current potential the 3rd electricity2nd high potential line 49 of bit line.1st high potential line 47 supplies the 1st current potential to each pixel circuit 41, and low potential line 46 is to each pixelCircuit 41 supplies the 2nd current potential, and the 2nd high potential line 49 supplies the 3rd current potential to each pixel circuit 41.
In the present embodiment, the 1st current potential (V1) is the 1st high potential VDD1 (such as V1=VDD1=3.0V), the 2nd current potentialIt (V2) is low potential VSS (such as V2=VSS=0V) that the 3rd current potential (V3) is the 2nd high potential VDD2 (such as V3=VDD2=7.0V).Therefore, the 1st current potential is higher than the 2nd current potential, and the 3rd current potential is higher than the 1st current potential.
In the present embodiment, low-voltage is constituted by the 1st current potential (the 1st high potential VDD1) and the 2nd current potential (low potential VSS)System power supply constitutes high-voltage system power supply by the 3rd current potential (the 2nd high potential VDD2) and the 2nd current potential (low potential VSS).2nd electricityPosition is the current potential in low-voltage system power supply and high-voltage system power supply as benchmark.
In addition, in the present embodiment, as an example, the 2nd equipotential line (low potential line 46), the 1st equipotential line (the 1st high electricityBit line 47) and the 3rd equipotential line (the 2nd high potential line 49) extend in the E of display area along line direction, but they can also be along column sideTo extension, a part for being also possible to them extends along line direction, and other parts extend along column direction, they can also be along rowColumn direction configures in lattice shape.
Driving circuit 51 includes scan line drive circuit 52, signal-line driving circuit 53 and control line drive circuit 54.It drivesDynamic circuit 51 is set to non-display area D (referring to Fig. 4).In the present embodiment, driving circuit 51 and the formation of pixel circuit 41On device substrate 11 (being monocrystalline silicon substrate in the present embodiment) shown in Fig. 4.Specifically, driving circuit 51, pixelCircuit 41 is made of elements such as the transistors that is formed on monocrystalline silicon substrate.
Scan line drive circuit 52 is electrically connected with scan line 42.Scan line drive circuit 52 is exported to each scan line 42 and is scannedSignal (Scan), the scanning signal select in the row direction or do not select pixel circuit 41.Scan line 42 sends out the scanning signalIt is sent to pixel circuit 41.In other words, scanning signal has selection state and nonselection mode, and scan line 42, which receives, comes from scan lineThe scanning signal of driving circuit 52 can be selected suitably.Scanning signal takes the 2nd current potential (low potential VSS) with the 3rd current potential, and (the 2nd is highCurrent potential VDD2) between current potential.
As described later, in the present embodiment, the 2nd transistor 32 and complementary 2nd transistor 38 are N-type (referring to Fig. 8),Therefore, select the scanning signal (selection signal) under state for "high" (high potential), scanning signal (the non-choosing under nonselection modeSelect signal) it is " low " (low potential).Selection signal is set as the high potential of the 1st current potential (V1) or more, preferably the 3rd current potential(V3).In addition, non-select signal is set as the 2nd current potential (V2) low potential below, preferably the 2nd current potential (V2).
In addition, being labeled as i-th in the scanning signal that the scan line 42 for determining the i-th row into M scan line 42 suppliesCapable scanning signal Scan i.Scan line drive circuit 52 has shift-register circuit (not shown), in shift register electricityThe signal shifted in road is exported according to every level-one as shift output signal.Sweeping for the 1st row is formed using the shift output signalRetouch signal Scan1~M row scanning signal Scan M.
Signal-line driving circuit 53 is electrically connected with signal wire 43 and complementary signal line 45.Signal-line driving circuit 53 hasShift-register circuit (not shown) or decoder circuit or demultplexer circuit etc..Signal-line driving circuit 53 and scan line42 selection is synchronously supplied respectively to picture signal (Data) to N signal line 43, is supplied respectively to mutually to N complementary signal line 45It mends picture signal (XData).Picture signal and complementary image signal are that take the 1st current potential (be in the present embodiment VDD1) and the2 current potentials (are in the present embodiment the digital signal of any one current potential in VSS).
In addition, being labeled as jth when determining the picture signal that the signal wire 43 of the jth column into N signal line 43 suppliesThe picture signal Data j of column is equally determining what the complementary signal line 45 of the jth column into N complementary signal line 45 suppliedWhen complementary image signal, labeled as the complementary image signal XData j of jth column.
Control line drive circuit 54 is electrically connected with control line 44.Line drive circuit 54 is controlled to each control divided by each rowThe intrinsic control signal of the output row of line 44.The control signal is supplied to the pixel circuit 41 of corresponding row by control line 44.ControlSignal has state of activation and unactivated state, and control line 44 receives the control signal from control line drive circuit 54, can fitWhen as state of activation.Control signal takes the electricity between the 2nd current potential (low potential VSS) and the 3rd current potential (the 2nd high potential VDD2)Position.
As described later, in the present embodiment, the 4th transistor 34 is p-type (referring to Fig. 8), therefore, the control under state of activationSignal (activation signal) processed is " low " (low potential), and the control signal (inactive signal) under unactivated state is "high" (high electricityPosition).The 1st current potential is described described for V1, the 2nd current potential describe for V2, the 3rd current potential as V3 when, activation signal is set as V3-(V1-V2) hereinafter, preferably the 2nd current potential (V2).In addition, inactive signal is set as the 3rd current potential (V3) or more, the preferably the 3rdCurrent potential (V3).
In addition, being labeled as i-th in the control signal that the control line 44 for determining the i-th row into M control line 44 suppliesCapable control signal Enb i.Activation signal (or inactive signal) work can be supplied according to every row by controlling line drive circuit 54To control signal, activation signal (or inactive signal) can also be supplied simultaneously to multirow.In the present embodiment, control lineIt is (or non-that driving circuit 54 supplies activation signal via control line 44 simultaneously to whole pixel circuits 41 positioned at display area EActivation signal).
Control device 55 includes display signal supply circuit 56 and VRAM (Video Random Access Memory)Circuit 57.VRAM circuit 57 temporarily stores frame image etc..Display is temporarily stored with signal supply circuit 56 according to VRAM circuit 57Frame image generate display with signal (picture signal, clock signal etc.), which is supplied to driving circuit 51 with signal.
In the present embodiment, driving circuit 51, pixel circuit 41 is formed in device substrate 11 (is in the present embodimentMonocrystalline silicon substrate).Specifically, driving circuit 51, pixel circuit 41 are by the transistor unit structure that is formed on monocrystalline silicon substrateAt.
Control device 55 is made of semiconductor integrated circuit, the semiconductor integrated circuit be formed in by with device substrate 11 notOn the substrates (not shown) of compositions such as same single crystalline semiconductor substrate.The substrate for being formed with control device 55 utilizes flexible printing basePlate (Flexible Printed Circuits:FPC) is connect with the external connection terminal 13 being arranged on device substrate 11.Display signal is supplied from control device 55 to driving circuit 51 via the flexible printing substrate.
" structure of pixel "
Then, it is illustrated referring to structure of the Fig. 6 to the pixel of present embodiment.Fig. 6 is the picture for illustrating present embodimentThe figure of the structure of element.
As described above, will include 59 conduct of pixel of sub-pixel 58 (sub-pixel 58B, 58G, 58R) in electro-optical device 10The unit of display shows image.In the present embodiment, the length a of the line direction (X-direction) of sub-pixel 58 is 4 microns (μm),The length b of the column direction (Y-direction) of sub-pixel 58 is 12 microns (μm).In other words, on the line direction (X-direction) of sub-pixel 58Configuring spacing is 4 microns (μm), and the configuration spacing on the column direction (Y-direction) of sub-pixel 58 is 12 microns (μm).
The pixel electricity comprising light-emitting component (Light Emitting Device:LED) 20 is provided in each sub-pixel 58Road 41.Light-emitting component 20 projects white light.Electro-optical device 10 has the (not shown) of the light transmission for making to project from light-emitting component 20Colour filter.Colour filter includes the colour filter of color corresponding with the Essential colour p of display.In the present embodiment, Essential colour p=3,The assorted colour filter of B, G, R are respectively correspondingly configured with sub-pixel 58B, sub-pixel 58G, sub-pixel 58R.
In the present embodiment, an example as light-emitting component 20 has used organic EL (ElectroLuminescence) element.Organic EL element can have the optical resonance construction of the intensity of the light of amplification specific wavelength.That is,May be constructed are as follows: sub-pixel 58B extracted from the white light that light-emitting component 20 is issued blue light ingredient, sub-pixel 58G fromThe light ingredient of green, the white that sub-pixel 58R is issued from light-emitting component 20 are extracted in the white light that light-emitting component 20 is issuedRed light ingredient is extracted in light.
In addition, Essential colour can also be set as to p=4, the color other than preparation B, G, R is for example in addition to above-mentioned exampleThe colour filter (the actually sub-pixel 58 of color-filterless) that white light is used can also prepare yellow or cyan etc. as colour filterThe colour filter of other coloured light.In addition, as light-emitting component 20, also can be used the light-emitting diodes such as gallium nitride (GaN),Semiconductor Laser device etc..
" digital drive of electro-optical device "
Then, it is carried out referring to image display method of the Fig. 7 to the digital drive of the electro-optical device 10 based on present embodimentExplanation.Fig. 7 is the figure for illustrating the digital drive of electro-optical device of present embodiment.
Electro-optical device 10 shows defined image in display area E (referring to Fig. 4) by digital drive.That is, being configured atThe light-emitting component 20 (referring to Fig. 6) of each sub-pixel 58 takes any one in the two-value of luminous (bright display) or non-luminescent (show slinkingly and show)The gray scale of a state, shown image is determined by the ratio of the luminous period of each light-emitting component 20.It is referred to as time-division driveIt is dynamic.
As shown in fig. 7, will show that 1 (F) of an image is divided into multiple subfields (SF) in time-division driving, according toEach subfield (SF) controls the luminous and non-luminescent of light-emitting component 20, so that representing gradation is shown.Here, as an example, with logicalIt crosses 6 time-division grayscale modes and carries out 26It is illustrated in case where the display of=64 gray scales.In 6 time-division grayscale modesIn, 1 field F is divided into 6 subfield SF1~SF6.
In Fig. 7, i-th of subfield is indicated with SFi in 1 field F, is shown from the 1st subfield SF1 to the 6th subfield6 subfields of SF6.P2 (P2-1~P2-6) during each subfield SF includes the display as the 2nd period, and include as neededAs non-display period (signal address period) P1 (P1-1~P1-6) during the 1st.
In addition, in the present specification, not distinguishing subfield SF1~SF6 sometimes and collectively referred to as subfield SF, not distinguishing the non-display phaseBetween P1-1~P1-6 and collectively referred to as non-display period P1, P2-1~P2-6 during not distinguishing display and P2 during collectively referred to as showing.
The P2 during display of light-emitting component 20 shines or does not shine, and does not send out in non-display period (signal address period) P1Light.Non-display period P1 is used for (referring to Fig. 8) the write-in picture signal of storage circuit 60 or adjustment display time etc., shortestIn the case that subfield (such as SF1) is long, non-display period P1 (P1-1) also can be omitted.
In 6 time-division grayscale modes, P2 (P2-1~P2-6) during the display of each subfield SF is set as (SF1'sP2-1): (P2-2 of SF2): (P2-3 of SF3): (P2-4 of SF4): (P2-5 of SF5): (P2-6 of SF6)=1:2:4:8:16:32.For example, in the case where showing image with frame rate for the row-by-row system of 30Hz, 1 frame=1 (F)=33.3 millisecond(msec)。
In the case of the above-described example, when the non-display period P1 (P1-1~P1-6) in each subfield SF is 1 millisecond, ifIt is set to (P2-1 of SF1)=0.434 millisecond, (P2-2 of SF2)=0.868 millisecond, (P2-3 of SF3)=1.735 milliseconds, (SF4P2-4)=3.471 milliseconds, (P2-5 of SF5)=6.942 milliseconds, (P2-6 of SF6)=13.884 milliseconds.
Here, during indicating the time of non-display period P1 with x (sec), indicating shortest display with y (sec) P2 (In the case where above-mentioned example, P2-1 during being the display in the 1st subfield SF1) time, indicate with g the digit (=son of gray scaleThe number of SF), when indicating field frequencies range with f (Hz), the relationship between them is indicated with formula 1 below.
gx+(2g-1)y-1/f…(I)
In the digital drive of electro-optical device 10, according to the luminous period in 1 field F and always during display, the ratio between P2 is realizedGray scale is shown.For example, in the black display that gray scale is " 0 ", during whole displays of 6 subfield SF1~SF6 P2-1~P2-6 makes light-emitting component 20 not shine.On the other hand, in the white display of gray scale " 63 ", in the whole of 6 subfield SF1~SF6Display during P2-1~P2-6 make light-emitting component 20 shine.
Also, in the case where obtaining the display of intermediate luminance of such as gray scale " 7 " in 64 gray scales, make light-emitting component 20The display phase of P2-2 during the display of P2-1, the 2nd subfield SF2, the 3rd subfield SF3 during the display of the 1st subfield SF1Between P2-3 shine, so that the P2-4~P2-6 during the display of other subfield SF4~SF6 of light-emitting component 20 is not shone.In this way, logicalP2, which shines, during crossing the appropriate display for selecting each subfield SF for making light-emitting component 20 in 1 field F of composition does not still shine, canCarry out the display of intermediate gray scale.
In addition, in the electro-optical device (organic el device) of previous analog-driven, according to the grid electricity of driving transistorPosition carries out simulation control to the electric current for flowing through organic EL element, shows to carry out gray scale, therefore, because driving the voltage of transistorThe deviation of current characteristics or threshold voltage and lead to the offset that the deviation or gray scale of brightness are generated between pixel, so as to cause aobviousShow that quality declines.In this regard, setting compensation drives the voltage-current characteristic or threshold of transistor as described in Patent Document 1When the compensation circuit of the deviation of threshold voltage, due to also flowing through electric current in compensation circuit, so, it will lead to power consumption increase.
In addition, in order to make to show more gray processings, needing to increase storage as analog signal in existing organic el devicePicture signal capacity cell capacitance, therefore, it is difficult to realize high resolution (miniaturization of pixel) simultaneously, and withThe charge and discharge of bulky capacitor element, power consumption also increase with it.In other words, in existing organic el device, there are difficult to realizeIt can be with the project of low-power consumption display of high resolution and the electro-optical device of the high quality graphic of more gray scales.
In the electro-optical device 10 of present embodiment, the number that is acted by then passing through the two-value of conduction and cut-offDriving, so, light-emitting component 20 takes the state of any one of luminous or non-luminous two-value.Therefore, with the feelings of analog-drivenCondition is compared, and the influence of the voltage-current characteristic of transistor or the deviation of threshold voltage is not easily susceptible to, and therefore, can get in pixel 59The display image of the less high quality of the offset of the deviation or gray scale of brightness between (sub-pixel 58).Also, in digital driveIn, it does not need therefore to can be realized pixel 59 with the capacity cell of required large capacity in the case where analog-drivenThe miniaturization of (sub-pixel 58) is easy to carry out high resolution, and can reduce associated with the charge and discharge of bulky capacitor elementPower consumption.
Also, in the digital drive of electro-optical device 10, the number g of the subfield SF of 1 field F is constituted by increasing, it canEasily improve grey.In this case, shortest by merely making when having non-display period P1 as described aboveP2 shortens during display, can be improved grey.For example, being set as g=8 in the row-by-row system of frame rate f=30Hz and carrying outIt, only can will most by formula 1 when the time of non-display period P1 is set as x=1 milliseconds in the case where the display of 256 gray scalesThe time of (P2-1 of SF1) is set as y=0.100 milliseconds during short display.
It is described in detail below, in the digital drive of electro-optical device 10, the non-display period P1 as the 1st period can be setFor the signal address period (or during rewriting the signal rewriting of picture signal) that picture signal is written to storage circuit 60.Therefore,It just can be simply from 6 gray scales without changing signal address period (that is, not having to the clock frequency for changing driving circuit 51)The gray scale that display becomes 8 is shown.
Also, in the digital drive of electro-optical device 10, during subfield SF or during the F of field, the son of display is changedThe picture signal of the storage circuit 60 (referring to Fig. 8) of pixel 58 is written over.On the other hand, depositing for the sub-pixel 58 of display is not changedThe picture signal on storage road 60 is not written over (holding), so, realize low-power consumption.That is, when using this structure, can be realized asUnder electro-optical device 10: reduce energy consumption, and the deviation or ash of the brightness between display pixel 59 (sub-pixel 58)The less high gray scale of offset of degree and high-resolution image.
(embodiment 1)
" structure of pixel circuit "
Then, the structure of the pixel circuit of the 1st embodiment is illustrated by taking embodiment and variation as an example.Firstly,Referring to Fig. 8, the structure of the pixel circuit of the embodiment 1 of the 1st embodiment is illustrated.Fig. 8 is the pixel for illustrating embodiment 1The figure of the structure of circuit.
As shown in figure 8, for each sub-pixel 58 of configuration corresponding with the infall of scan line 42 and signal wire 43, settingThere is pixel circuit 41.Control line 44 is configured along scan line 42, configures complementary signal line 45 along signal wire 43.Each pixel circuit41 is corresponding with scan line 42, signal wire 43, control line 44 and complementary signal line 45.
In addition, in the 1st embodiment (embodiment 1 and variation below), from the 1st high potential line 47 to each pixel electricityRoad 41 supplies the 1st current potential (VDD1), the 2nd current potential (VSS) is supplied from low potential line 46 to each pixel circuit 41, from the 2nd high potentialLine 49 supplies the 3rd current potential (VDD2) to each pixel circuit 41.
The pixel circuit 41 of embodiment 1 include the 1st transistor 31 of N-type, light-emitting component 20, p-type the 4th transistor 34,The 2nd transistor 38 of complementation of storage circuit 60, the 2nd transistor 32 of N-type and N-type.Since pixel circuit 41 includes storage circuit60, so, electro-optical device 10 is able to carry out digital drive, with the analog-driven the case where compared with, be able to suppress between sub-pixel 58The deviation of light emission luminance of light-emitting component 20 of display therefore can reduce the deviation of the display between pixel 59.
1st transistor 31, light-emitting component 20 and the 4th transistor 34 are configured in series in the 3rd equipotential line (the 2nd high potentialLine 49) and the 2nd equipotential line (low potential line 46) between.The configuration of storage circuit 60 is at the 1st equipotential line (the 1st high potential line 47) and theBetween 2 equipotential lines (low potential line 46).2nd transistor 32 configures between storage circuit 60 and signal wire 43.Complementary 2nd crystalPipe 38 configures between storage circuit 60 and complementary signal line 45.
Storage circuit 60 includes the 1st phase inverter 61 and the 2nd phase inverter 62.Storage circuit 60 is by the two phase inverters 61,62Connection is circlewise constituted, and is formed so-called static memory and is stored to the digital signal as picture signal.1st is anti-The output terminal 25 of phase device 61 is electrically connected with the input terminal 28 of the 2nd phase inverter 62, the output terminal 27 of the 2nd phase inverter 62 andThe input terminal 26 of 1 phase inverter 61 is electrically connected.
In addition, terminal (output or input) A refers to terminal (output or input) B state being electrically connected in the present specificationThe logic of the logical AND terminal B of terminal A can be with identical state, for example, even if being configured with crystal between terminal A and terminal BPipe, resistive element, diode etc., the state being alternatively referred to as electrically connected.In addition, being expressed as that " transistor, element configuration are in terminal ABetween terminal B " in the case where " configuration " instead of layout on configuration, the configuration on circuit diagram.
The digital signal that storage circuit 60 stores is the two-value of "high" or " low ".In the present embodiment, in the 1st phase inverterUnder the case where 61 output terminal 25 is " low " (the case where output terminal 27 of the 2nd phase inverter 62 is "high"), light-emitting component 20For the state that can be shone, (the output terminal 27 of the 2nd phase inverter 62 the case where the output terminal 25 of the 1st phase inverter 61 is "high"The case where for " low ") under, light-emitting component 20 does not shine.
In the present embodiment, two phase inverters 61,62 for constituting storage circuit 60 are configured in the 1st equipotential line (the 1st current potentialLine 47) and the 2nd equipotential line (the 2nd equipotential line 46) between, VDD and conduct to the supply of two phase inverters 61,62 as the 1st current potentialThe VSS of 2nd current potential.Therefore, "high" is equivalent to the 1st current potential (VDD1), and " low " is equivalent to the 2nd current potential (VSS).
For example, when the output terminal 25 for storing digital signal and the 1st phase inverter 61 in storage circuit 60 is " low ", toThe input terminal 28 of 2nd phase inverter 62 inputs " low " and makes 27 "high" of output terminal of the 2nd phase inverter 62.Moreover, anti-to the 1stThe input terminal 26 of phase device 61 inputs "high" and makes the output terminal 25 " low " of the 1st phase inverter 61.In this way, being stored in storage electricityThe digital signal on road 60 keeps stable state until being rewritten next time.
1st phase inverter 61 includes the 3rd transistor 33 of N-type and the 5th transistor 35 of p-type, using CMOS structure.3rd is brilliantBody pipe 33 and the 5th transistor 35 are configured in series in the 1st equipotential line (the 1st high potential line 47) and the 2nd equipotential line (low potential line46) between.The source electrode of 3rd transistor 33 is electrically connected with the 2nd equipotential line (low potential line 46).The source electrode and the 1st of 5th transistor 35Equipotential line (the 1st high potential line 47) electrical connection.
2nd phase inverter 62 includes the 6th transistor 36 of p-type and the 7th transistor 37 of N-type, using CMOS structure.6th is brilliantBody pipe 36 and the 7th transistor 37 are configured in series in the 1st equipotential line (the 1st high potential line 47) and the 2nd equipotential line (low potential line46) between.The source electrode of 6th transistor 36 is electrically connected with the 1st equipotential line (the 1st high potential line 47).The source electrode of 7th transistor 37 with2nd equipotential line (low potential line 46) electrical connection.
The output terminal 25 of 1st phase inverter 61 is the drain electrode of the 3rd transistor 33 and the 5th transistor 35.2nd phase inverter 62Output terminal 27 is the drain electrode of the 6th transistor 36 and the 7th transistor 37.The input terminal 26 of 1st phase inverter 61 is the 3rd transistorThe grid of 33 and the 5th transistor 35, is electrically connected with the output terminal 27 of the 2nd phase inverter 62.Equally, the input of the 2nd phase inverter 62Terminal 28 is the grid of the 6th transistor 36 and the 7th transistor 37, is electrically connected with the output terminal 25 of the 1st phase inverter 61.
In addition, in the present embodiment, the 1st phase inverter 61 and the 2nd phase inverter 62 are all CMOS structures, but these phase inverters61, it 62 can also be made of transistor and resistive element.For example, the 1st phase inverter 61 can also replace the 3rd crystal with resistive elementA side in pipe 33 and the 5th transistor 35, the 2nd phase inverter 62 can also replace the 6th transistor 36 and the 7th crystal with resistive elementA side in pipe 37.
Light-emitting component 20 is organic EL element in the present embodiment, (is shone comprising anode (pixel electrode) 21, illumination regionFunctional layer) 22 and cathode (comparative electrode) 23.Illumination region 22 from 21 side injected holes of anode and from 23 side of cathode by infusingThe electronics entered forms exciton, is configured to make a part of energy become glimmering in exciton annihilation (hole and electronics in conjunction with when)Light or phosphorescence and discharge, to be shone.
In the pixel circuit 41 of embodiment 1, light-emitting component 20 is configured between the 1st transistor 31 and the 4th transistor 34.The anode 21 of light-emitting component 20 is electrically connected with the drain electrode of the 4th transistor 34, the cathode 23 of light-emitting component 20 and the 1st transistor 31Drain electrode electrical connection.
1st transistor 31 is the driving transistor for light-emitting component 20.That is, when the 1st transistor 31 is on state,Light-emitting component 20 can shine.The output terminal 27 of 2nd phase inverter 62 of the grid and storage circuit 60 of the 1st transistor 31 is electrically connectedIt connects.The source electrode of 1st transistor 31 is electrically connected with the 2nd equipotential line (low potential line 46).The drain electrode of 1st transistor 31 and light-emitting component20 (cathodes 23) electrical connection.That is, the 1st transistor 31 configuration of N-type is in the position for leaning on low potential side than light-emitting component 20.
4th transistor 34 is the luminous control transistor for controlling light-emitting component 20.It is on state in the 4th transistor 34When, light-emitting component 20 can shine.It is described below, in the present embodiment, is used as control when supplying activation signal to control line 44Signal processed and make the 4th transistor 34 become on state, the 2nd phase inverter 62 output terminal 27 become be equivalent to luminous current potentialAnd when the 1st transistor 31 being made to become on state, light-emitting component 20 shines.
The grid of 4th transistor 34 is electrically connected with control line 44.(the 2nd is high with the 3rd equipotential line for the source electrode of 4th transistor 34Equipotential line 49) electrical connection.The drain electrode of 4th transistor 34 is electrically connected with light-emitting component 20 (anode 21).That is, the 4th transistor of p-type34 configurations are in the position for leaning on hot side than light-emitting component 20.
Here, in N-type transistor, source potential is compared with drain potential, the lower side of current potential is source electrode.Alternatively, being compared to source potential with drain potential in P-type transistor, the higher side of current potential is source electrode.N-type crystalPipe is configured at the position that low potential side is leaned on than light-emitting component 20.On the other hand, P-type transistor is configured at than light-emitting component 20 by highThe position of current potential side.By configuring N-type transistor and P-type transistor relative to light-emitting component 20 in this way, can make eachTransistor is substantially linearly acted (hreinafter referred to as line movement).
The polarity of 1st transistor 31 and the 4th transistor 34 is preferably opposite.In embodiment 1, the 1st transistor 31 is N-type,4th transistor 34 be p-type, N-type the 1st transistor 31 configuration than light-emitting component 20 lean on low potential side position, the 4th of p-type theThe configuration of transistor 34 is in the position for leaning on hot side than light-emitting component 20.Therefore, the 1st transistor 31 and the 4th transistor can be made34 carry out line movements, these the 1st transistors 31 can be made, the deviation of threshold voltage of the 4th transistor 34 will not be special to displayProperty (light emission luminance of light-emitting component 20) impacts.
Moreover, the source electrode of the 1st transistor 31 is electrically connected with the 2nd equipotential line (low potential line 46), the source electrode of the 4th transistor 34It is electrically connected with the 3rd equipotential line (the 2nd high potential line 49), therefore, the source potential of the 1st transistor 31 is fixed as the 2nd current potential, and the 4thThe source potential of transistor 34 is fixed as the 3rd current potential.Even if the source drain electricity of the 1st transistor 31, the 4th transistor 34 as a result,It presses smaller, is also capable of increasing the electric conductivity of the 1st transistor 31 under on state, the 4th transistor 34.As a result, the 3rd current potential(VDD2) it is applied to light-emitting component 20 with the major part of the potential difference of the 2nd current potential (VSS), therefore, is not easily susceptible to the 1st transistor31, the influence of the deviation of the threshold voltage of the 4th transistor 34 can be improved the light-emitting component 20 between pixel 59 (sub-pixel 58)Light emission luminance uniformity.
2nd transistor 32 configuration storage circuit 60 (the 1st phase inverter 61 of input terminal 28=of the 2nd phase inverter 62 it is defeatedTerminal 25 out) and signal wire 43 between.A side in the source electrode and drain electrode of 2nd transistor 32 of N-type is electrically connected with signal wire 43,Another party and storage circuit 60 (input terminal 28 of the 2nd phase inverter 62), the i.e. grid of the 6th transistor 36 and the 7th transistor 37Pole (drain electrode of the 3rd transistor 33 and the 5th transistor 35) electrical connection.The grid of 2nd transistor 32 is electrically connected with scan line 42.
Complementary 2nd transistor 38 configuration is in (the 2nd phase inverter 62 of input terminal 26=of the 1st phase inverter 61 of storage circuit 60Output terminal 27) and complementary signal line 45 between.A side in the source electrode and drain electrode of the 2nd transistor 38 of complementation of N-type and mutuallyComplement signal line 45 is electrically connected, another party and storage circuit 60 (input terminal 26 of the 1st phase inverter 61), i.e. the 3rd transistor 33 withAnd the 5th transistor 35 grid (drain electrode of the 6th transistor 36 and the 7th transistor 37) electrical connection.Complementary 2nd transistor 38Grid is electrically connected with scan line 42.
The electro-optical device 10 of present embodiment has multiple complementary signal lines 45 in display area E (referring to Fig. 5).1 picture43,1 complementary signal lines 45 of the plain signal line of circuit 41 and 1 are corresponding.To for 1 pixel circuit 41 signal wire 43 and and itsPairs of complementary signal line 45 supplies signal complimentary to one another.That is, the letter after the polarity reversion of the signal supplied to signal wire 43Number (hereinafter referred to as reverse signal) is fed into complementary signal line 45.For example, to signal wire 43 supply "high" when, Xiang Yuqi atPair complementary signal line 45 supply " low ".Also, when supplying " low " to signal wire 43, to the complementary signal line 45 pairs of with itSupply "high".
2nd transistor 32 and complementary 2nd transistor 38 are the selection transistors for pixel circuit 41.2nd transistor 32Grid and the grid of complementary 2nd transistor 38 be electrically connected with scan line 42.2nd transistor 32 and complementary 2nd transistor 38According to the scanning signal (selection signal or non-select signal) while switched conductive state and off state supplied to scan line 42.
When supplying selection signal as scanning signal to scan line 42,38 quilt of the 2nd transistor 32 and complementary 2nd transistorIt selects and all becomes on state.Then, the output terminal 28 of signal wire 43 and the 2nd phase inverter 62 of storage circuit 60 is conductingState, meanwhile, the output terminal 26 of the 1st phase inverter 61 of complementary signal line 45 and storage circuit 60 is on state.
Believe as a result, from signal wire 43 via the 2nd transistor 32 to the input terminal 28 of the 2nd phase inverter 62 write-in digital pictureNumber.In addition, digitized map is written to the input terminal 26 of the 1st phase inverter 61 from complementary signal line 45 via complementary 2nd transistor 38As the reverse signal (digit complement picture signal) of signal.As a result, storing data image signal sum number in storage circuit 60Word complementary image signal.
The data image signal and digital complementary image signal for being stored in storage circuit 60 keep stable state until connecingGet off the 2nd transistor 32 and complementary 2nd transistor 38 is all become on state by selection, from signal wire 43 and complementary signal lineUntil 45 re-write data image signal and digital complementary image signal.
Additionally, it is preferred that determining the polarity of each transistor, size (grid length and grid width), drive condition (scanning letterNumber be selection signal when current potential) etc. so that conducting resistance or 5th of the conducting resistance of the 2nd transistor 32 than the 3rd transistor 33The conducting resistance of transistor 35 is low.Again it is preferred to polarity, size, the drive condition etc. of each transistor be determined, so that complementation the 2ndThe conducting resistance of transistor 38 is lower than the conducting resistance of the 6th transistor 36 or the conducting resistance of the 7th transistor 37.Thereby, it is possible toQuickly and reliably rewrite the signal for being stored in storage circuit 60.
The electro-optical device 10 of present embodiment has multiple control lines 44 in the E of display area.Control line 44 and the 4th crystalThe grid of pipe 34 is electrically connected.The 4th transistor 34 as the control transistor for light-emitting component 20 is supplied according to control line 44Control signal (activation signal or inactive signal) the switched conductive state and off state given.
When supplying activation signal as control signal to control line 44, the 4th transistor 34 becomes on state.The 4thWhen transistor 34 is on state, light-emitting component 20 can shine.On the other hand, when to control line 44 supply inactive signal conductWhen controlling signal, the 4th transistor 34 is off state, and light-emitting component 20 does not shine.When the 4th transistor 34 is off state,Storage circuit 60 not will do it malfunction, be able to carry out the rewriting of stored picture signal.Hereinafter, being illustrated to the point.
In the present embodiment, since control line 44 and scan line 42 are independent of one another relative to each pixel circuit 41, so,2nd transistor 32 and the 4th transistor 34 act in the state of independently of one another.As a result, making the 2nd transistor 32 that shape be connectedWhen state, it is necessary to the 4th transistor 34 be made to become off state.
That is, after making the 4th transistor 34 become off state, making the 2nd when picture signal is written to storage circuit 60Transistor 32 and complementary 2nd transistor 38 become on state and supply the anti-of picture signal and picture signal to storage circuit 60Rotaring signal.Since when the 2nd transistor 32 is on state, the 4th transistor 34 is off state, so, to storage circuit 60During picture signal is written, light-emitting component 20 does not shine.Thereby, it is possible to accurately show the gray scale based on the time-division.
Then, when making light-emitting component 20 shine, the 2nd transistor 32 and complementary 2nd transistor 38 is made to become cut-off shapeAfter state, the 4th transistor 34 is made to become on state.At this moment, when the 1st transistor 31 is on state, from the 3rd equipotential line(the 2nd high potential line 49) reaches the 2nd equipotential line (low potential line via the 4th transistor 34, light-emitting component 20 and the 1st transistor 3146) path becomes on state, flows through electric current in light-emitting component 20.
Since the 2nd transistor 32 when the 4th transistor 34 is on state and complementary 2nd transistor 38 are off state,So not supplying the reverse signal of picture signal and picture signal to storage circuit 60 during making light-emitting component 20 shine.The picture signal of the storage of storage circuit 60 will not be mistakenly rewritten as a result, therefore, can be realized the high quality not shown accidentallyImage is shown.
" relationship of the threshold voltage of each current potential and transistor "
As described above, in the present embodiment, low-voltage system electricity is made of the 1st current potential (VDD1) and the 2nd current potential (VSS)Source constitutes high-voltage system power supply by the 3rd current potential (VDD2) and the 2nd current potential (VSS).By adopting such structure, realizingThe electro-optical device 10 of bright display is acted, can get at high speed.Hereinafter, being illustrated to the point.
In the following description, the 1st current potential is described to describe for V1, the 2nd current potential and is described for V2, the 3rd current potential as V3.At thisIn embodiment, 2nd current potential of the 1st current potential (as an example, V1=3.0V) relative to the voltage as low-voltage system power supplyThe potential difference (V1-V2=3.0V) of (as an example, V2=0V) is than the 3rd current potential (as an example, V3=7.0V) relative to conductThe potential difference (V3-V2=7.0V) of 2nd current potential (V2=0V) of the voltage of high-voltage system power supply is small (V1-V2 < V3-V2).
When setting each current potential as described above, the low-voltage system power supply using the 1st current potential of supply and the 2nd current potential makes to driveCircuit 51, storage circuit 60 are acted, and therefore, can be carried out to the transistor for constituting driving circuit 51 and storage circuit 60 micro-It refines and realizes high speed motion.On the other hand, make the member that shines using the high-voltage system power supply of the 3rd current potential of supply and the 2nd current potentialPart 20 shines, and therefore, can be improved the light emission luminance of light-emitting component 20.That is, by using the structure of present embodiment, Ke YishiNow each circuit is acted at high speed, light-emitting component 20 is with high brightness shines and can obtain the bright electro-optical device 10 shown.
In general, in the light-emitting component as organic EL element, need higher voltage (such as 5V or more) so thatLight-emitting component shines.But in semiconductor devices, when improving supply voltage, it is necessary to which increasing the size of transistor, (grid is longSpend L, grid width W) to prevent malfunction, therefore, the movement of circuit is slack-off.On the other hand, when reduce supply voltage so thatWhen circuit is acted at high speed, lead to the decline of the light emission luminance of light-emitting component.In short, making light-emitting component as in the pastIn luminous supply voltage structure identical with the supply voltage for making circuit operation, it is difficult to take into account the hair of the high brightness of light-emitting componentThe high speed motion of light and circuit.
In contrast, in the present embodiment, there is low-voltage system power supply and high-voltage system power supply to fill as electric light10 power supply is set, if the power supply low-voltage system power supply for acting driving circuit 51, storage circuit 60.Make structure as a result,At driving circuit 51, each transistor of storage circuit 60 size be L=0.5 micron (μm) control, less than the 1st transistor 31,L=0.75 micron (μm) left and right of 4th transistor 34, with these circuits of the low voltage drive of V1-V2=3.0V, thereby, it is possible toAct driving circuit 51, storage circuit 60 at high speed.
Moreover, so that light-emitting component 20 is shone with the high voltage of V3-V2=7.0V using high-voltage system power supply, and therefore, energyLight-emitting component 20 is enough set to shine with high brightness.Also, as described later, by making the configure in series with light-emitting component 20 the 1st crystalline substanceBody pipe 31, the 4th transistor 34 carry out line movement, can apply the big portion of the high voltage of V3-V2=7.0V to light-emitting component 20Point, therefore, brightness when light-emitting component 20 shines can be further increased.
In the present embodiment, the threshold voltage (V as the 1st transistor 31 of driving transistorth1) be positive (0 < Vth1)。When the picture signal that storage circuit 60 stores is equivalent to non-luminescent, the current potential of the output terminal 27 of storage circuit 60 be " low ",That is the 2nd current potential (V2).The source electrode of 1st transistor 31 is connect with the 2nd equipotential line (low potential line 46), therefore, the 1st transistor 31Source potential and grid potential are the 2nd current potential (V2), therefore, the gate-source voltage V of the 1st transistor 31gs1For 0V.
Therefore, as the threshold voltage V of the 1st transistor 31th1(as an example, Vth1=0.36V) be positive (0 < Vth1) when, N-typeThe 1st transistor 31 gate-source voltage Vgs1Less than threshold voltage Vth1, therefore, the 1st transistor 31 is off state.ByThis can make the 1st transistor 31 reliably become off state when picture signal does not shine.
Moreover, in the present embodiment, it is brilliant that the potential difference of the 1st current potential (V1) on the basis of the 2nd current potential (V2) is greater than the 1stThe threshold voltage V of body pipe 31th1(Vth1<V1-V2).When the picture signal that storage circuit 60 stores is equivalent to luminous, storage electricityThe current potential of the output terminal 27 on road 60 is "high"."high" is the 1st current potential (V1), therefore, the gate-source voltage of the 1st transistor 31Vgs1Potential difference (V as the 1st current potential (V1) relative to the 2nd current potential (V2)gs1=V1-V2=3.0V-0V=3.0V).
When the 1st current potential (V1) is greater than the 1st transistor 31 relative to the potential difference (V1-V2=3.0V) of the 2nd current potential (V2)Threshold voltage Vth1(Vth1=0.36V) (Vth1< V1-V2) when, when the current potential of the output terminal 27 of storage circuit 60 is "high", NThe gate-source voltage V of 1st transistor 31 of typegs1Greater than threshold voltage Vth1, therefore, the 1st transistor 31 becomes on state.Therefore, in image signal luminescence, the 1st transistor 31 can be made reliably to become on state.
When supplying inactive signal as control signal from the control line 44 being electrically connected with grid, as control transistorThe 4th transistor 34 become off state, when supply activation signal, the 4th transistor 34 as control transistor is as leadingLogical state.In present embodiment (embodiment 1), the 4th transistor 34 is p-type, therefore, as described above, inactive signal is setFor high potential more than 3rd current potential (V3), preferably the 3rd current potential (V3).In addition, activation signal is set as V3- (V1-V2) belowLow potential, preferably the 2nd current potential (V2).
When supplying the inactive signal of the 3rd current potential (V3) from control line 44 to the grid of the 4th transistor 34, the 4th crystalThe source potential and grid potential of pipe 34 become the 3rd current potential (V3), therefore, the gate-source voltage V of the 4th transistor 34gs4For0V.As the threshold voltage V of the 4th transistor 34 using p-typeth4(as an example, Vth4=-0.36V) when, the 4th transistor 34Gate-source voltage Vgs4Greater than threshold voltage Vth4, therefore, the 4th transistor 34 becomes off state.Therefore, it is in control signalWhen inactive signal, the 4th transistor 34 can be made reliably to become off state.
When from control line 44 supply V3- (V1-V2) below, i.e. the activation of 7.0V- (3.0V-0V)=4.0V current potential belowWhen signal, the gate-source voltage V of the 4th transistor 34gs4As 4.0-7.0V=-3.0V or less.Therefore, the 4th transistor 34Gate-source voltage Vgs4Sufficiently smaller than threshold voltage Vth4, therefore, when controlling signal is activation signal, the 4th crystal can be madePipe 34 reliably becomes on state.
Moreover, more reducing the current potential of activation signal, the gate-source voltage V of the 4th transistor 34gs4More increase.If set sharpThe current potential of signal living is the 2nd current potential (V2), then the gate-source voltage V of the 4th transistor 34gs4As 0V-7.0V=-7.0V, leadThe conducting resistance decline of the 4th transistor 34 under logical state, therefore, when making light-emitting component 20 shine, is not easily susceptible to the 4th crystalThe influence of the deviation of the threshold voltage of pipe 34.
By set highest 3rd current potential (V3) in existing 3 current potentials (the 1st current potential, the 2nd current potential and the 3rd current potential) asThe current potential of inactive signal, the current potential that the 2nd minimum current potential (V2) is activation signal, can be not provided with new current potential (current potentialLine) in the case where set inactive signal and activation signal current potential.Moreover, can fully increase the 4th using activation signalTherefore the absolute value of the gate-source voltage of transistor 34 can fully reduce leading for the 4th transistor 34 under on stateBe powered resistance, and the deviation that can substantially eliminate the threshold voltage of the 4th transistor 34 influences the light emission luminance bring of light-emitting component.
That is, by using the structure of present embodiment, even if using low-voltage system power supply and high-voltage system power supplyTwo kinds of electrical systems also can make the 1st transistor 31 and the 4th transistor 34 become cut-off when light-emitting component 20 should be made not shineState and so that it is not shone, become the 1st transistor 31 and the 4th transistor 34 when light-emitting component 20 should be made to shine and leadLead to state and it is reliably made to shine.
In addition, when supplying non-select signal as scanning signal from the scan line 42 being electrically connected with grid, it is alternatively that brilliant2nd transistor 32 of body pipe become off state, when supplying selection signal, it is alternatively that the 2nd transistor 32 of transistor atFor on state.In the present embodiment, the 2nd transistor 32 is N-type, therefore, as described above, non-select signal is set as the 2ndCurrent potential (V2) low potential below, preferably the 2nd current potential (V2).In addition, selection signal is set as the height of the 1st current potential (V1) or moreCurrent potential, preferably the 3rd current potential (V3).
Preferably, the 1st transistor 31 is identical with the polarity of the 2nd transistor 32.In the 1st embodiment, the 1st transistor31 and the 2nd transistor 32 is N-type.Therefore, when the current potential of the picture signal supplied to grid is "high", the 1st transistor 31As on state, when the scanning signal supplied to grid is selection signal ("high"), the 2nd transistor 32 becomes conducting shapeState.The "high" of picture signal is the 1st current potential (V1), and selection signal ("high") is set as the 1st current potential (V1) or more, the preferably the 3rdCurrent potential (V3).
The current potential for setting selection signal is rewritten as the 3rd current potential (V3), by the picture signal of storage circuit 60 from " low "The case where "high", is illustrated.Before rewriting picture signal, be electrically connected with a side of the source drain of the 2nd transistor 32The input terminal 28 (output terminal 25 of the=the 1 phase inverter 61) of 2 phase inverters 62 is the 2nd current potential (V2) of " low ".When from scanningWhen line 42 supplies the selection signal of the 3rd current potential (V3) to the grid of the 2nd transistor 32, the gate-source voltage of the 2nd transistor 32Vgs2For V3-V2=7.0V-0V=7.0V, higher than the threshold voltage V of the 2nd transistor 32th2(as an example, Vth2=0.36V),Therefore, the 2nd transistor 32 becomes on state.
Pass through the output end by the picture signal of "high" (V1) from the 60, the 1st phase inverter 61 of 43 write storage circuit of signal wireThe current potential of son 25 gradually rises up to "high" (V1) from " low " (V2), but is accompanied by this, the gate-source voltage of the 2nd transistor 32Vgs2Gradually decrease down V3-V1=7.0V-3.0V=4.0V.Even if the gate-source voltage V of the 2nd transistor 32gs2As minimum4.0V, gate-source voltage Vgs2Also sufficiently above the threshold voltage V of the 2nd transistor 32th2.Therefore, until by picture signalUntil write storage circuit 60, the lower state of conducting resistance of the 2nd transistor 32 is maintained, it therefore, can by picture signalBy ground write storage circuit 60.
Here, imaginary 2nd transistor 32 is and the p-type (being set as the 2nd transistor 32A) of 31 opposite characteristic of the 1st transistorSituation.In this case, when selection signal is " low ", the 2nd transistor 32A becomes on state.In the electricity for setting selection signalIn the case that position is the 2nd current potential (V2), the picture signal of storage circuit 60 is rewritten as " low " from "high", supplied when from scan line 42To the 2nd current potential (V2) selection signal when, the gate-source voltage V of the 2nd transistor 32Ags2For V2-V1=0V-3.0V=-3.0V, lower than the threshold voltage V of the 2nd transistor 32Ath2(as an example, Vth2=-0.36V), therefore, the 2nd transistor 32A atFor on state.
By by the picture signal of " low " (V2) from 43 write storage circuit 60 of signal wire, with the defeated of the 2nd phase inverter 62The current potential for entering terminal 28 is gradually reduced from "high" (V1), the gate-source voltage V of the 2nd transistor 32Ags2From -3.0V gradually onIt rises, before the current potential of input terminal 28 becomes the 2nd current potential (V2), reaches the threshold voltage V of the 2nd transistor 32A of p-typeth2,2nd transistor 32A becomes off state.
In addition, before the 2nd transistor 32A becomes off state, with gate-source voltage Vgs2Rise and close to threshold valueVoltage Vth2, the conducting resistance of the 2nd transistor 32A rises, therefore, is spent to the rewriting of the picture signal of storage circuit 60 time,Or rewrite failure.It is more low potential by the potential setting of selection signal in order to avoid the problem, but in this case,Also need the equipotential line different from existing current potential.
As the 1st embodiment, when the 1st transistor 31 and the 2nd transistor 32 are the identical polar of N-type, pass throughMake highest 3rd current potential between the 3rd current potential of current potential of selection signal and the 1st current potential, new equipotential line can be not provided withIn the case where set.Moreover, make 32 on state of the 2nd transistor and when picture signal is written to storage circuit 60, canIncrease the gate-source voltage V of the 2nd transistor 32gs2, therefore, though source potential due to picture signal write-in and rise,Can the conducting resistance of the 2nd transistor 32 be maintained lower.Thereby, it is possible to high speed and reliably carry out to storage circuit 60The write-in of picture signal is rewritten.
According to the above results, preferred each current potential (V1, V2, V3) in present embodiment and the 1st transistor 31 are summarizedThreshold voltage (Vth1) relationship, their relationship formula 2 and formula 3 indicate.
0<Vth1…(2)
V2+Vth1 < V1 < V3 ... (3)
" characteristic of transistor "
Next, being illustrated to the characteristic for the transistor that the electro-optical device 10 of present embodiment has.In this embodiment partyIt is (low with the 2nd equipotential line in the 3rd equipotential line (the 2nd high potential line 49) for constituting high-voltage system power supply in the electro-optical device 10 of formulaEquipotential line 46) between, it is configured with the 1st transistor 31 and the 4th transistor 34 in series with light-emitting component 20.1st transistor 31Conducting resistance is preferably sufficiently below the conducting resistance of light-emitting component 20.Also, the conducting resistance of the 4th transistor 34 is it is also preferred that sufficientlyLower than the conducting resistance of light-emitting component 20.
Substantially low is that the 1st transistor 31, the 4th transistor 34 carry out the drive condition of line movement, specifically, indicating the1 transistor 31, the 4th transistor 34 conducting resistance be light-emitting component 20 conducting resistance 1/100 or less, preferably 1/1000Below.As a result, when light-emitting component 20 shines, the 1st transistor 31, the 4th transistor 34 can be made to carry out line movement.
As a result, the current potential generated in the 1st transistor 31, the 4th transistor 34 and the light-emitting component 20 configured in seriesThe major part of poor (in short, potential difference of the 3rd current potential and the 2nd current potential of the voltage as high-voltage system power supply) is applied to luminousTherefore element 20 when light-emitting component 20 shines, is not easily susceptible to the influence of the deviation of the threshold voltage of two transistors 31,34.That is, when using such structure, can reduce the 1st transistor 31, the 4th transistor 34 threshold voltage deviation influence,Therefore, the offset of the deviation, gray scale that inhibit the brightness between pixel 59 (sub-pixel 58) and excellent in uniformity be can be realizedImage show.
This is because the electric conduction of the conducting resistance light-emitting component 20 by making the 1st transistor 31, the 4th transistor 34Hereinafter, light-emitting component 20 receives 99% or more of supply voltage, the potential difference in two transistors 31,34 is 1% for the 1/100 of resistanceBelow.Potential difference in two transistors 31,34 is small to 1% hereinafter, therefore, the threshold voltage of two transistors 31,34 it is inclinedDifference becomes smaller on the influence of the characteristics of luminescence bring of light-emitting component 20.
In present embodiment (embodiment 1), the series resistance of the 1st transistor 31 and the 4th transistor 34 becomes the member that shines1/1000 or so of the conducting resistance of part 20.In this case, 99.9% or so of the reception of light-emitting component 20 supply voltage, twoPotential difference in transistor 31,34 is 0.1% or so, therefore, can almost ignore the threshold voltage of two transistors 31,34Deviation influences the characteristics of luminescence bring of light-emitting component 20.
The conducting resistance of transistor relies on the polarity of transistor, grid length, grid width, threshold voltage, gate insulatorFilm thickness etc..In the present embodiment, polarity, the grid length, grid width, threshold voltage, grid of two transistors 31,34 are determinedInsulate film thickness etc. for pole, so that the conducting resistance of the 1st transistor 31 and the 4th transistor 34 is sufficiently below the electric conduction of light-emitting component 20Resistance.Hereinafter, illustrating the point.
In the present embodiment, light-emitting component 20 uses organic EL element, the crystal such as the 1st transistor 31, the 4th transistor 34Pipe is formed on the device substrate 11 being made of monocrystalline silicon substrate.The voltage-current characteristic of light-emitting component 20 is substantially by formula below4 indicate.
In formula 4, IELFor by the electric current of light-emitting component 20, VELIt is applied to the voltage of light-emitting component 20, LELIt is luminousThe length when vertical view of element 20, WELWidth when being the vertical view of light-emitting component 20, J0For the current density system of light-emitting component 20Number, VtmIt is the coefficient voltages (constant voltage at a constant temperature) with temperature dependency that light-emitting component 20 has, V0It isFor the luminous threshold voltage of light-emitting component 20.
In addition, with VPIt indicates the voltage of high-voltage system power supply, use VdsIt indicates by the 1st transistor 31 and the 3rd transistorWhen the potential difference of 33 generations, VEL+Vds=VP.Also, in the present embodiment, LEL=11 microns (μm), WEL=3 microns (μm),J0=1.449 milliamperes of (mA/cm every square centimeter2), V0=3.0 volts (V), Vtm=0.541 volt (V).
On the other hand, when the 1st transistor 31, the 4th transistor 34 etc. are expressed as the i-th transistor (i is 1 or 4),Drain current IdsiIt is indicated by formula 5 below.
In formula 5, WiFor the grid width of the i-th transistor, LiFor the grid length of the i-th transistor, ε0For the dielectric of vacuumConstant, εoxFor the dielectric constant of gate insulating film, toxiFor the thickness of gate insulating film, μiFor the mobility of the i-th transistor, VgsiFor grid voltage, VdsiFor the drain voltage based on potential difference caused by the i-th transistor, VthiFor the threshold voltage of the i-th transistor.
In embodiment 1, W1=1.0 microns (μm), W4=1.25 microns (μm), L1=L4=0.75 micron (μm), tox=20 nanometers (nm), μ1=240 centimeter squared per volt second (cm2/ Vs), μ4=150 centimeter squared per volt second (cm2/ Vs), Vth1=0.36V, Vth4=-0.36V, Vgs1=V1-V2=3.0V, Vgs4=V2-V3=-7V.
In addition, using two transistors in the case where making the 1st transistor 31 and the 4th transistor 34 carries out line movement31, the potential difference V in 34ds, the voltage-current characteristic of light-emitting component 20 is in Vds=0V is approximately nearby formula 6 below.
IEL=-kVds+I0…(6)
It in embodiment 1, is k=1.39 × 10 by the coefficient k that formula 6 defines-6(Ω-1)。I0It is high-voltage system power supplyVoltage VPAll it is applied to the magnitude of current in the case where light-emitting component 20, I0=7.82 × 10-7(A)。
In such a situa-tion, it is I that the luminous voltage of light-emitting component 20, which is according to formula 4 and formula 6,EL=IdsVoltage.At thisIn embodiment, VP=V3-V2=7V, Vds1=0.0053V, Vds4=0.0027V, VEL=6.9920V, IEL=Ids1=Ids4=7.672×10-7A.Also, the conducting resistance of transistor at this time is 6.859 × 103The conducting resistance of Ω, the 4th transistor 34 is3.491×103Ω, the conducting resistance of light-emitting component 20 are 9.113 × 106Ω。
Therefore, the conducting resistance of the 1st transistor 31 is 1/1000 low 1/1300 of the conducting resistance than light-emitting component 20Left and right, the conducting resistance of the 4th transistor 34 is 1/1000 low 1/2600 or so of the conducting resistance than light-emitting component 20, becauseThis, can be applied to light-emitting component 20 for the major part of the voltage of high-voltage system power supply.
Under this condition, even if the threshold voltage of transistor, which varies by 30% or more, (in embodiment 1, makes Vth1、Vth4?0.29 changes between 0.53V), VEL=6.99V, IEL=Ids1=Ids4=7.67 × 10-7A is also constant.In general, crystalThe threshold voltage of pipe will not significantly change in this way.Therefore, by making the conducting resistance light-emitting component 20 of the 4th transistor 341/1000 or so of conducting resistance is hereinafter, the deviation of the threshold voltage of the 1st transistor 31 and the 4th transistor 34 will not be substantiallyThe light emission luminance of light-emitting component 20 is affected.
Approximatively, by 6 simultaneous of formula 5 and formula, make IEL=Idsi, so as to indicate the i-th crystalline substance as formula 7 belowThe deviation of the threshold voltage of body pipe is for electric current IEL=IdsiInfluence.
I0For the voltage V of high-voltage system power supplyPIt is all applied to the magnitude of current in the case where light-emitting component 20, so, fromFormula 7 is it is found that make light-emitting component 20 in supply voltage VPIt nearby shines, as long as increasing Vgsi、Zi?.In other words, more increaseZi, the luminous intensity of light-emitting component 20 is more not easily susceptible to the influence of the deviation of the threshold voltage of transistor.
In embodiment 1, due to being small enough to k/Z1=2.52 × 10-2V、k/Z4=3.22 × 10-2The value of V, so, formula 7The 2nd, the left side relative to the 1st transistor 31 be k/ (Z1(Vgs1-Vth1))=0.01, it is k/ (Z relative to the 4th transistor 344(Vgs4-Vth4))=0.005, less than 0.01 (1%) left and right.As a result, the electric current (light emission luminance) when light-emitting component 20 shines is severalThe influence of the threshold voltage of two transistors 31,34 is not will receive.That is, by making k/ (Zi(Vgsi-Vthi)) value be less than0.01 (1%) left and right, can substantially exclude the threshold voltage (V of two transistors 31,34th1、Vth4) relative to light-emitting componentThe deviation of 20 light emission luminance.
In formula 7, k and ZiIt is defined by formula 5 and formula 6.In addition, the mobility [mu] of P-type transistoriLess than N-type transistor, becauseThis, making the W of P-type transistor (is in the present embodiment W3) be greater than N-type transistor W (be in the present embodiment W1), make PThe Z of 4th transistor 34 of type4With the Z of the 1st transistor 31 of N-type1It is roughly the same.
In order to make light-emitting component 20 in supply voltage VPNearby shine, grid voltage VgsiIt is preferred that as big as possible.In this implementationIn mode (embodiment 1), by making the current potential of the control signal (activation signal) under state of activation relative to as the 4th transistor3rd current potential (V3) of 34 source potential becomes the 2nd current potential (V2), increases the gate-source voltage V of the 4th transistor 34gs4。
In addition, in the 1st equipotential line for constituting low-voltage system power supply, (the 1st is high in the electro-optical device 10 of present embodimentEquipotential line 47) and the 2nd equipotential line (low potential line 46) between configured with constituting the 1st phase inverter 61 that is included of storage circuit 603rd transistor 33 and the 5th transistor 35 and the 6th transistor 36 and the 7th transistor 37 for constituting the 2nd phase inverter 62.
These transistors 33,35,36,37 and the 1st transistor the 31, the 4th acted using high-voltage system power supply are brilliantBody pipe 34 is compared, and the magnitude of current flowed through is less, therefore, can reduce the area of channel formation region.That is, can be to storage circuit60 are miniaturize.Moreover, transistor capacitance becomes when the area of the channel formation region of transistor 33,35,36,37 is smallerIt is small, therefore, charge and discharge can be carried out at high speed.That is, the write-in of the picture signal to storage circuit 60 can be made, rewrite high speedChange.
In the present embodiment, these the 3rd transistors 33, the 5th transistor 35, the 6th transistor that storage circuit 60 includesThe grid length when vertical view of the 36 and the 7th transistor 37 is more brilliant than the 1st transistor the 31 and the 4th configured in series with light-emitting component 20The grid length when vertical view of body pipe 34 is short.
3rd transistor 33, the 5th transistor 35, the 6th transistor 36 and the 7th transistor 37 vertical view when grid length beL3=L5=L6=L7=0.5 micron (μm).As described above, the grid when vertical view of the 1st transistor 31 and the 4th transistor 34 is longDegree is L1=L4=0.75 micron (μm), therefore, the 3rd transistor 33, the 5th transistor 35, the 6th transistor 36 and the 7th transistor 37Grid length it is shorter.
In addition, in the present embodiment, the 3rd transistor 33, the 5th transistor 35, the 6th transistor 36 and the 7th transistor 37Vertical view when channel formation region the 1st transistor 31 of area ratio and the 4th transistor 34 vertical view when channel formation regionArea it is small.The area of the gate electrode of the area and relative configuration of the channel formation region of transistor, i.e., overlook when gridLength and the product of grid width are roughly equal.
3rd transistor 33 of N-type and the grid width of the 7th transistor 37 are W3=W7=0.5 micron (μm), the 5th of p-type theThe grid width of transistor 35 and the 6th transistor 36 is W5=W6=0.75 micron (μm).Therefore, the 3rd transistor the 33 and the 7th is brilliantThe area of the channel formation region of body pipe 37 be the every square micron of 0.5 × 0.5=0.25 (μm2), the 5th transistor the 35 and the 6th is brilliantThe area of the channel formation region of body pipe 36 be the every square micron of 0.5 × 0.75=0.375 (μm2)。
As described above, the grid width of the 1st transistor 31 is W1=1.0 microns (μm), therefore, the ditch of the 1st transistor 31The area of road forming region be the every square micron of 0.75 × 1.0=0.75 (μm2).In addition, the grid width of the 4th transistor 34 isW4=1.25 microns (μm), therefore, the area of the channel formation region of the 4th transistor 34 is that 0.75 × 1.25=0.9375 is often put downSquare micron (μm2).Therefore, the channel formation region of the 3rd transistor 33, the 5th transistor 35, the 6th transistor 36 and the 7th transistor 37The area in domain is smaller.
In this way, in the present embodiment, passing through the channel shape for the transistor 33,35,36,37 for making storage circuit 60 be includedIt is less than the area of the channel formation region of the transistor 31,34 configured in series with light-emitting component 20 at the area in region, it canStorage circuit 60 is miniaturize and carries out high speed motion, also, light-emitting component 20 is made to shine with high brightness.
" driving method of pixel circuit "
Then, referring to Fig. 9, the driving method of the pixel circuit in the electro-optical device 10 of present embodiment is illustrated.Fig. 9 is the figure for illustrating the driving method of pixel circuit of present embodiment.In Fig. 9, horizontal axis is time shaft, during having the 1stDuring (non-display period) and the 2nd (during display).P1 shown in Fig. 7 (P1-1~P1-6) is equivalent to during 1st.During 2ndIt is equivalent to P2 shown in Fig. 7 (P2-1~P2-6).
In the longitudinal axis of Fig. 9,1~Scan of Scan M indicate in M articles of scan line 42 (referring to Fig. 5) from the 1st to MThe scanning signal that capable each scan line 42 supplies.Scanning signal has scanning signal (selection signal) He Feixuan under selection stateSelect the scanning signal (non-select signal) under state.In addition, Enb indicates the control signal to control line 44 (referring to Fig. 5) supply.It controls signal and includes control signal (the inactive letter under the control signal (activation signal) and unactivated state under state of activationNumber).
As referring to illustrated by Fig. 7, it will show that 1 (F) of an image is divided into multiple subfields (SF), in each sonAfter terminating in field (SF) comprising the 1st period (non-display period) and the 1st period during the 2nd of beginning (during display).1st phaseBetween (non-display period) be signal address period, to each pixel circuit 41 (referring to Fig. 5) positioned at display area E within this periodStorage circuit 60 (referring to Fig. 8) write-in picture signal.(during display) is in each pixel for being located at display area E during 2ndDuring light-emitting component 20 (referring to Fig. 8) can shine in circuit 41.
As shown in figure 9, in the electro-optical device 10 of present embodiment, during the 1st (non-display period) to whole controlsLine 44 supplies inactive signal as control signal.When supplying inactive signal to control line 44, due to the 4th transistor 34(referring to Fig. 8) becomes off state, so, light-emitting component 20 is not send out in whole pixel circuits 41 positioned at display area EThe state of light.
Moreover, in each subfield (SF), making to the arbitrary scan line of scan line 42 supply selection signal during the 1stFor scanning signal.When supplying selection signal to scan line 42, the 2nd transistor 32 and complementation in selected pixel circuit 412nd transistor 38 becomes on state (referring to Fig. 8).As a result, in selected pixel circuit 41, from signal wire 43 and complementationPicture signal is written to storage circuit 60 in signal wire 45 (referring to Fig. 8).In this way, depositing to each pixel circuit 41 in during the 1stStorage road 60 is written picture signal and is stored.
Control signal is used as to whole control lines 44 supply activation signal in (during display) during the 2nd.When to controlWhen line 44 supplies activation signal, since the 4th transistor 34 is on state, so, in whole pixels electricity positioned at display area ELight-emitting component 20 is the state that can be shone in road 41.Become the 2nd transistor 32 to the supply of whole scan lines 42 in during the 2ndThe non-select signal of off state is as scanning signal.As a result, in the storage circuit 60 of each pixel circuit 41, in the subfield(SF) picture signal being written in is kept.
In this way, in the present embodiment, due to can be to (non-display period) and the 2nd period during the 1st (during display)It is independently controlled, thus it is possible to shown based on the gray scale that digital time-division drives.In addition, as a result, it is possible to make for the 2nd phaseBetween it is shorter than during the 1st, therefore, can be realized the display of higher gray scale.
Further, it is possible to share the control signal supplied to control line 44, therefore, electro-optical device in multiple pixel circuits 4110 driving becomes easy.Specifically, in the case where not having the digital drive of the 1st period, to make ratio during shiningIt is short during having selected one of all scan lines 42 vertical, need extremely complex driving.In contrast, in present embodimentIn, due to sharing the control signal supplied to control line 44 in multiple pixel circuits 41, so, even if there is the period ratio that shinesShort subfield (SF) during having selected one of all scan lines 42 vertical, only by just can during merely shortening the 2ndEasily electro-optical device 10 is driven.
As described above, the structure of pixel circuit 41 according to the present embodiment, may be implemented to show with low-power consumption highThe image of the high quality of resolution ratio and more gray scales simultaneously carries out to higher speed acting the electro-optical device that can get brighter display10。
Hereinafter, the variation of the structure of the pixel circuit of the 1st embodiment of explanation.In the explanation of variation below,Difference from embodiment 1 or above-mentioned variation is illustrated, composition identical with embodiment 1 or above-mentioned variation is wantedElement assigns identical label on attached drawing and the description thereof will be omitted.In addition, the driving method of above-mentioned pixel circuit and 1 phase of embodimentTogether, in the structure of variation below, effect same as Example 1 can also be obtained.
(variation 1)
" structure of pixel circuit "
Firstly, being illustrated to the pixel circuit of the variation 1 of the 1st embodiment.Figure 10 is the pixel for illustrating variation 1The figure of the structure of circuit.As shown in Figure 10, the difference of the pixel circuit 41 of the pixel circuit 41A and embodiment 1 of variation 1It is, the 4th transistor 34A is the transistor of N-type and configures the other structures phase between light-emitting component 20 and the 1st transistor 31Together.
The pixel circuit 41A of variation 1 include light-emitting component 20, the 4th transistor 34A of N-type, N-type the 1st transistor31, storage circuit 60, the 2nd transistor 32 of N-type and N-type the 2nd transistor 38 of complementation.The anode 21 and the 3rd of light-emitting component 20Equipotential line (the 2nd high potential line 49) electrical connection, the cathode 23 of light-emitting component 20 are electrically connected with the drain electrode of the 4th transistor 34A.
The source electrode of 4th transistor 34A is electrically connected with the drain electrode of the 1st transistor 31.The source electrode of 1st transistor 31 and the 2nd electricityBit line (low potential line 46) electrical connection.Therefore, in the pixel circuit 41A of variation 1, low potential side is being leaned on than light-emitting component 20Position at be configured with the 4th transistor 34A of N-type, at than position of the 4th transistor 34A by low potential side configured with N-type1st transistor 31.
In variation 1, the 4th transistor 34A is N-type, and therefore, inactive signal is set to than the 4th transistor 34A'sThe low current potential of source potential, preferably the 2nd current potential (V2).Alternatively, activation signal is set to the source electrode than the 4th transistor 34AThe high current potential of current potential, preferably the 3rd current potential (V3).
The 1st transistor 31 is configured between the 4th transistor 34A and the 2nd equipotential line (low potential line 46).Therefore, the 1stTransistor 31 is on state and makes the 4th transistor 34A when being also on state, and the source potential of the 4th transistor 34A is slightly highIn the 2nd current potential (V2).But the source potential of the 1st transistor 31 is fixed as the 2nd current potential (V2), can make the 1st transistor 31 intoTherefore row line movement can make the source potential of the 4th transistor 34A and the 2nd current potential (V2) roughly equal.
When supplying the inactive signal of the 2nd current potential (V2) from control line 44 to the 4th transistor 34A, the 4th transistor 34AGate-source voltage Vgs4Substantially 0V.As the threshold voltage V of the 4th transistor 34A using N-typeth4(as an example, Vth4=When 0.36V), the gate-source voltage V of the 4th transistor 34gs4Than threshold voltage Vth4Small, therefore, the 4th transistor 34A, which becomes, to be cutOnly state.Therefore, when controlling signal is inactive signal, the 4th transistor 34A off state can reliably be made.
When supplying the activation signal of the 3rd current potential (V3) from control line 44, the gate-source voltage V of the 4th transistor 34Ags4It is roughly equal relative to the potential difference (V3-V2=7.0V-0V=7.0V) of the 2nd current potential (V2) with the 3rd current potential (V3).Therefore, the 4thThe gate-source voltage V of transistor 34Ags4Sufficiently above threshold voltage Vth4, therefore, when controlling signal is activation signal, energyIt is enough reliably to make the 4th transistor 34A on state and carry out line movement.
When the 1st transistor 31 and the 4th transistor 34A become on state, from the 3rd equipotential line (the 2nd high potential line 49)Become via the path that light-emitting component 20, the 4th transistor 34A and the 1st transistor 31 reach the 2nd equipotential line (low potential line 46) and leadsLogical state, flows through electric current in light-emitting component 20.Moreover, the 1st transistor 31 and can be made when making light-emitting component 20 shine4 transistor 34A carry out line movement, therefore, be not easily susceptible to two transistors 31,34A threshold voltage deviation influence.ThisOutside, as a result, in the pixel circuit 41A of variation 1, since the high voltage of V3-V2=7.0V can be applied to light-emitting component 20Major part therefore can be improved brightness when light-emitting component 20 shines.
(variation 2)
Next, being illustrated to the pixel circuit of the variation 2 of the 1st embodiment.Figure 11 is the picture for illustrating variation 2The figure of the structure of plain circuit.As shown in figure 11, the difference of the pixel circuit 41A of the pixel circuit 41B and variation 1 of variation 2Place is that by the configuration of the 1st transistor 31 between light-emitting component 20 and the 4th transistor 34A, other structures are identical.
The pixel circuit 41B of variation 2 include light-emitting component 20, the 1st transistor 31 of N-type, N-type the 4th transistor34A, storage circuit 60, the 2nd transistor 32 of N-type and N-type the 2nd transistor 38 of complementation.The anode 21 and the 3rd of light-emitting component 20Equipotential line (the 2nd high potential line 49) electrical connection, the cathode 23 of light-emitting component 20 are electrically connected with the drain electrode of the 1st transistor 31.
The source electrode of 1st transistor 31 is electrically connected with the drain electrode of the 4th transistor 34A.The source electrode of 4th transistor 34A and the 2nd electricityBit line (low potential line 46) electrical connection.Therefore, in the pixel circuit 41B of variation 2, low potential side is being leaned on than light-emitting component 20Position at be configured with the 1st transistor 31 of N-type, at than position of the 1st transistor 31 by low potential side configured with N-type the4 transistor 34A.
In variation 2, the source electrode of the 4th transistor 34A is electrically connected with the 2nd equipotential line (low potential line 46), therefore, works as hairWhen optical element 20 shines, i.e., to control line 44 supply the 3rd current potential (V3) activation signal when, the gate source of the 4th transistor 34APole tension VgsPotential difference (the V on the basis of the 2nd current potential (V2) as the 3rd current potential (V3)gs4=V3-V2=7.0V).Therefore,The 4th transistor 34A on state can reliably be made and carry out line movement.
In variation 2, the 4th transistor is configured between the 1st transistor 31 and the 2nd equipotential line (low potential line 46)34A, therefore, when the 4th transistor 34A becomes on state and the 1st transistor 31 is made also to become on state, the 1st transistor31 source potential is higher than the 2nd current potential (V2).But the source potential of the 4th transistor 34A is fixed as the 2nd current potential (V2), it canThe 4th transistor 34A is set to carry out line movement, therefore, the source potential that can make the 1st transistor 31 and the 2nd current potential (V2) are substantiallyIt is equal.
Therefore, when the current potential of the output terminal 27 of storage circuit 60 is "high" (the 1st current potential), the grid of the 1st transistor 31Pole source voltage Vgs1It is roughly equal relative to the potential difference (V1-V2=3.0V) of the 2nd current potential (V2) with the 1st current potential (V1), it is greater thanThreshold voltage (the V of 1st transistor 31th1=0.36V), therefore, can reliably make 31 on state of the 1st transistor and intoRow line movement.
In the pixel circuit 41B of variation 2, when making light-emitting component 20 shine, the 1st transistor 31 and the 4th can be madeTransistor 34A carry out line movement, therefore, be not easily susceptible to two transistors 31,34A threshold voltage deviation influence.ThisOutside, as a result, due to can to light-emitting component 20 apply V3-V2=7.0V high voltage major part, can be improved luminousBrightness when element 20 shines.
(variation 3)
Next, being illustrated to the pixel circuit of the variation 3 of the 1st embodiment.Figure 12 is the picture for illustrating variation 3The figure of the structure of plain circuit.As shown in figure 12, the pixel circuit 41C Yu above-described embodiment 1 of variation 3 and the difference of variationPlace is do not have the 4th transistor 34 (or the 4th transistor 34A), other structures are identical.
The pixel circuit 41C of variation 3 includes light-emitting component 20, the 1st transistor 31 of N-type, storage circuit 60, N-typeThe 2nd transistor 38 of complementation of 2nd transistor 32 and N-type.The anode 21 of light-emitting component 20 and the 3rd equipotential line (the 2nd high potential line49) it is electrically connected, the cathode 23 of light-emitting component 20 is electrically connected with the drain electrode of the 1st transistor 31.The source electrode and the 2nd of 1st transistor 31Equipotential line (low potential line 46) electrical connection.
In the pixel circuit 41C of variation 3, in the 3rd equipotential line (the 2nd high potential line 49) and the 2nd equipotential line (low potentialLine 46) between in series be configured with light-emitting component 20 and the 1st transistor 31.It is in the current potential of the output terminal 27 of storage circuit 60"high" (the 1st current potential) and make the 1st transistor 31 become on state when, light-emitting component 20 shine.When light-emitting component 20 shines,The source potential of 1st transistor 31 is fixed as the 2nd current potential (V2), the 1st transistor 31 can be made to carry out line movement, therefore, noThe influence of the deviation of threshold voltage vulnerable to the 1st transistor 31.Thereby, it is possible to apply V3-V2=7.0V to light-emitting component 20The major part of high voltage therefore can be improved brightness when light-emitting component 20 shines.
In addition, the quantity of wiring therefore can be reduced without control line 44 in the pixel circuit 41C of variation 3, becauseThis, can also reduce the quantity of wiring layer.In general, forming each cloth across interlayer insulating film when the quantity of wiring layer is moreLine layer, accordingly, it is possible to lead to the reduction of the increase of the manufacturing effort of electro-optical device (device substrate), manufacturing yield.According to changeThe structure of shape example 3 is also able to carry out the image based on digital drive and shows even if the negligible amounts of wiring layer.Therefore, with it is above-mentionedEmbodiment 1, variation are compared, and can be realized the reduction of manufacturing effort, the raising of fabrication yield.In addition, having light-proofnessWiring quantity reduce, thereby, it is possible to reduce lightproof area, can be realized high resolution (miniaturization of pixel).
(the 2nd embodiment)
Then, the structure of the electro-optical device of the 2nd embodiment is illustrated.The electro-optical device and the 1st of 2nd embodimentThe electro-optical device 10 of embodiment the difference is that, the 1st transistor and the 2nd transistor are p-type, and the 2nd current potential (V2) is higher than1st current potential (V1) and the 3rd current potential (V3).Be accompanied by this, the structure of the pixel circuit of the 2nd embodiment also with the 1st embodimentPixel circuit structure it is different.Figure 13 is the circuit block diagram of the electro-optical device of the 2nd embodiment of the invention.Figure 14 is explanationThe figure of the structure of the pixel of 2nd embodiment of the invention.As shown in Figure 13 and Figure 14, in the electro-optical device of present embodiment 10In, the 1st low potential VSS1, the 2nd low potential VSS2 and high potential VDD, the 1st low potential VSS1, the 2nd low electricity are supplied to driving portion 50Position VSS2 and high potential VDD is fed into pixel circuit 71.
Hereinafter, being illustrated by taking embodiment and multiple variations as an example to the structure of the pixel circuit of the 2nd embodiment.In addition, in the explanation of embodiment below and variation, to the embodiment 1 or variation difference with the 1st embodimentIt is illustrated, assigns identical label in the accompanying drawings to constituent element identical with the embodiment 1 of the 1st embodiment or variationAnd the description thereof will be omitted.
(embodiment 2)
" structure of pixel circuit "
Firstly, referring to Fig.1 5, the structure of the pixel circuit of the embodiment 2 of the 2nd embodiment is illustrated.Figure 15 is to sayThe figure of the structure of the pixel circuit of bright embodiment 2.As shown in figure 15, the pixel circuit 71 of embodiment 2 includes the 1st crystal of p-typeThe 4th transistor 34A, storage circuit 60, the 2nd transistor 32A of p-type and the complementation the 2nd of p-type of pipe 31A, light-emitting component 20, N-typeTransistor 38A.
In addition, relative to the 1st embodiment, being exchanged in the 2nd embodiment (embodiment 2 and variation below)High potential and low potential.Specifically, the 1st current potential (V1) is the 1st low potential VSS1 (such as V1=VSS1=4.0V), the 2nd electricityPosition (V2) is high potential VDD (such as V2=VDD=7.0V), and the 3rd current potential (V3) is the 2nd low potential VSS2 (such as V3=VSS2=0V).Therefore, the 1st current potential is lower than the 2nd current potential, and the 3rd current potential is lower than the 1st current potential.
In the present embodiment, low-voltage is constituted by the 1st current potential (the 1st low potential VSS1) and the 2nd current potential (high potential VDD)System power supply constitutes high-voltage system power supply by the 3rd current potential (the 2nd low potential VSS2) and the 2nd current potential (high potential VDD).2nd electricityPosition is the current potential in low-voltage system power supply and high-voltage system power supply as benchmark.
In addition, in the 2nd embodiment (embodiment 2 and variation below), from the 1st low electricity as the 1st equipotential lineBit line 46 supplies the 1st current potential (VSS1) to each pixel circuit 71, from the high potential line 47 as the 2nd equipotential line to each pixel circuit71 the 2nd current potentials (VDD) of supply, the 3rd current potential is supplied from the 2nd low potential line 48 as the 3rd equipotential line to each pixel circuit 71(VSS2)。
In example 2, the 1st transistor 31A, light-emitting component 20 and the 4th transistor 34A are configured in series in the 2nd current potentialBetween line (high potential line 47) and the 3rd equipotential line (the 2nd low potential line 48).In a same manner as in the first embodiment, storage circuit 60 configuresBetween the 1st equipotential line (the 1st low potential line 46) and the 2nd equipotential line (high potential line 47).2nd transistor 32A configuration is storingBetween circuit 60 and signal wire 43.The 2nd transistor 38A of complementation is configured between storage circuit 60 and complementary signal line 45.
The output terminal 27 of 2nd phase inverter 62 of the grid and storage circuit 60 of the 1st transistor 31A is electrically connected.1st crystalThe source electrode of pipe 31A is electrically connected with the 2nd equipotential line (high potential line 47).The drain electrode of 1st transistor 31A and the anode of light-emitting component 2021 electrical connections.The grid of 4th transistor 34A is electrically connected with control line 44.The source electrode and the 3rd equipotential line the (the 2nd of 4th transistor 34ALow potential line 48) electrical connection.The drain electrode of 4th transistor 34A is electrically connected with the cathode 23 of light-emitting component 20.
In the pixel circuit 71 of embodiment 2, the polarity of the 1st transistor 31A and the 4th transistor 34A are opposite.The 1st of p-typeTransistor 31A configuration is configured in the position for leaning on hot side than light-emitting component 20, the 4th transistor 34A of N-type than light-emitting component20 lean on the position of low potential side.When the 4th transistor 34A and the 1st transistor 31A becomes on state, light-emitting component 20 can be sent outLight.When the 1st transistor 31A and the 4th transistor 34 become on state, from the 2nd equipotential line (high potential line 47) via the 1st crystalline substanceThe path that body pipe 31A, light-emitting component 20 and the 4th transistor 34A reach the 3rd equipotential line (the 2nd low potential line 48) becomes conducting shapeState flows through electric current in light-emitting component 20.
In the 2nd embodiment (embodiment 2 and variation below), storage circuit 60 the 1st phase inverter 61 it is defeatedUnder the case where current potential of terminal 25 is "high" out (the case where current potential of the output terminal 27 of the 2nd phase inverter 62 is " low "), shineElement 20 becomes the state that can be shone, (the 2nd phase inverter the case where current potential of the output terminal 25 of the 1st phase inverter 61 is " low "The case where current potential of 62 output terminal 27 is "high") under, light-emitting component 20 does not shine.
" relationship of the threshold voltage of each current potential and transistor "
In the 2nd embodiment (embodiment 2 and variation below), also by the 1st current potential (V1) and the 2nd current potential (V2) structureAt low-voltage system power supply, high-voltage system power supply is constituted by the 3rd current potential (V3) and the 2nd current potential (V2).2nd current potential (V2) is oppositeIn the voltage as low-voltage system power supply the 1st current potential (V1) potential difference (V2-V1=7.0V-4.0V=3.0V) less thanPotential difference (V2-V3=7.0V-0V=of 2 current potentials (V2) relative to the 3rd current potential (V3) of the voltage as high-voltage system power supply7.0V)(V2-V1<V2-V3)。
In the 2nd embodiment, using low-voltage system power supply with the low-voltage of V2-V1=3.0V to driving circuit 51,Storage circuit 60 is driven, and therefore, driving circuit 51, storage circuit 60 can be made to act at high speed.Moreover, utilizing high voltageSystem power supply makes light-emitting component 20 shine with the high voltage of V2-V3=7.0V, therefore, light-emitting component 20 can be made with higher brightDegree shines.Also, by moving the 1st transistor 31A, the 4th transistor 34A that configure in series with light-emitting component 20 linearlyMake, therefore the major part for the high voltage that can apply V2-V3=7.0V to light-emitting component 20 can more improve light-emitting component20 it is luminous when brightness.
In the 2nd embodiment, 2 phase inverters 61,62 for constituting storage circuit 60 are configured in the 1st equipotential line (the 1st low electricityBit line 46) and the 2nd equipotential line (high potential line 47) between, supply the VSS1 and work as the 1st current potential to 2 phase inverters 61,62For the VDD of the 2nd current potential.Therefore, " low " is equivalent to the 1st current potential (VSS1), and "high" is equivalent to the 2nd current potential (VDD).
In the present embodiment, the threshold voltage (V as the 1st transistor 31A of driving transistorth1) be negative (Vth1<0).When the picture signal that storage circuit 60 is stored is equivalent to non-luminescent, the current potential of the output terminal 27 of storage circuit 60 is"high" (the 2nd current potential).The source electrode of 1st transistor 31A is connect with the 2nd equipotential line (high potential line 47), therefore, source potential2 current potentials (VDD), the gate-source voltage V of the 1st transistor 31Ags1For 0V.
Therefore, as gate-source voltage Vgs1Threshold voltage V relative to the 1st transistor 31Ath1(as an example, Vth1=-0.36V) be 0V when, gate-source voltage Vgs1Greater than threshold voltage Vth1, therefore, the 1st transistor 31A becomes off state.ByThis can make the 1st transistor 31A reliably become off state when picture signal does not shine.
When the picture signal that storage circuit 60 is stored is equivalent to luminous, the current potential of the output terminal 27 of storage circuit 60For " low " (the 1st current potential).The source potential of 1st transistor 31A is the 2nd current potential, therefore, the gate-source electricity of the 1st transistor 31APress Vgs1Potential difference (V for the 1st current potential (V1) relative to the 2nd current potential (V2)gs1=V1-V2=4.0V-7.0V=-3.0V).CauseThis, the gate-source voltage V of the 1st transistor 31Ags1Less than threshold voltage Vth1, therefore, the 1st transistor 31A becomes conducting shapeState.As a result, in image signal luminescence, the 1st transistor 31A can reliably be made to become on state.
In the 2nd embodiment, inactive signal also is supplied to whole control lines 44 in (non-display period) during the 1stAs control signal, the 4th transistor 34A becomes off state, and therefore, light-emitting component 20 becomes non-light emitting state.Moreover, working asWhen any one scan line in during 1st into scan line 42 supplies selection signal as scanning signal, the selected 2nd is brilliantBody pipe 32A and the 2nd transistor 38A of complementation becomes on state, writes from signal wire 43 and complementary signal line 45 to storage circuit 60Enter picture signal.
Control signal, the 4th transistor are used as to whole control lines 44 supply activation signal in (during display) during the 2nd34A becomes on state, and therefore, light-emitting component 20 is can luminance.Make the to the supply of whole scan lines 42 in during the 2nd2 transistor 32A are the non-select signal of off state as scanning signal.In this way, in the 2nd embodiment, due to can be rightIt is independently controlled (during display) during (non-display period) and the 2nd during 1st, is driven so being able to carry out based on digital time-divisionDynamic gray scale is shown.
In the 2nd embodiment (embodiment 2), the 4th transistor 34A is N-type, therefore, the control signal under state of activation(activation signal) is high potential, and the control signal (inactive signal) under unactivated state is low potential.Specifically, inactiveSignal is set as the 3rd current potential (V3) low potential below, preferably the 3rd current potential (V3).In addition, activation signal is set as V3+(V2-V1) high potential more than, preferably the 2nd current potential (V2).
When supplying the inactive signal of the 3rd current potential (V3) from control line 44 to the grid of the 4th transistor 34A, the 4th crystalThe source potential and grid potential of pipe 34A becomes the 3rd current potential (V3), therefore, the gate-source voltage V of the 4th transistor 34Ags4As 0V.As the threshold voltage V of the 4th transistor 34A using N-typeth4(as an example, Vth4=0.36V) when, the 4th transistorThe gate-source voltage V of 34Ags4Than threshold voltage Vth4Small, therefore, the 4th transistor 34A becomes off state.Therefore, it is controllingWhen signal is inactive signal, it can reliably make the 4th transistor 34A off state.
When more than the supply of control line 44 V3+ (V2-V1), i.e. the activation of the current potential of 0V+ (7.0V-4.0V)=3.0V or moreWhen signal, the gate-source voltage V of the 4th transistor 34Ags4For 3.0-0V=3.0V or more.Therefore, the grid of the 4th transistor 34APole source voltage Vgs4Sufficiently above threshold voltage Vth4, therefore, when controlling signal is activation signal, can reliably make the 4thTransistor 34A is on state.
Moreover, more improving the current potential of activation signal, the gate-source voltage V of the 4th transistor 34Ags4More increase.If setThe current potential of activation signal is the 2nd current potential (V2), then the gate-source voltage V of the 4th transistor 34Ags4For V2-V3=7.0V-0V=The conducting resistance decline of 7.0V, the 4th transistor 34A under on state, therefore, when making light-emitting component 20 shine, not vulnerable toTo the influence of the deviation of the threshold voltage of the 4th transistor 34A.
In addition, when supplying non-select signal as scanning signal from the scan line 42 being electrically connected with grid, it is alternatively that brilliant2nd transistor 32A of body pipe becomes off state, when supplying selection signal, it is alternatively that the 2nd transistor 32A of transistorAs on state.In the 2nd embodiment, the 2nd transistor 32A is p-type, therefore, as described above, non-select signal is set asHigh potential more than 2nd current potential (V2), preferably the 2nd current potential (V2).In addition, selection signal is set as the 1st current potential (V1) belowLow potential, preferably the 3rd current potential (V3).
In the 2nd embodiment, it is preferred that the polarity of the 1st transistor 31A and the 2nd transistor 32A is identical.It is real the 2ndIt applies in mode, the 1st transistor 31A and the 2nd transistor 32A are p-type.Therefore, in the current potential of the picture signal supplied to gridWhen for " low ", the 1st transistor 31A becomes on state, when the scanning signal supplied to grid is selection signal (" low "), the2 transistor 32A become on state.The " low " of picture signal is the 1st current potential (V1), but selection signal (" low ") is set as the 1stCurrent potential (V1) is hereinafter, preferably the 3rd current potential (V3).
The current potential for setting selection signal is rewritten as the 3rd current potential (V3), by the picture signal of storage circuit 60 from "high"The case where " low ", is illustrated.Before rewriting picture signal, it is electrically connected with a side of the source drain of the 2nd transistor 32AThe input terminal 28 (output terminal 25 of the=the 1 phase inverter 61) of 2nd phase inverter 62 is the 2nd current potential (V2) of "high".When from sweepingWhen retouching selection signal of the line 42 to the grid of the 2nd transistor 32A the 3rd current potential (V3) of supply, the gate-source of the 2nd transistor 32AVoltage Vgs2As V3-V2=0V-7.0V=-7.0V, lower than the threshold voltage V of the 2nd transistor 32Ath2(as an example, Vth2=-0.36V), therefore, the 2nd transistor 32A becomes on state.
By by the picture signal of " low " (V1) from 43 write storage circuit 60 of signal wire, the input terminal of the 2nd phase inverter 62The current potential of son 28 gradually decreases down " low " (V1) from "high" (V2), but is accompanied by this, the gate-source voltage of the 2nd transistor 32AVgs2Absolute value gradually decrease to V3-V1=0V-4.0V=-4.0V.Even if the gate-source voltage V of the 2nd transistor 32Ags2As highest (close to zero) -4.0V, gate-source voltage Vgs2Also than the threshold voltage V of the 2nd transistor 32Ath2It is substantially low.CauseThis, maintains the lower state of conducting resistance of the 2nd transistor 32A until by picture signal write storage circuit 60, therefore, canPicture signal is reliably written storage circuit 60.
Here, suppose that the 2nd transistor 32A is the polarity N-type (be set as 2nd transistor 32) opposite with the 1st transistor 31ASituation.In this case, when selection signal is "high", the 2nd transistor 32 becomes on state.When the current potential for setting selection signalFor the 2nd current potential (V2), the picture signal of storage circuit 60 is rewritten as "high" from " low " in the case where, from the supply of scan line 42 theWhen the selection signal of 2 current potentials (V2), the gate-source voltage V of the 2nd transistor 32gs2It is high for V2-V1=7.0V-4.0V=3.0VIn the threshold voltage V of the 2nd transistor 32th2(as an example, Vth2=0.36V), therefore, the 2nd transistor 32 becomes on state.
By the way that the picture signal of "high" (V2), the input terminal of the 2nd phase inverter 62 are written from signal wire 43 to storage circuit 60The current potential of son 28 is gradually increasing from " low " (V1), is accompanied by this, the gate-source voltage V of the 2nd transistor 32gs2Gradually from 3.0VDecline reaches the threshold voltage V of the 2nd transistor 32 of N-type before the current potential of input terminal 28 is the 2nd current potential (V2)th2(exampleSuch as 0.36V), the 2nd transistor 32 becomes off state.
In addition, before the 2nd transistor 32 becomes off state, with gate-source voltage Vgs2Decline and close to threshold valueVoltage Vth2, the conducting resistance of the 2nd transistor 32 rises, therefore, is spent to the rewriting of the picture signal of storage circuit 60 time,Or rewrite failure.It is more low potential by the potential setting of selection signal in order to avoid the problem, but in this case,Also need the equipotential line different from existing current potential.
As in the present embodiment, when the 1st transistor 31A and the 2nd transistor 32A are the identical polar of p-type, pass throughMake the 3rd current potential minimum between the 3rd current potential of current potential of selection signal and the 2nd current potential, new equipotential line can be not provided withIn the case of set.Moreover, make the 2nd transistor 32A on state and when picture signal is written to storage circuit 60, Neng GouzengThe gate-source voltage V of big 2nd transistor 32Ags2, therefore, though source potential due to picture signal write-in and rise,Can the conducting resistance of the 2nd transistor 32A be maintained lower.Thereby, it is possible to high speed and reliably carry out to storage circuit 60Picture signal write-in, rewrite.
Therefore, according to the structure of the pixel circuit 71 of the embodiment 2 of the 2nd embodiment, may be implemented can be with low-power consumptionAct and can get to the image of the high quality of display of high resolution and more gray scales and higher speed the electric light of brighter displayDevice 10.
Hereinafter, the variation of the structure of the pixel circuit of the 2nd embodiment of explanation.In the explanation of variation below,Difference with embodiment 2 or above-mentioned variation is illustrated, to composition identical with embodiment 2 or above-mentioned variationElement, assigns identical label on attached drawing and the description thereof will be omitted.
(variation 4)
Next, the pixel circuit of the variation (variation 4) of the 2nd embodiment of explanation.Figure 16 illustrates variation 4The figure of the structure of pixel circuit.As shown in figure 16, the difference of the pixel circuit 71 of the pixel circuit 71A and embodiment 2 of variation 4Place is that the 4th transistor 34 is p-type, configures between the 1st transistor 31A and light-emitting component 20, other structures are identical.
The pixel circuit 71A of variation 4 includes the 4th transistor 34, the light-emitting component of the 1st transistor 31A of p-type, p-type20, storage circuit 60, the 2nd transistor 32A of p-type and p-type the 2nd transistor 38A of complementation.The drain electrode of 1st transistor 31A and theThe source electrode of 4 transistors 34 is electrically connected.The drain electrode of 4th transistor 34 is electrically connected with the anode 21 of light-emitting component 20.That is, in variationIn 4 pixel circuit 71A, the configuration of the 4th transistor 34 of p-type is in the position for leaning on hot side than light-emitting component 20, and the 1st of p-type theTransistor 31A configuration is in the position for leaning on hot side than the 4th transistor 34.
In variation 4, the 4th transistor 34 is p-type, therefore, if the current potential of inactive signal is the 2nd current potential of high potential(V2), the current potential of activation signal is the 3rd current potential (V3) of low potential.When to control line 44 supply activation signal and make the 4th crystalWhen the grid potential of pipe 34 becomes current potential identical with the 3rd current potential, the 4th transistor 34 becomes on state.When the 1st transistorWhen 31A and the 4th transistor 34 become on state, from the 2nd equipotential line (high potential line 47) via the 1st transistor 31A, the 4th crystalline substanceThe path that body pipe 34 and light-emitting component 20 reach the 3rd equipotential line (the 2nd low potential line 48) becomes on state, in light-emitting component 20In flow through electric current.
In variation 4, the 1st transistor 31A is configured between the 4th transistor 34 and the 2nd equipotential line (high potential line 47).Therefore, when the 4th transistor 34 becomes on state, the source potential of the 4th transistor 34 is slightly lower than the 2nd current potential (V2).ButIt is that, by making the 1st transistor 31A carry out line movement, the source potential of the 4th transistor 34 and the 2nd current potential substantially phase can be madeDeng.
Therefore, the gate-source voltage V of the 4th transistor 34gs4Current potential with the 3rd current potential (V3) relative to the 2nd current potential (V2)Poor (V3-V2=-7.0V) is roughly equal, less than the threshold voltage V of the 4th transistor 34 of p-typeth4(Vth4=-0.36V), therefore,4th transistor 34 reliably becomes on state.Moreover, the gate-source voltage V of the 4th transistor 34 under on stategs4FarMuch smaller than threshold voltage Vth4, therefore, the 4th transistor 34 can be made to carry out line movement.
(variation 5)
Next, the pixel circuit of the variation (variation 5) of the 2nd embodiment of explanation.Figure 17 illustrates variation 5The figure of the structure of pixel circuit.As shown in figure 17, the pixel circuit 71A of the pixel circuit 71B of variation 5 and variation 4 is notIt is with place, the 1st transistor 31A is configured between the 4th transistor 34 and light-emitting component 20, and other structures are identical.
The pixel circuit 71B of variation 5 includes the 1st transistor 31A, the light-emitting component of the 4th transistor 34 of p-type, p-type20, storage circuit 60, the 2nd transistor 32A of p-type and p-type the 2nd transistor 38A of complementation.The source electrode and the 2nd of 4th transistor 34Equipotential line (high potential line 47) electrical connection.The source electrode of 1st transistor 31A is electrically connected with the drain electrode of the 4th transistor 34, the 1st crystalThe drain electrode of pipe 31A is electrically connected with the anode 21 of light-emitting component 20.That is, the 1st of p-type is brilliant in the pixel circuit 71B of variation 5Body pipe 31A configuration is configured in the position for leaning on hot side than light-emitting component 20, the 4th transistor 34 of p-type than the 1st transistor31A leans on the position of hot side.
In variation 5, the 4th transistor is configured between the 1st transistor 31A and the 2nd equipotential line (high potential line 47)34.Therefore, when the 1st transistor 31A becomes on state, the source potential of the 1st transistor 31A is slightly lower than the 2nd current potential(V2).But by making the 4th transistor 34 carry out line movement, the source potential and the 2nd current potential of the 1st transistor 31A can be madeIt is roughly equal.Therefore, the gate-source voltage V of the 1st transistor 31Ags1Electricity with the 1st current potential (V1) relative to the 2nd current potential (V2)Potential difference (V1-V2=-3V) is roughly equal, therefore, the 1st transistor 31A can be made reliably to become on state and carried out linearMovement.
(variation 6)
Next, the pixel circuit of the variation (variation 6) of the 2nd embodiment of explanation.Figure 18 illustrates variation 6The figure of the structure of pixel circuit.As shown in figure 18, the pixel circuit 71C Yu above-described embodiment 2 of variation 6 and variation be notIt is do not have the 4th transistor 34 (or the 4th transistor 34A), other structures are identical with place.
The pixel circuit 71C of variation 6 includes light-emitting component 20, the 1st transistor 31A of p-type, storage circuit 60, p-typeThe 2nd transistor 38A of complementation of 2nd transistor 32A and p-type.The source electrode and the 2nd equipotential line (high potential line 47) of 1st transistor 31AElectrical connection, the drain electrode of the 1st transistor 31A are electrically connected with the anode 21 of light-emitting component 20.The cathode 23 of light-emitting component 20 and the 3rd electricityBit line (the 2nd low potential line 48) electrical connection.
In the pixel circuit 71C of variation 6, in the 2nd equipotential line (high potential line 47) and the 3rd equipotential line (the 2nd low potentialLine 48) between in series be configured with the 1st transistor 31A and light-emitting component 20.Therefore, in the output terminal 27 of storage circuit 60When current potential becomes " low " (the 1st current potential), the 1st transistor 31A becomes on state, light-emitting component 20 shines.In variation 6,Also same as above-described embodiment 2 and variation, it can be improved brightness when light-emitting component 20 shines, further, it is possible to substantially arrangeExcept the threshold voltage V of the 1st transistor 31Ath1The deviation of light emission luminance relative to light-emitting component 20.
In addition, the quantity of wiring therefore can be reduced without control line 44 in the pixel circuit 71C of variation 6, becauseThis, can also reduce the quantity of wiring layer.Therefore, compared with above-described embodiment and variation, it can be realized manufacturing effortIt reduces, the raising of fabrication yield.In addition, the quantity of the wiring with light-proofness is reduced, thereby, it is possible to reduce lightproof area,It can be realized high resolution (miniaturization of pixel).
(the 3rd embodiment)
Then, illustrate the structure of the electro-optical device of the 3rd embodiment.Figure 19 is the electric light of the 3rd embodiment of the inventionThe circuit block diagram of device.Figure 20 is the figure for illustrating the structure of pixel of the 3rd embodiment of the invention.Figure 21 is to illustrate the present inventionThe 3rd embodiment pixel circuit structure figure.
As shown in figure 19, in the present embodiment, the selection of signal-line driving circuit 53 and scan line 42 is synchronously to N itemSignal wire 43 is supplied respectively to picture signal (Data).But in the present embodiment, with the 1st embodiment, the 2nd embodimentDifference, signal-line driving circuit 53 do not export complementary image signal.Therefore, as shown in figure 20, image is supplied to pixel circuit 81Signal (Data), but complementary image signal is not supplied.It therefore,, will for example, utilizing in pixel circuit 81 as illustrated in Figure 21Picture signal (Data) be supplied to via the 2nd transistor 32A and storage circuit 60 p-type of grid the 1st transistor 31A andThe 4th transistor 34 for controlling the p-type that signal Enb is supplied to grid is controlled to the energization to light-emitting component 20.
In the present embodiment, to supply the 1st low potential VSS1, the 2nd low potential VSS2 and high potential VDD to driving portion 50The 2nd embodiment based on and constitute, but can also with to driving portion 50 supply the 1st high potential VDD1, the 2nd high potential VDD2It is constituted with based on the 1st embodiment of low potential VSS.
Above embodiment (embodiment and variation) only shows one embodiment of the present invention, can be in model of the inventionEnclose interior progress random variation and application.As variation other than the above, for example, it is contemplated that following variation.
(variation 7)
It is configured in the pixel circuit of above embodiment (embodiment and variation), the 1st transistor 31 (or the 1stTransistor 31A) grid be electrically connected with the output terminal 27 of the 2nd phase inverter 62 of storage circuit 60, but the present invention is not limited to thisThe mode of sample.Also the grid of the 1st transistor 31 (or the 1st transistor 31A) and the 1st reverse phase of storage circuit 60 are configured toThe output terminal 25 of device 61 is electrically connected.
(variation 8)
It is configured in the pixel circuit of above embodiment (embodiment and variation), the configuration of the 2nd transistor 32 is being depositedBetween the input terminal 28 (output terminal 25 of the=the 1 phase inverter 61) and signal wire 43 of 2nd phase inverter 62 on storage road 60, mutuallyThe configuration of the 2nd transistor 38 is mended in (the output end of the=the 2 phase inverter 62 of input terminal 26 of the 1st phase inverter 61 of storage circuit 60Son is 27) between complementary signal line 45, but the present invention is not limited to such modes.Also it is configured to, the 2nd transistor 32 is matchedIt sets between the input terminal 26 (output terminal 27 of the=the 2 phase inverter 62) and signal wire 43 of the 1st phase inverter 61, complementation the 2ndTransistor 38 configures the input terminal 28 (output terminal 25 of the=the 1 phase inverter 61) and complementary signal line in the 2nd phase inverter 62Between 45.
(variation 9)
In the pixel circuit of above embodiment (embodiment and variation), storage circuit 60 include 2 phase inverters 61,62, but the present invention is not limited to such modes.Storage circuit 60 is also possible to the knot of the even number of inverters comprising 2 or moreStructure.
(variation 10)
In above embodiment (embodiment and variation), as electro-optical device, (single by single crystalline semiconductor substrateCrystal silicon substrate) constitute device substrate 11 on by 720 row × 3840 (1280 × 3) column in the way of be arranged with by organic EL elementIt is illustrated for the organic el device of the light-emitting component 20 of composition, but electro-optical device of the invention is not limited to such sideFormula.For example, electro-optical device, which can have, is formed with thin film transistor (TFT) (Thin on the device substrate 11 being made of glass substrateFilm Transistor:TFT) structure as each transistor, it is possible to have in the flexible base board being made of polyimides etc.On be formed with the structure of thin film transistor (TFT).In addition, electro-optical device is also possible to micro- light-emitting diode display or quantum dot (QuantumDots) display, wherein micro- light-emitting diode display is to arrange fine LED element to high-density as made of light-emitting component,The quantum dot displays have used the semiconductor crystal substance of nano-scale in light-emitting component.In addition it is also possible to using by instituteIncident light is converted to the quantum dot of the light of other wavelength as colour filter.
(variation 11)
In the above-described embodiment, as electronic equipment, the Clairvoyant type head-mounted display 100 of electro-optical device 10 has been entered with groupFor be illustrated, but electro-optical device 10 of the invention can also apply using enclosed type head-mounted display as representative otherIn electronic equipment.As other electronic equipments, for example, can enumerate projector, rear projection type televisions machine, direct viewing type television set,Mobile phone, personal computer, the monitor of video camera, automobile navigation apparatus, head-up display, is sought portable audio deviceThe wearable devices such as pager, electronic notebook, calculator, wrist-watch, hand-held display device, word processor, work station, video electricityWords, POS terminal, digital still camera, signage display etc..