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CN109616416A - Active switch, manufacturing method thereof and display device - Google Patents

Active switch, manufacturing method thereof and display device
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Publication number
CN109616416A
CN109616416ACN201811542005.1ACN201811542005ACN109616416ACN 109616416 ACN109616416 ACN 109616416ACN 201811542005 ACN201811542005 ACN 201811542005ACN 109616416 ACN109616416 ACN 109616416A
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layer
active
metal layer
etching
active switch
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CN201811542005.1A
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莫琼花
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HKC Co Ltd
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HKC Co Ltd
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Abstract

Translated fromChinese

本申请涉及一种主动开关及其制作方法、显示装置,该主动开关的制作方法包括:提供一基板,并在所述基板上形成栅极;在所述栅极上依次形成栅极绝缘层、有源膜层、掺杂膜层和第二金属层;采用第一次湿法刻蚀工艺对所述第二金属层进行刻蚀以形成第二子金属层;其中,对所述第二金属层的蚀刻时间为55秒‑75秒;采用第一次干法刻蚀工艺对所述有源膜层和掺杂膜层进行刻蚀以形成有源层和掺杂层、同时对所述光刻胶进行灰化;采用第二次湿法刻蚀工艺对所述第二子金属层进行刻蚀以形成源漏极;采用第二次干法刻蚀工艺对所述有源层和掺杂层进行刻蚀以形成沟道区。本申请可有效降低主动开关器件的光漏电流,改善残影现象。

The present application relates to an active switch, a manufacturing method thereof, and a display device. The manufacturing method of the active switch includes: providing a substrate, and forming a gate on the substrate; forming a gate insulating layer, an active film layer, a doped film layer and a second metal layer; the second metal layer is etched by a first wet etching process to form a second sub-metal layer; wherein, the second metal layer is etched The etching time of the layer is 55 seconds-75 seconds; the active film layer and the doped film layer are etched by the first dry etching process to form the active layer and the doped layer, and the light is etched at the same time. ashing the resist; using a second wet etching process to etch the second sub-metal layer to form a source and drain; using a second dry etching process to etch the active layer and doping layer is etched to form a channel region. The present application can effectively reduce the light leakage current of the active switching device and improve the afterimage phenomenon.

Description

Active switch and preparation method thereof, display device
Technical field
This application involves field of display technology, more particularly to a kind of active switch and preparation method thereof, display device.
Background technique
As the working performance to display panel have particularly significant effect switching device, be in display technology one it is non-Want important Primary Component.With display technology iteration develop, higher performance, high image quality and large-sized display device atFor development trend, and directly affect the factor of user's viewing experience and shopping experience.For high-performance, it is desirable to display deviceWith higher performance, require have high performance switching device in display device from one aspect.
And in the processing procedure of general switching device, 5 masking process and 4 masking process can be divided into, 4 masking process are compared5 masking process reduce a photoetching process, can shorten the processing time of switching device, so that relative inexpensiveness, but 4 coverMembrane process is existed due to its special 2W2D (2Wet etching 2dry etching, 2 wet etchings, 2 dry etchings), meetingWhen semiconductor layer and doped layer perform etching, formed biggish Tail (tail), that is, semiconductor layer and doped layerThe part at edge of the edge beyond source-drain electrode, this part directly can contact or be absorbed into the luminous ray of display panel, Jin EryuIt can be seen that light reaction generates light leakage current, thus increases the leakage current of switching device, cause display device when reliability is testedThere is IS (image sticking, ghost) phenomenon in time.
Summary of the invention
Based on this, it is necessary to there are larger Tail (tail) and then be led for using switching device made of 4 masking processThe problem of causing light leakage current to increase provides a kind of active switch and preparation method thereof, display device.
A kind of production method of active switch, the production method of the active switch include:
One substrate is provided, and forms the first metal layer on the substrate, and the first metal layer is patternedProcessing forms grid;
Gate insulating layer, active film layer, doping film layer and second metal layer are sequentially formed on the grid;
It is coated with a layer photoresist in the second metal layer, and patterned process is carried out to the photoresist;
First time wet-etching technology is used to perform etching to form the second sub- metal layer the second metal layer;ItsIn, the etching period to the second metal layer is -75 seconds 55 seconds;
Use first time dry etch process to the active film layer and doping film layer perform etching with formed active layer andDoped layer is simultaneously ashed the photoresist;
Second of wet-etching technology is used to perform etching to form source-drain electrode the described second sub- metal layer;
Second of dry etch process is used to perform etching the active layer and doped layer to form channel region, the ditchRoad area is through the doped layer and is partially through to the active layer.
The edge and the same side of the active layer formed after the first time dry etching in one of the embodiments,The described second sub- metal layer edge distance difference range be 0 micron -1.65 microns.
The edge and the same side of the doped layer formed after the first time dry etching in one of the embodiments,The described second sub- metal layer edge distance difference range be 0 micron -0.4 micron.
The patterned process for forming the grid is etching technics in one of the embodiments, wherein to describedThe etching period of the first metal layer is -120 seconds 100 seconds.
A kind of active switch is manufactured using the production method of the aforementioned active switch, the active switch packetIt includes:
Substrate;
Grid is formed on the substrate;
Gate insulating layer is formed on the substrate, wherein the gate insulating layer covers the grid;
Active layer is formed on the gate insulating layer;
Doped layer is formed on the active layer;And
The source electrode being formed on the doped layer and drain electrode;
Wherein, a channel region is located at the middle part of the doped layer, and the channel region is through the doped layer and partially runs throughTo the active layer, the source electrode and drain electrode are positioned at the two sides of the channel region.
In one of the embodiments, the edge of the source electrode or drain electrode of the edge of the active layer and the same side away fromIt is 0 micron -1.65 microns from difference range.
The edge of the source electrode or drain electrode of the outer ledge of the doped layer and the same side in one of the embodiments,Distance difference range be 0 micron -0.4 micron.
The thickness range of the grid is 3000 angstroms -5000 angstroms in one of the embodiments,.
The thickness range of the source-drain electrode is 3000 angstroms -4500 angstroms in one of the embodiments,.
A kind of display device, including the active switch as described in aforementioned.
The production method of above-mentioned active switch, dry etch process is formed by using wet-etching technology twice and twiceActive switch can shorten the processing time of active switch, and relative inexpensiveness.By control first time wet etching whenIt waits to the etching period of second metal layer between 55 seconds to 75 seconds, i.e., when being performed etching to the two sides of second metal layer,So that the time of lateral erosion is between 55 seconds to 75 seconds, it is possible to increase the area of the second sub- metal layer two sides, it is subsequent with the second interest categoryWhen layer is that etch stop layer performs etching active layer and doped layer, the Tail (tail) of generation will accordingly reduce, fromAnd light leakage current is reduced, increase the stability of switching device, improves display device and IS occur when reliability is tested(image sticking, ghost) phenomenon.
Detailed description of the invention
Fig. 1 is the production method flow chart of the active switch in an embodiment;
Fig. 2 is the structural schematic diagram of the active switch in an embodiment;
Fig. 3 is the structural schematic diagram of the switching device in example technique;
Fig. 4 is the partial enlargement diagram of switching device in Fig. 3;
Fig. 5 is the structural schematic diagram formed according to step S100 in Fig. 1;
Fig. 6 is the structural schematic diagram formed according to step S200 in Fig. 1;
Fig. 7 is the structural schematic diagram formed according to step S300 and S400 in Fig. 1;
Fig. 8 is the structural schematic diagram formed according to step S500 in Fig. 1;
Fig. 9 is the structural schematic diagram formed according to step S600 in Fig. 1;
Figure 10 is the structural schematic diagram formed according to step S700 in Fig. 1;
Figure 11 is the structural schematic diagram of the active switch in another embodiment.
Specific embodiment
The application in order to facilitate understanding is described more fully the application below with reference to relevant drawings.In attached drawingGive the optional embodiment of the application.But the application can realize in many different forms, however it is not limited to thisEmbodiment described in text.On the contrary, the purpose of providing these embodiments is that making to disclosure of this application understandingIt is more thorough and comprehensive.
It should be noted that it can directly on the other element when element is referred to as " being fixed on " another elementOr there may also be elements placed in the middle.When an element is considered as " connection " another element, it, which can be, is directly connected toTo another element or it may be simultaneously present centering elements.Term as used herein " vertical ", " horizontal ", " left side "," right side " and similar statement for illustrative purposes only, are not meant to be the only embodiment.
Unless otherwise defined, all technical and scientific terms used herein and the technical field for belonging to the applicationThe normally understood meaning of technical staff is identical.The term used in the description of the present application is intended merely to description tool hereinThe purpose of the embodiment of body, it is not intended that in limitation the application.
Referring to Fig. 3, for the structural schematic diagram of the switching device in example technique, while assisting refering to Fig. 4, it is Fig. 3The partial enlarged view of middle switching device.In the processing procedure of general switching device, 5 masking process and 4 masking process can be divided into,4 masking process reduce a photoetching process compared to 5 masking process, can shorten the processing time of switching device, so that cost phaseTo cheap.Fig. 3 show the structural schematic diagram for the switching device that example technique is formed using 4 masking process.In Fig. 3, S(Source) indicating that the source electrode of switching device, D (Drain) indicate the drain electrode of switching device, N+ indicates the doped layer of switching device,AS (a-Si:H) indicates that the semiconductor layer (active layer) of switching device, GI (Gate Insulation) indicate the grid of switching devicePole insulating layer, G (Gate) indicate that the grid of switching device, Glass indicate the substrate (substrate) of switching device.4 masking process byIt, can be in semiconductor layer in its special 2W2D (2Wet etching 2dry etching, 2 wet etchings, 2 dry etchings)When performing etching with doped layer, biggish Tail (tail) is formed, can specifically include T and t in Fig. 3, that is,The part at edge of the edge of semiconductor layer and doped layer beyond S/D.Usual T indicates the outer ledge of semiconductor layer and doped layerMarginal portion beyond S/D, t indicate that the inside edge of doped layer exceeds the interior survey marginal portion of S/D.As can be seen that this isIt is illustrated with the Tail of side, the other side also has same Tail.Wherein, t can be defined as N+Tail in substrate.Specifically, referring to Fig. 4, T1 indicates that the outer ledge position of semiconductor layer exceeds the length of source electrode outer ledge position, T2 tableShow that the outer ledge position of doped layer exceeds the length of source electrode outer ledge position, T3 indicates that the inside edge position of doped layer is superThe length of source electrode inside edge position out.Since this three parts directly can contact or be absorbed into the luminous ray of display panel, intoAnd light leakage current is generated with visible light reaction, it thus will increase the leakage current of switching device.Also, it is found through experiments that, withThe length of Tail is longer, and the effect of IS is more bad.So the application wishes to obtain the shorter switching device of Tail.
Specifically, referring to Fig. 1, being the production method flow diagram of the active switch in an embodiment.This is actively openedThe production method of pass may include step: S100-S700.
Step S100 provides a substrate, and forms the first metal layer on the substrate, and to the first metal layer intoRow patterned process forms grid.
Specifically, it please assist refering to Fig. 5, substrate 10 can be glass substrate or plastic base, wherein glass substrate can be withFor no alkali borosilicate ultra-thin glass, no alkali borosilicate glass physical characteristic with higher, preferable corrosion resistance, compared withHigh thermal stability and lower density and higher elasticity modulus.Forming the first metal layer on the substrate 10, (Fig. 5 is not markedShow) it can be rf magnetron sputtering, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.TheOne metal layer (Fig. 5 is not indicated) can be the heap stack combination of one or more of molybdenum, titanium, aluminium and copper.Patterned process canRequired pattern is formed by photoetching treatment to be, that is, grid 20, can also be and grid is formed by wet-etching technology.In this embodiment, grid 20 is formed using wet-etching technology.Wherein, to the first metal layer perform etching whenIt waits, grid 20 can be formed by control etch period.It illustratively, can be 100 to the etch period of the first metal layerBetween second to 120 seconds, optionally, the etch period to the first metal layer is 110 seconds;Optionally, to the etching of the first metal layerTime is 106 seconds;It optionally, is 96 seconds to the etching period of the first metal layer.It is appreciated that " control " be considered as increase orPerson is to reduce, as long as last etch period is between 100 seconds to 120 seconds.By controlling the etching to the first metal layerTime between 100 seconds to 120 seconds, can make the etch quantity to the first metal layer smaller, and then the face of the grid 20 formedProduct is larger, correspondingly, so that it may more block and impinge upon the light of Tail in active layer (t in Fig. 3) above, so as to reduceTail (t in Fig. 3) reacts the leakage current to be formed with light in active layer so that display device reliability test whenIS effect is preferable." reliability " refer in the lab deliberately to some rugged environments of display panel, judges to show with thisThe stability of panel.
Step S200 is sequentially depositing gate insulating layer, active film layer, doping film layer and the second metal on the gridLayer.
Specifically, referring to Fig. 6, gate insulating layer 30, active film layer 40, doping film layer can be sequentially depositing on grid 2050 and second metal layer 60.Wherein, depositing operation may include rf magnetron sputtering, thermal evaporation, vacuum electronic beam evaporation andPlasma reinforced chemical vapour deposition technique.
Step 300, it is coated with a layer photoresist in the second metal layer, and the photoresist is carried out at patterningReason.
Specifically, referring to Fig. 7, one layer of photoresist layer (figure does not indicate) is coated with above second metal layer 60, using togetherLight shield technique is patterned processing to photoresist layer, obtains the photoresist 70 with predetermined pattern.
Step S400 uses first time wet-etching technology to perform etching the second metal layer to form the second interestBelong to layer;It wherein, is -75 seconds 55 seconds to the etching period of the second metal layer.
Specifically, please continue to refer to Fig. 7, first time wet-etching technology is used to perform etching with shape second metal layer 60At the second sub- metal layer 60A.Wherein, when performing etching to second metal layer 60, it can control etch period to be formedSecond sub- metal layer 60A.Illustratively, the etch period of second metal layer can control between 55 seconds to 75 seconds, it is optionalGround, the etch period to second metal layer 60 are 64 seconds;It optionally, is 56 seconds to the etch period of second metal layer 60.It can be withUnderstand, " control ", which is considered as increasing, either to be reduced, as long as last etch period controls within 55 seconds to 75 seconds.By controlling within 55 seconds to 75 seconds when first time wet etching the etching period of second metal layer, i.e., to secondWhen the two sides of metal layer perform etching, so that the time of lateral erosion is within 55 seconds to 75 seconds, it is possible to increase the second sub- metal layerThe area of the two sides 60A so that it is subsequent using the second sub- metal layer 60A as etch stop layer to performing etching when, generationTail (tail) (T in Fig. 3) will accordingly reduce, to reduce light leakage current, increase the stability of switching device, improve aobviousThere is IS phenomenon when reliability is tested in showing device.
Step S500 uses first time dry etch process to perform etching to be formed the active film layer and doping film layerActive layer and doped layer are simultaneously ashed the photoresist.
Specifically, can refer to Fig. 8, can using first time dry etch process to active film layer 40 and doping film layer 50 intoRow etching carries out ashing processing to photoresist 70 to form active layer 40A and doped layer 50A, obtains knot as shown in Figure 8Structure, the ashing of photoresist just refers to be fallen photoresist as the target etch that is etched, and is generally reacted using oxygen with photoresist, rawAt volatile materials.When due to using the second sub- metal layer 60A as etching barrier layer, the two sides of the second sub- metal layer 60A are etchedArea it is smaller so that the Tail of generation is (in Fig. 3 when performing etching to active film layer 40 and doping film layer 50T length) is smaller, to reduce the area with visible light reaction, and then reduces light leakage current, increases the stabilization of switching deviceProperty, improve display device and IS phenomenon occurs when reliability is tested.Optionally, what is formed after first time dry etching is activeThe distance difference range at the edge of the second sub- metal layer 60A at the edge and the same side of layer 40A is 0 micron -1.65 microns, can be withAssist understanding the edge of the active layer 40A formed after first time dry etching and second son of the same side by the T1 in Fig. 4The distance difference at the edge of metal layer 60A, certainly, the range of the T1 in Fig. 4 can not be interpreted as being equal to 0 micron -1.65 microns;Optionally, the edge of the second sub- metal layer 60A at the edge and the same side of the active layer 40A formed after first time dry etchingDistance difference is 1.64 microns;Optionally, the second of the edge of the active layer 40A formed after first time dry etching and the same sideThe distance difference at the edge of sub- metal layer 60A is 1.6 microns.
Optionally, the edge of the doped layer 50A formed after first time dry etching and the second sub- metal layer 60A of the same sideEdge distance difference range be 0 micron -0.4 micron.It can assist understanding first time dry etching by the T2 in Fig. 4The distance difference at the edge of the second sub- metal layer 60A at the edge and the same side of the doped layer 50A formed afterwards, certainly, in Fig. 4The range of T2 can not be interpreted as being equal to 0 micron -0.4 micron;Optionally, the doped layer 50A formed after first time dry etchingEdge and the same side the second sub- metal layer 60A edge distance difference be 0.32 micron;Optionally, first time dry method is carvedThe distance difference at the edge of the second sub- metal layer 60A at the edge and the same side of the doped layer 50A formed after erosion is 0.34 micron.This embodiment is described only for the side of active switch, it is possible to understand that, the other side of active switch can be joinedAccording to the description of above-described embodiment, therefore not to repeat here.By by the thickness control of active layer, doped layer in a certain range, canThe area with visible light reaction is reduced, and then reduces light leakage current, increases the stability of switching device, improves display device and is believingThere is IS phenomenon when relying property test.
Step S600 uses second of wet-etching technology to perform etching to form source and drain the described second sub- metal layerPole.
Specifically.Referring to Fig. 9, use again second of wet-etching technology to the second sub- metal layer 60A perform etching withForm source electrode 610, drain electrode 620.
Step S700 uses second of dry etch process to perform etching to form channel the active layer and doped layerArea, the channel region is through the doped layer and is partially through to the active layer.
Specifically, it can refer to Figure 10, be etching barrier layer with source electrode 610 and drain electrode 620, using second of dry etching workSkill performs etching doped layer 50A and active layer 40A, forms a channel region 80, wherein channel region 80 is through doped layer 50A, simultaneouslyPart is through to active layer 40A." partially running through " does not all etch away the active layer part in the second groove, becauseActive layer is as conductive medium, so cannot all be etched away.It is appreciated that for the specific thickness of " part ", it can be withIt makes a choice and adjusts according to practical condition and properties of product.Second metal layer 60 is partitioned into source electrode 610 by channel region 80With drain electrode 620, source electrode 610 is located at the two sides of channel region 80 with drain electrode 620.
Above-described embodiment can by using wet-etching technology twice and the active switch of dry etch process formation twiceShorten the processing time of active switch, and relative inexpensiveness.To the second gold medal when by controlling first time wet etchingBelong to the etching period of layer within 55 seconds to 75 seconds, i.e., when being performed etching to the two sides of second metal layer, so that lateral erosionTime is within 55 seconds to 75 seconds, it is possible to increase the area of the second sub- metal layer two sides, it is subsequent to be hindered with the second sub- metal layer for etchingWhen barrier performs etching active layer and doped layer, the Tail (tail) of generation will accordingly reduce, to reduce light leakageElectric current increases the stability of switching device, improves display device and IS (image occurs when reliability is testedSticking, ghost) phenomenon.
Referring to Fig. 2, for the structural schematic diagram of the active switch in an embodiment, which is opened using aforementioned activeThe production method embodiment of pass is manufactured.The active switch may include: substrate 10, grid 20, and gate insulating layer 30 is activeLayer 40A, doped layer 50A and source electrode 610, drain electrode 620.Wherein, grid 20 is formed on substrate 10;Gate insulating layer 30 is formed inOn substrate 10, while gate insulating layer 30 covers grid 20;Active layer 40A is formed on gate insulating layer 30;Doped layer 50A shapeAt on active layer 40A;Source electrode 610, drain electrode 620 are formed on doped layer 50A.One channel region 80 is located in doped layer 50APortion, channel region 80 is through doped layer 50A and is partially through to active layer 40A, and source electrode 610 and drain electrode 620 are located at channel region 80Two sides.It is appreciated that the active switch in the present embodiment can regard thin film transistor (TFT) as.
Above-mentioned active switch is manufactured by using the production method of aforementioned active switch, and the system of aforementioned active switchMake method by using wet-etching technology twice and the active switch of dry etch process formation twice, active switch can be shortenedProcessing time, and relative inexpensiveness.To the etching period of second metal layer when by controlling first time wet etchingWithin 55 seconds to 75 seconds, i.e., when being performed etching to the two sides of second metal layer, so that the time of lateral erosion was at 55 seconds to 75Second within, it is possible to increase the area of the second sub- metal layer two sides, it is subsequent using the second sub- metal layer be etch stop layer to active layer withWhen doped layer performs etching, the Tail (tail) of generation will accordingly reduce, to reduce light leakage current, increase derailing switchThe stability of part improves display device and IS (image sticking, ghost) phenomenon occurs when reliability is tested.
Substrate 10 can be glass substrate or plastic base, wherein glass substrate can be the ultra-thin glass of alkali-free borosilicateGlass, no alkali borosilicate glass physical characteristic with higher, preferable corrosion resistance, higher thermal stability and lowerDensity and higher elasticity modulus.
Grid 20 is formed on substrate 10, wherein the formation process of grid 20 may include rf magnetron sputtering, heat steamingHair, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that the formation process of grid 20 can be withIt is selected and is adjusted according to practical situations and properties of product, be not further limited herein.The material of grid 20It can be the heap stack combination of one or more of molybdenum, titanium, aluminium and copper;Select molybdenum, titanium, aluminium and copper can as 20 material of gridTo guarantee good electric conductivity.It is appreciated that the material of grid 20 can according to practical situations and properties of product intoRow selection and adjustment, are not further limited herein.The thickness range of grid 20 can be 3000 angstroms -5000 angstroms, optionally,The thickness of grid 20 can be 3000 angstroms -4000 angstroms, and optionally, the thickness of grid 20 can be 4000 angstroms -5000 angstroms.It can manageSolution, the thickness of grid 20 can be selected and be adjusted according to practical situations and properties of product, not made herein furtherRestriction.
Gate insulating layer 30 is formed on substrate 10, and the formation process of gate insulating layer 30 may include that radio frequency magnetron splashesIt penetrates, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that gate insulating layer 30Formation process can be selected and be adjusted according to practical situations and properties of product, do not limit further hereinIt is fixed.The material of gate insulating layer 30 can be one of silica, silicon nitride or combination, i.e. gate insulating layer 30It can be silica, be also possible to silicon nitride, can also be the mixture of silica and silicon nitride.It is appreciated that gate insulatorThe material of layer 30 can be selected and be adjusted according to practical situations and properties of product, not limited further hereinIt is fixed.The thickness of gate insulating layer 30 can be 3500 angstroms -4000 angstroms, and optionally, the thickness of gate insulating layer 30 can be 3500Angstroms -3700 angstroms, optionally, the thickness of gate insulating layer 30 can be 3700 angstroms -4000 angstroms.It is appreciated that gate insulating layer 30Thickness can be selected and be adjusted according to practical situations and properties of product, be not further limited herein.
Active layer 40A is formed on gate insulating layer 30, and the formation process of active layer 40A may include that radio frequency magnetron splashesIt penetrates, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that the shape of active layer 40AIt can be selected and be adjusted according to practical situations and properties of product at technique, be not further limited herein.HaveThe material of active layer 40A can be amorphous silicon, and active layer 40A is usually as conductive medium.The edge and the same side of active layer 40ASource electrode 610 or drain 620 edge distance difference range be 0 micron -1.65 microns, in other words, the side of active layer 40AEdge can be 0 micron -1.65 microns with the distance difference range at the edge of the source electrode 610 of the same side;The edge of active layer 40A is alsoIt can be 0 micron -1.65 microns with the distance difference range at the edge of the drain electrode 620 of the same side.Can by the T1 in Fig. 4 comeAuxiliary understands the distance difference at the edge of the edge of active layer 40A and the source electrode 610 of the same side or drain electrode 620, certainly, in Fig. 4T1 range can not be interpreted as be equal to 0 micron -1.65 microns;For ease of description, this sentence the edge of active layer 40A withIt is illustrated for the distance difference at the edge of the source electrode 610 of the same side.Optionally, the edge and the same side of active layer 40AThe distance difference at the edge of source electrode 610 is 1.64 microns;Optionally, the side of the source electrode 610 at the edge and the same side of active layer 40AThe distance difference of edge is 1.6 microns.
Doped layer 50A is formed on active layer 40A, the formation process of doped layer 50A may include rf magnetron sputtering,Thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that the formation of doped layer 50ATechnique can be selected and be adjusted according to practical situations and properties of product, be not further limited herein.DopingLayer 50A can be carries out n-type doping in amorphous silicon layer, is also possible to carry out p-type doping in amorphous silicon layer, optionally, dopingLayer 50A be n-type doping is carried out in amorphous silicon layer, meanwhile, be N-type heavy doping, wherein doping way may include High temperature diffusionAnd ion implanting.High temperature diffusion is to spread or be deposited to silicon wafer by gaseous sources or doped oxide for foreign atomSurface, these impurity concentrations will from surface to internal monotonic decreasing, in High temperature diffusion, the distribution of impurity mainly by high temperature withDiffusion time determines.Ion implanting is injected Doped ions in semiconductor in the form of ion beam, and impurity concentration is partly being ledThere is peak Distribution in vivo, in ion implanting, Impurity Distribution is mainly determined by mass of ion and Implantation Energy.N-type doping is mainIt is the incorporation pentavalent impurity element in semiconductor, such as: phosphorus, arsenic.Ion implanting is relative to the advantages of High temperature diffusion: 1, injectingIon be to be selected by mass analyzer come the particle that is selected purity is high, energy is single, to ensure that doping is denseDegree is not influenced by impurity source purity.In addition, injection process carries out under cleaning, dry vacuum condition, various pollutions are dropped toFloor level;2, the foreign atom number being injected into chip can be accurately controlled, implantation dosage is from for adjusting threshold voltage1011/cm2To forming the 10 of insulating buried layer17/cm2, wider range.3, when ion implanting, substrate is generally kept in room temperature or lowUnder 400 DEG C of temperature environment.Therefore, as silica, silicon nitride, aluminium and photoresist etc. may serve to alternatively adulterateMasking film, make device manufacture in autoregistration macking technique it is more flexible.The outer ledge of doped layer 50A and the source of the same sideThe distance difference range at pole 610 or the edge of drain electrode 620 is 0 micron -0.4 micron.In other words, the outer side edges of doped layer 50AEdge can be 0 micron -0.4 micron with the distance difference range at the edge of the source electrode 610 of the same side;The outer side edges of doped layer 50AEdge can also be 0 micron -0.4 micron with the distance difference range at the edge of the drain electrode 620 of the same side.It can be by Fig. 4T2 come assist understanding doped layer 50A outer ledge and the same side source electrode 610 or drain 620 edge distance difference, whenSo, the range of the T2 in Fig. 4 can not be interpreted as being equal to 0 micron -0.4 micron;For ease of description, this sentences doped layer 50AOuter ledge and the same side source electrode 610 edge distance difference for be illustrated.Optionally, doped layer 50A's is outerThe distance difference at the edge of the source electrode 610 of side edge and the same side is 0.32 micron;Optionally, the outer ledge of doped layer 50ADistance difference with the edge of the source electrode 610 of the same side is 0.34 micron.This embodiment is carried out only for the side of active switchDescription, it is possible to understand that, the description of above-described embodiment is referred to for the other side of active switch, therefore not to repeat here.By the way that the thickness control of active layer, doped layer in a certain range, can be reduced to the area with visible light reaction, and then reduce lightLeakage current increases the stability of switching device, improves display device and IS phenomenon occurs when reliability is tested.
Source electrode 610, drain electrode 620 are formed on doped layer 50A, and source electrode 610,620 formation process of draining may include penetratingFrequency magnetron sputtering, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that source electrode610, the formation process of drain electrode 620 can be selected and be adjusted according to practical situations and properties of product, not made hereinIt is further to limit.Source electrode 610,620 material of draining can be the storehouse group of one or more of molybdenum, titanium, aluminium and copperIt closes;Select molybdenum, titanium, aluminium and copper that can guarantee good electric conductivity as source electrode 610,620 materials of drain electrode.The source of being appreciated thatPole 610, drain 620 material can be selected and be adjusted according to practical situations and properties of product, do not make herein intoThe restriction of one step.Source electrode 610,620 thickness of draining can be 3000 angstroms -4500 angstroms, optionally, source electrode 610, drain electrode 620Thickness can be 3000 angstroms -4000 angstroms, optionally, source electrode 610, drain 620 thickness can be 4000 angstroms -4500 angstroms.It can be withUnderstand, source electrode 610, drain 620 material can be identical or not identical with thickness, source electrode 610, drain 620 material andThickness can be selected and be adjusted according to practical situations and properties of product, be not further limited herein.
Channel region 80 is located at the middle part of doped layer 50A, and channel region 80 is through doped layer 50A and active layer is run through in part40A.Source electrode 610 and drain electrode 620 are located in the two sides of channel region 80." running through " can be realized by photoetching or lithographic method,Photosensitive photoresist is set to exist by exposure and imaging using the mask with a certain layer design configuration specifically, photoetching refers toThree-dimensional relief pattern is formed on substrate.Etching refers to that under photoresist masking, the film layer for forming micrographics as needed is different, adoptsSelective etch is carried out in film layer with different etching substances and method.In this way, after removing photoresist, three dimensional design figureIt has been transferred in the related film layer of substrate.
Figure 11 is please referred to, is the structural schematic diagram of active switch in another embodiment.The active switch may include substrate10, grid 20, gate insulating layer 30, active layer 40, doped layer 50, source electrode 610, drain electrode 620 and protective layer 90.Wherein, grid20 are formed on substrate 10;Gate insulating layer 30 is formed on substrate 10, while gate insulating layer 30 covers grid 20;Active layer40A is formed on gate insulating layer 30;Doped layer 50A is formed on active layer 40A;Source electrode 610, drain electrode 620 are formed in dopingLayer 50A on, protective layer 90 be formed in source electrode 610, drain electrode 620 on;One channel region 80 is located at the middle part of doped layer 50A, channel region80 run through doped layer 50A and are partially through to active layer 40A, and source electrode 610 and drain electrode 620 are positioned at the two sides of channel region 80, simultaneouslyProtective layer 90 covers channel region 80.
It is appreciated that for substrate 10, grid 20, gate insulating layer 30, active layer 40A, doped layer 50A, source electrode 610,Material, formation process, composition, the thickness etc. of drain electrode 620, are referred to the description of aforementioned active switch embodiment, herein no longerFurther progress repeats.
Protective layer 90 mainly for the protection of switching device from polluting and damaging, specifically, protective layer 90 be also referred to as PV(Passivation, passivation) layer, the material of protective layer 90 can be the combination of silicon nitride, silica or the two.It can manageSolution, is not particularly limited the thickness of protective layer 90, those skilled in the art can be according to practical condition and properties of productIt is selected and is adjusted.
Above-mentioned active switch is manufactured by using the production method of aforementioned active switch, and the system of aforementioned active switchMake method by using wet-etching technology twice and the active switch of dry etch process formation twice, active switch can be shortenedProcessing time, and relative inexpensiveness.To the etching period of second metal layer when by controlling first time wet etchingWithin 55 seconds to 75 seconds, i.e., when being performed etching to the two sides of second metal layer, so that the time of lateral erosion was at 55 seconds to 75Second within, it is possible to increase the area of the second sub- metal layer two sides, it is subsequent using the second sub- metal layer be etch stop layer to active layer withWhen doped layer performs etching, the Tail (tail) of generation will accordingly reduce, to reduce light leakage current, increase derailing switchThe stability of part improves display device and IS (image sticking, ghost) phenomenon occurs when reliability is tested;OneIn embodiment, by be arranged protective layer, can protective film transistor from damage.
A kind of display device may include the aforementioned active switch embodiment, above-mentioned display device, due to actively openingPass is manufactured by using the production method of aforementioned active switch, and the production method of aforementioned active switch is by using twiceWet-etching technology and twice dry etch process form active switch, when can shorten the processing procedure of active switch (thin film transistor (TFT))Between, and relative inexpensiveness.To the etching period of second metal layer at 55 seconds when by controlling first time wet etchingTo within 75 seconds, i.e., when being performed etching to the two sides of second metal layer so that the time of lateral erosion within 55 seconds to 75 seconds,Can increase the area of the second sub- metal layer two sides, it is subsequent using the second sub- metal layer as etch stop layer to active layer and doped layer intoWhen row etching, the Tail (tail) of generation will accordingly reduce, to reduce light leakage current, increase the stabilization of switching deviceProperty.Optionally, by controlling to the etch period of the first metal layer within 100 seconds to 120 seconds, the grid to be formed can be madeArea it is larger, correspondingly, so that it may more the light impinged upon in active layer above Tail is blocked, so as to reduce active layerInterior Tail reacts the leakage current to be formed with light, increases the stability of switching device, improves what display device was tested in reliabilityWhen there is IS phenomenon.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned realityIt applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not depositedIn contradiction, all should be considered as described in this specification.
The several embodiments of the application above described embodiment only expresses, the description thereof is more specific and detailed, but simultaneouslyThe limitation to claim therefore cannot be interpreted as.It should be pointed out that coming for those of ordinary skill in the artIt says, without departing from the concept of this application, various modifications and improvements can be made, these belong to the protection of the applicationRange.Therefore, the scope of protection shall be subject to the appended claims for the application patent.

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