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CN109524373B - Three-dimensional active heat dissipation package structure of embedded microchannel and its manufacturing process - Google Patents

Three-dimensional active heat dissipation package structure of embedded microchannel and its manufacturing process
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CN109524373B
CN109524373BCN201811374347.7ACN201811374347ACN109524373BCN 109524373 BCN109524373 BCN 109524373BCN 201811374347 ACN201811374347 ACN 201811374347ACN 109524373 BCN109524373 BCN 109524373B
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朱家昌
明雪飞
高娜燕
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CETC 58 Research Institute
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Translated fromChinese

本发明涉及一种嵌入式微流道的三维主动散热封装结构及其制作工艺,属于集成电路封装的技术领域。所述三维主动散热封装结构包括三维封装结构;在所述三维封装结构顶层设有微流道芯片结构单元,所述微流道芯片结构单元包括嵌入微流道结构的IC芯片与微流道盖板,在所述三维封装结构底层设有二维异构集成结构单元,所述二维异构集成结构单元包括通过阵列凸点和底部填充层连接的TSV转接板与IC芯片,所述微流道芯片结构单元与二维异构集成结构单元通过阵列凸点和底部填充层连接,最终与嵌入微流道基板/外壳封装形成三维主动散热封装结构。本发明能极大降低三维封装系统层间热阻,有效提升电路散热能力,实现高密度、高性能的三维系统级封装,安全可靠。

Figure 201811374347

The invention relates to a three-dimensional active heat dissipation packaging structure with embedded micro-flow channels and a manufacturing process thereof, belonging to the technical field of integrated circuit packaging. The three-dimensional active heat dissipation packaging structure includes a three-dimensional packaging structure; a micro-channel chip structure unit is arranged on the top layer of the three-dimensional packaging structure, and the micro-channel chip structure unit includes an IC chip embedded in the micro-channel structure and a micro-channel cover board, a two-dimensional heterogeneous integrated structural unit is arranged on the bottom layer of the three-dimensional packaging structure, and the two-dimensional heterogeneous integrated structural unit includes a TSV adapter board and an IC chip connected by an array bump and an underfill layer, and the micro The flow channel chip structural unit and the two-dimensional heterogeneous integrated structural unit are connected through the array bumps and the underfill layer, and finally form a three-dimensional active heat dissipation package structure with the embedded micro-channel substrate/shell package. The invention can greatly reduce the interlayer thermal resistance of the three-dimensional packaging system, effectively improve the heat dissipation capability of the circuit, and realize the high-density and high-performance three-dimensional system-level packaging, which is safe and reliable.

Figure 201811374347

Description

Translated fromChinese
嵌入式微流道的三维主动散热封装结构及其制作工艺Three-dimensional active heat dissipation package structure of embedded microchannel and its manufacturing process

技术领域technical field

本发明涉及一种三维封装结构,尤其是一种嵌入式微流道的三维主动散热封装结构及其制作工艺,属于集成电路封装的技术领域。The invention relates to a three-dimensional packaging structure, in particular to a three-dimensional active heat dissipation packaging structure with embedded micro-channels and a manufacturing process thereof, belonging to the technical field of integrated circuit packaging.

背景技术Background technique

随着现代电子芯片的集成度的增加、功耗的上升和尺寸的减小,快速增加的芯片系统发热已经成为先进电子芯片系统研发和应用中的一项重大挑战。一般地,元器件的失效率随着器件温度的上升呈指数规律上升,器件在70~80℃水平上每升高1℃,其可靠性降低5%。尤其在三维封装系统中,热管理问题不容忽视,这是因为:(1)三维封装系统中往往集成了多个芯片,晶体管数目较多,发热量较大,但整体的封装面积并未随之增加,因此具有更高的发热密度;(2)芯片采用三维叠层封装,不利于热量散发,位于叠层底部和中部的芯片,其热量的散发将更加困难;(3)对于三维组装结构,铜导体部分被绝缘层、芯片、基板等结构包围,使得芯片产生的热量较难散发。这些因素导致芯片的温度迅速增加。With the increase in the integration level, power consumption and size reduction of modern electronic chips, the rapidly increasing heat generation of chip systems has become a major challenge in the development and application of advanced electronic chip systems. Generally, the failure rate of components increases exponentially with the rise of the device temperature, and the reliability of the device decreases by 5% for every 1°C increase in the level of 70-80°C. Especially in the three-dimensional packaging system, the thermal management problem cannot be ignored, because: (1) The three-dimensional packaging system often integrates multiple chips, the number of transistors is large, and the heat generation is large, but the overall packaging area does not follow. increased, so it has a higher heat generation density; (2) the chip is packaged in a three-dimensional stack, which is not conducive to heat dissipation, and the heat dissipation of the chip located at the bottom and middle of the stack will be more difficult; (3) For the three-dimensional assembly structure, The copper conductor is surrounded by insulating layers, chips, substrates and other structures, making it difficult for the heat generated by the chip to dissipate. These factors cause the temperature of the chip to increase rapidly.

常规散热方式主要有热传导、对流、微喷冷却、辐射和相变制冷等,但是这些散热方式对应的设备体积和效率都不尽人意。尤其当系统的功率密度高于100W/cm2时,这些热管理方法根本无法适用。而微流道主动散热技术是将微流道集成在芯片或基板内部,利用流体工质流动带走芯片工作时产生的热量,其等效传热系数要远远大于一些传统导热材料(铝、铜、银等)的传热系数,可以确保器件在合适的温度下工作。所以为了满足三维微电子系统高性能、高散热的发展需求,亟需开发一种嵌入式微流道的三维主动散热封装结构。Conventional heat dissipation methods mainly include heat conduction, convection, micro-spray cooling, radiation and phase change cooling, etc. However, the equipment volume and efficiency corresponding to these heat dissipation methods are not satisfactory. Especially when the power density of the system is higher than 100W/cm2 , these thermal management methods simply cannot be applied. The micro-channel active heat dissipation technology integrates the micro-channel inside the chip or substrate, and uses the fluid working medium to take away the heat generated when the chip is working. Its equivalent heat transfer coefficient is much larger than that of some traditional thermally conductive materials (aluminum, The heat transfer coefficient of copper, silver, etc.) can ensure that the device works at a suitable temperature. Therefore, in order to meet the development requirements of high performance and high heat dissipation of three-dimensional microelectronic systems, it is urgent to develop a three-dimensional active heat dissipation package structure with embedded microchannels.

发明内容SUMMARY OF THE INVENTION

本发明的目的是克服现有技术中三维封装系统散热水平的不足,提供一种嵌入式微流道的三维主动散热封装结构及其制作工艺,通过在芯片背面以及基板内部集成微流道结构,实现三维封装系统在芯片级和基板级的多维度、多尺度主动散热,极大地提升三维封装系统的散热能力。The purpose of the present invention is to overcome the deficiencies in the heat dissipation level of the three-dimensional packaging system in the prior art, and to provide a three-dimensional active heat dissipation packaging structure with embedded microchannels and a manufacturing process thereof. The multi-dimensional and multi-scale active heat dissipation of the 3D packaging system at the chip level and the substrate level greatly improves the heat dissipation capability of the 3D packaging system.

按照本发明提供的技术方案,所述嵌入式微流道的三维主动散热封装结构,其特征是:包括三维封装结构,在所述三维封装结构顶层设有微流道芯片结构单元,所述微流道芯片结构单元包括嵌入微流道结构的IC芯片与微流道盖板,在所述三维封装结构底层设有二维异构集成结构单元,所述二维异构集成结构单元包括TSV转接板和IC芯片,TSV转接板和IC芯片通过再布线层连接;所述微流道芯片结构单元与二维异构集成结构单元通过阵列凸点和底部填充层连接,最终与嵌入微流道基板和封装外壳封装形成三维主动散热封装结构,电信号由嵌入微流道基板表面的阵列外引出端引出。According to the technical solution provided by the present invention, the three-dimensional active heat dissipation packaging structure of the embedded microchannel is characterized by comprising a three-dimensional packaging structure, and a microchannel chip structure unit is arranged on the top layer of the three-dimensional packaging structure, and the microfluidic The channel chip structural unit includes an IC chip embedded in a micro-channel structure and a micro-channel cover plate, and a two-dimensional heterogeneous integrated structural unit is arranged on the bottom layer of the three-dimensional package structure, and the two-dimensional heterogeneous integrated structural unit includes a TSV switch The board and the IC chip, the TSV adapter board and the IC chip are connected through the rewiring layer; the microfluidic chip structural unit and the two-dimensional heterogeneous integrated structural unit are connected through the array bumps and the underfill layer, and finally the embedded microfluidic channel is connected. The substrate and the package shell are encapsulated to form a three-dimensional active heat dissipation package structure, and electrical signals are drawn out from the array outer lead-out ends embedded in the surface of the micro-channel substrate.

进一步地,所述微流道芯片结构单元通过在IC芯片衬底背面直接制作微流道结构,与微流道盖板键合而成。Further, the micro-channel chip structure unit is formed by directly fabricating a micro-channel structure on the back of the IC chip substrate and bonding with the micro-channel cover plate.

进一步地,所述微流道盖板的材料采用硅或玻璃。Further, the material of the micro-channel cover plate is silicon or glass.

进一步地,所述嵌入微流道基板的材料采用陶瓷或有机树脂。Further, the material embedded in the microfluidic substrate adopts ceramic or organic resin.

所述嵌入式微流道的三维主动散热封装结构的制作工艺,其特征是,包括以下步骤:The manufacturing process of the three-dimensional active heat dissipation package structure of the embedded microchannel is characterized in that it includes the following steps:

(1)在三维封装结构顶层功能芯片背面制作微纳尺度微流道结构,得到嵌入微流道结构的IC芯片;通过晶圆级键合工艺在嵌入流道结构的IC芯片表面键合微流道盖板,密封微流道,制得微流道芯片结构单元;(1) Fabricate a micro-nano-scale micro-channel structure on the back of the top functional chip of the three-dimensional package structure to obtain an IC chip embedded in the micro-channel structure; bond the micro-fluid on the surface of the IC chip embedded in the channel structure through a wafer-level bonding process A channel cover plate is used to seal the microfluidic channel to obtain a microfluidic chip structural unit;

(2)通过常规TSV工艺制得TSV转接板,将TSV转接板结构与三维封装结构底层IC芯片通守晶圆级扇出封装工艺进行一体化集成,制得二维异构集成结构单元;在所述二维异构集成结构单元上下表面通过再布线实现TSV转接板与IC芯片的信号互连,通过阵列凸点实现三维封装结构信号互连;(2) The TSV adapter board is obtained by the conventional TSV process, and the TSV adapter board structure and the underlying IC chip of the three-dimensional packaging structure are integrated through the wafer-level fan-out packaging process to obtain a two-dimensional heterogeneous integrated structural unit The signal interconnection between the TSV adapter board and the IC chip is realized by rewiring on the upper and lower surfaces of the two-dimensional heterogeneous integrated structure unit, and the three-dimensional package structure signal interconnection is realized through the array bumps;

(3)将上述得到的嵌入微流道芯片单元与二维异构集成结构单元通过凸点互连工艺实现上下互连,制得三维集成结构;其中,顶层单元包含微流道结构,底层单元包括TSV结构;(3) The obtained embedded microchannel chip unit and the two-dimensional heterogeneous integrated structure unit are interconnected up and down through a bump interconnection process to obtain a three-dimensional integrated structure; wherein, the top unit includes a microchannel structure, and the bottom unit including TSV structure;

(4)最后通过凸点互连工艺和常规封帽工艺,将上述所得三维集成结构与嵌入微流道基板和封装外壳进行封装,通过阵列外引出端实现封装电路信号的引出,制得所述的嵌入式微流道的三维主动散热封装结构。(4) Finally, through the bump interconnection process and the conventional capping process, the obtained three-dimensional integrated structure is packaged with the embedded microchannel substrate and the package shell, and the package circuit signal is extracted through the external terminal of the array. The three-dimensional active heat dissipation package structure of the embedded micro-channel.

进一步地,所述步骤(1)中,微流道结构通过深反应离子刻蚀工艺直接制作于功能芯片衬底背面,实现芯片尺度主动散热,微流道盖板包含微流体出入口通孔结构。Further, in the step (1), the microfluidic channel structure is directly fabricated on the backside of the functional chip substrate by a deep reactive ion etching process to achieve chip-scale active heat dissipation, and the microfluidic channel cover plate includes a microfluidic inlet and outlet through-hole structure.

本发明具有以下优点:The present invention has the following advantages:

(1)尺寸在微米级别的微流道结构直接集成在功能芯片背面,引入冷却剂将芯片有源区(尤其是热点区域)的发热量带走,这种“短距离”的散热方式是一种直接、高效的芯片级主动散热方式,消除了传统散热方式存在的界面热阻;(1) The micro-channel structure with a size in the micron level is directly integrated on the back of the functional chip, and the coolant is introduced to take away the heat generated in the active area of the chip (especially the hot spot area). This "short-distance" heat dissipation method is a A direct and efficient chip-level active heat dissipation method, which eliminates the interface thermal resistance existing in the traditional heat dissipation method;

(2)尺寸在亚微米或者毫米级别的微流道结构直接嵌入在基板内部,引入冷却剂将三维封装系统底层芯片发热量带走,是一种直接、高效的基板级主动散热方式,极大地降低了封装基板的等效热阻,实现了三维封装系统的多维度、多尺度的热管理;(2) The micro-channel structure with a size of sub-micron or millimeter level is directly embedded in the substrate, and the coolant is introduced to take away the heat generated by the underlying chip of the three-dimensional packaging system. The equivalent thermal resistance of the packaging substrate is reduced, and the multi-dimensional and multi-scale thermal management of the three-dimensional packaging system is realized;

(3)TSV转接板与功能芯片的一体化集成可以实现功能芯片的三维集成功能,同时TSV可以作为热传递通道,起到一定的散热作用,提升三维系统散热能力。(3) The integrated integration of the TSV adapter board and the functional chip can realize the three-dimensional integration function of the functional chip. At the same time, the TSV can be used as a heat transfer channel to play a certain role in heat dissipation and improve the heat dissipation capability of the three-dimensional system.

附图说明Description of drawings

图1~图7是本发明所述嵌入式微流道的三维主动散热封装结构的典型实例工艺流程图;其中:1 to 7 are typical example process flow diagrams of the three-dimensional active heat dissipation package structure of the embedded micro-channel according to the present invention; wherein:

图1为背面嵌入微流道结构的IC芯片晶圆示意图。FIG. 1 is a schematic diagram of an IC chip wafer with a micro-channel structure embedded in the back.

图2为制作有微流体出入口通孔的微流道盖板圆片示意图。FIG. 2 is a schematic diagram of a microfluidic cover plate wafer made with microfluidic inlet and outlet through holes.

图3为截取下的微流道芯片结构单元示意图。FIG. 3 is a schematic diagram of a microfluidic chip structural unit cut out.

图4为双面制作有再布线层的二维异构集成结构单元示意图。FIG. 4 is a schematic diagram of a two-dimensional heterogeneous integrated structural unit fabricated with redistribution layers on both sides.

图5为二维异构集成结构单元上下表面制作陈列凸点示意图。FIG. 5 is a schematic diagram of making array bumps on the upper and lower surfaces of the two-dimensional heterogeneous integrated structural unit.

图6为嵌入微流道芯片单元与二维异构集成结构单元三维互连结构示意图。FIG. 6 is a schematic diagram of the three-dimensional interconnection structure of the embedded microfluidic chip unit and the two-dimensional heterogeneous integrated structural unit.

图7为本发明所述嵌入式微流道的三维主动散热封装结构示意图。FIG. 7 is a schematic diagram of the three-dimensional active heat dissipation package structure of the embedded microchannel according to the present invention.

附图标记说明:1-三维封装结构、2-微流道芯片结构单元、3-嵌入微流道结构的IC芯片、4-微流道盖板、5-二维异构集成结构单元、6-再布线层、7-TSV转接板、8-IC芯片、9-阵列凸点、10-底部填充层、11-嵌入微流道基板、12-封装外壳、13-阵列外引出端。Description of reference numerals: 1-three-dimensional packaging structure, 2-microfluidic chip structure unit, 3-IC chip embedded in microfluidic structure, 4-microfluidic cover plate, 5-two-dimensional heterogeneous integrated structure unit, 6 -Redistribution layer, 7-TSV interposer, 8-IC chip, 9-array bump, 10-underfill layer, 11-embedded microfluidic substrate, 12-package shell, 13-array external terminal.

具体实施方式Detailed ways

下面结合具体附图对本发明作进一步说明。The present invention will be further described below in conjunction with the specific drawings.

如图7所示,本发明所述嵌入式微流道的三维主动散热封装结构,包括三维封装结构1;在所述三维封装结构1顶层设有微流道芯片结构单元2,所述微流道芯片结构单元2中设有嵌入微流道结构的IC芯片3与微流道盖板4,在所述三维封装结构1底层设有二维异构集成结构单元5,所述二维异构集成结构单元5中设有TSV转接板7和IC芯片8,TSV转接板7和IC芯片8通过再布线层6连接;所述微流道芯片结构单元2与二维异构集成结构单元5通过阵列凸点9和底部填充层10连接,最终与嵌入微流道基板11和封装外壳12封装形成三维主动散热封装结构,电信号由嵌入微流道基板11表面的阵列外引出端13引出。As shown in FIG. 7 , the three-dimensional active heat dissipation packaging structure of the embedded microchannel according to the present invention includes a three-dimensional packaging structure 1; Thechip structure unit 2 is provided with anIC chip 3 embedded in a microfluidic channel structure and amicrofluidic channel cover 4, and a two-dimensional heterogeneousintegrated structure unit 5 is provided on the bottom layer of the three-dimensional packaging structure 1. The two-dimensional heterogeneous integrated structure Thestructural unit 5 is provided with aTSV adapter plate 7 and anIC chip 8, and the TSVadapter plate 7 and theIC chip 8 are connected through therewiring layer 6; the micro-channel chipstructural unit 2 and the two-dimensional heterogeneous integratedstructural unit 5 Through the connection between thearray bumps 9 and theunderfill layer 10 , it is finally encapsulated with the embeddedmicrochannel substrate 11 and thepackage shell 12 to form a three-dimensional active heat dissipation package structure.

本发明所述基于嵌入微流道三维封装结构的制备方法,包括以下步骤:The preparation method based on the embedded microfluidic three-dimensional encapsulation structure of the present invention comprises the following steps:

步骤一:提供IC芯片的晶圆,所述IC芯片晶圆衬底材料包括但不限于硅、砷化镓等材料,在所述晶圆背面采用常规深反应离子刻蚀工艺制作节距和深宽比符合设计要求的微流道结构,得到嵌入微流道结构的IC芯片3,如图1所示;Step 1: Provide a wafer of IC chips. The IC chip wafer substrate materials include but are not limited to materials such as silicon, gallium arsenide, etc. The backside of the wafer is made of a conventional deep reactive ion etching process to produce pitch and depth. A micro-channel structure with a width ratio that meets the design requirements, anIC chip 3 embedded in the micro-channel structure is obtained, as shown in Figure 1;

步骤二:提供盖板圆片,所述盖板圆片材料包括但不限于硅、玻璃等材料,在所述盖板圆片上采用常规深反应离子刻蚀工艺或激光打孔工艺制作直径符合设计要求的微流体出入口通孔,得到微流道盖板4,如图2所示;Step 2: Provide a cover plate wafer. The material of the cover plate wafer includes but not limited to silicon, glass and other materials. On the cover plate wafer, a conventional deep reactive ion etching process or a laser drilling process is used to make a diameter that meets the design. The required microfluidic inlet and outlet through holes are obtained to obtain amicrofluidic cover plate 4, as shown in Figure 2;

步骤三:采用晶圆级键合工艺将上述所得嵌入微流道结构的IC芯片3与微流道盖板4进行组装,通过标准划片工艺截取得到相应尺寸的微流道芯片结构单元2,如图3所示;Step 3: TheIC chip 3 embedded in the micro-channel structure obtained above is assembled with themicro-channel cover plate 4 by using the wafer-level bonding process, and the micro-channelchip structure unit 2 of the corresponding size is obtained through a standard dicing process. As shown in Figure 3;

步骤四:采用常规TSV工艺制得TSV转接板7,将上述所得TSV转接板7与三维封装结构底层IC芯片8通过晶圆级扇出封装工艺进行一体化集成,制得二维异构集成结构单元5,在所述二维异构集成结构单元5上下表面通过光刻但不限于光刻的工艺制作再布线层6,实现TSV转接板7与IC芯片8的电连接,如图4所示;Step 4: The TSVadapter plate 7 is obtained by using a conventional TSV process, and the TSVadapter plate 7 obtained above and thebottom IC chip 8 of the three-dimensional packaging structure are integrated and integrated through a wafer-level fan-out packaging process to obtain a two-dimensional heterogeneous The integratedstructure unit 5, on the upper and lower surfaces of the two-dimensional heterogeneous integratedstructure unit 5, is fabricated by photolithography but not limited to the process of photolithography. 4 shown;

步骤五:采用常规植球工艺或电镀工艺在上述所得二维异构集成结构单元5上下表面制作阵列凸点9,如图5所示;所述阵列凸点材料包括但不限于铜、锡铅、锡银以及锡银铜等材料;Step 5: Using a conventional ball-mounting process or electroplating process to makearray bumps 9 on the upper and lower surfaces of the two-dimensional heterogeneous integratedstructural unit 5 obtained above, as shown in FIG. 5 ; the array bump materials include but are not limited to copper, tin-lead , tin silver and tin silver copper and other materials;

步骤六:采用凸点互连工艺和底部填充工艺实现上述所得嵌入微流道芯片单元3与二维异构集成结构单元5的三维互连,如图6所示;所述凸点互连工艺包括但不限于回流焊、热压焊等工艺;Step 6: The three-dimensional interconnection of the obtained embeddedmicrochannel chip unit 3 and the two-dimensional heterogeneous integratedstructure unit 5 is realized by using a bump interconnection process and an underfill process, as shown in FIG. 6 ; the bump interconnection process Including but not limited to reflow soldering, hot pressure soldering and other processes;

步骤七:采用凸点互连工艺和常规封帽工艺,将上述所得三维集成结构与定制化的嵌入微流道基板11和封装外壳12进行封装,得到嵌入式微流道的三维主动散热封装结构1,通过常规植球/植柱工艺制得阵列信号外引出端13,如图7所示;所述嵌入微流道基板材料包括但不限于陶瓷、有机树脂等材料,所述阵列凸点料包括但不限于锡铅、锡银以及锡银铜等材料。Step 7: Encapsulate the three-dimensional integrated structure obtained above with the customized embeddedmicrochannel substrate 11 and thepackage shell 12 by using a bump interconnection process and a conventional capping process to obtain a three-dimensional active heat dissipation package structure 1 with embedded microchannels , the array signalouter terminal 13 is obtained by a conventional ball/pillar process, as shown in FIG. 7 ; the embedded microchannel substrate materials include but are not limited to ceramics, organic resins and other materials, and the array bump materials include But not limited to tin-lead, tin-silver and tin-silver-copper and other materials.

Claims (6)

1. A three-dimensional active heat dissipation packaging structure of an embedded micro-channel is characterized in that: the micro-channel chip structure comprises a three-dimensional packaging structure (1), wherein a micro-channel chip structure unit (2) is arranged on the top layer of the three-dimensional packaging structure (1), the micro-channel chip structure unit (2) comprises an IC chip (3) embedded into the micro-channel structure and a micro-channel cover plate (4), a two-dimensional heterogeneous integrated structure unit (5) is arranged on the bottom layer of the three-dimensional packaging structure (1), the two-dimensional heterogeneous integrated structure unit (5) comprises a TSV adapter plate (7) and an IC chip (8), and the TSV adapter plate (7) and the IC chip (8) are connected through a rewiring layer (6); the micro-channel chip structure unit (2) is connected with the two-dimensional heterogeneous integrated structure unit (5) through the array salient points (9) and the bottom filling layer (10), and finally packaged with the embedded micro-channel substrate (11) and the packaging shell (12) to form a three-dimensional active heat dissipation packaging structure, and electric signals are led out through an array external leading-out end (13) embedded in the surface of the micro-channel substrate (11);
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