CN109427609B - System and method for on-line inspection of semiconductor wafers - Google Patents

Abstract

Translated fromChinese

一种半导体装置在线检验的系统及方法。在一个实施例中，一种方法包括：将晶片自动地从第一处理站运送到检验站；在检验站中使用相机扫描晶片表面；产生晶片表面的至少一个图像；分析所述至少一个图像，以基于一组预定准则来检测晶片表面上的缺陷；如果确定晶片有缺陷，则将所述晶片自动地从检验站运送到储料器；且如果确定晶片无缺陷，则将所述晶片自动地运送到第二处理站以根据半导体装置制造工艺进行进一步处理。

A system and method for on-line inspection of semiconductor devices. In one embodiment, a method includes: automatically transporting a wafer from a first processing station to an inspection station; scanning a wafer surface using a camera in the inspection station; generating at least one image of the wafer surface; analyzing the at least one image, to detect defects on the surface of the wafer based on a set of predetermined criteria; if the wafer is determined to be defective, the wafer is automatically transported from the inspection station to the stocker; and if the wafer is determined to be defect-free, the wafer is automatically transported Transported to a second processing station for further processing in accordance with the semiconductor device fabrication process.

Description

System and method for on-line inspection of semiconductor wafers

Technical Field

Embodiments of the present disclosure relate to a system and method for in-line inspection of semiconductor wafers.

Background

In the semiconductor Integrated Circuit (IC) industry, there is a continuing need for smaller device sizes and higher circuit packing densities. This demand drives the semiconductor industry to develop new materials and complex processes. Manufacturing ICs of this size and complexity typically uses advanced techniques to inspect the IC at various stages of the manufacturing process for quality control purposes.

For example, when features (e.g., gate/drain/source features of transistors, horizontal interconnects, vertical vias, etc.) are to be formed on a wafer, the wafer typically travels through a fabrication line that includes multiple processing stations (processing stations) that typically use different processing tools to perform various operations such as cleaning (cleaning), photolithography (photolithography), dielectric deposition, dry etching/wet etching (wet etching), and metal deposition. The wafers are typically inspected for defects before being transferred to the next step in the production line (e.g., the next processing station).

Typically, such inspection is performed manually by a person using an optical tool to determine the presence of a defect that may be caused by one or more faulty processing stations of a production line. Such faults are, for example, parametric (e.g., line width) faults, random (e.g., individual via) faults, and area-related faults (e.g., "killer defect" particles). When a defect is detected as a result of such "manual" inspection, the wafer is typically removed from the current processing station before entering the next processing station, which is commonly referred to as "offline inspection". Such offline inspection disadvantageously causes various problems.

For example, the time-resource tradeoff results in a tradeoff between inspection resolution and sampling rate, e.g., a high sampling rate (i.e., high inspection throughput) is often accompanied by a low inspection resolution, and vice versa. Furthermore, such off-line inspection, resulting from the "manual" operation, often results in an interruption of the automated production line, which also increases the likelihood of wafer contamination. Furthermore, offline inspection often requires expensive inspection equipment, specialized human resources, and laboratory space.

Accordingly, the IC industry desires an "in-line" inspection that does not require additional laboratory space and can automatically and efficiently inspect defects at low cost without significant disruption to the production line or impact on its throughput. Despite this long-standing need, no suitable system has yet been found to meet these requirements.

Disclosure of Invention

An embodiment of the present invention discloses a method for on-line testing of a semiconductor device, which is characterized by comprising: transporting the semiconductor wafer from the first processing station to an inspection station; scanning a surface of a wafer in the inspection station using a camera; generating at least one image of the wafer surface; analyzing the at least one image to detect defects on the wafer surface based on a set of predetermined criteria; transporting the wafer from the inspection station to a stocker if the wafer is determined to be defective; and if it is determined that the wafer is defect free, transporting the wafer to a second processing station for further processing in accordance with the semiconductor device manufacturing process.

An embodiment of the present invention discloses a system for on-line inspection of a semiconductor wafer, which is characterized in that the system comprises: a conveyor configured to transport the semiconductor wafer from the first processing station to the inspection station; a camera configured to scan a surface of the semiconductor wafer and generate at least one image of the surface; and at least one processor configured to receive the at least one image from the camera and analyze the at least one image to detect defects on the surface based on a set of predetermined criteria, wherein the conveyor is further configured to: automatically transporting the wafer from the inspection station to a second processing station if the wafer is determined to be defect free or to a stocker if the wafer is determined to be defect free.

An embodiment of the present invention discloses a system for on-line inspection of a semiconductor wafer, which is characterized in that the system comprises: a first processing station performing a first semiconductor manufacturing process; a second processing station performing a second semiconductor manufacturing process; an inspection station coupled between the first processing station and the second processing station to transport semiconductor wafers between the first processing station and the second processing station, wherein the inspection station comprises: a conveyor configured to automatically transport the semiconductor wafer from the first processing station to the inspection station; a mirror redirecting an optical path between the camera and the wafer surface, wherein the mirror has a surface waviness and a surface curvature, wherein the surface waviness is equal to or less than 20 μm/20mm and the surface curvature is equal to or less than 0.1mm/100 mm; a camera configured to scan a surface of the semiconductor wafer and generate at least one image of the surface; and at least one processor configured to receive the at least one image from the camera and analyze the at least one image to detect defects on the surface based on a set of predetermined criteria, wherein the conveyor is further configured to: automatically transporting the wafer from the inspection station to the second processing station if the wafer is determined to be defect free or to a stocker if the wafer is determined to be defect free.

Drawings

Various aspects of the disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that the various features are not necessarily drawn to scale. In fact, the dimensions and geometries of the various features may be arbitrarily increased or decreased for clarity of illustration.

FIG. 1 illustrates a block diagram of a system for integrating multiple in-line inspection systems into a semiconductor manufacturing production line, according to some embodiments of the present disclosure.

Fig. 2A illustrates a perspective view of an inspection system according to some embodiments.

FIG. 2B illustrates a perspective view of an inspection system including a mirror according to some embodiments.

FIG. 2C illustrates a cross-sectional view of an in-line inspection system including a mirror, according to some embodiments.

Fig. 2D illustrates a graph of reflectance versus wavelength in the visible range (410 nanometers (nm) to 700nm) according to some embodiments.

Figure 2E illustrates a perspective view of an in-line inspection system that can inspect wafers having large sizes, according to some embodiments.

Fig. 3A-3C illustrate perspective views of a system for scanning a surface of a wafer through a field of view of a line scan camera while the wafer is being transferred by a conveyor, according to some embodiments of the present disclosure.

FIG. 4 illustrates a flow diagram of a method of an online inspection system, according to some embodiments of the present disclosure.

Description of the reference numerals

100. 300, and (2) 300: system for controlling a power supply

102a, 102b, 102 c: treatment station

104a, 200B: inspection system

104 b: inspection system/second inspection system

106a, 106 b: material storage device

108: connecting part

110: remote computer/remote computer resource

112 a: local computer

112 b: local computer/second local computer

200C, 200E: on-line inspection system

200D: drawing (A)

202: line scanning camera/light sensor

203: lens/imaging lens

204: frame structure

206: wafer with a plurality of chips

208: wafer rack

209: working distance

210: transfer robot/motorized transfer robot/conveyor

212: image line

214: mirror/reflector

218: visual field

220: track/local computer

222: display/display unit

230: light source/line light source/linear light source

244. 248: included angle

250: distance/first position

251: second position

252: distance/third position

254: distance between two adjacent plates

260: reflectance/reflectance values

262: wavelength of light

400: method of producing a composite material

401. 402, 403, 409, 410, 412, 413, 414, 415, 416, 417, 420, 421, 422, 430, 432, 434, 436: operation of

X, Y, Z: direction of rotation

Detailed Description

The following disclosure sets forth various exemplary embodiments for implementing different features of the present subject matter. Specific examples of components and arrangements are set forth below to simplify the present disclosure. Of course, these are merely examples and are not intended to be limiting. For example, it will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or directly coupled to the other element or one or more intervening elements may be present.

The proposed disclosure provides various embodiments of an online inspection system including a high resolution line scan camera. In some embodiments, such an in-line inspection system may be integrated in a transfer station having a transfer conveyor configured to unload wafers from a previous processing station and transfer them to a next processing station. Furthermore, rather than sampling only a few locations on the wafer for inspection, according to some embodiments, the line scan camera may scan the entire wafer surface in a line-by-line manner during such a wafer transfer process to determine if a defect exists after being unloaded from a previous processing station and before being loaded into a next processing station. As such, such an in-line inspection process provides high throughput (i.e., no compromise between sampling rate and inspection resolution) without sacrificing high inspection resolution, as opposed to conventional in-line manual inspection processes. Thus, the above-described problems in conventional offline inspection systems can be advantageously avoided.

FIG. 1 shows a block diagram of asystem 100 for integrating multiple in-line inspection systems into a semiconductor manufacturing production line, according to one or more embodiments of the present disclosure. It should be noted that thesystem 100 is merely an example and is not intended to limit the present disclosure. Accordingly, it should be understood that additional operations may be provided before thesystem 100 shown in FIG. 1, during thesystem 100 shown in FIG. 1, and after thesystem 100 shown in FIG. 1, and that only some other operations may be briefly described herein.

Referring to fig. 1,system 100 includes a plurality ofprocessing stations 102a, 102b through 102c (collectively referred to herein as processing stations 102), a plurality ofinspection systems 104a and 104b (collectively referred to herein as inspection systems 104) located between respective processing stations 102, and a plurality ofstockers 106a and 106b (collectively referred to herein as stockers 106) coupled to respective inspection systems 104. Examples of IC fabrication processes implemented in the processing station 102 include cleaning, photolithography, wet etching, dry etching, dielectric deposition, metal deposition, and any process known in the art. At least one feature may be formed in each processing station 102, including metal contacts, etched trenches, isolation (isolation), vias, interconnects, and the like.

The intermediate inspection system 104 is coupled to at least two processing stations 102, wherein at least one wafer from one previous processing station 102 may be inspected before it is transported to the next processing station 102. For example, theprocessing station 102b is coupled to theprevious processing station 102a by theinspection system 104a and is also coupled to thesubsequent processing station 102c by theinspection system 104 b. Each inspection system 104 is coupled to at least one stocker 106. For example, theinspection system 104a is coupled to astocker 106a, wherein wafers determined to be defective by theinspection system 104a may be pulled from the production line and stored in thestocker 106a for reprocessing or reject (reject) without being transferred to thenext processing station 102 b.

As discussed in further detail below, in some embodiments, inspection system 104 includes a wafer transport system (e.g., a conveyor) that transfers wafers through an inspection station, a line scan camera, and a local computer having a storage unit and a display unit. For example, the wafer may be transferred from theprocessing station 102a to theprocessing station 102b on a conveyor in theinspection system 104a, or if a defect is detected, the wafer may be transferred from theprocessing station 102a to thecorresponding stocker 106a on a conveyor in theinspection system 104 a. While being transferred in theinspection system 104a, the surface of the wafer is imaged by a line scan camera. The data collected by the line scan camera may be stored in a memory unit of thelocal computer 112a and then subjected to a preprocessing step. As described in further detail below, examples of pre-processing may include reconstructing the line images into a two-dimensional image of the wafer surface, as well as various distortion corrections. As shown in fig. 1, a secondlocal computer 112b is coupled to thesecond inspection system 104b to store and pre-process data collected by thesecond inspection system 104 b.

Each of thelocal computers 112a and 112b is referred to herein, collectively or collectively, as a local computer 112. Each local computer 112 is coupled to aremote computer resource 110 by aconnection 108. In some embodiments,connection 108 may include an Ethernet cable (Ethernet cable), optical fiber, wireless communication media, and/or other networks known in the art. It should be understood that other connections and intermediate circuitry may be deployed between the local computer 112 and theremote computer resource 110 to facilitate interconnection.

In some embodiments, image processing operations may be performed by theremote computer resource 110 to automatically compare the design criteria to the collected image of the wafer surface according to a predetermined algorithm or rule involved (e.g., line width, irregular shape, non-uniformity, etc.). In some embodiments, theremote computer resources 110 include a computer network, a server, an application, and/or a data center (commonly referred to as a "cloud" or cloud computing). Results from theremote computer resource 110 as to whether the wafer contains defects and determinations are processed and transmitted back through theconnection 108 to the local computer 112 associated with the respective inspection system 104. In some embodiments, theremote computer resource 110 may not be necessary if the local computer 112 can perform image processing and analysis locally. In some embodiments, the various inspection results (e.g., the size, density, and distribution of defects and a map of defects overlapping the design pattern) are displayed on a local display unit and, if it is determined that the wafer is defective, a control signal is sent to the conveyor to transfer the wafer to the respective stocker 106. In some embodiments, the wafers fail to meet the predefined threshold or criteria and are therefore determined to be defective and are transferred by a conveyor in theinspection system 104a to a cassette (cassette) in thestocker 106a for reprocessing or return. On the other hand, if it is determined that the wafer is defect-free and meets the predefined threshold or criteria, the wafer is transferred by the conveyor to thenext processing station 102b for further processing. In some embodiments, the threshold may vary depending on the application and may be set by the manufacturer.

Although thesystem 100 in the illustrated embodiment of fig. 1 includes only three processing stations 102, two inspection systems 104, two stockers 106, two local computers 112, and oneremote computer 110, it should be understood that the illustrated embodiment of fig. 1 is provided for illustration only. Thesystem 100 may include any desired number of processing stations 102 with any desired number of inspection systems 104 and stockers 106 while remaining within the scope of the present disclosure. Further, in some embodiments, the inspection system 104 may be coupled to two or more processing stations 102 and/or two or more stockers 106. In some embodiments, two or more inspection systems 104 may be located between two processing stations 102.

In some embodiments, a separate transfer chamber in the inspection station 104 may be coupled to a process chamber in the process station 102. In some embodiments, to perform a process such as metal deposition or dielectric deposition, the in-line camera of the inspection system 104 is separated from the deposition chamber of the processing station to protect the camera and other components of the inspection system 104 from material deposition or extreme environments such as high temperature heating and particle bombardment (ion bombedment). In some embodiments, the transfer chamber of the inspection system 104 may maintain a vacuum seal between the two vacuum processing chambers, or utilize high purity inert gases (e.g., Ar and N)₂) Purging is performed to provide an inert atmosphere for the air sensitive wafer during the transfer process. In some embodiments, the inspection system 104 may be configured inside the process chambers of the processing station 102 if the process does not interfere with the inspection. This integration of the inspection system into an existing semiconductor manufacturing line provides an in-line inspection that can efficiently detect and map defects across a wafer without relying on manual inspection or statistical sampling of the wafer surface. By mapping the defects of the wafer after each processing stage as part of an in-line manufacturing process, an important understanding of the process characteristics (e.g., tools and conditions) at each stage can be achieved while minimizing negative impact on throughput.

As described above, fig. 2A-2C illustrate various perspective views of an in-line inspection system 200 for various space requirements, wafer sizes, and transfer mechanisms, according to some embodiments. Of course, these are merely examples and are not intended to be limiting.

Fig. 2A illustrates a perspective view of aninspection system 200A according to some embodiments. In one embodiment, thewafer 206 is held by asuitable wafer holder 208 coupled to a conveyor (e.g., a motorized transfer robot 210). Thetransfer robot 210 may transfer in both the X-direction and the Y-direction. In some embodiments, thetransfer robot arm 210 may also rotate about a particular center in the X-Y plane. In the illustrated embodiment, awafer rack 208 coupled to atransfer robot 210transfers wafers 206 along the X-axis at a constant speed during scanning.

In the embodiment shown in fig. 2A, theline scan camera 202 with theimaging lens 203 is mounted on aframe 204, theframe 204 being located at aspecific working distance 209 in the vertical (Z) direction relative to the surface of thewafer 206. In some embodiments, these three components (i.e., 202, 203, and 204) are fixed. In some embodiments, diffused illumination (not shown) from a remotely located light source (not shown) may be used, which may provide sufficient light for theline scan camera 202 to capture a high resolution image of thewafer 206. In some embodiments, the position of theframe 204 andline scan camera 202 relative to thewafer 206 may be adjusted for alignment purposes.

In some embodiments, rather than taking an overall image of the wafer,line scan camera 202 collects image data one scan line at a time. Theimage line 212 indicated by a short dashed line in fig. 2A is a line region (line region) in which light reflected or scattered from the surface of the wafer under inspection is collected by the photosensor of theline scanning camera 202 through theimaging lens 203. In some embodiments, the field of view 218 (e.g., the maximum length of the image line 212) of theline scan camera 202 in the Y direction may be adjusted by the width of the light sensor in theline scan camera 202, the workingdistance 209, and the focal length of thelens 203. In some embodiments, theimage line 212 is an overlapping portion of the field ofview 218 in the Y direction and the surface of thewafer 206. For example, the width of the imaging lens may be 25 millimeters (mm), which may provide a field ofview 218 that is up to 215mm wide in the Y direction and a sensor width of 14 mm. Thus, the resolution in the Y-direction, which is in mm/pixel for a photosensor width of 1024 pixels/row, can take into account the diameter of thewafer 206 and be controlled by the workingdistance 209. In some other embodiments, line scan cameras including photosensors with different widths and pixel numbers may be used and are within the scope of the present disclosure. In some embodiments, the resolution provided by such a system is 9 microns.

In some embodiments, theline scan camera 202 includes a light sensor that may be based on various technologies, such as a charge-coupled detector (CCD), a complementary metal-oxide-semiconductor (CMOS), or a hybrid CCD/CMOS architecture, among others. In some embodiments, the light sensor may be a black and white sensor or a color sensor. In some embodiments, such light sensors may be configured to operate over a broad range of wavelengths or a narrow range of wavelengths (e.g., ultraviolet light, visible light, infrared light, x-rays, and/or other suitable wavelengths). In some other embodiments, such a light sensor may be configured to receive non-fluorescent light reflected and/or scattered from a light source or fluorescent light emitted by a defect or feature due to excitation by a light source.

In some embodiments,wafer 206 comprises a silicon substrate. Alternatively,wafer 206 may comprise other elemental semiconductor materials, such as germanium. The substrate may also comprise compound semiconductor materials such as silicon carbide, gallium arsenide, indium arsenide, and indium phosphide. In addition, thewafer 206 may include alloy semiconductor materials such as silicon germanium, silicon germanium carbide, gallium arsenic phosphide, and gallium indium phosphide. Each material may interact with incident light from the light source in different ways due to different material properties, such as refractive index and extinction coefficient (extinction coefficient), which may affect the design of the illumination source and light sensor (e.g., wavelength, sensitivity and mode (e.g., astigmatism, reflectance or fluorescence)) and the speed of the conveyor.

Thewafer 206 may contain at least one feature to be optically inspected. In some embodiments,wafer 206 may include trenches formed by dry/wet etching dielectric materials including Fluorinated Silicate Glass (FSG), phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), polyimide, and/or other future-developed low-k dielectric materials. In some embodiments, thewafer 206 may also include conductive features such as horizontal interconnects or vertical vias formed by processes such as Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), spin-on coating (spin-on coating), and the like. In some embodiments, the design of the illumination source, light sensor, andimaging lens 203 may also be affected by the physical dimensions (e.g., thickness and roughness) of those materials located on thewafer 206, as well as the material properties of thewafer 206 and the material properties of the material located on top of thewafer 206, due to phenomena such as interference effects and anti-reflection effects.

FIG. 2B illustrates a perspective view of aninspection system 200B including amirror 214 according to some embodiments. In some embodiments, themirror 214 may reflect non-fluorescent and/or fluorescent light from the image lines 212 on the surface of thewafer 206 through thelens 203 to the light sensors in theline scanning camera 202. Since the optical path can be changed and a portion is located in the X-direction parallel to the transfer direction of thewafer 206, the use of themirror 214 can enable theinspection system 200B to be used in applications where large space is not available in the Z-direction (e.g., the total height of the transfer chamber is less than the sum of the workingdistance 209 and the length of the line scan camera 102). In some embodiments, the position in the X-Z plane and the tilt angle (i.e., rotation) along the Y-axis of the mirror 114 can be adjusted for alignment purposes. The configuration presented in fig. 2B is for illustration only and is not intended to be limiting. For example, multiple mirrors may be used to provide a desired optical path to direct light in a desired direction. In some embodiments, themirror 214 is flat to prevent distortion of the reflected light caused by the surface of themirror 214. For example, themirror 214 includes a surface waviness in a range of less than or equal to 20 micrometers per 20 millimeters (μm/mm) and a surface curvature in a range of equal to or less than 0.1mm per 100 mm.

FIG. 2C illustrates a cross-sectional view of an in-line inspection system 200C including amirror 214, according to some embodiments. Because of the need for a wide field ofview 218, flood illumination becomes difficult to achieve with uniform intensity, especially when inspecting large wafers in confined spaces. As described above, since theimage line 212 is the only portion of the wafer that needs to be uniformly illuminated to collect the line scan image by theline scan camera 202, the illumination of theimage line 212 may come from a linelight source 230 having a narrow slot for directing a light beam. In some embodiments, the linelight source 230 may include a Light Emitting Diode (LED) array with a half-bar converging line lens as a light guide. Such light sources may be configured in a limited space while maintaining uniform illumination of the image lines 212 on thewafer 206.

In some embodiments, thedistance 250 from one end of thelens 203 to the reflective surface of themirror 214 is less than or equal to 145mm, where the reflective surface of themirror 214 is the face that reflects the light beam from thelight source 230. In some embodiments, thedistance 252 between themirror 214 and the surface of thewafer 206 that reflects the beam from thelight source 230 is 400 mm. Further, thedistance 254 between the end of thelight source 230 and the surface of thewafer 206 is 65 mm. Thelight source 230 is also configured to have anangle 248 with respect to the surface of thewafer 206 so that light reflected from the surface of thewafer 206 can reach themirror 214. Themirror 214 is tilted at anangle 244 with respect to a direction perpendicular to the surface of thewafer 206 to reflect light from the surface of thewafer 206 into thelight sensor 202. In some embodiments, includedangle 248 is 75 degrees and includedangle 244 is 52.5 degrees. In some embodiments, the includedangles 244 and 248 may be adjusted manually or automatically by motors coupled to the shelves of thereflector 214 and thelight source 230 for alignment purposes.

Fig. 2D illustrates agraph 200D of reflectance versus wavelength in the visible range (410nm to 700nm) according to some embodiments. Thereflectance 260 at thewavelength 262 below 650nm is greater than 90% and thereflectance value 260 at wavelengths between 650nm and 700nm is greater than 85%.

Fig. 2E illustrates a perspective view of an in-line inspection system 200E that can inspectwafers 206 having large dimensions (e.g., 152mm diameter), according to some embodiments. In some embodiments, the light sensor, the workingdistance 209, and theimaging lens 203 in theline scan camera 202 may be configured to ensure that the width of the field ofview 218 in the Y direction is equal to or greater than the diameter of thewafer 206. In some embodiments, as shown in fig. 2C, thewafer 206 may be transported on a pair ofrails 220.

Because of the need for a wide field ofview 218, flood illumination becomes difficult to achieve with uniform intensity, especially when inspecting large wafers in confined spaces. As described above, since theimage line 212 is the only portion of the wafer that needs to be uniformly illuminated to collect the line scan image by theline scan camera 202, the illumination of theimage line 212 may come from a linelight source 230 having a narrow slit for directing a light beam. In some embodiments, the linelight source 230 may include an array of light emitting diodes with half a converging row lens as a light guide. Such light sources may be configured in a limited space while maintaining uniform illumination of the image lines 212 on thewafer 206. However, according to various embodiments, a variety of light sources suitable for various applications may be utilized. In another embodiment, animaging lens 203 with a larger diameter, smaller focal length, and/or large index of refraction may be used to provide a wide field ofview 218 with asmall working distance 209. To obtain a resolution (mm/pixel) comparable to that on a smaller wafer, a camera with a larger sensor size may be used. In some embodiments, the optical path may be redirected by a mirror or a plurality of mirrors, such as a mirror array (not shown), to accommodate the inspection system in a particular application.

In some embodiments, theline scan camera 202 is located close to a gate valve of the process chamber. In some embodiments, the relative position between theline scanning camera 202 and thelight source 230 may affect the inspection criteria. For example, in the case of a linearlight source 230 used with awafer 206 having a reflective surface, when theline scan camera 202 is off the angle of reflection, the reflective surface appears dark in the light sensor, while features and/or defects may scatter light and appear bright in the image. As another example, whenline scan camera 202 is within the angle of reflection of incident light fromlight source 230, the surface appears bright, while features and/or defects may appear darker or brighter relative to the rest of the surface depending on their reflectivity.

In some embodiments, the conveyor may be a mechanical transfer device consisting of a plurality of joints, a single arm, and a platform. In some embodiments, the mechanical transfer device can provide high speed and high precision wafer processing within a limited space. As discussed above, surface inspection usingline scan camera 202 requires linear motion ofwafer 206 in a direction perpendicular to the axis ofimage line 212. In some embodiments, the in-line inspection system 200 with theline scan camera 202 may be configured to focus on a portion of the wafer transfer path where such linear relative motion between thewafer 206 and theimage line 212 may be provided by a combination of moving parts of the mechanical transfer device (e.g., rotation of the joint and linear motion of the arm and platform).

In some embodiments, such an inspection system may be combined with other in-line or off-line functional inspection processes for performing additional functional yield tests (e.g., conductivity measurements). Although the online defect detection system shown above includes only one line scanning camera (e.g., 202 in fig. 2A-2C), any desired number of line scanning cameras (e.g., operating in different wavelength ranges and simultaneously detecting different defects (e.g., size, distribution, and material)) may be combined in an inspection system while remaining within the scope of the present disclosure.

Fig. 3A-3C illustrate perspective views of asystem 300 for image recording when scanning a wafer surface through a camera view while transferring the wafer by a conveyor, according to some embodiments.

As shown in fig. 3A, thesystem 300 first scans thewafer 206 at afirst location 250 of thewafer 206 controlled by aconveyor 208/210. According to some embodiments, in thefirst position 250, the scanning of the wafer surface begins. As thewafer 206 enters the field ofview 218 in the Y direction, a recording cycle of the line scan image from theline scan camera 202 by thelocal computer 220 is initiated. In some embodiments, the recording may also be initiated by an address signal from an encoder located on the motor of thetransfer robot 210. In some embodiments, as the scan proceeds, the image data is shown on adisplay 222 coupled to thelocal computer 220. As shown in FIG. 3A, at the beginning of the scanning process, image data for display ondisplay 222 is not yet available.

In some embodiments, this process of recording a single row of pixels fromline scan camera 202 tolocal computer 220 is performed in two steps, an exposure step and a readout step. In some embodiments, a recording process is implemented for multiple rows of pixels fromline scan camera 202. In a first step, as discussed above,line scan camera 202 collects a single row of pixels for each exposure at one location, initiated by the application of a trigger pulse to the camera. The trigger pulse also ends the exposure cycle and begins a second step, transferring the sensor image information to a readout register and eventually off the camera to the local computer to complete the readout step. In some embodiments, the sensor image information is provided to thelocal computer 220 one pixel row at a time. In some other embodiments,line scan camera 202 collects multiple rows of pixels for each exposure at one location.

In some embodiments, the exposure time of individual rows atimage line 212 and the number of rows may be affected by the speed ofwafer 206 and the resolution requirements along the X-axis in the wafer plane. In some embodiments, the exposure time may also be affected by the illumination intensity, the sensitivity of the light sensor, and the type of defect being detected. While in the first readout period, theline scan camera 202 continues to perform the next exposure step in the next cycle while thetransfer robot 210 moves thewafer 206 to the next position.

According to some embodiments, as shown in fig. 3B, thesystem 300 continues at thesecond location 251, where the partial scan of the relevant wafer surface is completed. In some embodiments, reconstruction of the image of the wafer surface under inspection is performed by thelocal computer 220 based on a plurality of single line images, and the surface image is then displayed on thedisplay unit 222 in real time as shown in fig. 3B.

Once the surface of the wafer under inspection has completed scanning at the third location 252 (as shown in fig. 3C), thelocal computer 220 then proceeds to reconstruct and pre-process the complete two-dimensional surface image to make the image ready for defect detection. In some embodiments, such pre-processing of the surface image includes bias correction, gain correction, distortion correction, adjusting contrast, and the like. According to some embodiments, the reconstructed image is displayed on thedisplay unit 222, as shown in fig. 3C.

Fig. 4 illustrates a flow diagram of amethod 400 of in-line inspection of a wafer surface during fabrication of integrated circuits on the wafer, in accordance with some embodiments. As indicated by the corresponding dashed lines in fig. 4, themethod 400 includes three sub-functional blocks that are executed by themachine operating system 409, thelocal inspection system 416, and theremote computer 422, respectively.

Themethod 400 begins atoperation 401, whereoperation 401 includes providing a first wafer from a first processing station. The method continues withoperation 402 where the first wafer is transferred on a conveyor to an inspection station inoperation 402. In some embodiments, such a conveyor may be a transfer robot arm, a conveyor belt, or the like, which may provide motion such as horizontal motion, vertical motion, linear motion, rotational motion, and combinations thereof. In some embodiments, the conveyor can process a variety of substrates, such as thin substrates, large substrates, film frame substrates, glass substrates, grooved substrates, and the like. In some embodiments, the conveyor may transfer wafers between cassettes, platforms, and/or chambers. In some embodiments, thecontroller 403 communicates with encoders on the conveyor and sends a trigger signal to the line scan camera in thelocal inspection system 416.

Themethod 400 continues tooperation 410 where verification parameters are configured inoperation 410. In some embodiments, such a configuration includes a process of writing an inspection recipe (inspection recipe) to theinspection operation 416 or a process of recalling an existing recipe containing inspection system parameter settings for a particular type of substrate, feature, or defect to be inspected back to theinspection operation 416. In some embodiments,operation 410 also includes configuration of a controller that controls movement (e.g., speed and direction) of the conveyor. In some embodiments, inspection parameters include trigger criteria, inspection resolution, line frequency, pixel frequency, total acquisition time (total acquisition time), illumination intensity, speed of movement of the conveyor, size of the wafer, and/or other suitable parameters.

Themethod 400 continues tooperation 412 where, inoperation 412, the surface of the first wafer is scanned by the line scanning camera while the conveyor transports the first wafer in a direction perpendicular to the line scanning direction at a constant speed, as discussed above with reference to, for example, fig. 2A-2E and 3A-3C. In some embodiments, the line scan may be triggered by acontroller 403 acquiring position parameters from an encoder located on the conveyor.

Themethod 400 continues tooperation 413, where in operation 413A plurality of line scan images are recorded by a light sensor in a line scan camera in accordance with thesystem 300 shown in fig. 3A-3C. In some embodiments, the plurality of line scan images are converted from analog signals to digital signals and stored in a local computer beforeoperations 414 and 415, during whichoperations 414 and 415 the sample image is reconstructed based on the plurality of line scan images and preprocessed when the scan of the surface of the first wafer is complete. In some embodiments,such operations 414 and 415 include at least one of a process such as bias correction, gain correction, distortion correction, contrast adjustment, and the like.

Themethod 400 continues tooperation 417 in which the preprocessed sample image may be displayed on a local display coupled with the local computer. In some embodiments, the display may also be a touch screen for inputting and displaying inspection parameters. In some embodiments, the preprocessed sample images are compared to reference values, design criteria, and predefined thresholds to perform wafer-scale mapping (wafer-scale mapping) of defects byremote computer 422 to determine defect types and distributions. The results are then transmitted back to the local computer to instruct thecontroller 403 to control the conveyor so that the wafer can be reprocessed, returned, or moved on to the next process.

In some embodiments, the linear speed of the line scanning camera is determined by the speed of the conveyor. In another embodiment, the resolution requirements of the line scan camera may be determined by the type of defect involved or the type of defect potentially introduced in the corresponding step of the manufacturing line.

Themethod 400 continues tooperation 420 where the pre-processed sample image is sent to aremote computer 422 inoperation 420. In some embodiments, the sample image is then processed duringoperation 421 to characterize the size and distribution of the defects, and the sample image is compared to the design criteria of the device (e.g., size, shape, location, and color) to classify the defects into predefined categories. In some embodiments, the design criteria may vary between various steps within a production line having different layout characteristics. In some embodiments, image processing andanalysis system 421 may first identify the boundaries of each die. In some embodiments, the sensitivity of the system may be adjusted by the resolution of the camera. In some embodiments, theremote computer 422 may also decide to return, reprocess, or continue movement of the first wafer based on design criteria associated with the process information. The completed processed surface image may be transmitted back to the local computer.

The results are then transmitted back to the local computer for display, which allows control signals to also be provided back to the conveyor. If the first wafer is defective and must be removed from the production line, themethod 400 proceeds tooperation 430, where the first wafer is transported to the stocker by a conveyor, followed byoperation 432, where a second wafer is loaded by a conveyor to an inspection station for inspection. If it is determined that the first wafer is defect-free and its further processing can continue, themethod 400 continues tooperation 434. In some embodiments, when the first (i.e., current) processing station is the last processing station in the production line, themethod 400 proceeds tooperations 430 and 432 as discussed above. In other embodiments, when the first (i.e., current) processing station is not the last, themethod 400 continues tooperation 436 where the first wafer is shipped to the second (i.e., next) processing station before continuing tooperation 432 where the second wafer is provided from the first processing station. Thus, automatic in-line inspection and wafer sorting can be achieved.

The foregoing merely illustrates the principles of the disclosure. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the principles of the disclosure and are included within its spirit and scope. Moreover, all examples and conditional language recited herein are principally intended expressly to be only for pedagogical purposes and to aid the reader in understanding the principles of the disclosure and the disclosure, and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the disclosure, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure.

This description of the exemplary embodiments should be read in connection with the figures of the accompanying drawings, which are to be considered part of the entire written description. In the description, relative terms such as "lower," "upper," "horizontal," "vertical," "above," "below," "upper," "lower," "top" and "bottom," as well as derivatives thereof (e.g., "horizontally," "downwardly," "upwardly," etc.) should be construed to refer to the orientation as then set forth or shown in the drawing under discussion. These relative terms are for convenience of description and do not require that the apparatus be constructed or operated in a particular orientation.

While the present disclosure has been described in terms of exemplary embodiments, it is not limited thereto. Rather, the appended claims should be construed broadly, to include other variants and embodiments of the disclosure which may be made by those skilled in the art without departing from the scope and range of equivalents of the disclosure.

In an embodiment, a method of in-line detection of defects on a surface of a semiconductor wafer during a semiconductor device manufacturing process, the method comprising: automatically transporting the semiconductor wafer from the first processing station to an inspection station; scanning a surface of a wafer in the inspection station using a camera; generating at least one image of the wafer surface; analyzing the at least one image to detect defects on the wafer surface based on a set of predetermined criteria; automatically transporting the wafer from the inspection station to a stocker if the wafer is determined to be defective; and if it is determined that the wafer is defect free, automatically transporting the wafer to a second processing station for further processing according to the semiconductor device manufacturing process. In some embodiments, transporting comprises transporting the semiconductor wafer between the first processing station and the inspection station using a transfer robot arm. In some embodiments, a transfer robot is coupled to a rack for holding the semiconductor wafer. In some embodiments, the camera comprises a line scan camera that scans the semiconductor wafer surface one pixel row at a time. In some embodiments, comprising redirecting an optical path between the camera and the semiconductor wafer using a mirror, wherein the mirror has a surface waviness and a surface curvature, wherein the surface waviness is equal to or less than 20 μm/20mm and the surface curvature is equal to or less than 0.1mm/100 mm; and illuminating the wafer surface with a light source. In some embodiments, the light source comprises a line light source that illuminates only a line portion of the wafer surface at a time. In some embodiments, generating at least one image comprises: providing pixel data from the camera to a local processor coupled with the camera; pre-processing the pixel data to generate the image of the wafer surface; and displaying the image of the wafer surface on a display coupled to the local processor. In some embodiments, further comprising transmitting data representative of the image of the wafer surface to a remote computer; wherein said analyzing said at least one image of said wafer surface is performed by said remote computer; and receiving results of the analysis at a local processor from the remote computer, wherein the transporting the semiconductor wafer to the second processing station or the stocker is based on the results.

In another embodiment, an inspection station for in-line detection of defects on a surface of a semiconductor wafer, the inspection station coupled to a first processing station, the inspection station comprising: a conveyor configured to automatically transport the semiconductor wafer from the first processing station to the inspection station; a camera configured to scan a surface of the semiconductor wafer and generate at least one image of the surface; and at least one processor configured to receive the at least one image from the camera and analyze the at least one image to detect defects on the surface based on a set of predetermined criteria, wherein the conveyor is further configured to: automatically transporting the wafer from the inspection station to the second processing station if the wafer is determined to be defect free or to a stocker if the wafer is determined to be defect free. In some embodiments, the conveyor comprises a transfer robot arm. In some embodiments, a transfer robot is coupled to a rack for supporting the wafer during transport between the various stations. In some embodiments, the camera comprises a line scan camera that scans the wafer surface one pixel row at a time automatically. In some embodiments, further comprising: a mirror redirecting an optical path between the camera and the wafer surface, wherein the mirror has a surface waviness and a surface curvature, wherein the surface waviness is equal to or less than 20 μm/20mm and the surface curvature is equal to or less than 0.1mm/100 mm; and a light source illuminating the wafer surface. In some embodiments, the light source comprises a line light source that illuminates only a row portion of the wafer surface at a time. In some embodiments, the at least one processor coupled to the camera is further configured to: receiving pixel data from the camera; pre-processing the pixel data to generate at least one image of the wafer surface; and displaying the image of the wafer surface on a display. In some embodiments, the at least one processor comprises: a local processor; and a remote computer configured to: receiving the image of the wafer surface; analyzing the image of the wafer surface; and transmitting the analysis results to the local processor.

In yet another embodiment, a system for in-line detection of defects on a surface of a semiconductor wafer during a semiconductor device manufacturing process, the system comprising: a first processing station performing a first semiconductor manufacturing process; a second processing station performing a second semiconductor manufacturing process; an inspection station coupled between the first processing station and the second processing station to transport semiconductor wafers between the first processing station and the second processing station, wherein the inspection station comprises: a conveyor configured to automatically transport the semiconductor wafer from the first processing station to the inspection station; a mirror redirecting an optical path between the camera and the wafer surface, wherein the mirror has a surface waviness and a surface curvature, wherein the surface waviness is equal to or less than 20 μm/20mm and the surface curvature is equal to or less than 0.1mm/100 mm; a camera configured to scan a surface of the semiconductor wafer and generate at least one image of the surface; and at least one processor configured to receive the at least one image from the camera and analyze the at least one image to detect defects on the surface based on a set of predetermined criteria, wherein the conveyor is further configured to: automatically transporting the wafer from the inspection station to the second processing station if the wafer is determined to be defect free or to a stocker if the wafer is determined to be defect free. In some embodiments, the conveyor comprises a transfer robot arm. In some embodiments, the camera comprises a line scan camera that scans the wafer surface one pixel row at a time. In some embodiments, the at least one processor comprises: a local computer; and a remote computer configured to: receiving the image of the wafer surface; analyzing the image of the wafer surface; generating a result of the analysis; and communicating the results to the local computer, wherein the automatically transporting the wafer to the second processing station or the stocker is performed based on the results.

Claims (19)

Translated fromChinese

1.一种半导体装置在线检验的方法，其特征在于，所述方法包括：1. A method for on-line inspection of a semiconductor device, wherein the method comprises:提供一系统，包括多个处理站、位于相应的所述处理站之间的多个检验站以及与相应的所述检验站耦合的多个储料器，其中所述多个检验站中的一个直接耦合到所述多个处理站中的第一处理站与第二处理站，所述第一处理站执行第一半导体制造工艺，所述第二处理站执行第二半导体制造工艺；A system is provided comprising a plurality of processing stations, a plurality of inspection stations located between respective said processing stations, and a plurality of stockers coupled with respective said inspection stations, wherein one of said plurality of inspection stations directly coupled to a first processing station and a second processing station of the plurality of processing stations, the first processing station performing a first semiconductor fabrication process and the second processing station performing a second semiconductor fabrication process;将半导体晶片从所述第一处理站运送到所述多个检验站中的所述一个；transporting semiconductor wafers from the first processing station to the one of the plurality of inspection stations;使用光源照射所述半导体晶片的晶片表面；irradiating the wafer surface of the semiconductor wafer with a light source;使用反射镜反射直接从所述晶片表面反射的光以及将相机与所述半导体晶片之间的光学路径改向，所述反射镜具有表面波纹度及表面曲率，其中所述表面波纹度等于或小于20μm/20mm且所述表面曲率等于或小于0.1mm/100mm；Reflecting light directly reflected from the wafer surface and redirecting the optical path between the camera and the semiconductor wafer using a mirror having a surface waviness and surface curvature, wherein the surface waviness is equal to or less than 20μm/20mm and the surface curvature is equal to or less than 0.1mm/100mm;在所述多个检验站中的所述一个中使用所述相机扫描所述晶片表面；scanning the wafer surface with the camera in the one of the plurality of inspection stations;产生所述晶片表面的至少一个图像；generating at least one image of the wafer surface;分析所述至少一个图像，以基于一组预定准则来检测所述晶片表面上的缺陷；analyzing the at least one image to detect defects on the wafer surface based on a set of predetermined criteria;如果确定所述半导体晶片有缺陷，则将所述半导体晶片从所述多个检验站的所述一个运送到所述多个储料器中的一个；且if the semiconductor wafer is determined to be defective, transporting the semiconductor wafer from the one of the plurality of inspection stations to one of the plurality of stockers; and如果确定所述半导体晶片无缺陷，则将所述半导体晶片运送到所述第二处理站以根据半导体装置制造工艺进行所述第二半导体制造工艺。If it is determined that the semiconductor wafer is free of defects, the semiconductor wafer is transported to the second processing station to perform the second semiconductor fabrication process according to a semiconductor device fabrication process.2.根据权利要求1所述的方法，其特征在于，所述运送包括使用转移机械臂在所述第一处理站与所述多个检验站中的所述一个之间运送所述半导体晶片。2. The method of claim 1, wherein the transporting comprises transporting the semiconductor wafer between the first processing station and the one of the plurality of inspection stations using a transfer robot.3.根据权利要求2所述的方法，其特征在于，所述转移机械臂耦合到用于支持所述半导体晶片的架。3. The method of claim 2, wherein the transfer robot is coupled to a rack for supporting the semiconductor wafer.4.根据权利要求1所述的方法，其特征在于，所述相机包括线扫描相机，以每次扫描一个像素行的方式扫描所述晶片表面。4. The method of claim 1, wherein the camera comprises a line scan camera that scans the wafer surface one pixel row at a time.5.根据权利要求1所述的方法，其特征在于，所述光源包括线光源，所述线光源每一次仅照射所述晶片表面的线部分。5. The method of claim 1, wherein the light source comprises a line light source, and the line light source illuminates only a line portion of the wafer surface at a time.6.根据权利要求1所述的方法，其特征在于，所述产生至少一个图像包括：6. The method of claim 1, wherein the generating at least one image comprises:将像素数据从所述相机提供到与所述相机耦合的本机处理器；providing pixel data from the camera to a native processor coupled to the camera;对所述像素数据进行预处理以产生所述晶片表面的所述图像；以及preprocessing the pixel data to generate the image of the wafer surface; and在耦合到所述本机处理器的显示器上显示所述晶片表面的所述图像。The image of the wafer surface is displayed on a display coupled to the local processor.7.根据权利要求6所述的方法，其特征在于，还包括：7. The method of claim 6, further comprising:将代表所述晶片表面的所述图像的数据传送到远程计算机，其中所述分析所述晶片表面的所述至少一个图像是由所述远程计算机实施的；以及transmitting data representing the image of the wafer surface to a remote computer, wherein the analyzing the at least one image of the wafer surface is performed by the remote computer; and在本机处理器处从所述远程计算机接收所述分析的结果，其中所述将所述半导体晶片运送到所述第二处理站或所述储料器是基于所述结果进行的。The results of the analysis are received at the local processor from the remote computer, wherein the transporting the semiconductor wafer to the second processing station or the stocker is based on the results.8.一种半导体晶片在线检验的系统，其特征在于，所述系统包括：8. A system for on-line inspection of semiconductor wafers, wherein the system comprises:多个处理站，其中所述多个处理站中的第一处理站执行第一半导体制造工艺，且所述多个处理站中的第二处理站执行第二半导体制造工艺；a plurality of processing stations, wherein a first processing station of the plurality of processing stations performs a first semiconductor fabrication process and a second processing station of the plurality of processing stations performs a second semiconductor fabrication process;检验站，直接耦合到所述第一处理站与所述第二处理站，以在所述第一处理站与所述第二处理站之间运送半导体晶片，其中所述检验站包括：an inspection station directly coupled to the first processing station and the second processing station to transport semiconductor wafers between the first processing station and the second processing station, wherein the inspection station includes:输送机，被配置成将所述半导体晶片从所述第一处理站运送到所述检验站；a conveyor configured to transport the semiconductor wafers from the first processing station to the inspection station;相机，被配置成扫描所述半导体晶片的晶片表面并产生所述晶片表面的至少一个图像；a camera configured to scan a wafer surface of the semiconductor wafer and generate at least one image of the wafer surface;反射镜，反射直接从所述晶片表面反射的光以及将所述相机与所述晶片表面之间的光学路径改向，所述反射镜具有表面波纹度及表面曲率，其中所述表面波纹度等于或小于20μm/20mm且所述表面曲率等于或小于0.1mm/100mm；以及a mirror that reflects light reflected directly from the wafer surface and redirects the optical path between the camera and the wafer surface, the mirror having a surface waviness and a surface curvature, wherein the surface waviness is equal to or less than 20μm/20mm and said surface curvature is equal to or less than 0.1mm/100mm; and至少一个处理器，被配置成从所述相机接收所述至少一个图像并分析所述至少一个图像以基于一组预定准则来检测所述晶片表面上的缺陷，at least one processor configured to receive the at least one image from the camera and analyze the at least one image to detect defects on the wafer surface based on a set of predetermined criteria,其中所述输送机还被配置成：如果确定所述半导体晶片无缺陷，则将所述半导体晶片自动地从所述检验站运送到所述第二处理站或者如果确定所述半导体晶片有缺陷，则将所述半导体晶片自动地从所述检验站运送到储料器。wherein the conveyor is further configured to automatically transport the semiconductor wafer from the inspection station to the second processing station if the semiconductor wafer is determined to be free of defects or if the semiconductor wafer is determined to be defective, The semiconductor wafers are then automatically transported from the inspection station to a stocker.9.根据权利要求8所述的系统，其特征在于，所述输送机包括转移机械臂。9. The system of claim 8, wherein the conveyor includes a transfer robot.10.根据权利要求9所述的系统，其特征在于，所述转移机械臂耦合到架，所述架用于在各个所述站之间进行运送期间支持所述半导体晶片。10. The system of claim 9, wherein the transfer robot is coupled to a rack for supporting the semiconductor wafer during transport between each of the stations.11.根据权利要求8所述的系统，其特征在于，所述相机包括线扫描相机，以每次自动地扫描一个像素行的方式扫描所述晶片表面。11. The system of claim 8, wherein the camera comprises a line scan camera that scans the wafer surface automatically one pixel row at a time.12.根据权利要求8所述的系统，其特征在于，所述系统还包括：光源，照射所述晶片表面。12. The system of claim 8, further comprising: a light source illuminating the wafer surface.13.根据权利要求12所述的系统，其特征在于，所述光源包括线光源，所述线光源每一次仅照射所述晶片表面的行部分。13. The system of claim 12, wherein the light source comprises a line light source that illuminates only a row portion of the wafer surface at a time.14.根据权利要求8所述的系统，其特征在于，耦合到所述相机的所述至少一个处理器还被配置成：14. The system of claim 8, wherein the at least one processor coupled to the camera is further configured to:从所述相机接收像素数据；receiving pixel data from the camera;对所述像素数据进行预处理以产生所述晶片表面的至少一个图像；以及preprocessing the pixel data to generate at least one image of the wafer surface; and在显示器上显示所述晶片表面的所述图像。The image of the wafer surface is displayed on a display.15.根据权利要求14所述的系统，其特征在于，所述至少一个处理器包括：15. The system of claim 14, wherein the at least one processor comprises:本机处理器；以及native processors; and远程计算机，被配置成：Remote computer, configured as:接收所述晶片表面的所述图像；receiving the image of the wafer surface;分析所述晶片表面的所述图像；以及analyzing the image of the wafer surface; and将分析结果传送到所述本机处理器。The analysis results are communicated to the native processor.16.一种半导体晶片在线检验的系统，其特征在于，所述系统包括：16. A system for on-line inspection of semiconductor wafers, wherein the system comprises:第一处理站，执行第一半导体制造工艺；a first processing station to perform a first semiconductor manufacturing process;第二处理站，执行第二半导体制造工艺；a second processing station to perform a second semiconductor manufacturing process;检验站，直接耦合到所述第一处理站与所述第二处理站，以在所述第一处理站与所述第二处理站之间运送半导体晶片，其中所述检验站包括：an inspection station directly coupled to the first processing station and the second processing station to transport semiconductor wafers between the first processing station and the second processing station, wherein the inspection station includes:输送机，被配置成将所述半导体晶片自动地从所述第一处理站运送到所述检验站；a conveyor configured to automatically transport the semiconductor wafers from the first processing station to the inspection station;相机，被配置成扫描所述半导体晶片的晶片表面并产生所述晶片表面的至少一个图像；a camera configured to scan a wafer surface of the semiconductor wafer and generate at least one image of the wafer surface;反射镜，反射直接从所述晶片表面反射的光以及将所述相机与所述晶片表面之间的光学路径改向，其中所述反射镜具有表面波纹度及表面曲率，其中所述表面波纹度等于或小于20μm/20mm且所述表面曲率等于或小于0.1mm/100mm；以及a mirror that reflects light reflected directly from the wafer surface and redirects the optical path between the camera and the wafer surface, wherein the mirror has surface waviness and surface curvature, wherein the surface waviness is equal to or less than 20 μm/20 mm and the surface curvature is equal to or less than 0.1 mm/100 mm; and至少一个处理器，被配置成从所述相机接收所述至少一个图像并分析所述至少一个图像以基于一组预定准则来检测所述晶片表面上的缺陷，at least one processor configured to receive the at least one image from the camera and analyze the at least one image to detect defects on the wafer surface based on a set of predetermined criteria,其中所述输送机还被配置成：如果确定所述半导体晶片无缺陷，则将所述半导体晶片自动地从所述检验站运送到所述第二处理站或者如果确定所述半导体晶片有缺陷，则将所述半导体晶片自动地从所述检验站运送到储料器。wherein the conveyor is further configured to automatically transport the semiconductor wafer from the inspection station to the second processing station if the semiconductor wafer is determined to be free of defects or if the semiconductor wafer is determined to be defective, The semiconductor wafers are then automatically transported from the inspection station to a stocker.17.根据权利要求16所述的系统，其特征在于，所述输送机包括转移机械臂。17. The system of claim 16, wherein the conveyor includes a transfer robot.18.根据权利要求16所述的系统，其特征在于，所述相机包括线扫描相机，以每次扫描一个像素行的方式扫描所述晶片表面。18. The system of claim 16, wherein the camera comprises a line scan camera that scans the wafer surface one pixel row at a time.19.根据权利要求16所述的系统，其特征在于，所述至少一个处理器包括：19. The system of claim 16, wherein the at least one processor comprises:本机计算机；以及the local computer; and远程计算机，被配置成：Remote computer, configured as:接收所述晶片表面的所述图像；receiving the image of the wafer surface;分析所述晶片表面的所述图像；analyzing the image of the wafer surface;产生所述分析的结果；以及produce the results of the analysis; and将所述结果传送到所述本机计算机，其中所述将所述半导体晶片自动地运送到所述第二处理站或所述储料器是基于所述结果来实施的。The results are communicated to the local computer, wherein the automatic transport of the semiconductor wafers to the second processing station or the stocker is performed based on the results.

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