












技术领域technical field
本发明涉及电子技术领域,尤其涉及一种电荷泵及存储设备。The present invention relates to the field of electronic technology, and in particular, to a charge pump and a storage device.
背景技术Background technique
电荷泵也可以称之为:开关电容式电压变换器,是一种利用电容来进行直流转换的变压器。电荷泵通过控制内部的电容器的充电或放电,可以用于使得输入电压升高或降低,甚至产生负电压;电荷泵相对于利用电感实现电压变化的变压器而言,避免了使用由线圈绕制而成导致体积大的电感,大大的降低了使用电荷泵的体积,且使用电容替代电感,且硬件成本也更低。但是现有的电荷泵存在以下问题:A charge pump can also be called a switched capacitor voltage converter, which is a transformer that uses capacitors for DC conversion. By controlling the charging or discharging of the internal capacitor, the charge pump can be used to increase or decrease the input voltage, or even generate a negative voltage; the charge pump, compared with the transformer that uses an inductance to realize voltage changes, avoids the use of coil windings. The result is a large inductance, which greatly reduces the volume of the charge pump, and uses a capacitor to replace the inductance, and the hardware cost is also lower. But the existing charge pump has the following problems:
第一:一些电荷泵输出的纹波电压大;First: the ripple voltage output by some charge pumps is large;
第二:一些电荷泵输出的纹波电压小,但是电路结构复杂且相对于其他电荷泵会产生更多的功耗。电路结构复杂,不利于电荷泵的小型化和集成化;而产生的额外功耗,会使得应用该电荷泵的电子设备或电器设备的整体功耗提升。Second: the ripple voltage output by some charge pumps is small, but the circuit structure is complex and will generate more power consumption than other charge pumps. The circuit structure is complex, which is not conducive to the miniaturization and integration of the charge pump; the additional power consumption will increase the overall power consumption of the electronic equipment or electrical equipment applying the charge pump.
故提出一种纹波电压小的简单电路或者纹波电路小的功耗小的电荷泵,是现有技术急需解决的问题。Therefore, it is an urgent problem to be solved in the prior art to propose a simple circuit with a small ripple voltage or a charge pump with a small ripple circuit and low power consumption.
发明内容SUMMARY OF THE INVENTION
本发明实施例期望提供一种电荷泵及存储设备。Embodiments of the present invention are expected to provide a charge pump and a storage device.
本发明的技术方案是这样实现的:The technical scheme of the present invention is realized as follows:
一种电荷泵,包括:A charge pump comprising:
倍压电路,包含泵电容,用于通过所述泵电容的储能实现直流电压的倍压;a voltage doubling circuit, including a pump capacitor, for realizing the voltage doubling of the DC voltage through the energy storage of the pump capacitor;
检测电路,与所述倍压电路连接,用于基于所述倍压电路的输出电压产生检测信号;a detection circuit, connected to the voltage multiplier circuit, for generating a detection signal based on the output voltage of the voltage multiplier circuit;
运放电路,与所述检测电路连接,用于基于所述检测信号产生第一控制信号;an operational amplifier circuit, connected to the detection circuit, for generating a first control signal based on the detection signal;
控制电路,与所述运放电路连接,用于根据第一控制信号控制所述泵电容的充电和/或放电。A control circuit, connected to the operational amplifier circuit, is used for controlling the charging and/or discharging of the pump capacitor according to the first control signal.
可选地,所述运放电路包括:运算放大器;Optionally, the operational amplifier circuit includes: an operational amplifier;
所述运算放大器的第一输入端,与所述检测电路连接,用于输入所述检测信号;The first input end of the operational amplifier is connected to the detection circuit for inputting the detection signal;
所述运算放大器的第二输入端,用于输入参考信号;a second input end of the operational amplifier, used for inputting a reference signal;
所述运算放大器,用于根据所述检测信号及所述参考信号的比较结果,产生所述第一控制信号;the operational amplifier, for generating the first control signal according to the comparison result of the detection signal and the reference signal;
所述运算放大器的输出端,与所述控制电路连接,用于向所述控制电路输入所述第一控制信号。The output end of the operational amplifier is connected to the control circuit, and is used for inputting the first control signal to the control circuit.
可选地,所述运算放大器包括:Optionally, the operational amplifier includes:
第一级运放子电路,用于根据所述检测信号和所述参考信号的,运算放大所述检测信号产生第二控制信号;a first-stage operational amplifier sub-circuit, configured to operationally amplify the detection signal according to the detection signal and the reference signal to generate a second control signal;
第二级运放子电路,与所述第一级运放子电路连接,用于基于所述第二控制信号产生满足预设瞬态响应条件的所述第一控制信号。A second-stage operational amplifier sub-circuit is connected to the first-stage operational amplifier sub-circuit, and is configured to generate the first control signal satisfying a preset transient response condition based on the second control signal.
可选地,所述第一级运放子电路包括:Optionally, the first-stage operational amplifier circuit includes:
第一PMOS管,其中,所述第一PMOS管的栅极为所述运算放大器的第一输入端;a first PMOS transistor, wherein the gate of the first PMOS transistor is the first input end of the operational amplifier;
第二PMOS管,其中,所述第二PMOS管的栅极为所述运算放大器的第二输入端;a second PMOS transistor, wherein the gate of the second PMOS transistor is the second input end of the operational amplifier;
第一NMOS管,其中,所述第一NMOS管的栅极和漏极均与所述第一 PMOS管的漏极连接,所述第一NMOS管的源极用于接地;a first NMOS transistor, wherein the gate and drain of the first NMOS transistor are both connected to the drain of the first PMOS transistor, and the source of the first NMOS transistor is used for grounding;
第二NMOS管,其中,所述第二NMOS管的栅极连接在所述第一PMOS 管的漏极,所述第二NMOS管的漏极连接在所述第二PMOS管的漏极,所述第二NMOS管的源极用于接地;A second NMOS transistor, wherein the gate of the second NMOS transistor is connected to the drain of the first PMOS transistor, and the drain of the second NMOS transistor is connected to the drain of the second PMOS transistor, so The source of the second NMOS transistor is used for grounding;
第三PMOS管,其中,第三PMOS管的漏极分别与所述第一PMOS管及所述第二PMOS管的源极连接,所述第三PMOS管的源极用于与电源电压连接,所述第三PMOS管的栅极用于与偏置电路连接并获取偏置电压;a third PMOS transistor, wherein the drain of the third PMOS transistor is connected to the source of the first PMOS transistor and the second PMOS transistor, respectively, and the source of the third PMOS transistor is used to connect to the power supply voltage, The gate of the third PMOS transistor is used to connect with the bias circuit and obtain the bias voltage;
其中,所述第二PMOS管的漏极及所述第二NMOS管的漏极,均与所述第二级运放子电路连接,且所述第二PMOS管的漏极和所述第二NMOS管M5 的漏极,用于向所述第二级运放子电路提供所述第二控制信号。Wherein, the drain of the second PMOS transistor and the drain of the second NMOS transistor are both connected to the second-stage operational amplifier circuit, and the drain of the second PMOS transistor and the second The drain of the NMOS transistor M5 is used to provide the second control signal to the second-stage operational amplifier circuit.
可选地,所述第二级运放子电路包括:Optionally, the second-stage operational amplifier circuit includes:
第一路径电路,与所述第一级运放子电路连接,用于基于所述第二控制信号输出所述第一控制信号;a first path circuit, connected to the first-stage operational amplifier sub-circuit, and configured to output the first control signal based on the second control signal;
第二路径,与所述第一路径电路连接,用于基于所述第一控制信号产生作用于所述第一路径电路的反馈信号。The second path is connected to the first path circuit and used for generating a feedback signal acting on the first path circuit based on the first control signal.
可选地,Optionally,
所述第一路径电路,包括:The first path circuit includes:
第四PMOS管,其中,所述第四PMOS管的源极用于与电源电压连接,所述第四PMOS管的栅极用于与偏置电路连接并获取偏置电压;a fourth PMOS transistor, wherein the source of the fourth PMOS transistor is used to connect to the power supply voltage, and the gate of the fourth PMOS transistor is used to connect to the bias circuit and obtain the bias voltage;
第五PMOS管,其中,所述第五PMOS管的源极与所述第四PMOS管的漏极连接,所述第五PMOS管的栅极与所述第一级运放子电路连接,且所述第五PMOS管的栅极用于获取所述第二控制信号;a fifth PMOS transistor, wherein the source of the fifth PMOS transistor is connected to the drain of the fourth PMOS transistor, the gate of the fifth PMOS transistor is connected to the first-stage operational amplifier circuit, and The gate of the fifth PMOS transistor is used to obtain the second control signal;
第四NMOS管,其中,所述第四NMOS管的漏极连接在所述第五PMOS 管的漏极;所述第四NMOS管的源极用于接地;a fourth NMOS transistor, wherein the drain of the fourth NMOS transistor is connected to the drain of the fifth PMOS transistor; the source of the fourth NMOS transistor is used for grounding;
所述第二路径,包括:The second path includes:
第三NMOS管,其中,所述第三NMOS管的栅极与所述第五PMOS管的漏极连接,所述第三NMOS管的源极用于接地,所述第三NMOS管的漏极分别与所述第五PMOS管的源极及所述控制电路连接;且所述第三NMOS管的漏极用于向所述第一路径电路提供所述反馈信号。A third NMOS transistor, wherein the gate of the third NMOS transistor is connected to the drain of the fifth PMOS transistor, the source of the third NMOS transistor is used for grounding, and the drain of the third NMOS transistor are respectively connected to the source of the fifth PMOS transistor and the control circuit; and the drain of the third NMOS transistor is used to provide the feedback signal to the first path circuit.
可选地,所述控制电路,与所述运放电路连接,用于根据所述第一控制信号输出第三控制信号,其中,所述第三控制信号,用于控制所述泵电容的充电电压和/或时钟频率。Optionally, the control circuit, connected to the operational amplifier circuit, is configured to output a third control signal according to the first control signal, wherein the third control signal is used to control the charging of the pump capacitor voltage and/or clock frequency.
可选地,所述控制电路,具体用于根据所述第一控制信号产生第三控制信号;Optionally, the control circuit is specifically configured to generate a third control signal according to the first control signal;
所述电荷泵还包括:The charge pump also includes:
充电电路,与所述控制电路连接,用于根据所述第三控制信号调整向所述泵电容的时钟频率和/或充电电压。A charging circuit, connected to the control circuit, and configured to adjust the clock frequency and/or the charging voltage to the pump capacitor according to the third control signal.
可选地,所述充电电路包括:Optionally, the charging circuit includes:
时钟子电路,用于根据所述第三控制信号产生向所述泵电容充电的第一时钟信号;a clock subcircuit, configured to generate a first clock signal for charging the pump capacitor according to the third control signal;
缓冲子电路,与所述时钟电路连接,用于根据所述时钟子电路输出的第一时钟信号及所述第三控制信号,产生向所述泵电容充电的第二时钟信号;其中,所述第二时钟信号的时钟频率与所述第一时钟信号的时钟频率相同,第二时钟信号的电压幅度是根据第三控制信号确定的。a buffer sub-circuit, connected to the clock circuit, for generating a second clock signal for charging the pump capacitor according to the first clock signal and the third control signal output by the clock sub-circuit; wherein the The clock frequency of the second clock signal is the same as the clock frequency of the first clock signal, and the voltage amplitude of the second clock signal is determined according to the third control signal.
可选地,所述控制电路包括:Optionally, the control circuit includes:
第一控制子电路,分别与所述运放电路及所述时钟子电路连接,用于根据所述第一控制信号输出时钟控制信号,并将所述时钟控制信号输入所述泵电容充电的时钟子电路,其中,所述时钟控制信号用于控制所述时钟电路向所述泵电容供电的时钟频率;a first control sub-circuit, connected to the operational amplifier circuit and the clock sub-circuit respectively, for outputting a clock control signal according to the first control signal, and inputting the clock control signal into the clock for charging the pump capacitor a sub-circuit, wherein the clock control signal is used to control the clock frequency at which the clock circuit supplies power to the pump capacitor;
第二控制子电路,分别与所述运放电路及缓冲子电路连接,用于根据所述第一控制信号输出幅度控制信号,并将所述幅度控制信号输入所述缓冲子电路,其中,所述幅度控制信号用于控制所述缓冲子电路向所述泵电容供电的电压幅度。The second control sub-circuit is connected to the operational amplifier circuit and the buffer sub-circuit respectively, and is used for outputting an amplitude control signal according to the first control signal, and inputting the amplitude control signal to the buffer sub-circuit, wherein the The amplitude control signal is used to control the amplitude of the voltage supplied by the buffer sub-circuit to the pump capacitor.
可选地,所述控制电路包括:Optionally, the control circuit includes:
第三受控子电路,分别与所述运放电路、所述时钟子电路及所述缓冲子电路连接,用于根据所述第一控制信号输出混合控制信号,并将所述混合控制信号分别输入所述时钟子电路和所述缓冲子电路;其中,所述混合控制信号用于控制所述时钟子电路输出的第一时钟信号的时钟频率,还用于控制所述缓冲子电路输出的第二时钟信号的电压。The third controlled sub-circuit is connected to the operational amplifier circuit, the clock sub-circuit and the buffer sub-circuit respectively, and is used for outputting a mixed control signal according to the first control signal, and the mixed control signal is respectively Input the clock sub-circuit and the buffer sub-circuit; wherein, the mixed control signal is used to control the clock frequency of the first clock signal output by the clock sub-circuit, and is also used to control the first clock signal output by the buffer sub-circuit The voltage of the second clock signal.
可选地,所述倍压电路包括:N个级联的倍压单元,其中,N为不小于2 的正整数;Optionally, the voltage doubling circuit includes: N cascaded voltage doubling units, where N is a positive integer not less than 2;
所述倍压单元包含所述泵电容;the voltage doubling unit includes the pump capacitor;
所述缓冲子电路为N个;The number of buffer subcircuits is N;
N个所述缓冲子电路均与所述控制电路连接;The N buffer subcircuits are all connected to the control circuit;
一个所述缓冲子电路,用于向一个所述倍压单元中的泵电容充电。one of the buffer subcircuits for charging a pump capacitor in one of the voltage doubler units.
可选地,所述电荷泵还包括:Optionally, the charge pump further includes:
补偿电容,连接在所述倍压电路的输出端,用于调整所述电荷泵的零点。The compensation capacitor is connected to the output end of the voltage doubling circuit, and is used for adjusting the zero point of the charge pump.
一种存储设备,包括:A storage device comprising:
存储单元,用于存储数据;storage unit for storing data;
如权利前述任意项提供的电荷泵,与所述存储单元连接,用于提供所述存储单元执行存储操作所需的工作电压。The charge pump provided in any of the preceding claims is connected to the storage unit and used to provide a working voltage required by the storage unit to perform a storage operation.
本发明实施例提供的电荷泵及存储设备中,电荷泵设置了检测电路,该检测电路可以检测电荷泵中倍压电路的输出电压;检测电路根据输出电压产生与输出电压的变化相适应的检测信号。如此,倍压电路的输出电压中有产生纹波电压或者纹波电压增大时,都可以由检测电路检测到。In the charge pump and the storage device provided by the embodiments of the present invention, the charge pump is provided with a detection circuit, which can detect the output voltage of the voltage multiplier circuit in the charge pump; the detection circuit generates a detection suitable for the change of the output voltage according to the output voltage Signal. In this way, when there is a ripple voltage in the output voltage of the voltage multiplier circuit or the ripple voltage increases, it can be detected by the detection circuit.
电荷泵还设置了与检测电路连接的运放电路,运放电路可以利用其运算放大特性,将输出电压中纹波电压引起的微小波动(该微小波动可由检测信号来反应)通过运算放大后,连续输出与检测信号相适配的第一控制信号。由于运放电路的连续放大特性,第一控制信号是连续信号而非跃阶信号。如此,电荷泵利用检测电路实现了电荷泵的输出电压中纹波电压的精确检测,同时运放电路将自身输出的较大的连续信号(即第一控制信号)输入到控制电路,控制电路就可以根据第一控制信号控制电荷泵中提供直流倍压的泵电容的充电和/或放电的连续的控制,而非基于多级缓冲器的阶跃式的控制。The charge pump is also provided with an operational amplifier circuit connected to the detection circuit. The operational amplifier circuit can use its operational amplification characteristics to amplify the small fluctuations caused by the ripple voltage in the output voltage (the small fluctuations can be reflected by the detection signal) through the operational amplification. The first control signal adapted to the detection signal is continuously output. Due to the continuous amplification characteristic of the operational amplifier circuit, the first control signal is a continuous signal rather than a step signal. In this way, the charge pump uses the detection circuit to realize the accurate detection of the ripple voltage in the output voltage of the charge pump. At the same time, the op amp circuit inputs the large continuous signal (ie the first control signal) output by itself to the control circuit, and the control circuit The continuous control of the charging and/or discharging of the pump capacitor in the charge pump that provides the DC voltage multiplier can be controlled according to the first control signal, rather than the step-wise control based on the multi-stage buffer.
通过泵电容的充电和/或放电的控制,提供了可以将纹波电压控制在期望范围内的电路结构和实现方式。故本实施例提供的电荷泵及存储设备具有电荷泵的输出电压中纹波电压小的特点。在本实施例中仅引入了检测电路、运放电路和控制电路,利用运放电路对连续信号的运算放大特性,相当于通过检测电路、运放电路及控制电路形成的连续的反馈控制回路,可以减少因为过度调整所产生的不必要的功耗。By controlling the charging and/or discharging of the pump capacitor, a circuit structure and implementation are provided that can control the ripple voltage within a desired range. Therefore, the charge pump and the storage device provided by this embodiment have the characteristics of small ripple voltage in the output voltage of the charge pump. In this embodiment, only a detection circuit, an operational amplifier circuit and a control circuit are introduced, and the operational amplification characteristics of the operational amplifier circuit for continuous signals are used, which is equivalent to a continuous feedback control loop formed by the detection circuit, the operational amplifier circuit and the control circuit. Unnecessary power consumption due to over-adjustment can be reduced.
与此同时,针对单一的倍压电路而言,由于连续调整,相对于阶跃调整而言,无需基于阶跃调整中检测不同纹波电压值设置具有不同调节能力的多级调节电路来实现纹波电压的抑制,从而无需引入多级不同调节能力的多级调节电路,取而代之可以用单一的具有连续调节的控制电路即可,整体上简化了电荷泵使用的电子元器件,简化了电路结构,并减少了额外引入的电子元器件所产生的功耗,在具有纹波电压小的有点的同时,还具有电路结构简单及功耗小的特点。At the same time, for a single voltage doubler circuit, due to continuous adjustment, compared with step adjustment, there is no need to set multi-level adjustment circuits with different adjustment capabilities based on detecting different ripple voltage values in step adjustment to achieve ripple In order to suppress the wave voltage, there is no need to introduce a multi-stage regulation circuit with different regulation capabilities. Instead, a single control circuit with continuous regulation can be used, which simplifies the electronic components used by the charge pump and the circuit structure as a whole. The power consumption generated by the additionally introduced electronic components is reduced, and while the ripple voltage is small, it also has the characteristics of simple circuit structure and low power consumption.
附图说明Description of drawings
图1为本发明实施例提供的一种电荷泵的简化示意图;FIG. 1 is a simplified schematic diagram of a charge pump according to an embodiment of the present invention;
图2为本发明实施例提供的一种倍压电路的结构示意图;2 is a schematic structural diagram of a voltage doubling circuit provided by an embodiment of the present invention;
图3为本发明实施例提供的一种运放电路及控制电路的示意图;3 is a schematic diagram of an operational amplifier circuit and a control circuit provided by an embodiment of the present invention;
图4为本发明实施例提供的另一种电荷泵的结构示意图;FIG. 4 is a schematic structural diagram of another charge pump provided by an embodiment of the present invention;
图5为本发明实施例提供的又一种电荷泵的结构示意图;FIG. 5 is a schematic structural diagram of another charge pump provided by an embodiment of the present invention;
图6为本发明实施例提供的再一种电荷泵的结构示意图FIG. 6 is a schematic structural diagram of still another charge pump provided by an embodiment of the present invention
图7为本发明实施例提供的电荷泵的零点和极点在频率轴和增益轴构成的二维坐标系中的分布示意图;7 is a schematic diagram of the distribution of zeros and poles of a charge pump in a two-dimensional coordinate system formed by a frequency axis and a gain axis according to an embodiment of the present invention;
图8为本发明实施例提供的一种存储设备的结构示意图;FIG. 8 is a schematic structural diagram of a storage device according to an embodiment of the present invention;
图9为常规电荷泵的输出电压示意图;9 is a schematic diagram of the output voltage of a conventional charge pump;
图10为本发明实施例提供的电荷泵的输出电压示意图;10 is a schematic diagram of an output voltage of a charge pump provided by an embodiment of the present invention;
图11为本发明实施例提供的电荷泵与常规电荷泵的纹波电压比对示意图之一;11 is one of schematic diagrams of a comparison of ripple voltages between a charge pump provided by an embodiment of the present invention and a conventional charge pump;
图12为本发明实施例提供的电荷泵与常规电荷泵的纹波电压比对示意图之二;FIG. 12 is the second schematic diagram of the comparison of the ripple voltage of the charge pump provided by the embodiment of the present invention and the conventional charge pump;
图13为本发明实施例提供的电荷泵与常规电荷泵的纹波电压比对示意图之三。FIG. 13 is the third schematic diagram of the comparison of the ripple voltage of the charge pump provided by the embodiment of the present invention and the conventional charge pump.
具体实施方式Detailed ways
以下结合说明书附图及具体实施例对本发明的技术方案做进一步的详细阐述。The technical solutions of the present invention will be further elaborated below with reference to the accompanying drawings and specific embodiments of the description.
如图1所示,本实施例提供一种电荷泵,包括:As shown in FIG. 1, this embodiment provides a charge pump, including:
倍压电路110,包含泵电容,用于通过所述泵电容的储能实现直流电压的倍压;The
检测电路120,与所述倍压电路110连接,用于基于所述倍压电路110的输出电压的检测信号;a
运放电路130,与所述检测电路120连接,用于基于所述检测信号产生第一控制信号;an
控制电路140,与所述运放电路130连接,用于根据第一控制信号控制所述泵电容的充电和/或放电。The
在一些实施例中,电荷泵可通过一个或多个倍压单元,实现直流倍压转换,通过直流倍压,使得输出的直流电压得到转换(例如,升压或降压)。例如,输出的直流电压的压值与所述倍压电路的倍压系数相关,若输入电压相同,则倍压系数越高,则输出电压的压值更高。在本实施例中,所述电荷泵可为利用包含有泵电容的倍压电路110进行升压的升压电荷泵。In some embodiments, the charge pump can realize DC voltage multiplication conversion through one or more voltage multiplication units, and through the DC voltage multiplication, the output DC voltage is converted (eg, boosted or stepped down). For example, the voltage value of the output DC voltage is related to the voltage multiplier coefficient of the voltage multiplier circuit. If the input voltages are the same, the higher the voltage multiplier coefficient, the higher the voltage value of the output voltage. In this embodiment, the charge pump may be a boost charge pump that utilizes a
所述倍压电路110可包括一个或多个倍压单元。而一个所述倍压电路可包括一个或多个泵电容。例如,所述倍压单元可包括:The
泵电容;用于基于泵电容存储的能量进行输入电压的倍压;所述泵电容与电源连接,可用于基于电源的输入信号进行电容的电量存储,并用于通过自身存储电能所累积的电压,实现对输入电压的倍压;The pump capacitor is used to double the input voltage based on the energy stored in the pump capacitor; the pump capacitor is connected to the power supply and can be used to store the capacitor's power based on the input signal of the power supply, and to store the voltage accumulated by the power itself, Realize the doubling of the input voltage;
开关阵列,用于控制所述泵电容的充电和放电。A switch array for controlling charging and discharging of the pump capacitor.
倍压电路110可包括:一个或多个泵电容。例如,参考图4和图5,所述倍压电路110可包括多个倍压单元,所述泵电容Cpump可为倍压单元中的一个组成部分;在图6中泵电压Vpump可为泵电容Cpump两端的电压;而倍压电路110的输出电压可为:泵电容两端的电压减去倍压电路上的电压降,即为倍压电路110的输出电压Vout。图4、图5及图6中的Iload为负载电流,CL表示的负载电容。The
在一些实施例中,所述倍压电路110可包括:多个泵电容组。一个所述泵电容组可包括两个泵电容,可以分别称之为第一泵电容和第二泵电容;第一泵电容和第二泵电容的时钟频率相同且相位相反,如此,第一泵电容和第二泵电容的充电和放电的频率相同,由于相位相反,一个泵电容在充电时,另一个泵电容在放电,如此,可以使得倍压电路持续相位输出直流电压。开关阵列可包括多个受控开关,一部分受控开关位于泵电容的充电回路,另一部分受控开关位于泵电容的放电回路;如此,一方面,所述开关阵列在开关控制信号的控制下,切换自身的开关状态;通过自身开关状态的切换导通或断开所述泵电容所在的充电回路,从而控制所述泵电容的充电。另一方面,所述开关阵列在所述开关控制信号的控制下,切身自身的开关状态,通过自身开关状态的切换导通或断开所述泵电容的放电回路,从而控制所述泵电容的放电。如此,所述倍压电路110可以在部分泵电容充电时,使得部分泵电容对负载进行放电;如此,确保倍压电路110通过不同泵电容之间的放电控制的切换,使得倍压电路110 的输出电压维持在期望的电压范围内,减少单一泵电容放电时间过程导致的输出电压的压降过大的现象。In some embodiments, the
图2所示为一种倍压电路的具体结构,在该倍压电路中包括有MOS管形成的开关阵列及泵电容;图2仅是倍压电路的一种具体结构的举例,具体实现不局限于图2所示。所述检测电路120可包括:检测元件。该检测元件,能够跟随所述倍压电路110的输出电压而改变自身电信号的元件,该电信号可为电流信号和/或电压信号。在一些实施例中,所述检测元件可为能够跟随所述倍压电路110的输出电压而改变自身电压的检测元件。在另一些实施例中,所述检测元件可为能够跟随所述倍压电路110的输出电压而改变自身电流的检测元件。当然在另一些实施例中,所述检测元件的电压及电流都会随着所述倍压电路110的输出电压的改变而改变。总之,所述检测元件可为能够通过自身的电信号反映所述倍压电路110的输出电压变化的元器件。Figure 2 shows the specific structure of a voltage doubling circuit, in which the voltage doubling circuit includes a switch array formed by MOS transistors and a pump capacitor; Figure 2 is only an example of a specific structure of the voltage doubling circuit. limited to that shown in Figure 2. The
在一些实施例中,所述检测电路120包括的所述检测元件可为分压电阻。例如,在检测电路120上至少包括:串联的第一电阻和第二电阻;所述第一电阻和第二电阻串联后连接在所述倍压电路110的输出端,故第一电阻和第二电阻的工作电压为倍压电路110的输出电压;若倍压电路110的输出电压变化,在第一电阻和第二电阻维持稳定的情况下,所述第一电阻和第二电阻上的电流发生变化。如此,所述第一电阻和第二电阻之间的电压发生改变。如此,若倍压电路110的输出电压中因为纹波电压产生压降,则在第一电阻和第二电阻之间的电压也会随着发生变化,故第一电阻和第二电阻之间的电压即可作为前述检测信号输入到运放电路130中。In some embodiments, the detection element included in the
运放电路130与所述检测电路120连接,可以用于获取所述检测元件跟随所述倍压电路110的输出电压改变而改变的电信号,相当于就采样了当前倍压电路110的输出电压。例如,运放电路130连接到所述检测电路120上,获取所述检测电路120的检测电压或者获取所述检测电路120的检测电流。故所述检测信号可为检测电压或检测电流。The
例如,在一些实施例中,若所述运放电路130的输入端连接在所述第一电阻和所述第二电阻之间,则运放电路130获得的输入电压(即为前述检测信号的一种)就发生了变化,而运放电路130的输入电压发生变化,会影响到运放电路130的输出信号。运放电路130的输出信号的至少部分或全部作为所述第一控制信号。For example, in some embodiments, if the input terminal of the
所述运放电路130可为包含有运算放大器的电路;例如,该运放电路130 可包括:一个或多个运算放大器的电路。The
所述运放电路130可为:将输入信号放大的电路,例如,输入的是电压信号且输出的是放大后的电压信号,则该运放电路130为电压放大电路;若输入的是电流信号且输出的是放大后的电流信号;则该运放电路130为电流放大电路。若输入的是电流信号且输出的是放大后的电压信号,则该运放电路130为互阻放大电路;若输入的是电压信号且输出的放大后的电流信号,则该运放电路130为互导放大电路。The
在本实施例中,所述运放电路130可为上述电压放大电路、电流放大电路、互阻放大电路及互导放大电路中的一种。In this embodiment, the
电荷泵利用泵电容的充电和放电进行直流电压的倍压,若电荷泵连接有负载,泵电容在供电过程中,负载就会消耗电荷;而泵电容本身并没有稳压功能,就会使得泵电容的电压有下降,而这种下降就导致了倍压电路110的输出电压在供电时间和输电电压做成的二维坐标系上,出现了类似波纹或锯齿状的压值浮动,及产生了纹波电压。纹波电压的出现使得输出电压并不能稳定维持在期望电压值,如此,可能会因为这种对应于纹波的压降导致负载工作不正常,或者向负载引入导致其工作性能下降的交流成分。The charge pump uses the charging and discharging of the pump capacitor to double the DC voltage. If the charge pump is connected to a load, the load will consume the charge during the power supply process of the pump capacitor; and the pump capacitor itself does not have a voltage regulation function, which will make the pump The voltage of the capacitor has dropped, and this drop has caused the output voltage of the
在本实施例中,利用运放电路130来产生控制所述泵电容充电的第一控制信号。由于运放电路130具有能够将一个小信号放大的作用,能够在泵电容在放电过程中的电压下降的微小变化进行连续放大,放大之后产生对应的控制所述倍压电路110的输出电压下降趋势相反的第一控制信号。如此,控制电路140 根据第一控制信号能够控制泵电容的充电和放电状态切换的状态切换参数、充电参数及放电参数的至少其中之一。In this embodiment, the
例如,所述控制电路140具体可用于执行以下至少之一:For example, the
若一个倍压单元包括多个泵电容时,若当前放电的泵电容放电时产生的输出电压下降到预设值时,所述控制电路140控制所述泵电容的开关阵列切换当前放电的泵电容,以维持所述倍压电路110的输出电压在预设值以上;If a voltage doubling unit includes a plurality of pump capacitors, if the output voltage generated when the currently discharged pump capacitor is discharged drops to a preset value, the
根据倍压电路110的当前输出电压,调整泵电容的时钟频率;该时钟频率可为控制所述泵电容充电时序或泵电容的放电时序的时钟信号;Adjust the clock frequency of the pump capacitor according to the current output voltage of the
根据倍压电路110的当前输出电压,调整泵电容的一个充放电周期内充电时长,例如,调整泵电容的充电控制信号的占空比,从而控制一个充放电周期内充电时长和/或放电时长;According to the current output voltage of the
根据倍压电路110的当前输出电压,调整泵电容充电的充电电流值;Adjust the charging current value for charging the pump capacitor according to the current output voltage of the
根据倍压电路110的当前输出电压,调整泵电路充电的充电电压值。According to the current output voltage of the
例如,若当前检测到倍压电路110的输出电压中的纹波电压增大,缩小所述时钟频率,以加速不同泵电容放电的切换,减少因单一泵电容长时间供电引入的纹波电压。例如,若当前检测到倍压电路110的输出电压中的纹波电压缩小,增大所述时钟频率,以减少不同泵电容放电的切换,从而降低整个电荷泵的功耗。For example, if it is currently detected that the ripple voltage in the output voltage of the
再例如,若当前检测到倍压电路110的输出电压中的纹波电压增大时,增大所述泵电容的充电电压,加速所述泵电容的充电速率和单位时间内累计的电荷量,从而减少放电过程中因为电荷消耗所产生的纹波电压的电压幅度。若当前检测到倍压电路110的输出电压中的纹波电压缩小,降低所述泵电容的充电电压,以降低整个电荷泵的功耗。在本实施例中,所述纹波电压的增大和缩小,都可以是相对于允许的纹波电压的电压值而言的;如此,通过纹波电压的增大和减小的检测,可以及时调整泵电容的充电和/或放电的至少其中之一。For another example, if it is currently detected that the ripple voltage in the output voltage of the
以下是纹波电压与泵电容、泵电容的时钟频率及负载电流的关联关系。The following is the relationship between the ripple voltage and the pump capacitor, the clock frequency of the pump capacitor, and the load current.
在一些实施例中,纹波电压Vripple决定于Iout/2*Cpump*f,其中,Vripple 为纹波电压;Iout为负载电流,也可以称之为:倍压电路110的输出电流。Cpump 为泵电容的电容值,f为泵电容的时钟频率。In some embodiments, the ripple voltage Vripple is determined by Iout/2*Cpump*f, where Vripple is the ripple voltage; Iout is the load current, which can also be referred to as the output current of the
运放电路130,在本实施例中所述运放电路130可为根据输入连续变化自身输出的电路;如此,运放电路130可以根据检测电路120的检测信号连续变化自身输出的第一控制信号;而非阶梯式变化自身输出的第一控制信号。本实施例中,所述运放电路130是一个模拟电路,是可以根据检测电路120的检测信号输出连续的所述第一控制信号的,是一种连续信号而非是有信号值阶跃的阶跃信号。故相对于仅能够输出逻辑高电平或逻辑低电平的比较器输出非阶跃控制信号而言,由于输出的第一控制信号是连续的控制信号,如此若倍压电路110的输出电压有微小变化,都能够被及时的感知到,而无需等到倍压电路110 的输出电压的纹波电压达到阶跃信号的变化条件才会导致控制信号的改变;故实现了及时通过连续的第一控制信号的调整,控制泵电容的充电和放电,从而提升泵电容在放电过程中纹波电压的控制粒度和控制精确度,相对于阶跃式控制信号。The
所述控制电路140,包括:The
受控端,与运放电路130连接,用于输入所述第一控制信号;a controlled end, connected to the
受控器件,用于根据从所述受控端接收所述第一控制信号产生第三控制信号;a controlled device, configured to generate a third control signal according to the first control signal received from the controlled terminal;
输出端,分别与所述受控器件与所述倍压电路110连接,用于控制所述倍压电路110中泵电容的充电;用于通过控制所述泵电容的充电和放电,从而控制所述泵电容的最大电压;而纹波电压的压值取决于所述泵电容的最大电压;故控制电路140可以通过控制泵电容的充电和放电,从而可以控制倍压电路110 的输出电压在泵电容放电过程中引入的纹波电压。The output end is connected to the controlled device and the
例如,所述控制电路140可以通过控制泵电容在一个周期内的充电时间、充电电流等充电参数、泵电容放电切换周期等放电参数,从而控制所述泵电容的最大电压。For example, the
总之,本实施例提供的电荷泵,可以使得纹波电压维持在期望范围内,一方面尽可能的将纹波电压抑制在预设范围内,且由于通过检测电路、运放电路及控制电路形成的连续的反馈控制回路,可以减少因为过度调整所产生的不必要的功耗;与此同时,针对单一的倍压单元而言,由于连续调整,相对于阶跃调整而言,不会因为某一次纹波电压过大,需要不同尺寸的缓冲器来进行调整,从而无需引入多级不同尺寸的缓冲器,整体上简化了电荷泵使用的电子元器件,简化了电路结构,并减少了额外引入的电子元器件所产生的功耗,在具有纹波电压小的有点的同时,还具有电路结构简单及功耗小的特点。In a word, the charge pump provided in this embodiment can keep the ripple voltage within a desired range. On the one hand, the ripple voltage is suppressed within the preset range as much as possible, and since the detection circuit, the operational amplifier circuit and the control circuit form the The continuous feedback control loop can reduce unnecessary power consumption caused by over-adjustment; at the same time, for a single voltage doubling unit, due to continuous adjustment, compared with step adjustment, it will not be caused by a certain The primary ripple voltage is too large, and buffers of different sizes are required for adjustment, so that there is no need to introduce multi-stage buffers of different sizes, which simplifies the electronic components used in the charge pump as a whole, simplifies the circuit structure, and reduces additional introduction. The power consumption generated by the electronic components has the advantages of small ripple voltage, simple circuit structure and low power consumption.
在一些实施例中,所述运放电路130包括:运算放大器;In some embodiments, the
所述运算放大器的第一输入端,与所述检测电路连接,用于输入所述检测信号;The first input end of the operational amplifier is connected to the detection circuit for inputting the detection signal;
所述运算放大器的第二输入端,用于输入参考信号;a second input end of the operational amplifier, used for inputting a reference signal;
所述运算放大器,用于根据所述检测信号及所述参考信号的比较结果,产生所述第一控制信号;the operational amplifier, for generating the first control signal according to the comparison result of the detection signal and the reference signal;
所述运算放大器的输出端,与所述控制电路140连接,可用于向所述控制电路140输入所述第一控制信号。The output end of the operational amplifier is connected to the
在本实施例中,所述运放电路130直接采用一个或多个运算放大器。若所述运放电路130包括多个运算放大器,则多个所述运算放大器可以级联,如此,可以实现多级运放,以在倍压电路110的输出电压有微小变化时均能够灵敏基于检测信号,通过多级运放实现输出的第一控制信号的连续及精确调控,从而调控倍压电路110中的泵电容所能达到的最大电压。In this embodiment, the
可选地,直接采用一个所述运算放大器。运算放大器可为封装好的各种成熟的运算放大器。运算放大器不仅具有比较功能同时根据比较结果可以连续输出与输入信号相适配的放大信号。在本实施例中,若所述检测信号为检测电压,所述运算放大器可为电压运算放大器。Optionally, one of the operational amplifiers is directly used. The operational amplifier can be packaged as a variety of mature operational amplifiers. The operational amplifier not only has a comparison function, but also can continuously output an amplified signal adapted to the input signal according to the comparison result. In this embodiment, if the detection signal is a detection voltage, the operational amplifier may be a voltage operational amplifier.
在一些实施例中,所述运算放大器包括:In some embodiments, the operational amplifier includes:
第一级运放子电路,用于根据所述检测信号和所述参考信号的比较结果,放大所述检测信号产生第二控制信号;a first-stage operational amplifier circuit, configured to amplify the detection signal to generate a second control signal according to the comparison result between the detection signal and the reference signal;
第二级运放子电路,与所述第一级运放子电路连接,用于基于所述第二控制信号产生满足预设瞬态响应条件的所述第一控制信号。A second-stage operational amplifier sub-circuit is connected to the first-stage operational amplifier sub-circuit, and is configured to generate the first control signal satisfying a preset transient response condition based on the second control signal.
此处的第一级运放子电路相当于所述运算放大器的输入级和第一级放大;用于输入所述检测信号,该检测信号可以与参考信号进行比较,并根据比较得到的比较结果输出所述第二控制信号。The first-stage operational amplifier sub-circuit here is equivalent to the input stage and the first-stage amplification of the operational amplifier; it is used to input the detection signal, the detection signal can be compared with the reference signal, and the comparison result is obtained according to the comparison. The second control signal is output.
例如,根据检测信号和参考信号的差值,确定出第二控制信号的信号幅值;根据检测信号和参考信号的正负,控制第二控制信号的正负。此处,输出电压等于期望电压,则所述检测信号可等于所述参考信号,则基于第二控制信号产生的第一控制信号,可用于使得泵电容的时钟信号为标准时钟信号;若检测信号大于所述参考信号,则所述第二控制信号可为负,第一控制信号也可为负,该第一控制信号可为控制所述泵电容的时钟频率降低或者充电幅值下降的信号。若所述检测信号小于所述参考信号;则所述第二控制信号可为正,基于第二控制信号产生的第一控制信号也可以为正,为正的第一控制信号可以加速泵电容的时钟频率或增大泵电容的充电信号的幅值,该幅值可为充电电路的幅值和/或充电电压的幅值。当然此处仅是对第一控制信号、第二控制信号、检测信号及参考信号之间的关联关系的举例说明,具体实现,可以根据抑制纹波电压的幅值进行设置。For example, the signal amplitude of the second control signal is determined according to the difference between the detection signal and the reference signal; the positive and negative values of the second control signal are controlled according to the positive and negative of the detection signal and the reference signal. Here, if the output voltage is equal to the desired voltage, the detection signal may be equal to the reference signal, and the first control signal generated based on the second control signal may be used to make the clock signal of the pump capacitor a standard clock signal; if the detection signal greater than the reference signal, the second control signal may be negative, and the first control signal may also be negative, and the first control signal may be a signal for reducing the clock frequency or charging amplitude of the pump capacitor. If the detection signal is smaller than the reference signal; the second control signal may be positive, the first control signal generated based on the second control signal may also be positive, and a positive first control signal can speed up the pump capacitor The clock frequency or the amplitude of the charging signal to increase the pump capacitor, which can be the amplitude of the charging circuit and/or the amplitude of the charging voltage. Of course, this is only an example of the relationship between the first control signal, the second control signal, the detection signal and the reference signal, and the specific implementation can be set according to the amplitude of the suppressed ripple voltage.
在本实施例中,所述第一级运放子电路包括:反向输入端和同相输入端。若所述反向输入端用于输入所述检测信号,则所述同相输入端用于输入所述参考信号,若所述同相输入端用于输入所述检测信号,则所述反相输入端用于输入所述参考信号。In this embodiment, the first-stage operational amplifier sub-circuit includes: an inverting input terminal and a non-inverting input terminal. If the inverting input terminal is used to input the detection signal, the non-inverting input terminal is used to input the reference signal; if the non-inverting input terminal is used to input the detection signal, the inverting input terminal is used to input the detection signal. for inputting the reference signal.
此处的第二控制信号的信号幅值是大于所述检测信号的信号幅值的;故第一级运放子电路相对于对所述检测信号进行了第一级放大。例如,以所述检测信号为检测电压为例进行说明,若所述第二控制信号的电压是大于所述检测电压的。The signal amplitude of the second control signal here is greater than the signal amplitude of the detection signal; therefore, the first-stage operational amplifier circuit performs first-stage amplification relative to the detection signal. For example, taking the detection signal as a detection voltage as an example for description, if the voltage of the second control signal is greater than the detection voltage.
在本实施例中,所述第二级运放子电路,主要是用于调整整个所述运算电路的瞬态响应的,如此,使得第二级运放子电路输出的第二控制信号是满足预设瞬态响应条件的第一控制信号。In this embodiment, the second-stage operational amplifier sub-circuit is mainly used to adjust the transient response of the entire operational circuit, so that the second control signal output by the second-stage operational amplifier sub-circuit satisfies A first control signal that presets a transient response condition.
瞬态响应是用于描述一个电路输出信号的稳定性;瞬态响应时间是描述瞬态响应的一个特征值,若瞬态响应时间越短,则表示对应电路启动后达到稳定输出或者有干扰时恢复稳定输出的时间越短。The transient response is used to describe the stability of the output signal of a circuit; the transient response time is a characteristic value that describes the transient response. If the transient response time is shorter, it means that the corresponding circuit reaches a stable output after starting or when there is interference. The shorter the time to restore stable output.
在一些实施例中,所述瞬态响应还可以用电路的零点和/或极点的来描述。例如,所述满足预设瞬态响应条件可包括:运放电路的极点在频域的频点位置与运放电路获得单位增益所在的频点位置之间的差是大于预设差值阈值的。In some embodiments, the transient response may also be described in terms of zeros and/or poles of the circuit. For example, satisfying the preset transient response condition may include: the difference between the frequency point position of the pole of the op amp circuit in the frequency domain and the frequency point position where the op amp circuit obtains unity gain is greater than the preset difference threshold .
在本实施例中,所述第一控制信号满足预设瞬态响应条件可包括:电荷泵启动后第一控制信号的震荡时长小于预设时长的控制信号;或者,电荷泵受到干扰时,第一控制信号的震荡时长小于预设时长。In this embodiment, the first control signal satisfying the preset transient response condition may include: a control signal whose oscillation duration of the first control signal is less than the preset duration after the charge pump is started; or, when the charge pump is disturbed, the first The oscillation duration of a control signal is less than the preset duration.
另一些实施例中,在一些实施例中,所述第一控制信号满足预设瞬态响应条件可包括:电荷泵启动后所述第一控制信号的波动幅度小于特定幅度;或者,电荷泵受到干扰时,第一控制信号的波动幅度小于特定幅度。In other embodiments, in some embodiments, the first control signal satisfying a preset transient response condition may include: after the charge pump is started, the fluctuation amplitude of the first control signal is less than a specific amplitude; or, the charge pump is subjected to During interference, the fluctuation range of the first control signal is smaller than a specific range.
在本实施例中,所述第二级子电路主要可以控制所述运算放大器的瞬态响应。此外,在还有一些实施例中,所述第二级运放子电路,也可以继续对所述第二控制信号进行放大,得到通过第二级放大的第一控制信号。In this embodiment, the second-stage subcircuit can mainly control the transient response of the operational amplifier. In addition, in some other embodiments, the second-stage operational amplifier sub-circuit may also continue to amplify the second control signal to obtain the first control signal amplified by the second-stage.
如图3所示,所述第一级运放子电路包括:As shown in Figure 3, the first-stage operational amplifier circuit includes:
第一PMOS管M1,其中,所述第一PMOS管M1的栅极为所述运算放大器的第一输入端vinb;a first PMOS transistor M1, wherein the gate of the first PMOS transistor M1 is the first input terminal vinb of the operational amplifier;
第二PMOS管M2,其中,所述第二PMOS管M2的栅极为所述运算放大器的第二输入端vina;the second PMOS transistor M2, wherein the gate of the second PMOS transistor M2 is the second input terminal vina of the operational amplifier;
第一NMOS管M3,其中,所述第一NMOS管M3的栅极和漏极均与所述第一PMOS管M1的漏极连接,所述第一NMOS管M3的源极用于接地;a first NMOS transistor M3, wherein the gate and drain of the first NMOS transistor M3 are both connected to the drain of the first PMOS transistor M1, and the source of the first NMOS transistor M3 is used for grounding;
第二NMOS管M4,其中,所述第二NMOS管M4的栅极连接在所述第一 PMOS管M1的漏极,所述第二NMOS管M4的漏极连接在所述第二PMOS管 M2的漏极,所述第二NMOS管M4的源极用于接地;The second NMOS transistor M4, wherein the gate of the second NMOS transistor M4 is connected to the drain of the first PMOS transistor M1, and the drain of the second NMOS transistor M4 is connected to the second PMOS transistor M2 The drain, the source of the second NMOS transistor M4 is used for grounding;
第三PMOS管M5,其中,第三PMOS管M5的漏极分别与所述第一PMOS 管M1及所述第二PMOS管M2的源极连接,所述第三PMOS管M5的源极与电源电压vdd连接,所述第三PMOS管M5的栅极用于与偏置电路连接并获取偏置电压;The third PMOS transistor M5, wherein the drain of the third PMOS transistor M5 is connected to the sources of the first PMOS transistor M1 and the second PMOS transistor M2 respectively, and the source of the third PMOS transistor M5 is connected to the power supply The voltage vdd is connected, and the gate of the third PMOS transistor M5 is used to connect with the bias circuit and obtain the bias voltage;
其中,所述第二PMOS管M2的漏极及所述第二NMOS管M4的漏极,均与所述第二级运放子电路连接;且所述第二PMOS管M2的漏极和所述第二 NMOS管M5的漏极,用于向所述第二级运放子电路提供所述第二控制信号。Wherein, the drain of the second PMOS transistor M2 and the drain of the second NMOS transistor M4 are both connected to the second-stage operational amplifier circuit; and the drain of the second PMOS transistor M2 and the The drain of the second NMOS transistor M5 is used to provide the second control signal to the second-stage operational amplifier circuit.
在本实施例中利用上述MOS管(包括PMOS管和NMOS管)构建了运放电路中的第一级运放子电路,利用第一输入端vinb及第二输入端vina。In this embodiment, the above-mentioned MOS transistors (including PMOS transistors and NMOS transistors) are used to construct the first-stage operational amplifier sub-circuit in the operational amplifier circuit, and the first input terminal vinb and the second input terminal vina are used.
在图3中PMOS管Mbias、NMOS管M6及NMOS管M7构建了偏置电路,为运放电路中的MOS管提供偏置电压,该偏置电压可以为MOS管的开启电压;例如,该偏置电压可包括:NMOS管的栅源电压。In FIG. 3, the PMOS transistor Mbias, the NMOS transistor M6 and the NMOS transistor M7 construct a bias circuit to provide a bias voltage for the MOS transistor in the operational amplifier circuit, and the bias voltage can be the turn-on voltage of the MOS transistor; for example, the bias voltage The setting voltage may include: the gate-source voltage of the NMOS transistor.
在一些实施例中,该第一级运放电路130的输出信号可以直接作为所述第一控制信号,输入控制电路140中。In some embodiments, the output signal of the first-stage
在本发明实施例中所述第一级运放子电路的结构仅是举例,但是实际时并不限于该举例,例如,前述各种MOS管可以用于具有相同功能的三极管进行替代,从而获得图3所示的第一级运放子电路的等效电路。The structure of the first-stage op amp sub-circuit described in the embodiment of the present invention is only an example, but it is not limited to this example in practice. The equivalent circuit of the first-stage op amp sub-circuit shown in Figure 3.
本示例中提供的第一级运放子电路为用于电压增益的电压放大子电路。如此,获取到检测电路120提供的检测电压之后,将检测电压与参考电压进行比较,根据比较的结果,会输出一个放大后的电压信号。该电压信号可以直接作为所述控制电路140的输入输出,以用于控制电路140控制泵电容的充电和放电。The first stage op amp sub-circuit provided in this example is a voltage amplifier sub-circuit for voltage gain. In this way, after the detection voltage provided by the
在另一些实施例中,为了使得运放电路130的输出更加稳定,会在第一级运放子电路的后端添加使得运算符放大电路输出的第一控制信号满足预设瞬态响应条件的第二级运放子电路。In other embodiments, in order to make the output of the
所述第二级运放子电路包括:The second-stage operational amplifier circuit includes:
第一路径电路,与所述运放电路130第一级运放子电路连接,用于基于所述第二控制信号输出所述第一控制信号;a first path circuit, connected to the first-stage operational amplifier sub-circuit of the
第二路径,与所述放大路径连接,用于基于所述第一控制信号产生作用于所述放大路径的反馈信号。A second path, connected to the amplification path, is used for generating a feedback signal acting on the amplification path based on the first control signal.
在本实施例,所述第一路径电路可包括一个或多个开关管;该开关管自身也具有运放功能,可以放大或缩小所述第二控制信号的幅度,从而产生一个与所述第二控制信号幅度不同的第一控制信号。在一些实施例中,若所述第一路径电路的放大增益为1或接近为1,则所述第一路径电路的运放作用可以忽略不计。此处的开关管可为各种MOS管或三极管。在本示例中第二路径连接在第一路径电路的后端,可以虎丘第一控制信号产生作用于第一路径电路的反馈信号。例如,产生作用于所述第一路径电路的负反馈信号,可以通过负反馈信号的引入,使得第一控制信号的震荡尽快停止及震荡幅度减小等。In this embodiment, the first path circuit may include one or more switch tubes; the switch tubes themselves also have an operational amplifier function, which can amplify or reduce the amplitude of the second control signal, thereby generating a Two first control signals with different amplitudes of the control signals. In some embodiments, if the amplification gain of the first path circuit is 1 or close to 1, the operational amplifier effect of the first path circuit can be ignored. The switch tubes here can be various MOS tubes or triodes. In this example, the second path is connected to the back end of the first path circuit, and the feedback signal acting on the first path circuit can be generated by the Huqiu first control signal. For example, to generate a negative feedback signal acting on the first path circuit, the introduction of the negative feedback signal can make the oscillation of the first control signal stop as soon as possible and the oscillation amplitude is reduced.
如图3所示,在一些实施例中,所述第二级运放子电路包括:As shown in FIG. 3 , in some embodiments, the second-stage operational amplifier circuit includes:
第四PMOS管M8,其中,所述第四PMOS管M8的源极用于与所述电源电压连接,所述第四PMOS管M8的栅极用于与偏置电路连接并用于获取偏置电压;The fourth PMOS transistor M8, wherein the source of the fourth PMOS transistor M8 is used to connect to the power supply voltage, and the gate of the fourth PMOS transistor M8 is used to connect to the bias circuit and to obtain the bias voltage ;
第五PMOS管M9,其中,所述第五PMOS管M9的源极与所述第四PMOS 管M8连接,所述第五PMOS管M9的栅极与所述运放电路130第一级运放子电路连接;第三NMOS管M11,其中,所述第三NMOS管M11的栅极与所述第五PMOS管M9的漏极连接,所述第三NMOS管M11的源极用于接地,所述第三NMOS管M11的漏极分别与所述第五PMOS管M9的源极及所述控制电路140连接;A fifth PMOS transistor M9, wherein the source of the fifth PMOS transistor M9 is connected to the fourth PMOS transistor M8, and the gate of the fifth PMOS transistor M9 is connected to the first-stage operational amplifier of the
第四NMOS管M10,其中,所述第四NMOS管M10的漏极连接在所述第五PMOS管M9的漏极;所述第四NMOS管M10的源极用于接地。The fourth NMOS transistor M10, wherein the drain of the fourth NMOS transistor M10 is connected to the drain of the fifth PMOS transistor M9; the source of the fourth NMOS transistor M10 is used for grounding.
图3中NMOS管MP为控制电路的组成部分。The NMOS transistor MP in FIG. 3 is an integral part of the control circuit.
在图3中,所述第一路径电路可包括:第四PMOS管M8、第五PMOS管 M9及第四NMOS管M10构成;且所述第五PMOS管的栅极用于获取所述第二控制信号。第二路径可包括:第三NMOS管M11且所述第三NMOS管M11 的漏极用于向所述第一路径电路提供所述反馈信号。In FIG. 3, the first path circuit may include: a fourth PMOS transistor M8, a fifth PMOS transistor M9 and a fourth NMOS transistor M10; and the gate of the fifth PMOS transistor is used to obtain the second control signal. The second path may include: a third NMOS transistor M11 and the drain of the third NMOS transistor M11 is used to provide the feedback signal to the first path circuit.
所述控制电路140包括:The
所述控制电路140,与所述运放电路130连接,用于根据所述第一控制信号输出第三控制信号;所述第三控制信号,用于控制所述泵电容的充电电压和/ 或时钟频率。The
在本实施例中,所述控制电路140可包括一个或多个受控开关,可以用于从不同侧面控制所述泵电容的充电或放电。例如,在本实施例中,通过控制泵电容的时钟频率,实质上就是控制泵电容充电或放电的频率,从而可以控制纹波电压的控制。In this embodiment, the
例如,在图4中所述控制电路140包括并联在运算放大器输出段的两个 PMOS管,分别是PMOS管M p1及PMOS管Mp2。第一控制信号为运算放大器输出的EA-out。图4中的Vref为参考信号。For example, in FIG. 4 , the
再例如,在图5中,所述控制电路140仅包括PMOS管Mp3。For another example, in FIG. 5 , the
在本实施例中通过控制所述泵电容的充电电压,相当于控制了泵电容充电时可获得的最大电压,相当于控制了泵电容的充电快慢;若泵电容的充电快,则对应的泵电容很快就可以处于放电的状态,如此,可以再结合时钟频率的充电或放电的切换,实现不同泵电容之间的放电的切换;从而减少纹波电压。In this embodiment, by controlling the charging voltage of the pump capacitor, it is equivalent to controlling the maximum voltage that can be obtained when the pump capacitor is charged, which is equivalent to controlling the charging speed of the pump capacitor; The capacitor can be in a state of discharge soon, so that the switching of charging or discharging of the clock frequency can be combined to realize the switching of discharging between different pump capacitors, thereby reducing the ripple voltage.
例如,所述充电电路还可为各种可以提供交流电的电路,例如,直接引入正弦交流电的充电电路。For example, the charging circuit can also be various circuits that can provide alternating current, for example, a charging circuit that directly introduces sinusoidal alternating current.
又例如,所述充电电路包括:时钟子电路,用于根据所述第三控制信号产生向所述泵电容充电的第一时钟信号;For another example, the charging circuit includes: a clock sub-circuit, configured to generate a first clock signal for charging the pump capacitor according to the third control signal;
缓冲子电路,与所述时钟电路连接,用于根据所述时钟子电路输出的第一时钟信号及所述第三控制信号,产生向所述泵电容充电的第二时钟信号;其中,所述第二时钟信号的时钟频率与所述第一时钟信号的时钟频率相同,第二时钟信号的电压幅度是根据第三控制信号确定的。a buffer sub-circuit, connected to the clock circuit, for generating a second clock signal for charging the pump capacitor according to the first clock signal and the third control signal output by the clock sub-circuit; wherein the The clock frequency of the second clock signal is the same as the clock frequency of the first clock signal, and the voltage amplitude of the second clock signal is determined according to the third control signal.
所述时钟子电路可包括震荡器,震动器可以用于产生时钟信号。所述震动器可包括:压控震动器。The clock subcircuit may include an oscillator, which may be used to generate the clock signal. The vibrator may include: a pressure-controlled vibrator.
所述缓冲子电路可包括:缓冲放大器,是一种运放器件,可以用于信号的运放。如此,时钟子电路输出的第一时钟信号输入到缓冲放大器之后,缓冲放大器可以调整时钟信号的信号幅度。例如,第一时钟信号为:电压信号,则缓冲子电路可以调整电压信号的电压值,从而控制泵电容的充电电压。再例如。第一时钟信号为电流信号,该缓冲子电路也可以基于该电流信号产生一个压值受控的电压信号,提供给泵电容进行供电。The buffer sub-circuit may include: a buffer amplifier, which is an operational amplifier device, and can be used for signal operational amplifier. In this way, after the first clock signal output by the clock sub-circuit is input to the buffer amplifier, the buffer amplifier can adjust the signal amplitude of the clock signal. For example, if the first clock signal is a voltage signal, the buffer sub-circuit can adjust the voltage value of the voltage signal, thereby controlling the charging voltage of the pump capacitor. Another example. The first clock signal is a current signal, and the buffer sub-circuit can also generate a voltage value-controlled voltage signal based on the current signal, and provide the pump capacitor for power supply.
如图4及图5所示,所述时钟子电路包括压控震荡器VCO,所述缓冲子电路,包括:并联在压控震荡器VCO及不同倍压单元之间的缓冲器。若在一些实施例中,若仅通过时钟频率控制泵电容的充电或放电,则所述缓冲子电路可以不用于所述控制电路140连接,若仅通过充电电压控制泵电容的充电,则所述时钟子电路可以不用于所述控制电路140连接。As shown in FIG. 4 and FIG. 5 , the clock sub-circuit includes a voltage-controlled oscillator VCO, and the buffer sub-circuit includes: a buffer connected in parallel between the voltage-controlled oscillator VCO and different voltage multiplier units. In some embodiments, if the charging or discharging of the pump capacitor is controlled only by the clock frequency, the buffer sub-circuit may not be used for the connection of the
在一些实施例中,所述受控子电路包括:In some embodiments, the controlled subcircuit includes:
第一控制子电路,分别与所述运放电路130及所述时钟子电路连接,用于根据所述第一控制信号输出时钟控制信号,并将所述时钟控制信号输入所述泵电容充电的时钟子电路,其中,所述时钟控制信号用于控制所述时钟电路向所述泵电容供电的时钟频率;和,第二控制子电路,分别与所述运放电路130及缓冲子电路连接,用于根据所述第一控制信号输出幅度控制信号,并将所述幅度控制信号输入所述缓冲子电路,其中,所述幅度控制信号用于控制所述缓冲子电路向所述泵电容供电的电压幅度。The first control sub-circuit is connected to the
在本实施例中,所述控制电路140包括:第一控制子电路及第二控制子电路。第一控制子电路及第二控制子电路可以并联在所述运放电路130的输出端,以根据运放电路130输出的第一控制信号对充电电路进行控制。In this embodiment, the
在第一控制子电路及第二控制子电路可设置有受控开关。Controlled switches may be provided in the first control sub-circuit and the second control sub-circuit.
例如,所述第一控制子电路可包含第一受控开关管;所述第二控制子电路包含有第二受控开关管,此处的第一受控开关管和第二受控开关管可以并联在所述运放电路130的输出端。For example, the first control sub-circuit may include a first controlled switch tube; the second control sub-circuit may include a second controlled switch tube, where the first controlled switch tube and the second controlled switch tube are It can be connected to the output terminal of the
所述第一受控开关管和所述第二受控开关管的规格可以相同也可以不同的。若所述第一受控开关管和第二受控开关管的规格相同,表示两个受控开关管基于相同的第一控制信号将会输出相同的第三控制信号。The specifications of the first controlled switch tube and the second controlled switch tube may be the same or different. If the specifications of the first controlled switch tube and the second controlled switch tube are the same, it means that the two controlled switch tubes will output the same third control signal based on the same first control signal.
若利用第一控制子电路及第二控制子电路组成所述控制电路140,相当于实现了时钟频率和充电电压的独立控制,在控制的过程中两者的控制耦合程度小。If the first control sub-circuit and the second control sub-circuit are used to form the
所述控制电路140包括:The
第三控制子电路,分别与运放电路130、时钟子电路及缓冲子电路连接,用于根据所述第一控制信号输出混合控制信号,并将所述混合控制信号分别输入所述时钟子电路和所述缓冲子电路;其中,所述混合控制信号用于控制所述时钟子电路输出的第一时钟信号的时钟频率,还用于控制所述缓冲子电路输出的第二时钟信号的电压。The third control sub-circuit is connected to the
此处的第三控制子电路可为时钟频率控制和充电电压控制的公共控制电路 140。如此,第三控制子电路输出的一个混合控制信号,可以同时用于控制泵电容的时钟频率和充电电压。The third control sub-circuit here may be a
例如,所述VCO会输出第一时钟信号,同时会进行时钟(clock,clk)频率调整,例如,根据PMOS管Mp1输出的F-CON进行时钟频率调制。PMOS 管Mp2输出A-CON可以用于控制缓冲器进行第一时钟信号的幅度调制,从而输出第二时钟信号ck。此时,所述F-CON为时钟控制信号;所述A-CON为幅度控制信号。For example, the VCO outputs the first clock signal, and at the same time adjusts the frequency of a clock (clock, clk), for example, performs clock frequency modulation according to the F-CON output by the PMOS transistor Mp1. The output A-CON of the PMOS transistor Mp2 can be used to control the buffer to perform amplitude modulation of the first clock signal, thereby outputting the second clock signal ck. At this time, the F-CON is a clock control signal; the A-CON is an amplitude control signal.
再例如,所述VCO会输出第一时钟信号,同时会进行时钟(clock,clk) 频率调整,例如,根据PMOS管Mp1输出的A-CON2进行时钟频率调制。PMOS 管Mp2输出A/F-CON可以用于控制缓冲器进行第一时钟信号的幅度调制,从而输出第二时钟信号ck。此时,A/F-CON可为前述的混合控制信号。For another example, the VCO outputs the first clock signal, and at the same time adjusts the frequency of a clock (clock, clk), for example, performs clock frequency modulation according to A-CON2 output by the PMOS transistor Mp1. The output A/F-CON of the PMOS transistor Mp2 can be used to control the buffer to perform amplitude modulation of the first clock signal, thereby outputting the second clock signal ck. At this time, the A/F-CON may be the aforementioned mixed control signal.
在一些实施例中,参考图4及图5所示,所述倍压电路110包括:N个级联的倍压单元,其中,N为不小于2的正整数;所述倍压单元包含所述泵电容;In some embodiments, as shown in FIG. 4 and FIG. 5 , the
所述缓冲子电路为N个;The number of buffer subcircuits is N;
N个所述缓冲子电路均与一个所述控制电路140连接;Each of the N buffer sub-circuits is connected to one of the
一个所述缓冲子电路与一个所述倍压单元。One of the buffer sub-circuits and one of the voltage doubling units.
在本实施例中,相当于N个倍压电路110可以共用一个运放电路130。In this embodiment, it is equivalent to that N
在还有一些实施例中,N个倍压单元还可共用一个时钟电路。如此,控制电路140还可以用于同步调整所有倍压单元中泵电容的时钟频率。In still other embodiments, the N voltage doubling units may also share one clock circuit. In this way, the
若利用阶跃式调整,则一个倍压单元得配置多级不同的缓冲子电路或者时钟子电路,由于在本实施例中利用运放电路130对输入信号的连续运放特性,则每一个倍压单元通过一级缓冲子电路就可以将纹波电压抑制在期望范围内,同时使用的缓冲子电路少,功耗小。且多个倍压单元还可以共用一个时钟子电路。If the step adjustment is used, a voltage doubling unit has to be configured with multiple stages of different buffer subcircuits or clock subcircuits. Since the continuous operational amplifier characteristic of the
在另一些实施例中,若一个缓冲子电路的最大功率可以满足多个倍压单元所需的功耗,多个倍压单元还可以共用一个缓冲子电路,即多个倍压单元并联在一个缓冲子电路的输出端,进一步简化电荷泵的电路结构,实现电荷泵的小型化和集成化。In other embodiments, if the maximum power of one buffer sub-circuit can meet the power consumption required by multiple voltage doubling units, multiple voltage doubling units can also share one buffer sub-circuit, that is, multiple voltage doubling units are connected in parallel to one The output end of the buffer sub-circuit further simplifies the circuit structure of the charge pump and realizes miniaturization and integration of the charge pump.
在一些实施例中,如图4至图6所示,所述检测电路120包括:串联的第一电阻RF1和第二电阻RF2;In some embodiments, as shown in FIG. 4 to FIG. 6 , the
所述运放电路130连接在所述第一电阻RF1和所述第二电阻RF2之间,用于获取所述第二电阻RF2上的第一控制信号。The
第一电阻RF1和第二电阻RF2上的电流会随着倍压电路输出的电压Vout的改变而改变,而运放电路130获取的第二电阻RF2上检测电压也会随着Vout改变而改变。如图6所示,所述电荷泵还包括:补偿电容CF1,连接在倍压电路 110的输出端,用于调整所述电荷泵的零点。The current on the first resistor RF1 and the second resistor RF2 will change with the change of the voltage Vout output by the voltage multiplier circuit, and the detection voltage on the second resistor RF2 obtained by the
若本实施例提供的电荷泵的具体结构如图4或图5所示,则该电荷泵的主第一极点p1可如下:If the specific structure of the charge pump provided in this embodiment is shown in FIG. 4 or FIG. 5 , the main first pole p1 of the charge pump may be as follows:
其中,Rs为倍压电路的增量电阻;Rbuffer为缓冲器的增量电阻;Ro3为控制电路140中的MOS管Mp的增量电阻。Wherein, Rs is the incremental resistance of the voltage doubling circuit; Rbuffer is the incremental resistance of the buffer; Ro3 is the incremental resistance of the MOS transistor Mp in the
RF1为第一电阻;和RF2为第二电阻。CL为负载电容。RF1 is the first resistor; and RF2 is the second resistor.CL is the load capacitance.
若采用如图3所示的运放电路130则电荷泵还具有第二极点p2和第三极点 p3。If the
第二极点p2为:The second polep2 is:
其中,Ro1为所述第一级运放子电路的输出电阻;所述C1为所述第一级运放子电路的寄生电容。Wherein, Ro1 is the output resistance of the first-stage operational amplifier sub-circuit; the C1 is the parasitic capacitance of the first-stage operational amplifier sub-circuit.
例如,所述寄生电容可为各种MOS管的寄生电容,此处的C1可为第一级运放子电路整体的等效寄生电容。For example, the parasitic capacitance may be the parasitic capacitance of various MOS transistors, and C1 here may be the equivalent parasitic capacitance of the entire first-stage operational amplifier sub-circuit.
Ro1为所述第一级运放子电路整体的等效输出电阻。Ro1 is the overall equivalent output resistance of the first-stage operational amplifier sub-circuit.
第三极点p3为:Thethird pole p3 is:
其中,in,
Ro2=1/gm9(1+gm11ro9);Ro2 = 1/gm9 (1+gm11 ro9 );
Ro2为所述第一级运放子电路的输出电阻;所述C2为所述第二级运放的寄生电容;gm9为所述第五PMOS管的跨导;gm11为所述第三NMOS管的跨导;ro9为所述第五PMOS管的输出电阻。Ro2 is the output resistance of the first-stage operational amplifier circuit; C2 is the parasitic capacitance of the second-stage operational amplifier; gm9 is the transconductance of the fifth PMOS transistor; gm11 is the The transconductance of the third NMOS transistor; ro9 is the output resistance of the fifth PMOS transistor.
若采用如图4至图6中所示的由第一电阻RF1和第二电阻RF2的检测电路 110,再通过补偿电路CF1进行容性补偿,则检测电路具有的极点pf和零点Zf分别如下:If the
在本实施例中所述第二电阻RF2一般比阻值较小,第二电阻RF2的阻值量级为欧姆级、百殴级或千欧级,故会使得带宽之外,从而该极点对电荷泵的性能可以忽略。In this embodiment, the second resistor RF2 is generally smaller than the resistance value, and the resistance value of the second resistor RF2 is in the order of ohms, hundreds of ohms or kiloohms, so the bandwidth will be out of range, so that the The pole-to-charge pump performance is negligible.
图7所示的为图4或图5所示的电荷泵的极点和零点的在横轴频率(freq) 及纵轴为增益的坐标系中的分布。FIG. 7 shows the distribution of the poles and zeros of the charge pump shown in FIG. 4 or FIG. 5 in a coordinate system in which the horizontal axis frequency (freq) and the vertical axis are the gain.
如图8所示,本实施例提供一种存储设备,包括:As shown in FIG. 8 , this embodiment provides a storage device, including:
存储单元210,用于存储数据;a
如前述任意技术方案提供的电荷泵220,与所述存储单元210连接,用于提供所述存储单元执行存储操作所需的工作电压。The
该存储设备可为各种类型的存储设备,例如,所述存储单元为闪存单元的闪存设备。例如,所述闪存设备可包括非线性宏单元(NAND)闪存设备。The storage device may be various types of storage devices, for example, a flash memory device in which the storage unit is a flash memory unit. For example, the flash memory device may comprise a non-linear macrocell (NAND) flash memory device.
在一些实施例中所述闪存单元可为平面的二维闪存单元,在另一些实施例中,所述闪存单元还可为立体的三维闪存单元。In some embodiments, the flash memory cells may be planar two-dimensional flash memory cells, and in other embodiments, the flash memory cells may also be three-dimensional three-dimensional flash memory cells.
所述存储单元可为多个。多个存储单元可按行和列排序以形成存储阵列;例如,所述闪存单元可为多个,且可按照行和列进行排序形成闪存阵列。The storage unit may be plural. A plurality of memory cells can be ordered in rows and columns to form a memory array; for example, the flash memory cells can be multiple and can be ordered in rows and columns to form a flash memory array.
所述电荷泵可为向存储单元提供各种存储操作所需的工作电压。所述存储操作可包括:向存储单元写入数据的工作电压、擦除存储单元内已写入数据的擦除操作、命令锁存、数据锁存等与存储相关的操作(即存储操作)所需的工作电压。The charge pump may provide the memory cells with operating voltages required for various memory operations. The storage operation may include: the operating voltage for writing data to the storage unit, the erasing operation for erasing the written data in the storage unit, command latching, data latching and other storage-related operations (ie, storage operations). required working voltage.
所述存储阵列可包括:进行存储操作第一方向排布的第一工作线,第二方向排布的第二工作线;以闪存阵列为例,所述第一工作线可为字线,第二工作线可为位线。所述第一方向垂直于所述第二方向。所述电荷泵可以分别与所述工作线连接,提供所述存储单元执行存储操作所需的工作电压。The storage array may include: a first working line arranged in a first direction for performing a storage operation, and a second working line arranged in a second direction; taking a flash memory array as an example, the first working line may be a word line, and the first working line may be a word line. The two working lines may be bit lines. The first direction is perpendicular to the second direction. The charge pumps may be respectively connected with the working lines to provide working voltages required by the memory cells to perform storage operations.
在一些弱电应用场景,例如,移动设备或固定设备,通常电池提供的电压都比较低,例如,1.8V、3.3V或3.8V等,可能并不能满足所述存储单元在执行特定存储操作中所需的更高的电压,例如,12V或18V电压。利用电荷泵的倍压特性可以向存储单元所需的工作电压;与此同时电荷泵具有体积小及电磁干扰小的特定,相对于利用线圈的升压电路具有体积小及电磁干扰小的特点。In some weak current application scenarios, such as mobile equipment or fixed equipment, the voltage provided by the battery is usually relatively low, such as 1.8V, 3.3V or 3.8V, etc., which may not meet the requirements of the storage unit in performing specific storage operations. A higher voltage is required, for example, 12V or 18V. The voltage doubling characteristics of the charge pump can be used to obtain the required working voltage of the storage unit; at the same time, the charge pump has the characteristics of small size and small electromagnetic interference, and has the characteristics of small size and small electromagnetic interference compared with the booster circuit using the coil.
所述存储设备可为各种包含有存储单元的设备,例如,手机、平板电脑、可穿戴设备、移动硬盘、笔记本、平板和笔记本二合一、固定终端等。The storage device may be various devices including a storage unit, such as a mobile phone, a tablet computer, a wearable device, a mobile hard disk, a notebook, a combination of a tablet and a notebook, a stationary terminal, and the like.
所述存储设备可为:移动设备或存储设备。The storage device may be: a mobile device or a storage device.
以下结合上述任意实施例提供几个具体示例:Several specific examples are provided below in conjunction with any of the above-mentioned embodiments:
示例1:Example 1:
通过运算放大器将输出电压的分压与参考信号比较,当输出电压逐渐上升时,运放的输出EA_out逐渐增大,通过晶体管Mp作为调整管,其栅压连续增加使调整管的输出端A_CON连续减小,即缓冲器的幅值连续减小,从而实现对泵电容时钟幅度的连续调节,减小输出纹波电压。The divided voltage of the output voltage is compared with the reference signal through the operational amplifier. When the output voltage gradually rises, the output EA_out of the operational amplifier gradually increases, and the transistor Mp is used as a regulating tube, and its gate voltage continuously increases to make the output terminal A_CON of the regulating tube continuously Decrease, that is, the amplitude of the buffer decreases continuously, so as to realize the continuous adjustment of the amplitude of the pump capacitor clock and reduce the output ripple voltage.
当输出电压逐渐稳定且无大负载电流时,通过压控震荡器(voltage controlledoscillator,VCO)控制时钟频率降低,减小稳定时的功耗;当负载电流较大时,通过VCO控制时钟频率增加,减小大负载电流时的纹波。When the output voltage is gradually stable and there is no large load current, the voltage controlled oscillator (VCO) is used to control the clock frequency to decrease to reduce the power consumption during stabilization; when the load current is large, the VCO is used to control the clock frequency to increase, Reduce ripple at high load currents.
如图3所示,MOS管M1至M5组成运放的第一级运放子电路;MOS管 M8至M11采用超级缓冲器的结构[2]组成运放的第二级运放子电路,为了将第二级运放子电路输出节点的电阻由1/gm减小gm*ro倍,从而将极点推到更高频,利于后面的稳定性分析;Mp作为调整泵电容充电和/或放电的调整管,用来控制输出的电压幅度或时钟频率。电荷泵的零极点可如图7所示,电荷泵的及波特图可如图9至12所示。As shown in Figure 3, MOS tubes M1 to M5 form the first-stage operational amplifier sub-circuit of the operational amplifier; MOS tubes M8 to M11 use the super buffer structure [2] to form the second-stage operational amplifier sub-circuit of the operational amplifier. Reduce the resistance of the output node of the second-stage op amp sub-circuit from 1/gm by gm*ro times, so as to push the pole to a higher frequency, which is beneficial to the later stability analysis; Mp is used to adjust the charging and/or discharging of the pump capacitor. Adjust the tube, used to control the output voltage amplitude or clock frequency. The poles and zeros of the charge pump can be shown in Figure 7, and the Bode plots of the charge pump can be shown in Figures 9 to 12.
图9所示为常规电荷泵的负载电流从0uA更加到200uA时,电荷泵的输出电压的变化示意图。该常规电荷泵的泵电容输入的时钟信号的电压幅度为1.8V,时钟频率为30MHz,从图9可知,当负载电流增加到200uA时,电荷泵的输出电压中已经包含了比较明显的纹波电压,在图8中以小型锯齿表示。FIG. 9 is a schematic diagram showing the change of the output voltage of the charge pump when the load current of the conventional charge pump increases from 0uA to 200uA. The voltage amplitude of the clock signal input by the pump capacitor of the conventional charge pump is 1.8V, and the clock frequency is 30MHz. It can be seen from Figure 9 that when the load current increases to 200uA, the output voltage of the charge pump already contains a relatively obvious ripple Voltage, represented by small sawtooth in Figure 8.
图10为本发明实施例提供的电荷泵的负载电流从0uA更加到200uA时,电荷泵的输出电压的变化示意图。本发明实施例提供的电荷泵中泵电容的时钟信号的电压幅度可为1.8V到1V之间根据负载电流进行变化。从图10可知,本发明实施例提供的电压泵,在与图9所示的电荷泵在相同的仿真条件下,看不到锯齿状的纹波电压。且仿真表明在频率30MHz、10MHz及25MHz时,电荷泵输出电压中的纹波电压都很小,几乎观察不到。FIG. 10 is a schematic diagram illustrating the change of the output voltage of the charge pump when the load current of the charge pump according to the embodiment of the present invention increases from 0uA to 200uA. The voltage amplitude of the clock signal of the pump capacitor in the charge pump provided by the embodiment of the present invention may vary between 1.8V and 1V according to the load current. It can be seen from FIG. 10 that the voltage pump provided by the embodiment of the present invention does not see a sawtooth ripple voltage under the same simulation conditions as the charge pump shown in FIG. 9 . And the simulation shows that when the frequency is 30MHz, 10MHz and 25MHz, the ripple voltage in the output voltage of the charge pump is very small and can hardly be observed.
图11为常规电荷泵在没有负载电流(即零负载)时,输出电压中携带的纹波电压。从图11可知,常规电荷泵在没有负载电流时,输出电压中的纹波电压就可以达到80mV。图11为本实施例提供的电荷泵在没有负载电流时,输出电压中携带的纹波电压为4mV;显然4mV远远小于80mV;故纹波电压被大大的减小了。Figure 11 shows the ripple voltage carried in the output voltage of a conventional charge pump when there is no load current (ie, zero load). As can be seen from Figure 11, when the conventional charge pump has no load current, the ripple voltage in the output voltage can reach 80mV. 11 , when the charge pump provided in this embodiment has no load current, the ripple voltage carried in the output voltage is 4mV; obviously, 4mV is far less than 80mV; therefore, the ripple voltage is greatly reduced.
图12为常规电荷泵在没有负载电流为200uA时,输出电压中携带的纹波电压。从图12可知,常规电荷泵在没有负载电流时,输出电压中的纹波电压就可以达到270mV。图12为本实施例提供的电荷泵在没有负载电流时,输出电压中携带的纹波电压为6mV;显然6mV远远小于270mV;故纹波电压在负载电流较大时,也被大大的减小了。Figure 12 shows the ripple voltage carried in the output voltage of a conventional charge pump without a load current of 200uA. As can be seen from Figure 12, when the conventional charge pump has no load current, the ripple voltage in the output voltage can reach 270mV. Fig. 12 When the charge pump provided in this embodiment has no load current, the ripple voltage carried in the output voltage is 6mV; obviously 6mV is far less than 270mV; therefore, the ripple voltage is also greatly reduced when the load current is large. small.
结合图11及图12进一步可知,本发明实施提供的电荷泵在负载电流为零或达到200uA时都具有很好的纹波电压抑制作用,其中,在负载电流较大时的抑制作用更加明显。11 and 12, it can be further known that the charge pump provided by the implementation of the present invention has a good ripple voltage suppression effect when the load current is zero or reaches 200uA, and the suppression effect is more obvious when the load current is large.
从两种结果的比较:改进的结构有效地减小了高压产生电路的输出电压纹波,且可在电压稳定时降低功耗。From the comparison of the two results: the improved structure effectively reduces the output voltage ripple of the high-voltage generating circuit, and can reduce the power consumption when the voltage is stable.
在图13中横轴为负载电流,纵轴为纹波电压;其中,从上到下依次编号为曲线1至4;曲线1表示的常规电荷泵的输出电压中纹波电压随负载电流的变化示意曲线;负载电流I=0uA~200uA,纹波电压V-ripple=80mV~300mV。In Figure 13, the horizontal axis is the load current, and the vertical axis is the ripple voltage; among them, curves 1 to 4 are sequentially numbered from top to bottom;
曲线2为利用本发明实施例提供的电荷泵仅根据检测信号控制泵电容的时钟频率时,电荷泵的输出电压中纹波电压随负载电流的变化示意曲线;负载电流I=0uA~200uA,纹波电压V-ripple=9mV~150mV。Curve 2 is a schematic curve of the change of the ripple voltage in the output voltage of the charge pump with the load current when the charge pump provided by the embodiment of the present invention is used to control the clock frequency of the pump capacitor only according to the detection signal; the load current I=0uA~200uA, the ripple voltage The wave voltage V-ripple=9mV~150mV.
曲线3为利用本发明实施例提供的电荷泵仅根据检测信号控制泵电容的电压幅度时,电荷泵的输出电压中纹波电压随负载电流的变化示意曲线;负载电流I=0uA~200uA,纹波电压V-ripple=4mV~120mV。Curve 3 is a schematic curve of the change of the ripple voltage in the output voltage of the charge pump with the load current when the charge pump provided by the embodiment of the present invention is used to control the voltage amplitude of the pump capacitor only according to the detection signal; the load current I=0uA~200uA, the ripple voltage Wave voltage V-ripple=4mV~120mV.
曲线4为利用本发明实施例提供的电荷泵仅根据检测信号控制泵电容的时钟频率及电压幅度时,电荷泵的输出电压中纹波电压随负载电流的变化示意曲线;负载电流I=0uA~200uA,纹波电压V-ripple=4mV~7mV。Curve 4 is a schematic curve of the change of the ripple voltage in the output voltage of the charge pump with the load current when the charge pump provided by the embodiment of the present invention is used to control the clock frequency and voltage amplitude of the pump capacitor only according to the detection signal; the load current I=0uA~ 200uA, ripple voltage V-ripple=4mV~7mV.
对比4条曲线可知,利用本实施例提供的电荷泵单一控制时钟频率、单一控制时钟信号的电压幅度、同时控制时钟信号的时钟频率和电压幅度时,电荷泵的输出电压中纹波电压相对于常规电荷泵都小且变化也小。若本发明实施例提供的电荷泵同时根据检测信号控制泵电容的时钟频率和电压幅度,可以使得电荷泵在负载电流从0uA上升到200uA的过程中纹波电压都很小,且仅有微小的变化量。Comparing the four curves, it can be seen that when using the charge pump provided in this embodiment with a single control clock frequency, a single control clock signal voltage amplitude, and simultaneous control of the clock frequency and voltage amplitude of the clock signal, the ripple voltage in the output voltage of the charge pump is relative to Conventional charge pumps are small and vary little. If the charge pump provided by the embodiment of the present invention simultaneously controls the clock frequency and the voltage amplitude of the pump capacitor according to the detection signal, the ripple voltage of the charge pump can be very small when the load current rises from 0uA to 200uA, and there is only a small ripple voltage. amount of change.
在本申请所提供的几个实施例中,应该理解到,所揭露的设备和方法,可以通过其它的方式实现。以上所描述的设备实施例仅仅是示意性的,例如,所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,如:多个单元或组件可以结合,或可以集成到另一个系统,或一些特征可以忽略,或不执行。另外,所显示或讨论的各组成部分相互之间的耦合、或直接耦合、或通信连接可以是通过一些接口,设备或单元的间接耦合或通信连接,可以是电性的、机械的或其它形式的。In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined, or Can be integrated into another system, or some features can be ignored, or not implemented. In addition, the coupling, or direct coupling, or communication connection between the components shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be electrical, mechanical or other forms. of.
上述作为分离部件说明的单元可以是、或也可以不是物理上分开的,作为单元显示的部件可以是、或也可以不是物理单元,即可以位于一个地方,也可以分布到多个网络单元上;可以根据实际的需要选择其中的部分或全部单元来实现本实施例方案的目的。The unit described above as a separate component may or may not be physically separated, and the component displayed as a unit may or may not be a physical unit, that is, it may be located in one place or distributed to multiple network units; Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
另外,在本发明各实施例中的各功能单元可以全部集成在一个处理模块中,也可以是各单元分别单独作为一个单元,也可以两个或两个以上单元集成在一个单元中;上述集成的单元既可以采用硬件的形式实现,也可以采用硬件加软件功能单元的形式实现。In addition, each functional unit in each embodiment of the present invention may all be integrated into one processing module, or each unit may be separately used as a unit, or two or more units may be integrated into one unit; the above-mentioned integration The unit can be implemented either in the form of hardware or in the form of hardware plus software functional units.
本领域普通技术人员可以理解:实现上述方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成,前述的程序可以存储于一计算机可读取存储介质中,该程序在执行时,执行包括上述方法实施例的步骤;而前述的存储介质包括:移动存储设备、只读存储器(ROM,Read-Only Memory)、随机存取存储器(RAM,Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。Those of ordinary skill in the art can understand that all or part of the steps of implementing the above method embodiments can be completed by program instructions related to hardware, the aforementioned program can be stored in a computer-readable storage medium, and when the program is executed, execute Including the steps of the above-mentioned method embodiment; and the aforementioned storage medium includes: a mobile storage device, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk and other various A medium on which program code can be stored.
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention. should be included within the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811063038.8ACN109245523B (en) | 2018-09-12 | 2018-09-12 | Charge Pumps and Storage Devices |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811063038.8ACN109245523B (en) | 2018-09-12 | 2018-09-12 | Charge Pumps and Storage Devices |
| Publication Number | Publication Date |
|---|---|
| CN109245523A CN109245523A (en) | 2019-01-18 |
| CN109245523Btrue CN109245523B (en) | 2020-07-14 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811063038.8AActiveCN109245523B (en) | 2018-09-12 | 2018-09-12 | Charge Pumps and Storage Devices |
| Country | Link |
|---|---|
| CN (1) | CN109245523B (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4350931A1 (en)* | 2022-10-05 | 2024-04-10 | NXP USA, Inc. | A charge pump control system |
| CN117526705A (en)* | 2023-12-29 | 2024-02-06 | 中茵微电子(南京)有限公司 | Voltage doubling circuit based on Dickson voltage doubler |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104113295A (en)* | 2014-04-30 | 2014-10-22 | 西安电子科技大学昆山创新研究院 | Low-voltage fully-differential operation amplifier circuit |
| CN106655757B (en)* | 2015-11-04 | 2020-06-05 | 上海贝岭股份有限公司 | Capacitive charge pump |
| CN107493012B (en)* | 2017-07-17 | 2019-08-13 | 上海华虹宏力半导体制造有限公司 | Negative pressure charge pump |
| CN108491020B (en)* | 2018-06-08 | 2024-06-07 | 长江存储科技有限责任公司 | Low dropout voltage regulator and flash memory |
| Publication number | Publication date |
|---|---|
| CN109245523A (en) | 2019-01-18 |
| Publication | Publication Date | Title |
|---|---|---|
| CN109286313B (en) | Control method and device of voltage doubling circuit and storage medium | |
| CN110249283A (en) | Low-dropout regulator | |
| US7427889B2 (en) | Voltage regulator outputting positive and negative voltages with the same offsets | |
| JP3425900B2 (en) | Switching regulator | |
| CN108258895B (en) | Soft start circuit and power supply system | |
| TW201244344A (en) | Device and method for a feedback control of switch capacitive regulator | |
| CN102957321B (en) | The method of control circuit, supply unit and control power supply | |
| TW201618454A (en) | Multi-stage amplifier | |
| JP6098057B2 (en) | Power supply control circuit, power supply device, and power supply control method | |
| CN101192793A (en) | Semiconductor device voltage control apparatus | |
| CN111462708B (en) | Voltage conversion circuit, voltage conversion method and display device | |
| CN109245523B (en) | Charge Pumps and Storage Devices | |
| CN101640482B (en) | Electrification overshoot voltage inhibitor for power supply regulator | |
| TWI534600B (en) | A power management device of a touchable control system | |
| JP2006050778A (en) | Charge pump circuit | |
| WO2020151540A1 (en) | Charge pump circuit and method for controlling ripple voltage of charge pump circuit | |
| KR101310092B1 (en) | Buck converter enhancing response characteristic | |
| KR20110030373A (en) | DC-DC Converters | |
| CN110601528B (en) | Charge pump and storage device | |
| CN108258896B (en) | Soft start circuit and power supply system | |
| CN110995205B (en) | Dynamic clock frequency adjusting circuit applied to charge pump feedback loop | |
| CN110299843B (en) | Composite DCDC circuit | |
| Wu et al. | A low-ripple charge pump with continuous pumping current control | |
| CN102263499B (en) | Clock generation circuit and charge pump system | |
| CN104914914B (en) | Circuit structure and its control method |
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right | Effective date of registration:20210429 Address after:100010 no.1101, 11 / F, block B, Zhizhen building, No.7 Zhichun Road, Haidian District, Beijing Patentee after:Changcun Chuangxin (Beijing) IC Design Co.,Ltd. Address before:Room 7018, No. 18, Huaguang Avenue, Guandong science and Technology Industrial Park, East Lake Development Zone, Hongshan District, Wuhan, Hubei Patentee before:Yangtze Memory Technologies Co.,Ltd. |