Invention content
In view of the above-mentioned problems, the present invention proposes a kind of power-supply system of loop stability, wherein including：
One pulse-width-modulation driver, including control signal, the first pulse output end and the second pulse output end；
The pulse-width-modulation driver receives a control signal by the control signal, and according to the control signalThe first pulse signal is exported from first pulse output end, and the second pulse letter is exported from second pulse output endNumber；
The grid of one PMOS tube, the PMOS tube connects first pulse output end；
The grid of one NMOS tube, the NMOS tube connects second pulse output end；
The drain electrode of the NMOS tube connects an output node of the source electrode formation of the PMOS tube for exporting electric signal；
The normal phase input end of one first comparator, the first comparator connects the soft start unit to receive the ginsengExamine signal；
The inverting input of the first comparator is connect by a partial pressure unit with the output node, described in receptionElectric signal at output node is by the signal after default relatively decompression；
The signal that the reference signal and inverting input input is compared generation one and compared by the first comparatorAs a result voltage signal, and compare output end by one and export the comparison result voltage signal；
Voltage-controlled resistor, including the first connecting pin, second connection end and centre cap control terminal；
The first connecting pin connection relatively output end；The second connection end connects one first capacitance；In describedThe heart tap control terminal connection relatively output end；
The comparison result voltage signal tune that the voltage-controlled resistor is received according to the centre cap control terminalThe resistance value between first connecting pin and the second connection end is saved, and the resistance value is believed with the comparison result voltageNumber voltage value it is negatively correlated；
Current-limiting protection circuit, including a current limliting input port, a current limliting acquisition port and a Current limited Control delivery outlet；
The current limliting input port connection relatively output end, and the Current limited Control delivery outlet drives with the impulse modulationThe control signal connection of dynamic device；
The current limliting acquisition port is used to acquire the conducting electric current of the PMOS tube；The current-limiting protection circuit is in collectingWhen stating the conducting electric current of PMOS tube less than a pre-set current value, the comparison result voltage signal is conveyed as the impulse modulationThe control signal of driver, when the conducting electric current for collecting the PMOS tube is higher than a pre-set current value, output is used forA cut-off signals of the pulse-width-modulation driver are turned off as the control signal.
Above-mentioned power-supply system, wherein the maximum voltage value of the comparison result voltage signal is k；
The resolution ratio of the voltage-controlled resistor is k/64~k/16.
Above-mentioned power-supply system a, wherein inductance is connected at the output node；
The one end of the inductance far from the output node is connected with one second capacitance.
Above-mentioned power-supply system, wherein the maximum value of resistance value is 10M Ω.
Above-mentioned power-supply system, wherein the drain electrode of the PMOS tube connects a power supply；
The source electrode of the NMOS tube is grounded.
Above-mentioned power-supply system, wherein the pulse-width-modulation driver further includes an input end of clock, the clock inputIt holds for receiving external clock signal.
Advantageous effect：A kind of power-supply system of loop stability proposed by the present invention, can ensure higher loop stability,Reliability is high.
Specific implementation mode
Invention is further explained with reference to the accompanying drawings and examples.
In a preferred embodiment, as shown in Figure 1, it is proposed that a kind of power-supply system of loop stability, wherein can be withIncluding：
One pulse-width-modulation driver 10, including control signal, the first pulse output end and the second pulse output end；
Pulse-width-modulation driver 10 receives a control signal Vcomp by control signal, and according to control signal VcompThe first pulse signal PWM1 is exported from the first pulse output end, and the second pulse signal is exported from the second pulse output endPWM2；
The grid of one PMOS tube PM1, PMOS tube PM1 connect the first pulse output end；
The grid of one NMOS tube NM1, NMOS tube NM1 connect the second pulse output end；
The source electrode of the drain electrode connection PMOS tube PM1 of NMOS tube NM1 forms the output node Lx for exporting electric signal；
The normal phase input end of one first comparator 21, first comparator 21 receives a reference signal Vref；
The inverting input of first comparator 21 is connect by a partial pressure unit 30 with output node Lx, to receive output sectionElectric signal at point Lx is by the signal after default relatively decompression, i.e. signal VFB；
The signal (signal VFB) that reference signal Vref and inverting input input is compared generation by first comparator 21One comparison result voltage signal Veao, and compare output end by one and export comparison result voltage signal Veao；
Voltage-controlled resistor P, including the first connecting pin, second connection end and centre cap control terminal；
Output end is compared in the connection of first connecting pin；Second connection end connects one first capacitance；Centre cap control terminal connectsCompare output end；
Voltage-controlled resistor P adjusts first according to the comparison result voltage signal Veao that centre cap control terminal receives and connectsThe resistance value between end and second connection end is connect, and resistance value and the voltage value of comparison result voltage signal Veao are negatively correlated；
Current-limiting protection circuit 40, including a current limliting input port, a current limliting acquisition port and a Current limited Control delivery outlet；
Output end is compared in the connection of current limliting input port, and Current limited Control delivery outlet and the control of impulse modulation driver 10 inputEnd connection；
Current limliting acquisition port is used to acquire the conducting electric current of PMOS tube PM1；Current-limiting protection circuit 40 is in collecting PMOS tubeWhen conducting electric current is less than a pre-set current value, controls of the conveying comparison result voltage signal Veao as impulse modulation driver 10Signal Vcomp is exported when the conducting electric current for collecting PMOS tube PM1 is higher than a pre-set current value for turning off pulsewidth modulationOne cut-off signals of driver 10 are as control signal Vcomp.
In above-mentioned technical proposal, current-limiting protection circuit 40 can specifically include one second comparator 41 and a third comparator42；Current limliting input port of the normal phase input end of second comparator 41 as current-limiting protection circuit 40, second comparator 41Inverting input is connect with the output end of third comparator 42, and the output end of second comparator 41 is as current-limiting protection circuit 40Current limited Control output end, the normal phase input end of the third comparator 42 receives power supply Vdd, and the reverse phase of the third comparator 42 is defeatedEnter end connection output node Lx, the wherein normal phase input end of third comparator 42 and inverting input collectively constitutes current-limiting protection electricityThe current limliting acquisition port on road 40；Result of the comparison, i.e. signal VCS are delivered to the reverse phase of the second comparator 41 by the third comparator 42Input terminal；The signal in order to control of Current limited Control delivery outlet output；An inductance L and one second can also be connected at output node LxCapacitance C2, output voltage final at this time are Vout；One first can be connected between first pulse output end and PMOS tube PM1One second pre-driver KN2 can be connected between pre-driver KN1 and the second pulse output end and PMOS tube PM2；Using the resistance value of the voltage-controlled resistor P negatively correlated with the voltage value of comparison result voltage signal, enable toThe process of one capacitance C1 chargings keeps quick, and the speed discharged from the first capacitance C1 keeps gentle, to improve the steady of loopIt is qualitative；Referring to Fig. 3 it is found that after using the technical solution in the present invention, the electricity at comparison result voltage signal Veao and inductance LLumen is aobvious to be stablized；Compare Fig. 2 and Fig. 4 it is found that after using the technical solution in the present invention, output voltage Vout fluctuates smaller.
In a preferred embodiment, the maximum voltage value of comparison result voltage signal Veao is k；
The resolution ratio of voltage-controlled resistor P can be k/64~k/16, for example, k/64, or, k/48 or k/32, orK/24 etc..
In above-mentioned technical proposal, maximum voltage value k can be set according to actual conditions, be not limited herein.
In a preferred embodiment, the maximum value of the resistance value of voltage-controlled resistor P can be 10M Ω (megaohmNurse).
In a preferred embodiment, an inductance L is connected at output node Lx；
The one end of inductance L far from output node Lx can be connected with one second capacitance C2, to ensure at output node LxThe stabilization of electric signal.
In a preferred embodiment, the drain electrode of PMOS tube PM1 connects a power supply Vdd；
The source electrode of NMOS tube NM1 is grounded.
In a preferred embodiment, pulse-width-modulation driver 10 further includes an input end of clock, and input end of clock is usedClock signal clk outside receiving.
In conclusion a kind of power-supply system of loop stability proposed by the present invention, including：One pulse-width-modulation driver, packetInclude control signal, the first pulse output end and the second pulse output end；Pulse-width-modulation driver is received by control signalOne control signal, and the first pulse signal is exported from the first pulse output end according to control signal, and exported from the second pulseThe second pulse signal of end output；The grid of one PMOS tube, PMOS tube connects the first pulse output end；One NMOS tube, NMOS tubeGrid connects the second pulse output end；The source electrode of the drain electrode connection PMOS tube of NMOS tube forms the output for exporting electric signalNode；The normal phase input end of one first comparator, first comparator receives a reference signal；The inverting input of first comparatorIt is connect with output node by a partial pressure unit, to receive the electric signal at output node by the signal after default relatively decompression；The signal that reference signal and inverting input input is compared and generates a comparison result voltage signal by first comparator, and leads toIt crosses one and compares output end and export comparison result voltage signal；Voltage-controlled resistor, including the first connecting pin, second connection endWith centre cap control terminal；Output end is compared in the connection of first connecting pin；Second connection end connects one first capacitance；Centre cap controlOutput end is compared in end connection processed；Voltage-controlled resistor is adjusted according to the comparison result voltage signal that centre cap control terminal receivesResistance value between first connecting pin and second connection end, and the voltage value of resistance value and comparison result voltage signal is in negativeIt closes；Current-limiting protection circuit, including a current limliting input port, a current limliting acquisition port and a Current limited Control delivery outlet；Current limliting input port connectsIt connects and compares output end, and Current limited Control delivery outlet is connect with the control signal of impulse modulation driver；Current limliting acquisition port is used forAcquire the conducting electric current of PMOS tube；Current-limiting protection circuit in collect PMOS tube conducting electric current be less than a pre-set current value when,Control signal of the comparison result voltage signal as impulse modulation driver is conveyed, is higher than in the conducting electric current for collecting PMOS tubeWhen one pre-set current value, the cut-off signals for turning off pulse-width-modulation driver are exported as control signal；Can ensure compared withHigh loop stability, reliability are high.
By description and accompanying drawings, the exemplary embodiments of the specific structure of specific implementation mode are given, based on present invention essenceGod can also make other conversions.Although foregoing invention proposes existing preferred embodiment, however, these contents are not intended asLimitation.
For a person skilled in the art, after reading above description, various changes and modifications undoubtedly will be evident.Therefore, appended claims should regard the whole variations and modifications for covering the true intention and range of the present invention as.It is weighingThe range and content of any and all equivalences within the scope of sharp claim, are all considered as still belonging to the intent and scope of the invention.