Disclosure of Invention
Therefore, the present invention provides a pixel compensation circuit, a pixel compensation method and a display device to solve the problem of poor display uniformity of the display in the prior art.
In a first aspect of the present invention, a pixel compensation circuit is provided, which includes: a driving switch, a first switch, a second switch, a first capacitor, a second capacitor and a light-emitting component, wherein,
the control end of the driving switch is connected with the first end of the first switch, the first end of the driving switch is connected with a first power supply, and the second end of the driving switch is connected with the second end of the first switch;
the control end of the first switch is connected with the scanning signal end;
the control end of the second switch is connected with the reset signal end, the first end of the second switch is connected with the second end of the driving switch, and the second end of the second switch is connected with the data signal end;
the first end of the first capacitor is connected with the first power supply, and the second end of the first capacitor is connected with the control end of the driving switch;
a first end of the second capacitor is connected with a first end of the second switch, and a second end of the second capacitor is connected with a second end of the second switch;
the first end of the light-emitting component is connected with the second end of the driving switch, and the second end of the light-emitting component is connected with a second power supply.
Optionally, the first switch is a double gate transistor.
Optionally, the drive switch is a P-type transistor.
Optionally, the first switch is a P-type transistor or an N-type transistor; and/or the second switch is a P-type transistor or an N-type transistor.
A second aspect of the present invention provides a pixel compensation method applied to the pixel compensation circuit of the first aspect, including a first stage, a second stage, a third stage and a fourth stage, wherein,
the first stage is a reset stage, and is used for resetting the driving switch, the scanning signal end controls the first switch to be in a conducting state, the reset signal end controls the second switch to be in a conducting state, the second power supply outputs a high level, the data signal end outputs a high level, the high level output by the data signal end is transmitted to the control end of the driving switch through the first switch and the second switch, and the driving switch is in a switching-off state;
the second stage is a compensation stage, and is used for performing threshold compensation on the driving switch, the scanning signal end controls the first switch to be in a conducting state, the reset signal end controls the second switch to be in a switching-off state, the second power supply outputs a high level, the data signal end outputs a high level, the driving switch is in a diode connection state, and a compensation voltage is formed at the control end of the driving switch;
the third stage is a write-in stage, and is configured to write data into the driving switch, where the scan signal end controls the first switch to be in an on state, the reset signal end controls the second switch to be in an off state, the second power source outputs a low level, the data signal end outputs a low level, an output signal of the data signal end is transmitted to the second end of the first capacitor through the first switch and the second capacitor, and a write-in voltage is formed at the control end of the driving switch;
the fourth stage is a light-emitting stage, the scanning signal end controls the first switch to be in an off state, the reset signal end controls the second switch to be in an off state, the second power supply outputs a low level, the data signal end outputs a high level, the driving switch is in an on state, the light-emitting component flows through a driving current, and the driving current drives the light-emitting component to emit light.
Optionally, the first switch is a double gate transistor.
Optionally, the driving switch is a P-type transistor; and/or the first switch is a P-type transistor or an N-type transistor; and/or the second switch is a P-type transistor or an N-type transistor.
Optionally, when the first switch and the second switch are P-type transistors, in the first stage, the scan signal terminal is at a low level, the reset signal terminal is at a low level, the second power supply is at a high level, and the data signal terminal is at a high level;
in the second stage, the scanning signal end is at a low level, the reset signal end is at a high level, the second power supply is at a high level, and the data signal end is at a high level;
in the third stage, the scan signal terminal is at a low level, the reset signal terminal is at a high level, the second power supply is at a low level, and the data signal terminal is at a low level;
in the fourth stage, the scan signal terminal is at a high level, the reset signal terminal is at a high level, the second power supply is at a low level, and the data signal terminal is at a high level.
In a third aspect of the invention, there is provided a display device comprising the pixel compensation circuit according to any one of the first aspect of the invention.
The technical scheme of the invention has the following advantages:
the pixel compensation circuit provided by the invention comprises: the driving circuit comprises a driving switch, a first switch, a second switch, a first capacitor, a second capacitor and a light-emitting component, wherein the control end of the driving switch is connected with the first end of the first switch, the first end of the driving switch is connected with a first power supply, and the second end of the driving switch is connected with the second end of the first switch; the control end of the first switch is connected with the scanning signal end; the control end of the second switch is connected with the reset signal end, the first end of the second switch is connected with the second end of the driving switch, and the second end of the second switch is connected with the data signal end; the first end of the first capacitor is connected with the first power supply, and the second end of the first capacitor is connected with the control end of the driving switch; the first end of the second capacitor is connected with the first end of the second switch, and the second end of the second capacitor is connected with the second end of the second switch; the first end of the light-emitting component is connected with the second end of the driving switch, and the second end of the light-emitting component is connected with a second power supply. By setting the connection mode that the reset signal end is connected with the scanning signal end, the control end of the driving switch forms threshold compensation voltage in the compensation stage, and then the control end of the driving switch is used for compensating the threshold voltage of the driving switch in the light-emitting stage, so that the driving current is unrelated to the threshold voltage, the current flowing through the light-emitting component due to the threshold voltage drift of the pixel compensation circuit is prevented from being unstable, and the uniformity of display is improved.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
The present embodiment provides a pixel compensation circuit, as shown in fig. 1, including: a driving switch M1, a first switch M2, a second switch M3, a first capacitor Cst, a second capacitor Ccp, and a light emitting element D, wherein,
a control end of the driving switch M1 is connected with a first end of the first switch M2, a first end of the driving switch M1 is connected with a first power supply VDD, and a second end of the driving switch M1 is connected with a second end of the first switch M2;
the control end of the first switch M2 is connected with the SCAN signal end SCAN;
the control end of the second switch M3 is connected with the Reset signal end Reset, the first end of the second switch M3 is connected with the second end of the driving switch M1, and the second end of the second switch M3 is connected with the Data signal end Data;
a first end of the first capacitor Cst is connected to the first power supply VDD, and a second end of the first capacitor Cst is connected to the control end of the driving switch M1;
a first terminal of the second capacitor Ccp is connected to a first terminal of the second switch M3, and a second terminal of the second capacitor Ccp is connected to a second terminal of the second switch M3;
a first terminal of the light emitting device D is connected to the second terminal of the driving switch M1, and a second terminal of the light emitting device D is connected to the second power source VSS.
In the embodiment, the driving switch M1, the first switch M2 and the second switch M3 are all P-type transistors, so that only one type of transistor needs to be prepared, process steps such as masking and photoetching can be reduced, the process flow is simplified, and the production cost is saved; of course, in other embodiments, the first switch M2 may also be an N-type transistor, or the second switch M3 may also be an N-type transistor, which may be appropriately configured as required. The control terminals of the driving switch M1, the first switch M2 and the second switch M3 respectively correspond to the gates of the P-type transistors.
In the present embodiment, in order to reduce the leakage current of the first switch M2 and reduce the area of the pixel compensation circuit, the first switch M2 is provided as a double-gate transistor, and of course, in other embodiments, the first switch M2 may also be a normal transistor; the driving switch M1 and the second switch M3 may also be configured as double-gate transistors, and such configuration may increase the area of the pixel compensation circuit, and may be reasonably configured as required.
The working principle of the pixel compensation circuit, namely the pixel compensation method, comprises a first stage, a second stage, a third stage and a fourth stage. FIG. 2 is a waveform diagram of a pixel compensation circuit according to an embodiment of the present invention; FIG. 3 is a diagram of simulation results of a pixel compensation circuit according to an embodiment of the present invention.
In this embodiment, the driving switch M1, the first switch M2 and the second switch M3 are all P-type transistors, and the operation of the pixel compensation circuit is as follows:
as shown in fig. 3, in the present embodiment, the power supply voltage value of the selected P-type transistor is 4.6V, and the simulation parameters are determined according to the type and characteristics (withstand voltage and current) of the transistor: the high level output by the SCAN signal end and the Reset signal end is 7V, and the low level output by the SCAN signal end and the Reset signal end is-7V; the high level output by the second power supply VSS is 4.6V, and the low level output by the second power supply VSS is-3V; the high level output by the Data signal end is 3V, and the low level is 0V; of course, in other embodiments, the output value of each signal is reasonably determined according to the type of the selected P-type transistor, and if the power voltage of the selected P-type transistor is 3.3V, the high level output by the SCAN signal terminal SCAN and the Reset signal terminal Reset is 5V, and the low level is-5V; the high level of the output of the second power supply VSS is 3.3V, and the low level is-1V; the high level of the Data signal terminal Data output is 2V, and the low level is 0V.
The first stage T1 is a reset stage for resetting the driving switch M1; in the first stage, the SCAN signal terminal SCAN is at a low level, and the SCAN signal terminal SCAN controls the first switch M2 to be in a conducting state; the Reset signal end Reset is at low level, and the Reset signal end Reset controls the second switch M3 to be in a conducting state; the second power supply VSS outputs a high level; the Data signal end Data outputs high level, and the high level output by the Data signal end Data is Voffset，VoffsetThe voltage is transmitted to a control terminal of a driving switch M1 through a first switch M2 and a second switch M3, the driving switch M1 is in an off state, and the voltage value of the control terminal of the driving switch M1 is equal toVoffset. In other embodiments, when the first switch M2 and the second switch M3 in the pixel compensation circuit are N-type transistors, the on signal of the switch is at a high level, and the off signal is at a low level, and the logic of the circuit is the same, which can be set reasonably as required.
The second stage T2 is a compensation stage for performing threshold compensation on the driving switch M1; in the second stage, the SCAN signal terminal SCAN is at a low level, and the SCAN signal terminal SCAN controls the first switch M2 to be in a conducting state; the Reset signal end Reset is at a high level, and the Reset signal end Reset controls the second switch M3 to be in an off state; the second power supply VSS outputs a high level; data output high level V of Data signal terminaloffsetThe driving switch M1 is in diode connection state, a compensation voltage is formed at the control terminal of the driving switch M1, and the voltage value at the control terminal of the driving switch M1 in diode connection state is larger than the voltage value V at the first terminal of the driving switch M1 according to the characteristics of the P-type transistorDD(output voltage value V of first power supply VDDDD，VDDThe power supply voltage value of the P-type transistor is 4.6V) is lower than the threshold voltage VthI.e. the control terminal voltage of the drive switch M1 is VDD+VthWherein V isthTo drive the threshold voltage of switch M1. In this embodiment, the output voltage value V of the first power supply VDDDDIs 4.6V, of course, in other embodiments, VDDOther values, such as 3.3V, may be used, as appropriate depending on the P-type transistor selected.
The third stage T3 is a write stage for writing data into the drive switch M1; in the third phase, the SCAN signal terminal SCAN is at a low level, and the SCAN signal terminal SCAN controls the first switch M2 to be in a conducting state; the Reset signal end Reset is at a high level, and the Reset signal end Reset controls the second switch M3 to be in an off state; the second power supply VSS outputs a low level; the Data signal end Data outputs low level, and the low level output by the Data signal end Data is VdataThe output signal of Data signal end is composed of VoffsetBecomes VdataThe first capacitor Ccp is obtained by the characteristic that the voltage difference between the two ends of the capacitor cannot change suddenlyThe reduction of the two-terminal voltage is Voffset-VdataTherefore, the voltage decrease at the first terminal of the second capacitor Ccp is also Voffset-VdataAt this time, the first switch M2 is turned on, so that the voltage at the second terminal of the first capacitor Cst is decreased by Voffset-VdataA write voltage is formed at the control terminal of the drive switch M1, and the control terminal voltage of the drive switch M1 has a voltage value VDD+Vth+Vdata-VoffsetWherein V isDDIs 4.6V, VoffsetIs 3V, VdataIs 0V.
The fourth stage T4 is a light emitting stage, in which the SCAN signal terminal SCAN is at a high level and controls the first switch M2 to be in an off state; the Reset signal end Reset is at a high level, and the Reset signal end Reset controls the second switch M3 to be in an off state; the second power supply VSS outputs a low level; data at Data signal end is level Voffset(ii) a The control terminal voltage of the drive switch M1 is Vg＝VDD+Vth+Vdata-VoffsetThe voltage at the first end of the driving switch M1 is Vs＝VDD，Vgs＝Vg-Vs＝VDD+Vth+Vdata-Voffset-VDD＝Vth+Vdata-Voffset<0 and | Vgs|>|VthIf the conduction condition of the driving switch M1 (P-type transistor) is satisfied, the driving switch M1 is in a conduction state, and the driving current flows through the light emitting element D to drive the light emitting element D to emit light; the magnitude of the driving current is as follows:
I_oled＝k(Vgs-Vth)2＝k(VDD+Vth+Vdata-Voffset-VDD-Vth)2＝k(Vdata-Voffset)2，
wherein,μpis the hole mobility; coxIs a unit ofAn area of capacitance;to drive the width-to-length ratio of switch M1. VDD、VdataAnd VoffsetThe values of (A) are 4.6V, 0V and 3V respectively.
From the above driving current formula, the magnitude of the driving current and the threshold voltage V of the driving switch M1 can be foundthAnd the driving current flowing through the light emitting component is stabilized, so that the pixel compensation circuit realizes the Vth compensation function. By setting the connection mode of connecting the reset signal end and the scanning signal end, the instability of the driving current flowing through the light-emitting component caused by the drift of the threshold voltage of the pixel compensation circuit is avoided, and the uniformity of display is improved; the driving current is irrelevant to the power supply voltage, so that the interference of the power supply is avoided, and the uniformity of display is further improved; meanwhile, the number of required devices is small, the area of a single pixel circuit is reduced, and therefore the pixel structure is suitable for a screen body with high PPI.
The embodiment also provides a display device which comprises the pixel compensation circuit. The display device usually includes several pixel compensation circuits, because the area required by a single pixel circuit is small, and the magnitude of the driving current and the threshold voltage VthTherefore, the display device has the advantages of small volume and good display uniformity.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.