技术领域technical field
本发明涉及半导体技术领域，具体涉及一种晶圆翘曲状态调整方法。The invention relates to the technical field of semiconductors, in particular to a method for adjusting a warped state of a wafer.
背景技术Background technique
半导体晶圆(简称：晶圆；又称：晶片；英文名称：wafer)在制造过程中以及随后在晶圆上制作电子元件及线路时均会发生翘曲的状况。翘曲，也称弯曲，在半导体领域中是指晶圆发生形变而不平整的现象。在半导体制程工艺中，翘曲会影响晶圆的品质及半导体制程工艺的进行，例如，在光刻蚀过程中，若晶圆发生形变，其光照表面不平整，会导致掩膜结构不能形成清晰的图像，从而影响刻蚀的精准性。Semiconductor wafers (referred to as: wafers; also known as: wafers; English name: wafer) will warp during the manufacturing process and when electronic components and circuits are produced on the wafer. Warpage, also known as bending, refers to the phenomenon that the wafer is deformed and uneven in the semiconductor field. In the semiconductor manufacturing process, warping will affect the quality of the wafer and the progress of the semiconductor manufacturing process. For example, in the process of photolithography, if the wafer is deformed, the illuminated surface will be uneven, which will cause the mask structure to not be formed clearly. image, thus affecting the accuracy of etching.
随着对集成度和存储容量需求的不断发展，存储器技术不断进步，随着二维平面存储器的尺寸缩小到了十几纳米级别(16nm、15nm甚至14nm)，每个存储单元也变得非常小，使得每个单元中仅有少数几个电子，材料对电子控制能力随之变弱，随之引起的串扰问题使得进一步缩小存储单元的尺寸变得非常困难而且不够经济。因此，三维存储器应运而生，其是一种基于平面存储器的新型产品，通过存储单元的立体堆叠实现存储容量的扩展，现有技术中已经提供了具有32层、64层甚至128层堆叠结构的三维存储器。With the continuous development of the demand for integration and storage capacity, the memory technology continues to improve. As the size of the two-dimensional planar memory shrinks to a dozen nanometers (16nm, 15nm or even 14nm), each storage unit becomes very small. With only a few electrons in each cell, the ability of the material to control the electrons becomes weaker, and the resulting crosstalk problem makes it very difficult and uneconomical to further reduce the size of the memory cell. Therefore, three-dimensional memory emerges at the historic moment, which is a new type of product based on planar memory. The expansion of storage capacity is realized through the three-dimensional stacking of storage units. In the prior art, 32-layer, 64-layer or even 128-layer stacking structures have been provided. three-dimensional memory.
三维存储器的制程繁杂，在制作过程中需要基于晶圆进行多次的材料沉积、光刻刻蚀等工艺，由于三维存储器器件结构精密度较高，因此，需要将晶圆翘曲控制在可接受的范围内，但晶圆在制程中经过高温、研磨等工艺后会产生大量的应力导致晶圆的翘曲加重而失控，晶圆翘曲失控会导致诸多问题，例如，氮氧堆叠薄膜脱落、晶圆破裂、版图对准性能不稳定，甚至在最坏的情况下，光刻工艺受制程工具制约而不能进行；又如，在部分工艺制程中，需要采用吸附工具吸附固定住晶圆，若晶圆翘曲较大则难以吸附固定住，从而导致该工艺制程无法进行。这些问题都会导致产品性能的不稳定、以及降低产品的产出率和良率。The manufacturing process of three-dimensional memory is complicated. During the production process, multiple processes such as material deposition and photolithography etc. are required based on the wafer. Due to the high precision of the structure of the three-dimensional memory device, it is necessary to control the warpage of the wafer to an acceptable level. However, after the wafer undergoes high temperature, grinding and other processes in the manufacturing process, a large amount of stress will be generated, which will cause the warpage of the wafer to increase and become out of control. The out of control warpage of the wafer will cause many problems, such as the detachment of the nitrogen oxide stacked film, Wafer breakage, unstable layout alignment performance, and even in the worst case, the photolithography process cannot be carried out due to the constraints of process tools; If the wafer warpage is large, it is difficult to adsorb and fix it, which makes the process impossible. These problems will lead to unstable product performance, as well as lower product yield and yield.
鉴于上述问题，目前迫切需要提供一种可以对晶圆翘曲状态进行调整的方法，以减小晶圆的翘曲程度，避免晶圆翘曲失控的问题。In view of the above problems, there is an urgent need to provide a method for adjusting the warping state of the wafer, so as to reduce the degree of warping of the wafer and avoid the problem of out-of-control wafer warping.
发明内容Contents of the invention
针对现有技术中的缺陷，本发明提供一种晶圆翘曲状态调整方法，以减小晶圆的翘曲程度，避免晶圆翘曲失控的问题，进而提高产品的稳定性，以及提高产品的产出率和良率。Aiming at the defects in the prior art, the present invention provides a method for adjusting the warping state of the wafer to reduce the degree of warping of the wafer, avoid the problem of out-of-control wafer warping, and then improve the stability of the product and improve the quality of the product. yield and yield.
本发明提供的一种晶圆翘曲状态调整方法，包括：检测目标晶圆的翘曲状态；A method for adjusting a warping state of a wafer provided by the present invention includes: detecting the warping state of a target wafer;
根据所述目标晶圆的翘曲状态，在所述目标晶圆的背面生长硅化物薄膜，通过所述硅化物薄膜的应力调整所述目标晶圆的翘曲状态。According to the warping state of the target wafer, a silicide film is grown on the back surface of the target wafer, and the warping state of the target wafer is adjusted by the stress of the silicide film.
在本发明提供的一个变更实施方式中，所述根据所述目标晶圆的翘曲状态，在所述目标晶圆的背面生长硅化物薄膜，通过所述硅化物薄膜的应力调整所述目标晶圆的翘曲状态，包括：In a modified embodiment provided by the present invention, according to the warping state of the target wafer, a silicide film is grown on the back surface of the target wafer, and the stress of the silicide film is used to adjust the target wafer. The warped state of the circle, including:
若所述目标晶圆的翘曲状态为边缘向上弯曲，则在所述目标晶圆的背面生长具有拉伸应力的硅化物薄膜，通过所述硅化物薄膜的拉伸应力减小所述目标晶圆的翘曲程度；If the warping state of the target wafer is that the edge is bent upward, then a silicide film with tensile stress is grown on the back side of the target wafer, and the tensile stress of the silicide film reduces the target wafer. degree of warpage of the circle;
若所述目标晶圆的翘曲状态为边缘向下弯曲，则在所述目标晶圆的背面生长具有压缩应力的硅化物薄膜，通过所述硅化物薄膜的压缩应力减小所述目标晶圆的翘曲程度。If the warping state of the target wafer is that the edge is bent downward, a silicide film with compressive stress is grown on the back side of the target wafer, and the target wafer is reduced by the compressive stress of the silicide film. degree of warping.
在本发明提供的另一个变更实施方式中，所述硅化物包括：氮化硅、氧化硅或氮氧化硅。In another modified embodiment provided by the present invention, the silicide includes: silicon nitride, silicon oxide or silicon oxynitride.
在本发明提供的又一个变更实施方式中，所述硅化物包括氮化硅，所述在所述目标晶圆的背面生长硅化物薄膜，包括：In yet another modified embodiment provided by the present invention, the silicide includes silicon nitride, and the growth of a silicide film on the back side of the target wafer includes:
采用等离子体增强化学气相沉积法在所述目标晶圆的背面生长氮化硅薄膜。A silicon nitride film is grown on the back surface of the target wafer by plasma-enhanced chemical vapor deposition.
在本发明提供的又一个变更实施方式中，所述硅化物包括氮化硅，所述在所述目标晶圆的背面生长具有拉伸应力的硅化物薄膜，包括：In yet another modified embodiment provided by the present invention, the silicide includes silicon nitride, and growing a silicide film with tensile stress on the back side of the target wafer includes:
以硅烷和氨气为反应物，利用高频功率源，采用等离子体增强化学气相沉积法在所述目标晶圆的背面生长具有拉伸应力的氮化硅薄膜。A silicon nitride film with tensile stress is grown on the back side of the target wafer by using silane and ammonia gas as reactants, using a high-frequency power source, and adopting a plasma-enhanced chemical vapor deposition method.
在本发明提供的又一个变更实施方式中，所述硅化物包括氮化硅，所述在所述目标晶圆的背面生长具有压缩应力的硅化物薄膜，包括：In yet another modified embodiment provided by the present invention, the silicide includes silicon nitride, and the growth of a silicide film with compressive stress on the back of the target wafer includes:
以硅烷和氨气为反应物，在氮气环境下，利用高频功率源和低频功率源相结合的方式，采用等离子体增强化学气相沉积法在所述目标晶圆的背面生长具有压缩应力的氮化硅薄膜。Using silane and ammonia as reactants, in a nitrogen environment, using a combination of high-frequency power source and low-frequency power source, using plasma-enhanced chemical vapor deposition to grow nitrogen with compressive stress on the back of the target wafer silicon thin film.
在本发明提供的又一个变更实施方式中，所述方法，还包括：In yet another modified embodiment provided by the present invention, the method further includes:
利用已调整翘曲状态的目标晶圆执行半导体制程工艺；Executing semiconductor fabrication processes with warped-adjusted target wafers;
在所述半导体制程工艺完成后，去除所述目标晶圆背面的所述硅化物薄膜。After the semiconductor manufacturing process is completed, the silicide film on the back side of the target wafer is removed.
在本发明提供的又一个变更实施方式中，所述去除所述目标晶圆背面的所述硅化物薄膜，包括：In yet another modified embodiment provided by the present invention, the removing the silicide film on the back side of the target wafer includes:
采用湿法腐蚀工艺去除所述目标晶圆背面的所述硅化物薄膜。A wet etching process is used to remove the silicide film on the back side of the target wafer.
在本发明提供的又一个变更实施方式中，所述采用湿法腐蚀工艺去除所述目标晶圆背面的所述硅化物薄膜，包括：In yet another modified embodiment provided by the present invention, the removal of the silicide film on the back side of the target wafer by using a wet etching process includes:
采用背面清洗工艺腐蚀去除所述目标晶圆背面的所述硅化物薄膜。The silicide film on the back of the target wafer is etched and removed by using a back cleaning process.
在本发明提供的又一个变更实施方式中，在去除所述目标晶圆背面的所述硅化物薄膜之前，还包括：In yet another modified embodiment provided by the present invention, before removing the silicide film on the back side of the target wafer, it also includes:
在所述目标晶圆正面形成腐蚀牺牲层。An etch sacrificial layer is formed on the front side of the target wafer.
在本发明提供的又一个变更实施方式中，所述检测目标晶圆的翘曲状态，包括：In yet another modified embodiment provided by the present invention, the detection of the warpage state of the target wafer includes:
采用翘曲度测量仪检测目标晶圆的翘曲状态。The warpage state of the target wafer is detected with a warpage measuring instrument.
由上述技术方案可知，本发明提供的一种晶圆翘曲状态调整方法，通过在所述目标晶圆的背面生长硅化物薄膜，从而可以利用所述硅化物薄膜的应力调整所述目标晶圆的翘曲状态，因此，可以有效地减小晶圆的翘曲程度，避免晶圆翘曲失控的问题，进而提高产品的稳定性，以及提高产品的产出率和良率。It can be known from the above technical solution that the present invention provides a method for adjusting the warpage state of a wafer, by growing a silicide film on the back side of the target wafer, so that the stress of the silicide film can be used to adjust the target wafer Therefore, the degree of warpage of the wafer can be effectively reduced to avoid the problem of out-of-control wafer warpage, thereby improving the stability of the product, and improving the output rate and yield of the product.
附图说明Description of drawings
为了更清楚地说明本发明具体实施方式或现有技术中的技术方案，下面将对具体实施方式或现有技术描述中所需要使用的附图作简单地介绍。在所有附图中，类似的元件或部分一般由类似的附图标记标识。In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings that need to be used in the description of the specific embodiments or the prior art. Throughout the drawings, similar elements or parts are generally identified by similar reference numerals.
图1示出了本发明实施例所提供的一种晶圆翘曲状态调整方法的流程图。FIG. 1 shows a flow chart of a method for adjusting a warpage state of a wafer provided by an embodiment of the present invention.
具体实施方式Detailed ways
下面将结合附图对本发明技术方案的实施例进行详细的描述。以下实施例仅用于更加清楚地说明本发明的技术方案，因此只是作为示例，而不能以此来限制本发明的保护范围。Embodiments of the technical solutions of the present invention will be described in detail below in conjunction with the accompanying drawings. The following examples are only used to illustrate the technical solution of the present invention more clearly, so they are only examples, and should not be used to limit the protection scope of the present invention.
需要注意的是，除非另有说明，本申请使用的技术术语或者科学术语应当为本发明所属领域技术人员所理解的通常意义。It should be noted that, unless otherwise specified, the technical terms or scientific terms used in this application shall have the usual meanings understood by those skilled in the art to which the present invention belongs.
另外，术语“包括”和“具有”以及它们任何变形，意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、系统、产品或设备没有限定于已列出的步骤或单元，而是可选地还包括没有列出的步骤或单元，或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或单元。Additionally, the terms "comprising" and "having", as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes unlisted steps or units, or optionally further includes For other steps or units inherent in these processes, methods, products or apparatuses.
本发明实施方式提供一种晶圆翘曲状态调整方法，下面结合附图对本发明的实施例进行说明。Embodiments of the present invention provide a method for adjusting a warping state of a wafer, and the embodiments of the present invention will be described below with reference to the accompanying drawings.
请参考图1，其示出了本发明实施例所提供的一种晶圆翘曲状态调整方法的流程图。如图1所示，所述晶圆翘曲状态调整方法，包括以下步骤：Please refer to FIG. 1 , which shows a flowchart of a method for adjusting a warpage state of a wafer provided by an embodiment of the present invention. As shown in Figure 1, the method for adjusting the wafer warping state comprises the following steps:
步骤S101：检测目标晶圆的翘曲状态。Step S101: Detect the warping state of the target wafer.
本发明实施例中，所述目标晶圆是指待处理的晶圆，所述晶圆可以是衬底，也可以是衬底经过多道半导体制程工艺(如镀膜、光刻、沉积、研磨等)处理后的半成品，所述衬底的材质可以包括体硅(bulk Si)、体锗(bulkGe)、绝缘体上硅(SOI)、绝缘体上锗(GeOI)或者是其他化合物半导体衬底，例如SiGe、SiC、GaN、GaAs、InP等等，以及这些物质的组合。为了与现有的IC制造工艺兼容，在本发明提供的一个实施例中，采用含硅材质的衬底，例如Si、SOI、SiGe或SiC等。In the embodiment of the present invention, the target wafer refers to the wafer to be processed. The wafer can be a substrate, or a substrate that has undergone multiple semiconductor manufacturing processes (such as coating, photolithography, deposition, grinding, etc.) ) processed semi-finished products, the material of the substrate may include bulk silicon (bulk Si), bulk germanium (bulkGe), silicon-on-insulator (SOI), germanium-on-insulator (GeOI) or other compound semiconductor substrates, such as SiGe , SiC, GaN, GaAs, InP, etc., and combinations of these substances. In order to be compatible with the existing IC manufacturing process, in one embodiment provided by the present invention, a substrate containing silicon, such as Si, SOI, SiGe or SiC, etc. is used.
本步骤中，首先要检测目标晶圆的翘曲状态，以便于根据所述目标晶圆的翘曲状态适应性地在所述目标晶圆的背面生长硅化物薄膜，进而调整调整所述目标晶圆的翘曲状态。In this step, firstly, the warping state of the target wafer should be detected, so as to adaptively grow a silicide film on the back side of the target wafer according to the warping state of the target wafer, and then adjust and adjust the warping state of the target wafer. The warped state of the circle.
其中，目标晶圆的翘曲状态一般可划分为两种，一种是晶圆边缘向下弯曲、中间凸起，另一种是晶圆边缘向上弯曲、中间凹陷。所述目标晶圆的翘曲状态也可以采用翘曲度进行表征，翘曲度一般是指晶圆平放时最高点与最低点之间的距离，上述两种翘曲状态可以通过翘曲度取值的正负进行区分，翘曲度为0时说明晶圆较为平整，翘曲度的绝对值越大，表示晶圆的翘曲程度越大。Among them, the warping state of the target wafer can generally be divided into two types, one is that the edge of the wafer is bent downward and the middle is convex, and the other is that the edge of the wafer is bent upward and the middle is concave. The warpage state of the target wafer can also be characterized by the warpage degree, which generally refers to the distance between the highest point and the lowest point when the wafer is placed flat. The above two warpage states can be measured by the warpage degree The positive and negative of the value are used to distinguish. When the warpage degree is 0, it means that the wafer is relatively flat. The larger the absolute value of the warpage degree, the greater the warpage degree of the wafer.
所述目标晶圆的翘曲状态可以采用翘曲度测量仪(也称为平整度测量仪)测量得到，也可以采用预制的测量模板进行测量确定，可以采用光学测量等非接触式测量方式确定，也可以采用接触式测量方式确定。The warpage state of the target wafer can be measured by a warpage measuring instrument (also called a flatness measuring instrument), or can be measured and determined by using a prefabricated measurement template, and can be determined by non-contact measurement methods such as optical measurement , can also be determined by contact measurement.
在本发明实施例的一个变更实施方式中，在检测到目标晶圆的翘曲状态后，可以首先判断该翘曲状态(可以用翘曲度表征)是否超过预设的可控范围，若未超过，可以继续进行后道制程工艺，若超过，再根据所述目标晶圆的翘曲状态，在所述目标晶圆的背面生长硅化物薄膜，通过所述硅化物薄膜的应力调整所述目标晶圆的翘曲状态。In a modified implementation of the embodiment of the present invention, after detecting the warping state of the target wafer, it may first be judged whether the warping state (which can be characterized by the degree of warpage) exceeds the preset controllable range, if not If it is exceeded, the subsequent process can be continued. If it is exceeded, a silicide film is grown on the back side of the target wafer according to the warpage state of the target wafer, and the target is adjusted by the stress of the silicide film. The warpage state of the wafer.
步骤S102：根据所述目标晶圆的翘曲状态，在所述目标晶圆的背面生长硅化物薄膜，通过所述硅化物薄膜的应力调整所述目标晶圆的翘曲状态。Step S102 : growing a silicide film on the back surface of the target wafer according to the warpage state of the target wafer, and adjusting the warp state of the target wafer through the stress of the silicide film.
在确定了目标晶圆的翘曲状态后，即可有针对性地根据所述目标晶圆的翘曲状态，在所述目标晶圆的背面生长硅化物薄膜，由于晶圆翘曲的主因就是应力，而硅化物薄膜在生长过程中会产生可控的拉伸应力(英文名称：Tensile stress)或压缩应力(英文名称：Compressive stress)，当所述硅化物薄膜生长到所述目标晶圆的背面后，可以在所述目标晶圆的背面施加相应的拉伸应力或压缩应力，利用该拉伸应力或压缩应力即可抵消目标晶圆正面的应力，从而通过所述硅化物薄膜的应力调整所述目标晶圆的翘曲状态。After determining the warping state of the target wafer, a silicide film can be grown on the back side of the target wafer according to the warping state of the target wafer, because the main cause of wafer warping is Stress, while the silicide film will produce controllable tensile stress (English name: Tensile stress) or compressive stress (English name: Compressive stress) during the growth process, when the silicide film grows to the target wafer After the backside, the corresponding tensile stress or compressive stress can be applied on the backside of the target wafer, and the tensile stress or compressive stress can be used to offset the stress on the front side of the target wafer, thereby adjusting the stress of the silicide film Warpage state of the target wafer.
在本发明实施例的一个变更实施方式中，所述根据所述目标晶圆的翘曲状态，在所述目标晶圆的背面生长硅化物薄膜，通过所述硅化物薄膜的应力调整所述目标晶圆的翘曲状态，可以包括：In a modified implementation of the embodiment of the present invention, according to the warping state of the target wafer, a silicide film is grown on the back surface of the target wafer, and the target is adjusted by the stress of the silicide film. The warpage state of the wafer, which can include:
若所述目标晶圆的翘曲状态为边缘向上弯曲，则在所述目标晶圆的背面生长具有拉伸应力的硅化物薄膜，通过所述硅化物薄膜的拉伸应力减小所述目标晶圆的翘曲程度；If the warping state of the target wafer is that the edge is bent upward, then a silicide film with tensile stress is grown on the back side of the target wafer, and the tensile stress of the silicide film reduces the target wafer. degree of warpage of the circle;
若所述目标晶圆的翘曲状态为边缘向下弯曲，则在所述目标晶圆的背面生长具有压缩应力的硅化物薄膜，通过所述硅化物薄膜的压缩应力减小所述目标晶圆的翘曲程度。If the warping state of the target wafer is that the edge is bent downward, a silicide film with compressive stress is grown on the back side of the target wafer, and the target wafer is reduced by the compressive stress of the silicide film. degree of warping.
在本发明实施例的一个变更实施方式中，所述硅化物可以是氮化硅、氧化硅、氮氧化硅，或者是上述任一材料中掺杂了掺杂元素后形成的硅化物。其中，由于氮化硅具有良好的稳定性，且比较容易通过生长工艺控制产生的应力的类型和大小，因此，在本发明实施例的一个变更实施方式中，在所述目标晶圆的背面生长硅化物薄膜，包括：在所述目标晶圆的背面生长氮化硅薄膜。In a modification of the embodiment of the present invention, the silicide may be silicon nitride, silicon oxide, silicon oxynitride, or a silicide formed by doping any of the above materials with doping elements. Wherein, since silicon nitride has good stability, and it is relatively easy to control the type and magnitude of the stress generated by the growth process, therefore, in a modified implementation of the embodiment of the present invention, the back surface of the target wafer is grown The silicide film includes: growing a silicon nitride film on the back surface of the target wafer.
所述氮化硅薄膜可以采用等离子体增强化学气相沉积法(英文简称：PECVD)在所述目标晶圆的背面生长得到。The silicon nitride film can be grown on the back side of the target wafer by plasma enhanced chemical vapor deposition (English abbreviation: PECVD).
在本发明实施例的一个变更实施方式中，所述硅化物包括氮化硅，所述在所述目标晶圆的背面生长具有拉伸应力的硅化物薄膜，包括：以硅烷和氨气为反应物，利用高频功率源，采用等离子体增强化学气相沉积法在所述目标晶圆的背面生长具有拉伸应力的氮化硅薄膜。In a modified implementation of the embodiment of the present invention, the silicide includes silicon nitride, and growing a silicide film with tensile stress on the back side of the target wafer includes: reacting with silane and ammonia Using a high-frequency power source, a silicon nitride film with tensile stress is grown on the back surface of the target wafer by plasma-enhanced chemical vapor deposition.
具体的，在以NH3(氨气)和SiH4(硅烷)为反应物的PECVD技术淀积SiN薄膜中，H会与N、Si成键并且存留在薄膜当中。反应中乙硅烷和氨基基团气相形成，等离子体产物在衬底表面反应并且在后续通过H2和NH3的剔除反应再次在薄膜表面进行多余的H2的释放过程。在这一过程中，薄膜致密化，Si-N键被拉伸并且会被周围的网状结构所限制，所以被有效地冻结为拉伸应力状态，从而形成具有拉伸应力的氮化硅薄膜。其中，在具有拉伸应力的氮化硅薄膜的淀积中，对H的处理成为至关重要的因素，H含量的多少直接影响薄膜应力的大小。Specifically, in the PECVD deposition of SiN films using NH3 (ammonia) and SiH4 (silane) as reactants, H will form bonds with N and Si and remain in the film. During the reaction, disilane and amino groups are formed in the gas phase, and the plasma product reacts on the substrate surface and subsequently releases excess H2 on the film surface through the removal reaction of H2 and NH3. During this process, the film densifies, and the Si-N bonds are stretched and confined by the surrounding network, so they are effectively frozen into a state of tensile stress, resulting in a tensile-stressed silicon nitride film . Among them, in the deposition of silicon nitride film with tensile stress, the treatment of H becomes a crucial factor, and the content of H directly affects the stress of the film.
在本发明实施例的另一个变更实施方式中，所述硅化物包括氮化硅，所述在所述目标晶圆的背面生长具有压缩应力的硅化物薄膜，包括：In another modified implementation of the embodiment of the present invention, the silicide includes silicon nitride, and growing a silicide film with compressive stress on the back of the target wafer includes:
以硅烷和氨气为反应物，在氮气环境下，利用高频功率源和低频功率源相结合的方式，采用等离子体增强化学气相沉积法在所述目标晶圆的背面生长具有压缩应力的氮化硅薄膜。Using silane and ammonia as reactants, in a nitrogen environment, using a combination of high-frequency power source and low-frequency power source, using plasma-enhanced chemical vapor deposition to grow nitrogen with compressive stress on the back of the target wafer silicon thin film.
具体的，SiN薄膜的压缩应力主要来自于高能粒子的轰击作用。在NH3、SiH4、N2环境下和适当条件下PECVD SiN薄膜过程中，SiN会具有一定的本征压缩应力。如果在淀积过程中引入低频功率源，采用高低频相结合的办法，由于低频电场作用下，粒子加速时间长，到达反应面时具有的速度大，就会产生高能粒子的轰击效果。在粒子的轰击下，可导致原子、离子的结合或者重新排布，进而使薄膜结构膨胀变形，产生压缩应力，从而形成具有压缩应力的氮化硅薄膜。经过原子、离子重新结合过的SiN薄膜也会变得更加致密。Specifically, the compressive stress of the SiN film mainly comes from the bombardment of high-energy particles. In the process of PECVD SiN film under NH3, SiH4, N2 environment and under appropriate conditions, SiN will have a certain intrinsic compressive stress. If a low-frequency power source is introduced in the deposition process and a combination of high and low frequencies is used, the particles will accelerate for a long time under the action of a low-frequency electric field and have a high velocity when reaching the reaction surface, resulting in the bombardment effect of high-energy particles. Under the bombardment of particles, it can lead to the combination or rearrangement of atoms and ions, and then expand and deform the film structure to generate compressive stress, thereby forming a silicon nitride film with compressive stress. SiN films that have been recombined with atoms and ions will also become denser.
在对所述目标晶圆的翘曲状态进行调整后，即可将所述目标晶圆用于光刻、沉积、镀膜、光阻涂布等对晶圆翘曲程度要求较高的制程工艺中，以降低工艺难度、提高工艺质量，在该制程工艺结束后，可以再将所述硅化物薄膜去除。在本发明实施例的一个变更实施方式中，在步骤S102后，还可以包括：After the warping state of the target wafer is adjusted, the target wafer can be used in processes such as photolithography, deposition, coating, and photoresist coating that require a high degree of wafer warpage , to reduce the difficulty of the process and improve the quality of the process. After the process is finished, the silicide film can be removed. In a modified implementation manner of the embodiment of the present invention, after step S102, it may further include:
利用已调整翘曲状态的目标晶圆执行半导体制程工艺(如镀膜、光刻、沉积、光阻涂布等)；Perform semiconductor manufacturing processes (such as coating, photolithography, deposition, photoresist coating, etc.) using the target wafer with adjusted warpage state;
在所述半导体制程工艺完成后，去除所述目标晶圆背面的所述硅化物薄膜。After the semiconductor manufacturing process is completed, the silicide film on the back side of the target wafer is removed.
本实施方式，通过在半导体制程工艺之前，在目标晶圆的背面有针对性地生长硅化物薄膜，可以有效降低目标晶圆的翘曲程度，将晶圆翘曲控制在可控范围内，从而可以降低工艺难度、提高工艺质量，比如可以有效避免晶圆破裂问题、提高光刻版图对准的精准性等，同样可以解决翘曲过大而无法进行制程工艺的问题。In this embodiment, by growing a silicide film on the back of the target wafer in a targeted manner before the semiconductor manufacturing process, the warping degree of the target wafer can be effectively reduced, and the warping of the wafer can be controlled within a controllable range, thereby It can reduce the difficulty of the process and improve the quality of the process. For example, it can effectively avoid the problem of wafer cracking and improve the accuracy of the alignment of the lithography layout. It can also solve the problem that the warpage is too large to be able to process the process.
其中，所述去除所述目标晶圆背面的所述硅化物薄膜，可以包括：采用湿法腐蚀工艺去除所述目标晶圆背面的所述硅化物薄膜。具体的，可以采用酸性溶液(如磷酸、氢氟酸等)腐蚀掉所述目标晶圆背面的所述硅化物薄膜，例如，所述硅化物薄膜为氮化硅薄膜，则可以采用磷酸溶液腐蚀去除所述氮化硅薄膜。Wherein, the removing the silicide film on the back of the target wafer may include: removing the silicide film on the back of the target wafer by using a wet etching process. Specifically, acid solution (such as phosphoric acid, hydrofluoric acid, etc.) can be used to etch the silicide film on the back side of the target wafer. For example, if the silicide film is a silicon nitride film, phosphoric acid solution can be used to etch The silicon nitride film is removed.
在采用湿法腐蚀工艺去除所述目标晶圆背面的所述硅化物薄膜时，可以采用背面清洗工艺腐蚀去除所述目标晶圆背面的所述硅化物薄膜，该背面清洗工艺可以通过高压气体吹扫晶圆正面等方式避免酸性溶液侵蚀到目标晶圆的正面，从而在不破坏目标晶圆正面结构、线路和器件的情况下将背面的硅化物薄膜去除。When the silicide film on the back of the target wafer is removed by a wet etching process, the silicide film on the back of the target wafer can be etched and removed by a back cleaning process, and the back cleaning process can be blown with high-pressure gas Scanning the front of the wafer and other methods prevents the acid solution from corroding the front of the target wafer, so that the silicide film on the back can be removed without damaging the front structure, circuits and devices of the target wafer.
在本发明实施例的一个变更实施方式中，在采用湿法腐蚀工艺去除所述目标晶圆背面的所述硅化物薄膜时，也可以采用全面清洗工艺进行腐蚀，即将目标晶圆全部浸润到腐蚀液中进行腐蚀以去除所述硅化物薄膜。考虑到，在采用全面清洗工艺去除所述硅化物薄膜时，腐蚀液有可能对目标晶圆正面的线路、电气器件或结构造成损坏，因此，在本发明实施例的一个变更实施方式中，在去除所述目标晶圆背面的所述硅化物薄膜之前，还可以包括：在所述目标晶圆正面形成腐蚀牺牲层。本实施方式，通过在目标晶圆正面腐蚀牺牲层，从而在后续去除目标晶圆背面的硅化物薄膜时，可以有效保护目标晶圆正面的器件、结构和线路不被腐蚀破坏，保证产品质量。In a modified implementation of the embodiment of the present invention, when a wet etching process is used to remove the silicide film on the back of the target wafer, it is also possible to use a comprehensive cleaning process for etching, that is, the target wafer is completely soaked until it is etched. Etching is carried out in the liquid to remove the silicide film. Considering that when the silicide film is removed by a comprehensive cleaning process, the etching solution may cause damage to the circuits, electrical devices or structures on the front side of the target wafer, therefore, in a modified implementation of the embodiment of the present invention, in Before removing the silicide film on the back side of the target wafer, the method may further include: forming an etching sacrificial layer on the front side of the target wafer. In this embodiment, by etching the sacrificial layer on the front side of the target wafer, the devices, structures and circuits on the front side of the target wafer can be effectively protected from corrosion damage when the silicide film on the back side of the target wafer is subsequently removed, ensuring product quality.
本发明提供的晶圆翘曲状态调整方法，通过在所述目标晶圆的背面生长硅化物薄膜，从而可以利用所述硅化物薄膜的应力调整所述目标晶圆的翘曲状态，因此，可以有效地减小晶圆的翘曲程度，避免晶圆翘曲失控的问题，进而提高产品的稳定性，以及提高产品的产出率和良率。In the method for adjusting the warpage state of the wafer provided by the present invention, by growing a silicide film on the back side of the target wafer, the stress of the silicide film can be used to adjust the warp state of the target wafer. Effectively reduce the degree of warpage of the wafer, avoid the problem of out-of-control wafer warpage, and then improve the stability of the product, as well as improve the output rate and yield of the product.
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“一个变更实施方式”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且，描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外，在不相互矛盾的情况下，本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。In the description of this specification, descriptions referring to the terms "one embodiment," "some embodiments," "an altered embodiment," "example," "specific examples," or "some examples" mean that the A specific feature, structure, material, or characteristic described by an embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the described specific features, structures, materials or characteristics may be combined in any suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples and features of different embodiments or examples described in this specification without conflicting with each other.
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围，其均应涵盖在本发明的权利要求和说明书的范围当中。Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than limiting them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: It is still possible to modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the various embodiments of the present invention. All of them should be covered by the scope of the claims and description of the present invention.
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| CN201711184081.5ACN107946215A (en) | 2017-11-23 | 2017-11-23 | Silicon wafer warpage state adjustment method |
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| CN201711184081.5ACN107946215A (en) | 2017-11-23 | 2017-11-23 | Silicon wafer warpage state adjustment method |
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| RJ01 | Rejection of invention patent application after publication | Application publication date:20180420 |