技术领域technical field
本发明涉及电子式互感器校验技术领域，并且更具体地，涉及一种用于对绝对延迟时间进行校准的方法及系统。The present invention relates to the technical field of electronic transformer calibration, and more specifically, to a method and system for calibrating absolute delay time.
背景技术Background technique
智能变电站是智能电网建设中实现能源转化和控制的核心平台之一，是智能电网的重要组成部分。随着我国智能电网建设工作的逐步推进，大量新一代智能变电站或智能化改造变电站投产运行。在这些智能变电站中，作为“电力传感器”的电子式互感器得到了大量的应用。在当前技术条件下，电子式互感器和合并单元的准确度检测系统主要是采用同步法，通过标准通道和被试通道的数据对比，得到电子式互感器和合并单元的角差和比差，绝对延迟法由于无法溯源，测试结果的可信度不高。随着第三代智能变电站的试点建设，电子式互感器不配合并单元，直接采集器输出，无同步信号，通讯协议也不兼容，导致现有的检测和校准方法全部失效。Smart substation is one of the core platforms to realize energy conversion and control in the construction of smart grid, and is an important part of smart grid. With the gradual advancement of my country's smart grid construction work, a large number of new-generation smart substations or smart transformation substations have been put into operation. In these smart substations, electronic transformers as "power sensors" have been widely used. Under the current technical conditions, the accuracy detection system of the electronic transformer and the merging unit mainly adopts the synchronization method, and the angle difference and the ratio difference of the electronic transformer and the merging unit are obtained by comparing the data of the standard channel and the tested channel. Since the absolute delay method cannot be traced, the reliability of the test results is not high. With the pilot construction of the third-generation smart substation, the electronic transformer does not cooperate with the paralleling unit, and the collector outputs directly, there is no synchronization signal, and the communication protocol is not compatible, which leads to the failure of all existing detection and calibration methods.
发明内容Contents of the invention
本发明提供了一种用于对绝对延迟时间进行校准的方法及系统，以解决现有的检测和校准方法不准确的问题。The invention provides a method and system for calibrating the absolute delay time, so as to solve the inaccurate problem of the existing detection and calibration methods.
为了解决上述问题，根据本发明的一个方面，提供了一种用于对绝对延迟时间进行校准的方法，其特征在于，所述方法包括：In order to solve the above problems, according to one aspect of the present invention, a method for calibrating the absolute delay time is provided, wherein the method includes:
利用数据处理平台产生标准正弦波表，并将所述标准正弦波表发送至信号处理模块；Utilize the data processing platform to generate a standard sine wave table, and send the standard sine wave table to the signal processing module;
信号处理模块对所述标准正弦波表进行处理，获取标准电压电流信号，并将所述标准电压电流信号发送至待测设备；The signal processing module processes the standard sine wave table, acquires standard voltage and current signals, and sends the standard voltage and current signals to the device under test;
当达到预设延时阈值时，利用数据处理平台对所述标准正弦波表进行处理，获取采样值SV报文，并将所述采样值SV报文发送至待测设备；When the preset delay threshold is reached, use the data processing platform to process the standard sine wave table, obtain the sampled value SV message, and send the sampled value SV message to the device under test;
待测设备在接收所述采样值SV报文的同时，进行模拟量采集，获取预设采集点数量阈值的第一采样值；When the device under test receives the sampled value SV message, it performs analog quantity collection, and obtains the first sampled value of the threshold value of the number of preset collection points;
分别对所述第一采样值和所述采样值SV报文对应的第二采样值进行快速傅氏变换FFT，获取所述第一采样值和第二采样值的相位时间差值，即绝对延迟时间；Perform fast Fourier transform FFT on the first sampling value and the second sampling value corresponding to the sampling value SV message respectively, and obtain the phase time difference between the first sampling value and the second sampling value, that is, the absolute delay time;
根据所述绝对延迟时间和预设延时阈值，确定所述待测设备的绝对延迟时间测量误差。An absolute delay time measurement error of the device under test is determined according to the absolute delay time and a preset delay threshold.
优选地，其中所述数据处理平台为现场可编程门阵列FPGA和数字信号处理器DSP架构。Preferably, the data processing platform is a Field Programmable Gate Array FPGA and a Digital Signal Processor DSP architecture.
优选地，其中所述信号处理模块，对所述标准正弦波表进行处理，获取标准电压电流信号，包括：Preferably, the signal processing module processes the standard sine wave table to obtain standard voltage and current signals, including:
对所述标准正弦波信号进行数模转换，获取标准正弦波模拟信号；Perform digital-to-analog conversion on the standard sine wave signal to obtain a standard sine wave analog signal;
对所述标准正弦波模拟信号进行功率放大变换处理，获取标准电压电流信号，并将所述标准电压电流信号发送至待测设备。Perform power amplification and conversion processing on the standard sine wave analog signal to obtain a standard voltage and current signal, and send the standard voltage and current signal to the device under test.
优选地，其中所述预设采集点数量阈值为800。Preferably, the preset collection point quantity threshold is 800.
优选地，其中所述待测设备为：电子式互感器校验仪或合并单元测试仪。Preferably, the device under test is an electronic transformer calibrator or a combined unit tester.
优选地，其中所述方法还包括：Preferably, wherein said method further comprises:
对绝对延迟时间的误差进行评定。Evaluate the error of the absolute delay time.
优选地，其中所述对绝对延迟时间的误差进行评定，包括:Preferably, wherein the evaluation of the error of the absolute delay time includes:
其中，u1为数据处理平台发出的同步脉冲信号和信号处理模块输出的标准电压电流信号的第一时间误差；u2为报文分析模块接收的同步脉冲信号和采样值SV报文的相位时间差值与预设延迟时间阈值的第二时间误差；u3为光纤抖动误差；u4为时钟传输抖动误差；u5为测量装置误差。Among them, u1 is the first time error between the synchronization pulse signal sent by the data processing platform and the standard voltage and current signal output by the signal processing module; u2 is the phase time of the synchronization pulse signal received by the message analysis module and the sampling value SV message The second time error between the difference and the preset delay time threshold; u3 is the fiber jitter error; u4 is the clock transmission jitter error; u5 is the measurement device error.
根据本发明的另一个方面，提供了一种用于对绝对延迟时间进行校准的系统，其特征在于，所述系统包括：According to another aspect of the present invention, a system for calibrating the absolute delay time is provided, wherein the system includes:
数据处理平台，用于产生标准正弦波表，将所述标准正弦波表发送至信号处理模块；用于当达到预设延时阈值时，对所述标准正弦波表进行处理，获取采样值SV报文，并将所述采样值SV报文发送至待测设备；The data processing platform is used to generate a standard sine wave table, and send the standard sine wave table to the signal processing module; and is used to process the standard sine wave table when the preset delay threshold is reached, and obtain the sampling value SV message, and send the sampled value SV message to the device under test;
信号处理模块，用于对所述标准正弦波表进行处理，获取标准电压电流信号，并将所述标准电压电流信号发送至待测设备；A signal processing module, configured to process the standard sine wave table, obtain a standard voltage and current signal, and send the standard voltage and current signal to the device under test;
待测设备，用于在接收所述采样值SV报文的同时，进行模拟量采集，获取预设采集点数量阈值的第一采样值；用于分别对所述第一采样值和所述采样值SV报文对应的第二采样值进行快速傅氏变换FFT，获取所述第一采样值和第二采样值的相位时间差值，即绝对延迟时间；The device under test is used to collect the analog quantity while receiving the sampled value SV message, and obtain the first sampled value of the threshold value of the number of preset collection points; The second sampling value corresponding to the value SV message performs fast Fourier transform FFT to obtain the phase time difference between the first sampling value and the second sampling value, that is, the absolute delay time;
误差计算模块，用于根据所述绝对延迟时间和预设延时阈值，确定所述待测设备的绝对延迟时间测量误差。An error calculation module, configured to determine the absolute delay time measurement error of the device under test according to the absolute delay time and a preset delay threshold.
优选地，其中所述数据处理平台为现场可编程门阵列FPGA和数字信号处理器DSP架构。Preferably, the data processing platform is a Field Programmable Gate Array FPGA and a Digital Signal Processor DSP architecture.
优选地，其中所述信号处理模块包括：Preferably, wherein the signal processing module includes:
数模转换单元，用于对所述标准正弦波信号进行数模转换，获取标准正弦波模拟信号；A digital-to-analog conversion unit, configured to perform digital-to-analog conversion on the standard sine wave signal to obtain a standard sine wave analog signal;
信号放大单元，用于对所述标准正弦波模拟信号进行功率放大变换处理，获取标准电压电流信号，并将所述标准电压电流信号发送至待测设备。The signal amplifying unit is configured to perform power amplification and conversion processing on the standard sine wave analog signal, obtain a standard voltage and current signal, and send the standard voltage and current signal to the device under test.
优选地，其中所述预设采集点数量阈值为800。Preferably, the preset collection point quantity threshold is 800.
优选地，其中所述待测设备为：电子式互感器校验仪或合并单元测试仪。Preferably, the device under test is an electronic transformer calibrator or a combined unit tester.
优选地，其中所述系统还包括：Preferably, wherein said system also includes:
误差评定模块，用于对绝对延迟时间的误差进行评定。The error evaluation module is used for evaluating the error of the absolute delay time.
优选地，其中所述误差评定模块，对绝对延迟时间的误差进行评定，包括:Preferably, wherein said error evaluation module evaluates the error of absolute delay time, including:
其中，u1为数据处理平台发出的同步脉冲信号和信号处理模块输出的标准电压电流信号的第一时间误差；u2为报文分析模块接收的同步脉冲信号和采样值SV报文的相位时间差值与预设延迟时间阈值的第二时间误差；u3为光纤抖动误差；u4为时钟传输抖动误差；u5为测量装置误差。Among them, u1 is the first time error between the synchronization pulse signal sent by the data processing platform and the standard voltage and current signal output by the signal processing module; u2 is the phase time of the synchronization pulse signal received by the message analysis module and the sampling value SV message The second time error between the difference and the preset delay time threshold; u3 is the fiber jitter error; u4 is the clock transmission jitter error; u5 is the measurement device error.
本发明提供了一种用于对绝对延迟时间进行校准的方法及系统，采用现场可编程门阵列FPGA和数字信号处理器DSP架构，精确产生延迟时间可调的模拟正弦波信号和数字正弦波信号。对电子式互感器，合并单元校验仪的绝对延迟时间进行校准，自身的误差巧妙的通过时钟标准和示波器等工具进行校准，间接的实现绝对延迟时间的量值溯源，为其合法有效的用作电能计量器具提供的技术依据。The present invention provides a method and system for calibrating the absolute delay time, which uses a field programmable gate array FPGA and a digital signal processor DSP architecture to accurately generate analog sine wave signals and digital sine wave signals with adjustable delay times . Calibrate the absolute delay time of the electronic transformer and the merging unit calibrator, and calibrate its own error skillfully through tools such as clock standards and oscilloscopes, and indirectly realize the traceability of the absolute delay time, which is legal and effective. It is used as the technical basis provided by electric energy measuring instruments.
附图说明Description of drawings
通过参考下面的附图，可以更为完整地理解本发明的示例性实施方式：A more complete understanding of the exemplary embodiments of the present invention can be had by referring to the following drawings:
图1为根据本发明实施方式的用于对绝对延迟时间进行校准的方法100的流程图；FIG. 1 is a flowchart of a method 100 for calibrating an absolute delay time according to an embodiment of the present invention;
图2为根据本发明实施方式的对绝对延迟时间进行校准的示意图；以及FIG. 2 is a schematic diagram of calibrating the absolute delay time according to an embodiment of the present invention; and
图3为根据本发明实施方式的用于对绝对延迟时间进行校准的系统300的结构示意图。FIG. 3 is a schematic structural diagram of a system 300 for calibrating absolute delay time according to an embodiment of the present invention.
具体实施方式Detailed ways
现在参考附图介绍本发明的示例性实施方式，然而，本发明可以用许多不同的形式来实施，并且不局限于此处描述的实施例，提供这些实施例是为了详尽地且完全地公开本发明，并且向所属技术领域的技术人员充分传达本发明的范围。对于表示在附图中的示例性实施方式中的术语并不是对本发明的限定。在附图中，相同的单元/元件使用相同的附图标记。Exemplary embodiments of the present invention will now be described with reference to the drawings; however, the present invention may be embodied in many different forms and are not limited to the embodiments described herein, which are provided for the purpose of exhaustively and completely disclosing the present invention. invention and fully convey the scope of the invention to those skilled in the art. The terms used in the exemplary embodiments shown in the drawings do not limit the present invention. In the figures, the same units/elements are given the same reference numerals.
除非另有说明，此处使用的术语(包括科技术语)对所属技术领域的技术人员具有通常的理解含义。另外，可以理解的是，以通常使用的词典限定的术语，应当被理解为与其相关领域的语境具有一致的含义，而不应该被理解为理想化的或过于正式的意义。Unless otherwise specified, the terms (including scientific and technical terms) used herein have the commonly understood meanings to those skilled in the art. In addition, it can be understood that terms defined by commonly used dictionaries should be understood to have consistent meanings in the context of their related fields, and should not be understood as idealized or overly formal meanings.
图1为根据本发明实施方式的用于对绝对延迟时间进行测量的方法100的流程图。本申请能够用于对电子式互感器校验仪或合并单元测试仪的绝对延迟时间测量功能进行校准。如图1所示，本发明实施方式提供的用于对绝对延迟时间进行校准的方法采用现场可编程门阵列FPGA和数字信号处理器DSP架构，精确产生延迟时间可调的模拟正弦波信号和数字采样值SV报文信号。对电子式互感器，合并单元校验仪的绝对延迟时间进行校准，自身的误差巧妙的通过时钟标准和示波器等工具进行校准，间接的实现绝对延迟时间的量值溯源，为其合法有效的用作电能计量器具提供的技术依据。本发明实施方式提供的用于对绝对延迟时间进行测量的方法100从步骤101处开始，在步骤101利用数据处理平台产生标准正弦波表，并将所述标准正弦波表发送至信号处理模块。优选地，其中所述数据处理平台为现场可编程门阵列FPGA和数字信号处理器DSP架构。FIG. 1 is a flowchart of a method 100 for measuring absolute delay time according to an embodiment of the present invention. The application can be used to calibrate the absolute delay time measurement function of an electronic transformer calibrator or a combined unit tester. As shown in Figure 1, the method for calibrating the absolute delay time provided by the embodiment of the present invention adopts a field programmable gate array FPGA and a digital signal processor DSP architecture to accurately generate an analog sine wave signal and a digital signal with an adjustable delay time. Sample value SV message signal. Calibrate the absolute delay time of the electronic transformer and the merging unit calibrator, and calibrate its own error skillfully through tools such as clock standards and oscilloscopes, and indirectly realize the traceability of the absolute delay time, which is legal and effective. It is used as the technical basis provided by electric energy measuring instruments. The method 100 for measuring the absolute delay time provided by the embodiment of the present invention starts from step 101. In step 101, a data processing platform is used to generate a standard sine wave table, and the standard sine wave table is sent to the signal processing module. Preferably, the data processing platform is a Field Programmable Gate Array FPGA and a Digital Signal Processor DSP architecture.
优选地，在步骤102信号处理模块对所述标准正弦波表进行处理，获取标准电压电流信号，并将所述标准电压电流信号发送至待测设备。Preferably, at step 102, the signal processing module processes the standard sine wave table to obtain standard voltage and current signals, and sends the standard voltage and current signals to the device under test.
优选地，其中所述信号处理模块，对所述标准正弦波表进行处理，获取标准电压电流信号，包括：Preferably, the signal processing module processes the standard sine wave table to obtain standard voltage and current signals, including:
对所述标准正弦波信号进行数模转换，获取标准正弦波模拟信号；Perform digital-to-analog conversion on the standard sine wave signal to obtain a standard sine wave analog signal;
对所述标准正弦波模拟信号进行功率放大变换处理，获取标准电压电流信号，并将所述标准电压电流信号发送至待测设备。Perform power amplification and conversion processing on the standard sine wave analog signal to obtain a standard voltage and current signal, and send the standard voltage and current signal to the device under test.
优选地，在步骤103当达到预设延时阈值时，利用数据处理平台对所述标准正弦波表进行处理，获取采样值SV报文，并将所述采样值SV报文发送至待测设备。优选地，其中所述待测设备为：电子式互感器校验仪或合并单元测试仪。Preferably, in step 103, when the preset delay threshold is reached, a data processing platform is used to process the standard sine wave table, obtain a sampled value SV message, and send the sampled value SV message to the device under test . Preferably, the device under test is an electronic transformer calibrator or a combined unit tester.
优选地，在步骤104待测设备在接收所述采样值SV报文的同时，进行模拟量采集，获取预设采集点数量阈值的第一采样值。Preferably, at step 104, while receiving the sampled value SV message, the device under test performs analog quantity collection to obtain the first sampled value of the preset threshold number of collection points.
优选地，其中所述预设采集点数量阈值为800。Preferably, the preset collection point quantity threshold is 800.
优选地，在步骤105分别对所述第一采样值和所述采样值SV报文对应的第二采样值进行快速傅氏变换FFT，获取所述第一采样值和第二采样值的相位时间差值，即绝对延迟时间。Preferably, in step 105, fast Fourier transform FFT is performed on the first sampled value and the second sampled value corresponding to the sampled value SV message respectively, and the phase time of the first sampled value and the second sampled value is obtained The difference, that is, the absolute delay time.
优选地，在步骤106根据所述绝对延迟时间和预设延时阈值，确定所述待测设备的绝对延迟时间测量误差。Preferably, at step 106, an absolute delay time measurement error of the device under test is determined according to the absolute delay time and a preset delay threshold.
优选地，其中所述方法还包括：对绝对延迟时间的误差进行评定。Preferably, the method further includes: evaluating the error of the absolute delay time.
优选地，其中所述对绝对延迟时间的误差进行评定，包括:Preferably, wherein the evaluation of the error of the absolute delay time includes:
其中，u1为数据处理平台发出的同步脉冲信号和信号处理模块输出的标准电压电流信号的第一时间误差；u2为报文分析模块接收的同步脉冲信号和采样值SV报文的相位时间差值与预设延迟时间阈值的第二时间误差；u3为光纤抖动误差；u4为时钟传输抖动误差；u5为测量装置误差。Among them, u1 is the first time error between the synchronization pulse signal sent by the data processing platform and the standard voltage and current signal output by the signal processing module; u2 is the phase time of the synchronization pulse signal received by the message analysis module and the sampling value SV message The second time error between the difference and the preset delay time threshold; u3 is the fiber jitter error; u4 is the clock transmission jitter error; u5 is the measurement device error.
图2为根据本发明实施方式的对绝对延迟时间进行自校准的示意图。如图2所示，数据处理平台发送信号的频率能够达到100MHz，时钟的分辨率达到10ns。在对绝对延迟时间进行校准时，数据处理平台1产生标准正弦波表至信号处理模块2，其中在发送的起始时刻开始计时，并同时发出同步脉冲至示波器3。经信号处理模块2输出的标准电压电流信号经过变换后也接入示波器3，此时同步脉冲和标准电压电流的相位误差为第一时间误差。通过调整同步脉冲和标准电压电流的相位，保证同步脉冲上升沿与标准电压电流信号的上升沿过零点，并在保证同步脉冲上升沿时刻开始计时，达到预设延时阈值时数据处理平台开始发送采样值SV报文，其中，调整精度可达到纳秒级。FIG. 2 is a schematic diagram of self-calibration of absolute delay time according to an embodiment of the present invention. As shown in Figure 2, the frequency of the signal sent by the data processing platform can reach 100MHz, and the resolution of the clock can reach 10ns. When calibrating the absolute delay time, the data processing platform 1 generates a standard sine wave table to the signal processing module 2, wherein timing starts at the initial moment of sending, and simultaneously sends a synchronous pulse to the oscilloscope 3 . The standard voltage and current signal output by the signal processing module 2 is also connected to the oscilloscope 3 after conversion. At this time, the phase error between the synchronous pulse and the standard voltage and current is the first time error. By adjusting the phase of the synchronous pulse and the standard voltage and current, the rising edge of the synchronous pulse and the rising edge of the standard voltage and current signal are guaranteed to cross the zero point, and timing is started when the rising edge of the synchronous pulse is guaranteed. When the preset delay threshold is reached, the data processing platform starts to send Sampling value SV message, wherein the adjustment accuracy can reach nanosecond level.
同步脉冲和采样值SV报文之间的时间由预设延时阈值控制，当定时器的时间达到预设延时阈值时，数据处理平台1发送采样值SV报文至报文分析工具4，通过报文分析工具4捕获0号报文波头的时标和同步信号的时标，得到同步信号与报文之间的延迟时间，即为预设延时阈值。该延迟时间可以与定时器的时间进行比对，确定测量的准确度，通常在可达到30纳秒以内，此时的同步误差记为第二时间误差。The time between the synchronization pulse and the sampled value SV message is controlled by a preset delay threshold, and when the time of the timer reaches the preset delay threshold, the data processing platform 1 sends the sampled value SV message to the message analysis tool 4, The time stamp of the wave head of the No. 0 message and the time stamp of the synchronization signal are captured by the message analysis tool 4, and the delay time between the synchronization signal and the message is obtained, which is the preset delay threshold. The delay time can be compared with the time of the timer to determine the accuracy of the measurement, usually within 30 nanoseconds, and the synchronization error at this time is recorded as the second time error.
对绝对延迟时间的误差的评定包括：The evaluation of the error of the absolute delay time includes:
由于第一时间误差u1和第二时间误差u2不相关，绝对延迟时间的误差主要是频率抖动造成的，因此可以对第一时间误差和第二时间误差求平方平均数，即得到测量系统的最大误差。然后考虑到光纤抖动u3，时钟传输抖动u4和测量装置误差u5，整体对其平方平均数后，得到整个装置的最大不确定度。Since the first time error u1 and the second time error u2 are not correlated, the error of the absolute delay time is mainly caused by frequency jitter, so the square average of the first time error and the second time error can be obtained, that is, the measurement system maximum error. Then take into account the fiber jitter u3 , the clock transmission jitter u4 and the measurement device error u5 , and after the overall square mean, the maximum uncertainty of the whole device is obtained.
图3为根据本发明实施方式的用于对绝对延迟时间进行校准的系统300的结构示意图。本申请的系统能够用于对电子式互感器校验仪或合并单元测试仪的绝对延迟时间测量功能进行校准。如图3所示，本发明实施方式提供的用于对绝对延迟时间进行测量的系统300包括：数据处理平台301、信号处理模块302、待测设备303和误差计算模块304。优选地，在所述数据处理平台301，产生标准正弦波表，将所述标准正弦波表发送至信号处理模块；用于当达到预设延时阈值时，对所述标准正弦波表进行处理，获取采样值SV报文，并将所述采样值SV报文发送至待测设备。优选地，其中所述数据处理平台为现场可编程门阵列FPGA和数字信号处理器DSP架构。FIG. 3 is a schematic structural diagram of a system 300 for calibrating absolute delay time according to an embodiment of the present invention. The system of the present application can be used to calibrate the absolute delay time measurement function of electronic transformer calibrator or merging unit tester. As shown in FIG. 3 , the system 300 for measuring absolute delay time provided by the embodiment of the present invention includes: a data processing platform 301 , a signal processing module 302 , a device under test 303 and an error calculation module 304 . Preferably, at the data processing platform 301, a standard sine wave table is generated, and the standard sine wave table is sent to a signal processing module; for processing the standard sine wave table when a preset delay threshold is reached , acquire a sampled value SV message, and send the sampled value SV message to the device under test. Preferably, the data processing platform is a Field Programmable Gate Array FPGA and a Digital Signal Processor DSP architecture.
优选地，在所述信号处理模块302，对所述标准正弦波表进行处理，获取标准电压电流信号，并将所述标准电压电流信号发送至待测设备。优选地，其中所述信号处理模块包括：Preferably, in the signal processing module 302, the standard sine wave table is processed to obtain standard voltage and current signals, and the standard voltage and current signals are sent to the device under test. Preferably, wherein the signal processing module includes:
数模转换单元，用于对所述标准正弦波信号进行数模转换，获取标准正弦波模拟信号；A digital-to-analog conversion unit, configured to perform digital-to-analog conversion on the standard sine wave signal to obtain a standard sine wave analog signal;
信号放大单元，用于对所述标准正弦波模拟信号进行功率放大变换处理，获取标准电压电流信号，并将所述标准电压电流信号发送至待测设备。The signal amplifying unit is configured to perform power amplification and conversion processing on the standard sine wave analog signal, obtain a standard voltage and current signal, and send the standard voltage and current signal to the device under test.
优选地，在所述待测设备303，在接收所述采样值SV报文的同时，进行模拟量采集，获取预设采集点数量阈值的第一采样值；用于分别对所述第一采样值和所述采样值SV报文对应的第二采样值进行快速傅氏变换FFT，获取所述第一采样值和第二采样值的相位时间差值，即绝对延迟时间。Preferably, in the device under test 303, while receiving the sampled value SV message, analog quantity collection is performed, and the first sampled value of the preset collection point quantity threshold is obtained; The value and the second sampled value corresponding to the sampled value SV message are subjected to fast Fourier transform FFT to obtain the phase time difference between the first sampled value and the second sampled value, that is, the absolute delay time.
优选地，在所述误差计算模块304，根据所述绝对延迟时间和预设延时阈值，确定所述待测设备的绝对延迟时间测量误差。优选地，其中所述预设采集点数量阈值为800。Preferably, in the error calculation module 304, an absolute delay time measurement error of the device under test is determined according to the absolute delay time and a preset delay threshold. Preferably, the preset collection point quantity threshold is 800.
优选地，其中所述待测设备为：电子式互感器校验仪或合并单元测试仪。Preferably, the device under test is an electronic transformer calibrator or a combined unit tester.
优选地，其中所述系统还包括：Preferably, wherein said system also includes:
误差评定模块，用于对绝对延迟时间的误差进行评定。The error evaluation module is used for evaluating the error of the absolute delay time.
优选地，其中所述误差评定模块，对绝对延迟时间的误差进行评定，包括:Preferably, wherein said error evaluation module evaluates the error of absolute delay time, including:
其中，u1为数据处理平台发出的同步脉冲信号和信号处理模块输出的标准电压电流信号的第一时间误差；u2为报文分析模块接收的同步脉冲信号和采样值SV报文的相位时间差值与预设延迟时间阈值的第二时间误差；u3为光纤抖动误差；u4为时钟传输抖动误差；u5为测量装置误差。Among them, u1 is the first time error between the synchronization pulse signal sent by the data processing platform and the standard voltage and current signal output by the signal processing module; u2 is the phase time of the synchronization pulse signal received by the message analysis module and the sampling value SV message The second time error between the difference and the preset delay time threshold; u3 is the fiber jitter error; u4 is the clock transmission jitter error; u5 is the measurement device error.
本发明的实施例的用于对绝对延迟时间进行校准的系统300的与本发明的另一个实施例的用于对绝对延迟时间进行校准的方法100相对应，在此不再赘述。The system 300 for calibrating the absolute delay time in the embodiment of the present invention corresponds to the method 100 for calibrating the absolute delay time in another embodiment of the present invention, and will not be repeated here.
已经通过参考少量实施方式描述了本发明。然而，本领域技术人员所公知的，正如附带的专利权利要求所限定的，除了本发明以上公开的其他的实施例等同地落在本发明的范围内。The invention has been described with reference to a small number of embodiments. However, it is clear to a person skilled in the art that other embodiments than the invention disclosed above are equally within the scope of the invention, as defined by the appended patent claims.
通常地，在权利要求中使用的所有术语都根据他们在技术领域的通常含义被解释，除非在其中被另外明确地定义。所有的参考“一个/所述/该[装置、组件等]”都被开放地解释为所述装置、组件等中的至少一个实例，除非另外明确地说明。这里公开的任何方法的步骤都没必要以公开的准确的顺序运行，除非明确地说明。Generally, all terms used in the claims are to be interpreted according to their ordinary meaning in the technical field, unless explicitly defined otherwise therein. All references to "a/the/the [means, component, etc.]" are openly construed to mean at least one instance of said means, component, etc., unless expressly stated otherwise. The steps of any method disclosed herein do not have to be performed in the exact order disclosed, unless explicitly stated.
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| CN201810005177.9ACN107942280A (en) | 2018-01-03 | 2018-01-03 | A kind of method and system for being calibrated to the absolute delay time |
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