The content of the invention
The main object of the present invention is m- digital switching device and method when proposing a kind of, and m- numeral turns during by twoThe new structure of parallel operation TDC concurrent workings, save phase detecting module PD modules, with solve their limitations to conversion speed andThe problem of high-resolution relatively difficult to achieve.
To achieve the above object, m- digital switching device when proposed by the present invention a kind of, including at least two be connected in parallelWhen m- digital quantizer and data selector；The described when m- digital quantizer being connected in parallel is used to receive same group of toolDephased time signal, time signal is converted into data signal, and by the control signal for selecting output translatorAnd the data signal is exported into data selector in the lump；Data selector is m- when being used to select corresponding according to control signalThe data signal of digital quantizer, and export the data signal.
Preferably, described when m- digital switching device also includes thermometer-code-binary code modular converter, describedThermometer-code-binary code modular converter is used for the data signal for receiving data selector output, converts digital signals into twoAry codes, i.e., thermometer-code is converted into binary code, and exported.
Preferably, described when m- digital switching device also includes concatenation module；Described concatenation module is used to receive numberThe control signal and data signal exported according to selector, control signal and data signal is spliced, and splicing result is madeExported for numeric results corresponding to input time.
Preferably, described control signal, for first of the thermometer-code of any time-digital quantizer output.
Preferably, described when m- digital quantizer is used to receive the same group of dephased time signal of tool, specificallyFor：The same group of dephased time signal of tool is received by way of intersecting and receiving.
Preferably, described when m- digital switching device also includes at least two groups of register groups, and described register group is usedAccording to the clock cycle, receive, store simultaneously output data.
Preferably, described concatenation module is used for the control signal and data signal for receiving data selector output, will controlSignal processed and data signal are spliced, and the splicing is specially：Using control signal as a high position, using data signal as lowPosition.
M- digital conversion method when the present invention also proposes a kind of, this method include：
The same group of dephased time signal of tool is received, time signal is converted into data signal, and will be used to selectThe control signal and data signal of output translator export in the lump；
The data signal of m- digital quantizer when selecting corresponding according to control signal, and export the data signal.
Preferably, the data signal according to control signal selection m- digital quantizer when corresponding, and described in outputAfter data signal, described when m- digital conversion method also includes：
The data signal that data selector exports is converted into binary code, i.e., thermometer-code is converted into binary code,And export.
Preferably, the data signal according to control signal selection m- digital quantizer when corresponding, and described in outputAfter data signal, described when m- digital conversion method also includes：
Control signal and data signal are spliced, and entered splicing result as numeric results corresponding to input timeRow output.
When m- digital quantizer of the invention by being connected in parallel, the same group of dephased time signal of tool is received, willTime signal is converted to data signal, and by for selecting the control signal of output translator and data signal to export in the lump to numberAccording in selector；The data signal of m- digital quantizer when data selector selects corresponding according to control signal, and described in outputData signal；The mode of m- digital quantizer TDC concurrent workings when the present invention is by using two, to existing system architecturePD+MUX+TDC is improved, and saves phase detecting module PD modules, realize at a high speed and it is high-resolution when m- numeral conversion.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, completeSite preparation describes, it is clear that described embodiment is only the part of the embodiment of the present invention, rather than whole embodiments.BaseEmbodiment in the present invention, those of ordinary skill in the art obtained under the premise of creative work is not made it is all itsHis embodiment, belongs to the scope of protection of the invention.
If it is to be appreciated that related in the embodiment of the present invention directionality instruction (such as up, down, left, right, before and after ...),Then directionality instruction be only used for explaining relative position relation under a certain particular pose (as shown in drawings) between each part,Motion conditions etc., if the particular pose changes, directionality instruction also correspondingly changes therewith.
If in addition, relating to the description of " first ", " second " etc. in the embodiment of the present invention, " first ", " second " etc. are somebody's turn to doDescription be only used for describing purpose, and it is not intended that instruction or implying its relative importance or implicit indicating indicated skillThe quantity of art feature.Thus, " first " is defined, the feature of " second " can be expressed or implicitly includes at least one spySign.In addition, the technical scheme between each embodiment can be combined with each other, but must be with those of ordinary skill in the art's energyBased on enough realizations, the knot of this technical scheme is will be understood that when the combination appearance of technical scheme is conflicting or can not realizeConjunction is not present, also not within the protection domain of application claims.
M- digital switching device when the present invention proposes a kind of.
As shown in Fig. 2 m- digital switching device includes two when m- digital quantizer TDC1 being connected in parallel when describedWith when m- digital quantizer TDC2 and data selector；It is described be connected in parallel when m- digital quantizer TDC1 and when it is m-Digital quantizer TDC2 is used to receive the dephased time signal Tip and Tim of same group of tool, and time signal Tip and Tim are turnedData signal is changed to, and by for selecting the control signal Ctrl of output translator and the data signal to export in the lump to dataIn selector；The data signal of m- digital quantizer when data selector is used to select corresponding according to control signal Ctrl, and it is defeatedGo out data signal D0.
When described m- digital quantizer TDC1 and when m- digital quantizer TDC2 be identical converter, can be withUsing delay chain structure time-to-digit converter, differential delay chain structure time-to-digit converter can also be used and based on diclinicTraditional TDC structures such as rate ADC TDC.
Reference picture 3, the circuit shown in Fig. 3 are delay chain structure time-to-digit converter TDC；Between E end signals and L end signalsPhase difference be the time to be converted；Wherein, E ends are the advanced signal of phase, and it, which enters in time delay chain, is propagated；L ends are phaseSignal after steric retardation, it propagates positional information as the clock crawl E end signals of d type flip flop in time delay chain；D type flip flop exportsAs a result Binary Conversion result is obtained into coding module.
In the present embodiment, by using when m- digital quantizer TDC1 and when m- digital quantizer TDC2 concurrent workingsMode, existing system architecture PD+MUX+TDC is improved, saves phase detecting module PD modules, realize high speed and high scoreThe when m- numeral conversion of resolution.
Reference picture 2, in example is further carried out, when m- digital quantizer TDC1 and when m- digital quantizer TDC2 lead toCross the mode that intersection receives and receive the same group of dephased time signal of tool, i.e. input time signal Tip and Tim interconnectionWhen m- digital quantizer TDC1 and when m- digital quantizer TDC2 E ends and L ends, specific time signal Tip Connection Time-numberWord converter TDC1 E ends and when m- digital quantizer TDC2 L ends, the time signal Tim Connection Time-digital quantizerTDC1 L ends and when m- digital quantizer TDC2 E ends；
When time signal Tip phases are ahead of signal Tim, when m- digital quantizer TDC1 will be converted to input timeData signal, and be sent into data selector；And due to when m- digital quantizer TDC2 E ends input time signal Tim phasesL ends input time signal Tim is lagged behind, its output is fixed as 0.Therefore data selector can according to when m- digital quantizerTDC1 and when m- digital quantizer TDC2 output judge input time signal Tip and Tim phase information；With reference to twoTDC transformation result, the digital output results D0 of corresponding input time can be obtained；Otherwise work as time signal Tip delayed phasesWhen time signal Tim, then when m- digital quantizer TDC1 output signals be fixed as 0, when m- digital quantizer TDC2 outputsSignal is transformation result D0.
In a preferred embodiment, described control signal Ctrl is the thermometer of any time-digital quantizer outputCode first, i.e., when m- digital quantizer TDC1 and when m- digital quantizer TDC2 between arbitrarily selection one converterOutput control signal Ctrl, for example, selection time-digital quantizer TDC1 output control signal Ctrl, control signal Ctrl is '0 ' either when ' 1 ' represents respectively m- digital quantizer TDC1 output is 0 or be not 0, while also corresponds to input time signalTip and Tim phase relation；When control signal Ctrl is ' 1 ', data selector selection time-digital quantizer TDC1'sOutput result, when control signal Ctrl is ' 0 ', data selector selection time-digital quantizer TDC2 output result.
In the present embodiment, by being used as control by first of the thermometer-code of seclected time-digital quantizer outputSignal Ctrl, input time signal Tip and Tim phase relation can be determined while identifying control signal, substitutes existing skillThe function of phase detecting module PD modules in art, improve and distinguish speed and efficiency；
Reference picture 2, in example is further carried out, described when m- digital switching device also enters including thermometer-code-twoCode modular converter processed, described thermometer-code-binary code modular converter are used for the data signal for receiving data selector outputD0, data signal D0 is converted into binary code, i.e., thermometer-code is converted into binary code D1, and export.Pass through thermometerThe conversion of code and binary code, facilitates being spliced control signal and data signal of follow-up concatenation module.
Reference picture 2, in example is further carried out, described when m- digital switching device also includes concatenation module；It is describedConcatenation module be used for receive data selector output control signal Ctrl and data signal, by control signal and data signalSpliced, and exported splicing result D2 as numeric results corresponding to input time.
During splicing, control signal obtains spliced signal D2 as high-order Ctrl, data signal as low level；TypicallyIn the case of, thermometer-code-binary code modular converter is arranged between data selector and concatenation module, and thermometer-code-two entersThe data signal D0 that code modular converter processed receives data selector output is changed, thermometer-code-binary code modular converterOutput result D1 is exported to concatenation module, concatenation module and is spelled control signal Ctrl and the output result D1 after transcodingConnect, splicing result D2 is obtained with this.
Reference picture 2, in example is further carried out, when described when m- digital switching device also includes being used to inputBetween corresponding numeric results be converted to the decoding circuits of other code systems.Due to the addition of decoding circuit, being applicable for the present invention is expandedScope.
Reference picture 2, when proposed by the invention shown in the conversion time such as formula (2) of m- digital switching device：
tconv=tMUX+tTDC+tlogic (2)
Contrast (1) and formula (2), parallel TDC structures time-to-digit converter conversion time have been accelerated.
Reference picture 4, in a preferred embodiment, described when m- digital switching device also include at least two groups of registersGroup, described register group were used for according to the clock cycle, received, stored simultaneously output data.
In Fig. 2 structure conversion time still by when m- digital quantizer TDC1 and when m- digital quantizer TDC2 turnedDigital delay circuit limitation including the time is changed including data selector etc..Therefore, the present invention improves structure in Fig. 2, such as Fig. 4 institutesShow, two groups of register groups of increase realize pile line operation to further speed up conversion speed.
Under the control of clock signal clk, circuit structure works in the way of streamline in Fig. 4.First at firstClock cycle, when m- digital quantizer TDC1 and when m- digital quantizer TDC2 in a parallel fashion by input time signalTip and Tim is converted to data signal D3 and D4.As described above, at least one group of data is 0 in data signal D3 and D4, representInput time signal Tip and Tim phase information.In second clock cycle, the first register group deposit data signal D3It is sent to D4 and by the data D5 and D6 after deposit in data selector；Data signal D5 and D6 splicing obtain corresponding time inputThe complement code output of signal；According to the actual requirements by decoding circuit complement code to binary code and Green code etc., generation meets the requirementsData signal next one cycle of D7, D7 deposited by the second register group and export final output Dout.
Based on said apparatus, m- digital conversion method when the present invention also proposes a kind of, referring especially to Fig. 5 and Fig. 2, the partyMethod includes：
Step S10, the same group of dephased time signal of tool is received, time signal is converted into data signal, and willControl signal and data signal for selecting output translator export in the lump；
When m- digital quantizer TDC1 and when m- digital quantizer TDC2 intersect receive by way of receive same groupHave dephased time signal, when time signal Tip phases are ahead of signal Tim, when m- digital quantizer TDC1 will be defeatedThe angle of incidence is converted to data signal, and is sent into data selector；And due to when m- digital quantizer TDC2 E ends input whenBetween signal Tim phases lag behind L ends input time signal Tim, its output is fixed as 0.
Described control signal Ctrl is first of the thermometer-code of any time-digital quantizer output, i.e., whenM- digital quantizer TDC1 and when m- digital quantizer TDC2 between arbitrarily selection one converter output control signal Ctrl,For example, selection time-digital quantizer TDC1 output control signal Ctrl, control signal Ctrl is that ' 0 ' or ' 1 ' represent respectivelyWhen m- digital quantizer TDC1 output be 0 or be not 0, while also correspond to input time signal Tip and Tim phase closeSystem.
Step S20, the data signal of m- digital quantizer when selecting corresponding according to control signal, and export the numeralSignal.
Data selector can according to when m- digital quantizer TDC1 and when m- digital quantizer TDC2 output judgeGo out input time signal Tip and Tim phase information；When control signal Ctrl is ' 1 ', data selector selection time-numberWord converter TDC1 output result, when control signal Ctrl is ' 0 ', data selector selection time-digital quantizerTDC2 output result, and then the digital output results D0 of corresponding input time can be obtained.
Reference picture 6, after the step S20, described when m- digital conversion method also includes：
Step S30, the data signal that data selector exports is converted into binary code, i.e., thermometer-code is converted to twoAry codes, and export.
Reference picture 7, after the step S20, described when m- digital conversion method also includes：
Step S40, control signal and data signal are spliced, and using splicing result as number corresponding to input timeWord result is exported.
During splicing, control signal obtains spliced signal D2 as high-order Ctrl, data signal as low level；TypicallyIn the case of, the output result D1 after concatenation module changes control signal Ctrl with thermometer-code-binary code is spliced, withThis obtains splicing result D2；
Reference picture 8, after the step S20, described when m- digital conversion method also includes：
Step S50, numeric results corresponding to input time are converted into other code systems.
Reference picture 9 and Fig. 4, described when m- digital conversion method, in addition to：
Step S60, according to the clock cycle, receive, store simultaneously output data.
In Fig. 2 structure conversion time still by when m- digital quantizer TDC1 and when m- digital quantizer TDC2 turnedDigital delay circuit limitation including the time is changed including data selector etc..Therefore, the present invention improves structure in Fig. 2, such as Fig. 4 institutesShow, two groups of register groups of increase realize pile line operation to further speed up conversion speed；
Under the control of clock signal clk, circuit structure works in the way of streamline in Fig. 4.First at firstClock cycle, when m- digital quantizer TDC1 and when m- digital quantizer TDC2 in a parallel fashion by input time signalTip and Tim is converted to data signal D3 and D4.As described above, at least one group of data is 0 in data signal D3 and D4, representInput time signal Tip and Tim phase information.In second clock cycle, the first register group deposit data signal D3It is sent to D4 and by the data D5 and D6 after deposit in data selector；Data signal D5 and D6 splicing obtain corresponding time inputThe complement code output of signal；According to the actual requirements by decoding circuit complement code to binary code and Green code etc., generation meets the requirementsData signal next one cycle of D7, D7 deposited by the second register group and export final output Dout.
tconv=tTDC+tDFF (3)
Wherein, tDFFRepresent the settling time of register group；The settling time of usual register is very short to be ignored；ThereforeConversion speed can be significantly improved after increase register group.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the scope of the invention, it is every at thisUnder the inventive concept of invention, the equivalent structure transformation made using description of the invention and accompanying drawing content, or directly/use indirectlyIt is included in other related technical areas in the scope of patent protection of the present invention.