






技术领域technical field
本发明涉及显示技术领域,尤其涉及一种灰阶控制电路、显示驱动电路及显示装置。The present invention relates to the field of display technology, and in particular, to a grayscale control circuit, a display driving circuit and a display device.
背景技术Background technique
TFT-LCD(Thin Film Transistor Liquid Crystal Display,薄膜晶体管-液晶显示器)作为一种平板显示装置,因其具有体积小、功耗低、无辐射以及制作成本相对较低等特点,而越来越多地被应用于高性能显示领域当中。TFT-LCD (Thin Film Transistor Liquid Crystal Display, thin film transistor-liquid crystal display) as a flat panel display device, because of its small size, low power consumption, no radiation and relatively low production cost, more and more It is used in the field of high-performance display.
上述TFT-LCD包括横纵交叉的栅线和数据线。在显示的过程中,逐行对栅线进行扫描,以对该TFT-LCD中的亚像素逐行进行选通;然后,通过数据线向选通的一行亚像素分别输入数据电压,从而对该亚像素进行充电。此时与该亚像素位置相对应的液晶分子发生偏转,使得该亚像素显示的灰阶值与输出至该亚像素的灰阶值相匹配。The above-mentioned TFT-LCD includes gate lines and data lines intersecting horizontally and vertically. During the display process, the gate lines are scanned row by row to gate the sub-pixels in the TFT-LCD row by row; then, data voltages are respectively input to the gated row of sub-pixels through the data lines, thereby Subpixels are charged. At this time, the liquid crystal molecules corresponding to the position of the sub-pixel are deflected, so that the gray-scale value displayed by the sub-pixel matches the gray-scale value output to the sub-pixel.
通常TFT-LCD内设置有用于向上述数据线输出数据电压的Source IC(源极驱动器)。由于TFT-LCD的显示面板(Panel)上走线的自身线阻、RC Delay(电阻电容延时)效应以及噪声(Noise)干扰信号的影响,使得数据线上的数据电压与设定值之间具有较大偏差,从而降低显示效果。Generally, a Source IC (source driver) for outputting data voltages to the above-mentioned data lines is provided in a TFT-LCD. Due to the line resistance of the wiring on the TFT-LCD display panel (Panel), the effect of RC Delay (resistor capacitance delay) and the influence of noise interference signals, the data voltage on the data line is between the set value and the value. There is a large deviation, thereby reducing the display effect.
发明内容SUMMARY OF THE INVENTION
本发明的实施例提供一种灰阶控制电路、显示驱动电路及显示装置,用于减小数据线上的数据电压与设定值之间的偏差。Embodiments of the present invention provide a grayscale control circuit, a display driving circuit, and a display device for reducing the deviation between a data voltage on a data line and a set value.
为达到上述目的,本发明的实施例采用如下技术方案:To achieve the above object, the embodiments of the present invention adopt the following technical solutions:
本发明实施例的一方面,提供一种灰阶控制电路,所述灰阶控制电路包括基准电压生成器以及灰阶补偿器;所述灰阶补偿器连接所述基准电压生成器和源极驱动器;所述灰阶补偿器用于获取所述基准电压生成器输出的一基准灰阶电压与所述源极驱动器反馈的数据电压之间的电压差,并将该电压差补偿于输入至所述源极驱动器的基准灰阶电压中。An aspect of the embodiments of the present invention provides a grayscale control circuit, where the grayscale control circuit includes a reference voltage generator and a grayscale compensator; the grayscale compensator is connected to the reference voltage generator and a source driver The gray-scale compensator is used to obtain the voltage difference between a reference gray-scale voltage output by the reference voltage generator and the data voltage fed back by the source driver, and compensate the voltage difference in the input to the source in the reference gray-scale voltage of the pole driver.
可选的,灰阶控制电路还包括数据选择器、第一补偿模块以及第二补偿模块;所述数据选择器连接极性反转控制信号端、所述源极驱动器以及所述灰阶补偿器;所述数据选择器用于在所述极性反转控制信号端的控制下,将所述源极驱动器输出端反馈的正极性或负极性数据电压输出至所述灰阶补偿器;所述第一补偿模块连接所述基准电压生成器的正极性电压输出端和所述源极驱动器;所述第一补偿模块用于获取所述正极性电压输出端的电压和所述源极驱动器反馈的正极性数据电压之间的电压差,并将该电压差补偿于输入至所述源极驱动器的基准灰阶正极性电压中;所述第二补偿模块连接所述基准电压生成器的负极性电压输出端和所述源极驱动器;所述第二补偿模块用于获取所述负极性电压输出端的电压和所述源极驱动器反馈的负极性数据电压之间的电压差,并将该电压差补偿于输入至所述源极驱动器的基准灰阶负极性电压中。Optionally, the grayscale control circuit further includes a data selector, a first compensation module and a second compensation module; the data selector is connected to a polarity inversion control signal terminal, the source driver and the grayscale compensator ; the data selector is used to output the positive or negative data voltage fed back by the output end of the source driver to the gray-scale compensator under the control of the polarity inversion control signal end; the first The compensation module is connected to the positive voltage output terminal of the reference voltage generator and the source driver; the first compensation module is used to obtain the voltage of the positive voltage output terminal and the positive polarity data fed back by the source driver The voltage difference between the voltages, and the voltage difference is compensated in the reference gray-scale positive polarity voltage input to the source driver; the second compensation module is connected to the negative polarity voltage output terminal of the reference voltage generator and the source driver; the second compensation module is used for obtaining the voltage difference between the voltage of the negative voltage output terminal and the negative data voltage fed back by the source driver, and compensating the voltage difference to the input to The reference gray scale of the source driver is in the negative polarity voltage.
可选的,所述第一补偿模块包括第一减法器和第一加法器;所述第一减法器的反向输入端连接所述数据选择器,同向输入端连接所述基准电压生成器的正极性电压输出端,所述第一减法器的输出端连接所述第一加法器的同向输入端;所述第一加法器的同向输入端还连接所述基准电压生成器的正极性电压输出端。Optionally, the first compensation module includes a first subtractor and a first adder; an inverting input end of the first subtractor is connected to the data selector, and a non-inverting input end is connected to the reference voltage generator The positive voltage output end of the first subtractor is connected to the same-direction input end of the first adder; the same-direction input end of the first adder is also connected to the positive electrode of the reference voltage generator Sexual voltage output terminal.
可选的,所述第一补偿模块还包括第一运算放大器;所述第一运算放大器的同向输入端连接所述第一加法器的输出端,所述第一运算放大器的输出端与所述源极驱动器相连接。Optionally, the first compensation module further includes a first operational amplifier; the non-inverting input end of the first operational amplifier is connected to the output end of the first adder, and the output end of the first operational amplifier is connected to the output end of the first adder. connected to the source driver.
可选的,所述第二补偿模块包括第二减法器和第二加法器;所述第二减法器的反向输入端连接所述数据选择器,同向输入端连接所述基准电压生成器的负极性电压输出端,所述第二减法器的输出端连接所述第二加法器的同向输入端;所述第二加法器的同向输入端还连接所述基准电压生成器的负极性电压输出端。Optionally, the second compensation module includes a second subtractor and a second adder; an inverting input end of the second subtractor is connected to the data selector, and a non-inverting input end is connected to the reference voltage generator The negative voltage output terminal of the second subtractor is connected to the non-inverting input terminal of the second adder; the non-inverting input terminal of the second adder is also connected to the negative terminal of the reference voltage generator Sexual voltage output terminal.
可选的,所述第二补偿模块还包括第二运算放大器;所述第二运算放大器的同向输入端连接所述第二加法器的输出端,所述第二运算放大器的输出端与所述源极驱动器相连接。Optionally, the second compensation module further includes a second operational amplifier; the non-inverting input end of the second operational amplifier is connected to the output end of the second adder, and the output end of the second operational amplifier is connected to the output end of the second adder. connected to the source driver.
进一步可选的,所述数据选择器还连接第一供电电压端和第二供电电压端;所述数据选择器包括:第一晶体管、第二晶体管、第三晶体管以及第四晶体管;所述第一晶体管的栅极连接所述极性反转控制信号端,第一极连接所述源极驱动器,第二极与所述第一补偿模块相连接;所述第二晶体管的第一极连接所述源极驱动器、第二极与所述第二补偿模块相连接;第三晶体管的栅极连接所述极性反转控制信号端,第一极连接所述第一供电电压端,第二极与所述第二晶体管的栅极相连接;所述第四晶体管的栅极连接所述极性反转控制信号端,第一极连接所述第二晶体管的栅极,第二极与所述第二供电电压端相连接。Further optionally, the data selector is also connected to the first power supply voltage terminal and the second power supply voltage terminal; the data selector includes: a first transistor, a second transistor, a third transistor and a fourth transistor; the first transistor The gate of a transistor is connected to the polarity inversion control signal terminal, the first pole is connected to the source driver, the second pole is connected to the first compensation module; the first pole of the second transistor is connected to the The source driver and the second pole are connected to the second compensation module; the gate of the third transistor is connected to the polarity inversion control signal terminal, the first pole is connected to the first supply voltage terminal, and the second pole is connected to the first power supply voltage terminal. is connected to the gate of the second transistor; the gate of the fourth transistor is connected to the polarity inversion control signal terminal, the first pole is connected to the gate of the second transistor, and the second pole is connected to the The second supply voltage terminal is connected.
本发明实施例的另一方面,提供一种显示驱动电路,包括如上述的任意一种灰阶控制电路,所述显示驱动电路还包括源极驱动器;所述灰阶控制电路中灰阶补偿器和所述基准电压生成器与所述源极驱动器相连接。Another aspect of the embodiments of the present invention provides a display driving circuit, including any of the above grayscale control circuits, the display driving circuit further comprising a source driver; a grayscale compensator in the grayscale control circuit and the reference voltage generator is connected with the source driver.
可选的,所述源极驱动器包括时序控制器以及多个驱动通道,每个驱动通道用于驱动一条数据线;所述驱动通道包括数模转换模块和运算放大模块;所述数模转换模块与所述灰阶补偿器、所述基准电压生成器、所述时序控制器以及所述运算放大模块相连接;所述数模转换模块用于根据所述灰阶补偿器提供的基准灰阶正极性电压、基准灰阶负极性电压,以及所述基准电压生成器提供的除了基准灰阶正极性电压和基准灰阶负极性电压以外的灰阶基准值,生成多个灰阶电压,并在根据所述时序控制器输出的数字信号,从所述多个灰阶电压中选取一个输出至所述运算放大模块;所述运算放大模块还连接数据线,所述运算放大模块用于对所述数模转化模块输出的灰阶电压进行放大,以作为所述数据电压输出至所述数据线。Optionally, the source driver includes a timing controller and a plurality of drive channels, each drive channel is used to drive a data line; the drive channel includes a digital-to-analog conversion module and an operational amplifier module; the digital-to-analog conversion module connected with the grayscale compensator, the reference voltage generator, the timing controller and the operational amplifier module; the digital-to-analog conversion module is used for the reference grayscale positive pole provided by the grayscale compensator The grayscale voltage, the reference grayscale negative polarity voltage, and the grayscale reference values provided by the reference voltage generator except the reference grayscale positive polarity voltage and the reference grayscale negative polarity voltage, generate a plurality of grayscale voltages, and generate a plurality of grayscale voltages according to The digital signal output by the timing controller is selected from the plurality of gray-scale voltages and output to the operational amplifier module; the operational amplifier module is also connected to a data line, and the operational amplifier module is used for the digital signal. The gray-scale voltage output by the analog conversion module is amplified to be output to the data line as the data voltage.
本发明实施例的又一方面,提供一种显示装置,包括如上所述的任意一种显示驱动电路。In yet another aspect of the embodiments of the present invention, a display device is provided, including any one of the above-mentioned display driving circuits.
本发明实施例提供的一种灰阶控制电路、显示驱动电路及显示装置。该灰阶控制电路中灰阶补偿器连接基准电压生成器和源极驱动器。该灰阶补偿器用于获取基准电压生成器输出的一基准灰阶电压与源极驱动器反馈的数据电压之间的电压差,并将该电压差补偿于输入至源极驱动器的基准灰阶电压中。此时,灰阶控制电路向源极驱动器提供的电压为基准电压生成器输出的一基准灰阶电压与上述电压差的和。在此情况下,当源极驱动器接收到补偿后的基准灰阶电压后,可以对实际输出的数据电压进行调节,使其与理论值更加接近,从而有利于提高显示效果。Embodiments of the present invention provide a grayscale control circuit, a display driving circuit and a display device. In the gray-scale control circuit, the gray-scale compensator is connected to the reference voltage generator and the source driver. The gray-scale compensator is used for obtaining a voltage difference between a reference gray-scale voltage output by the reference voltage generator and a data voltage fed back by the source driver, and compensating the voltage difference in the reference gray-scale voltage input to the source driver . At this time, the voltage provided by the grayscale control circuit to the source driver is the sum of a reference grayscale voltage output by the reference voltage generator and the above-mentioned voltage difference. In this case, after the source driver receives the compensated reference gray-scale voltage, the actual output data voltage can be adjusted to be closer to the theoretical value, thereby helping to improve the display effect.
附图说明Description of drawings
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained according to these drawings without creative efforts.
图1为本发明实施例提供的一种显示驱动电路的结构示意图;FIG. 1 is a schematic structural diagram of a display driving circuit according to an embodiment of the present invention;
图2为未经过补偿的数据电压与理想数据电压的波形示意图;2 is a schematic diagram of waveforms of an uncompensated data voltage and an ideal data voltage;
图3为本发明实施例提供的另一种显示驱动电路的结构示意图;3 is a schematic structural diagram of another display driving circuit provided by an embodiment of the present invention;
图4为图3中第一补偿模块和第二补偿模块的具体结构示意图;4 is a schematic diagram of the specific structure of the first compensation module and the second compensation module in FIG. 3;
图5为图3中源极驱动器的结构示意图;FIG. 5 is a schematic structural diagram of the source driver in FIG. 3;
图6为经过补偿的数据电压、未经过补偿的数据电压以及理想数据电压的波形示意图;6 is a schematic diagram of waveforms of a compensated data voltage, an uncompensated data voltage and an ideal data voltage;
图7为图4中的数据选择器的具体结构示意图。FIG. 7 is a schematic diagram of a specific structure of the data selector in FIG. 4 .
附图标记:Reference number:
01-灰阶控制电路;02-源极驱动器;03-时序控制器;10-基准电压生成器;20-灰阶补偿器;201-第一补偿模块;211-第一减法器;212-第一加法器;213-第一运算放大器;202-第二补偿模块;221-第二减法器;222-第二加法器;223-第二运算放大器;30-数据选择器;40-驱动通道;401-数模转换模块;402-运算放大模块。01-grayscale control circuit; 02-source driver; 03-sequence controller; 10-reference voltage generator; 20-grayscale compensator; 201-first compensation module; 211-first subtractor; 212-th 213-first operational amplifier; 202-second compensation module; 221-second subtractor; 222-second adder; 223-second operational amplifier; 30-data selector; 40-drive channel; 401-digital-analog conversion module; 402-operational amplifier module.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
本发明实施例,如图1所示,提供一种灰阶控制电路01,该灰阶控制电路01包括基准电压生成器10和灰阶补偿器20。The embodiment of the present invention, as shown in FIG. 1 , provides a
其中,基准电压生成器10用于生成多个基准灰阶电压(Vgam1、Vgam2……VgamN),N≥2,N为正整数。例如N=14。The
灰阶补偿器20连接基准电压生成器10和源极驱动器02。该灰阶补偿器20用于获取基准电压生成器10输出的一基准灰阶电压(例如Vgam1)与源极驱动器02反馈(Feed Back,FB)的数据电压Vdata之间的电压差△V,并将该电压差△V补偿于输入至源极驱动器02的基准灰阶电压中。此时,灰阶控制电路01向源极驱动器02提供的电压为基准电压生成器10输出的一基准灰阶电压Vgam1与上述电压差△V的和,即Vgam1+△V。在此情况下,当源极驱动器02接收到补偿后的基准灰阶电压后,可以对实际输出的数据电压Vdata进行调节,使其与理论值Vdata更加接近,从而有利于提高显示效果。The
需要说明的是,显示面板在显示画面,特别是静态画面时,该显示面板上亚像素的透光率会在显示上述静态画面的过程中保持不变。在此情况下,如果通过数据线DL向该亚像素充入的数据电压Vdata也保持不变,该亚像素位置的液晶分子会长时间保持一定的偏转角度。这样一来,容易导致液晶分子发生老化,而无法偏转。为了解决上述问题,相邻两帧输入至同一亚像素的数据电压Vdata需要发生极性反转,如图2所示,即前一帧输入至该亚像素的数据电压Vdata相对于公共电压Vcom而言,波形位于公共电压Vcom的上方,为正极性(+)。而下一帧输入至该亚像素的数据电压Vdata相对于公共电压Vcom而言,波形位于公共电压Vcom的下方,为负极性(-)。以基准电压生成器10生成14个基准灰阶电压(Vgam1、Vgam2……Vgam14)为例。其中,前7个基准灰阶电压(Vgam1、Vgam2……Vgam7)为正极性。源极驱动器02可以根据该前7个基准灰阶电压输出正极性的数据电压;后7个基准灰阶电压(Vgam8、Vgam9……Vgam14)为负极性,源极驱动器02可以根据该后7个基准灰阶电压输出负极性的数据电压。It should be noted that, when the display panel is displaying a picture, especially a static picture, the light transmittance of the sub-pixels on the display panel will remain unchanged during the process of displaying the above-mentioned static picture. In this case, if the data voltage Vdata charged to the sub-pixel through the data line DL also remains unchanged, the liquid crystal molecules at the sub-pixel position will maintain a certain deflection angle for a long time. In this way, it is easy to cause the liquid crystal molecules to age and fail to deflect. In order to solve the above problem, the polarity of the data voltage Vdata input to the same sub-pixel in two adjacent frames needs to be reversed, as shown in FIG. 2 , that is, the data voltage Vdata input to the sub-pixel in the previous frame is different from the common voltage Vcom. In other words, the waveform is above the common voltage Vcom and is of positive polarity (+). The waveform of the data voltage Vdata input to the sub-pixel in the next frame is lower than the common voltage Vcom with respect to the common voltage Vcom, and has a negative polarity (-). Take the
然而,由于收到数据线自身线阻以及噪声干扰等影响,如图2所示,使得数据线实际充入至亚像素的数据电压Vdata’的波形与理想至Vdata之间具有一定的偏差。实际的数据电压Vdata’的波形中,正极性和负极性电压相对于公共电压Vcom而言并不对称,从而形成残像(Image Sticking)等不良。However, due to the influence of the data line's own line resistance and noise interference, as shown in FIG. 2 , there is a certain deviation between the waveform of the data voltage Vdata' actually charged to the sub-pixel by the data line and the ideal Vdata. In the waveform of the actual data voltage Vdata', the positive and negative voltages are asymmetrical with respect to the common voltage Vcom, resulting in defects such as image sticking.
在此情况下,为了使得源极驱动器02实际输出的数据电压Vdata’与理论值Vdata更加接近。不仅需要对实际的数据电压Vdata’中的正极性电压进行调节,还需要对实际的数据电压Vdata’中的负极性电压进行调节。In this case, in order to make the data voltage Vdata' actually output by the
基于此,上述灰阶控制电路01如图3所示,还包括数据选择器30。Based on this, as shown in FIG. 3 , the above-mentioned
该数据选择器30连接极性反转控制信号端POL、源极驱动器02以及灰阶补偿器20。The
具体的,上述极性反转控制信号端POL与时序控制器(Tcon)03相连接。该时序控制器03用于向极性反转控制信号端POL提供一方波,以作为极性反转信号。例如,当极性反转控制信号端POL输出低电平时,源极驱动器02反馈正极性数据电压;当极性反转控制信号端POL输出高电平时,源极驱动器02反馈负极性数据电压。或者,当极性反转控制信号端POL输出低电平时,源极驱动器02反馈负极性数据电压;当极性反转控制信号端POL输出高电平时,源极驱动器02反馈正极性数据电压。Specifically, the polarity inversion control signal terminal POL is connected to the timing controller (Tcon) 03 . The
基于此,该数据选择器30用于在极性反转控制信号端POL的控制下,将源极驱动器02输出端反馈的正极性或负极性数据电压输出至灰阶补偿器20,以使得灰阶补偿器20能够分别对该上述正极性数据电压或负极性数据电压进行补偿。Based on this, the
在此基础上,该灰阶补偿器20如图3所示,包括:第一补偿模块201以及第二补偿模块202。On this basis, as shown in FIG. 3 , the
具体的,第一补偿模块201连接基准电压生成器10的正极性电压输出端,例如Vgam1和源极驱动器02的输入端。Specifically, the
需要说明的是,基准电压生成器10能够输出7个正极性的基准灰阶电压(Vgam1、Vgam2……Vgam7),其中,基准电压生成器10可以根据基准灰阶电压Vgam1的值,对其余基准灰阶电压(Vgam2、Vgam3……Vgam7)进行调节。因此可选的第一补偿模块201与基准电压生成器10上能够输出基准灰阶电压Vgam1的电压输出端相连接。It should be noted that the
在此情况下,该第一补偿模块201用于获取正极性电压输出端的电压Vgam1和源极驱动器反馈的正极性数据电压Vdata之间的电压差(△V1=Vgam1-Vdata),并将该电压差△V1补偿于输入至源极驱动器02的基准灰阶正极性电压中,即将Vgam1+△V1输入至源极驱动器02中。In this case, the
此外,第二补偿模块202连接基准电压生成器10的负极性电压输出端,例如Vgam14和源极驱动器20。In addition, the
需要说明的是,基准电压生成器10能够输出7个负极性的基准灰阶电压(Vgam8、Vgam9……Vgam14),其中,基准电压生成器10可以根据基准灰阶电压Vgam14的值,对其余基准灰阶电压(Vgam8、Vgam9……Vgam13)进行调节。因此可选的第二补偿模块202与基准电压生成器10上能够输出基准灰阶电压Vgam14的电压输出端相连接。It should be noted that the
在此情况下,第二补偿模块202用于获取负极性电压输出端的电压Vgam14和源极驱动器20反馈的负极性数据电压-Vdata之间的电压差(△V2=Vgam14-(-Vdata)),并将该电压差△V2补偿于输入至源极驱动器20的基准灰阶负极性电压中,即将Vgam14+△V2输入至源极驱动器02中。In this case, the
以下,对上述第一补偿模块201和第二补偿模块202的具体结构进行详细的说明。其中,如图4所示,第一补偿模块包括第一减法器211和第一加法器212。Hereinafter, the specific structures of the
其中,第一减法器211的反向输入端连接数据选择器30,同向输入端连接基准电压生成器10的正极性电压输出端Vgam1,第一减法器211的输出端连接第一加法器212的同向输入端。在此情况下,第一减法器211的输出端输出电压为△V1=Vgam1-Vdata。The inverting input terminal of the
第一加法器212的同向输入端还连接基准电压生成器10的正极性电压输出端Vgam1。在此情况下,第一加法器212的输出端输出电压为Vgam1+△V1。The non-inverting input terminal of the
在此基础上,上述第一补偿模块201还包括第一运算放大器213。该第一运算放大器213的同向输入端连接第一加法器212的输出端,该第一运算放大器213的输出端与源极驱动器02相连接。通过上述第一运算放大器213可以对第一加法器212输出的电压进行放大。On this basis, the above-mentioned
此外,第二补偿模块202包括第二减法器221和第二加法器222。其中,第二减法器221的反向输入端连接数据选择器30,同向输入端连接基准电压生成器10的负极性电压输出端Vgam14,第二减法器221的输出端连接第二加法器222的同向输入端。在此情况下,第二减法器221的输出端输出电压为△V2=Vgam12-(-Vdata)。In addition, the
第二加法器222的同向输入端还连接基准电压生成器10的负极性电压输出端Vgam14。在此情况下,第二加法器222的输出端输出电压为Vgam14+△V2。The non-inverting input terminal of the
在此基础上,第二补偿模块202还包括第二运算放大器223。该第二运算放大器223的同向输入端连接第二加法器222的输出端,该第二运算放大器223的输出端与源极驱动器02相连接。通过上述第二运算放大器223可以对第二加法器222输出的电压进行放大。On this basis, the
基于此,如图5所示,上述源极驱动器02包括多个驱动通道40。每个驱动通道用于驱动一条数据线DL。该驱动通道40包括数模转换模块401和运算放大模块402。Based on this, as shown in FIG. 5 , the above-mentioned
其中,数模转换模块401与上述第一运算放大器213和第二运算放大器223的输出端相连接,此外,数模转换模块401还与基准电压生成器10、运算放大模块402相连接。The digital-to-
该数模转换模块401用于根据经过第一运算放大器213放大处理后输出的基准灰阶正极性电压Vgam1+△V1、经过第二运算放大器223放大处理后输出的基准灰阶正极性电压Vgam14+△V2、基准电压生成器10提供的除了上述基准灰阶正极性电压和基准灰阶负极性电压以外的灰阶基准值(Vgam2、Vgam3……Vgam13),在该数模转换模块401中各个分压电阻的分压作用下生成多个,例如256个灰阶电压。The digital-to-
此外,数模转换模块401如图5所示,还连接时序控制器03。在此情况下,在时序控制器03输出的数字信号(例如,8Bit)的控制下,数模转换模块401中的一部分开关闭合,一部分开关开启,从而可以从上述256个灰阶电压中选取一个灰阶电压输出至运算放大模块402。In addition, as shown in FIG. 5 , the digital-to-
该运算放大模块402还连接数据线DL,该运算放大模块402用于对数模转化模块401输出的灰阶电压进行放大,以作为数据电压Vdata输出至数据线DL。其中,上述运算放大模块402可以为一运算放大器。The
在此情况下,由于输入至上述源极驱动器02中驱动通道40的基准灰阶电压为补偿后的基准灰阶正极性电压Vgam1+△V1和基准灰阶正极性电压Vgam14+△V2,从而使得源极驱动器02向数据线DL提供的正极性数据电压和负极性数据电压也达到了相应的补偿。这样一来,如图6所示,经过补偿后的数据电压Vdata”相对于未经过补偿的数据电压Vdata’而言,更靠近基准值Vdata。In this case, since the reference grayscale voltage input to the driving
此外,如图7所示,上述数据选择器30还连接第一供电电压端Vcc和第二供电电压端Vss。其中,第一供电电压端Vcc用于输出恒定的高电平。该第二供电电压端Vss用于输出恒定的低电平或者接地。In addition, as shown in FIG. 7 , the
上述数据选择器30包括:第一晶体管M1、第二晶体管M2、第三晶体管M3以及第四晶体管M4。The above-mentioned
该第一晶体管M1的栅极连接极性反转控制信号端POL,第一极连接源极驱动器02,第二极与第一补偿模块201相连接。The gate of the first transistor M1 is connected to the polarity inversion control signal terminal POL, the first electrode is connected to the
第二晶体管M2的第一极连接源极驱动器02、第二极与第二补偿模块202相连接。The first electrode of the second transistor M2 is connected to the
第三晶体管M3的栅极连接极性反转控制信号端POL,第一极连接第一供电电压端Vcc,第二极与第二晶体管M2的栅极相连接。The gate of the third transistor M3 is connected to the polarity inversion control signal terminal POL, the first electrode is connected to the first supply voltage terminal Vcc, and the second electrode is connected to the gate of the second transistor M2.
第四晶体管M4的栅极连接极性反转控制信号端POL,第一极连接第二晶体管M2的栅极,第二极与第二供电电压端Vss相连接。The gate of the fourth transistor M4 is connected to the polarity inversion control signal terminal POL, the first electrode is connected to the gate of the second transistor M2, and the second electrode is connected to the second supply voltage terminal Vss.
具体的,如图7所示,上述第一晶体管M1、第二晶体管M2、第三晶体管M3为P型晶体管,第四晶体管M4为N型晶体管。在此情况下,当极性反转控制信号端POL输出低电平时,第一晶体管M1导通。此时源极驱动器02反馈的正极性数据电压可以通过第一晶体管M1输出至第一补偿模块201。此时,第三晶体管M3导通,从而将第一供电电压端Vcc输出的高电平传输至第二晶体管M2的栅极,使得第二晶体管M2处于截止状态。Specifically, as shown in FIG. 7 , the first transistor M1 , the second transistor M2 , and the third transistor M3 are P-type transistors, and the fourth transistor M4 is an N-type transistor. In this case, when the polarity inversion control signal terminal POL outputs a low level, the first transistor M1 is turned on. At this time, the positive data voltage fed back by the
此外,当极性反转控制信号端POL输出高电平时,第一晶体管M1、第三晶体管M3截止,第四晶体管M4导通。第二供电电压端Vss输出的低电平传输至第二晶体管M2,该第二晶体管M2导通。此时源极驱动器02反馈的负极性数据电压可以通过第二晶体管M2输出至第二补偿模块202。In addition, when the polarity inversion control signal terminal POL outputs a high level, the first transistor M1 and the third transistor M3 are turned off, and the fourth transistor M4 is turned on. The low level output from the second supply voltage terminal Vss is transmitted to the second transistor M2, and the second transistor M2 is turned on. At this time, the negative data voltage fed back by the
本发明实施例提供一种显示驱动电路,包括如上所述的任一项所述的灰阶控制电路01。此外该显示驱动电路还包括如图3所示的源极驱动器02。该灰阶控制电路01中灰阶补偿器20和基准电压生成器10与源极驱动器02相连接。An embodiment of the present invention provides a display driving circuit, including the
此外,该源极驱动器02的结构如图5所示,时序控制器以及多个驱动通道40,每个驱动通道40用于驱动一条数据线DL。该驱动通道40如图3所示包括数模转换模块401和运算放大模块402。其中,数模转换模块401和运算放大模块402的具体结构和连接方式同上所述,此处不再赘述。In addition, the structure of the
需要说明的是,上述种显示驱动电路具有与前述实施例提供的灰阶控制电路01相同的技术效果,此处不再赘述。It should be noted that the above-mentioned display driving circuits have the same technical effects as the
本发明实施例提供一种显示装置,包括如上所述的显示驱动电路,具有与前述实施例提供的显示驱动电路相同的技术效果,此处不再赘述。Embodiments of the present invention provide a display device including the above-mentioned display driving circuit, which has the same technical effect as the display driving circuit provided by the foregoing embodiments, and details are not described herein again.
在本发明实施例中,显示装置具体可以包括液晶显示装置,例如该显示装置可以为显示器、电视、数码相框、手机或平板电脑等任何具有显示功能的产品或者部件。In this embodiment of the present invention, the display device may specifically include a liquid crystal display device, for example, the display device may be any product or component with a display function, such as a monitor, a TV, a digital photo frame, a mobile phone or a tablet computer.
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited to this. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention. should be included within the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.
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|---|---|---|---|
| CN201710872734.2ACN107452354B (en) | 2017-09-22 | 2017-09-22 | A grayscale control circuit, a display drive circuit and a display device |
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| CN201710872734.2ACN107452354B (en) | 2017-09-22 | 2017-09-22 | A grayscale control circuit, a display drive circuit and a display device |
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|---|---|
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| CN201710872734.2AExpired - Fee RelatedCN107452354B (en) | 2017-09-22 | 2017-09-22 | A grayscale control circuit, a display drive circuit and a display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108154857B (en) | 2017-12-29 | 2019-12-13 | 深圳市华星光电半导体显示技术有限公司 | gamma reference voltage generating circuit, driving circuit and method of liquid crystal display panel |
| CN108231000B (en)* | 2018-04-04 | 2020-03-17 | 深圳市华星光电半导体显示技术有限公司 | OLED display unit driving compensation circuit, OLED display circuit and OLED display |
| CN109254695A (en)* | 2018-11-23 | 2019-01-22 | 京东方科技集团股份有限公司 | The driving method of touch-control display panel, display device and touch-control display panel |
| CN109672478B (en)* | 2019-01-02 | 2021-03-02 | 合肥京东方光电科技有限公司 | Display device, signal transmission anti-interference method thereof and time sequence controller |
| CN109584831B (en)* | 2019-01-08 | 2020-10-16 | 合肥京东方显示技术有限公司 | Display compensation method and device, and display device |
| CN110033728B (en)* | 2019-04-24 | 2022-10-11 | 京东方科技集团股份有限公司 | Crosstalk eliminating method and device, display equipment and storage medium |
| CN110322852B (en)* | 2019-06-14 | 2020-10-16 | 深圳市华星光电技术有限公司 | Gamma voltage output circuit, step-down repairing method thereof and source driver |
| CN114550638B (en)* | 2020-11-19 | 2025-05-27 | 厦门凌阳华芯科技股份有限公司 | A compensation circuit and compensation method for improving coupling of LED display screen |
| CN113160768B (en)* | 2021-04-15 | 2022-08-23 | 惠州市华星光电技术有限公司 | Display panel, control method thereof and storage medium |
| CN115798430B (en)* | 2022-12-02 | 2024-05-28 | Tcl华星光电技术有限公司 | Display device and driving method thereof |
| CN115953971A (en)* | 2022-12-29 | 2023-04-11 | Tcl华星光电技术有限公司 | Display device and electronic equipment |
| CN119360782B (en)* | 2024-11-29 | 2025-09-12 | 惠科股份有限公司 | Pixel display driving circuit and display panel |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100768047B1 (en)* | 2005-11-30 | 2007-10-18 | 엘지.필립스 엘시디 주식회사 | Organic light emitting diode display device and driving method thereof |
| JP2008083399A (en)* | 2006-09-27 | 2008-04-10 | Lg Philips Lcd Co Ltd | Reference voltage circuit for liquid crystal display |
| CN103544927B (en)* | 2013-11-07 | 2015-07-22 | 京东方科技集团股份有限公司 | Display drive circuit, display device and display drive method |
| Publication number | Publication date |
|---|---|
| CN107452354A (en) | 2017-12-08 |
| Publication | Publication Date | Title |
|---|---|---|
| CN107452354B (en) | A grayscale control circuit, a display drive circuit and a display device | |
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