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CN107204294A - The preparation method and bare chip component of a kind of upside-down mounting welding core - Google Patents

The preparation method and bare chip component of a kind of upside-down mounting welding core
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Publication number
CN107204294A
CN107204294ACN201610158122.2ACN201610158122ACN107204294ACN 107204294 ACN107204294 ACN 107204294ACN 201610158122 ACN201610158122 ACN 201610158122ACN 107204294 ACN107204294 ACN 107204294A
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CN
China
Prior art keywords
bare chip
copper post
upside
electroplated
down mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610158122.2A
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Chinese (zh)
Inventor
周涛
王沛
王强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Leadcore Technology Co Ltd
Datang Semiconductor Design Co Ltd
Original Assignee
Leadcore Technology Co Ltd
Datang Semiconductor Design Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Leadcore Technology Co Ltd, Datang Semiconductor Design Co LtdfiledCriticalLeadcore Technology Co Ltd
Priority to CN201610158122.2ApriorityCriticalpatent/CN107204294A/en
Publication of CN107204294ApublicationCriticalpatent/CN107204294A/en
Pendinglegal-statusCriticalCurrent

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Abstract

The present invention relates to semiconductor applications, the preparation method and bare chip component of a kind of upside-down mounting welding core are disclosed.In the present invention, metal layer etching is carried out in the predeterminated position for having completed the bare chip of metal sputtering processes;Wherein, predeterminated position is the region beyond copper post position to be electroplated on bare chip;In the predeterminated position cover film protective layer of bare chip, and cured film protective layer;Copper post is electroplated in copper post position to be electroplated.In this way; equivalent to adding extra protective layer on bare chip in the prior art; effectively to alleviate copper post periphery tangential stress to the potential injury caused by copper post, so as to strengthen the protection to upside-down mounting welding core copper post, the encapsulation yield and reliability of chip are improved.

Description

The preparation method and bare chip component of a kind of upside-down mounting welding core
Technical field
The present invention relates to the encapsulation technology of semiconductor applications, more particularly to chip.
Background technology
Flip-chip Flip chip packaging technologies are a big focus of current field of semiconductor package, this kind envelopeTechnique is filled compared with the packaging technology of traditional wire bonding method, Flip chip packaging technologies are by bare chipActive area faces substrate, is realized by the solder bump (tin ball and copper post) arranged on bare chip in arrayBare chip is interconnected with substrate, and bare chip is directly installed on substrate in back-off mode, substantially reduces interconnectionLength, while having RC retardation ratio small, perfect heat-dissipating, I/O density is high, and package area is small, thickness of thinThe advantages of, be quite suitable for current IC products at a high speed, high-performance, high I/O density, frivolous miniaturizationDeveloping direction.However, currently, more in the Flip chip packaging technologies of main flow, the diameter of copper post isLess than 30 μm, 50 μm are smaller than between copper post, while miniaturization is encapsulated, copper post diameterReduction cause copper post intensity also to decrease.
As shown in figure 1, being the process flow diagram of upside-down mounting welding core in the prior art, step a to stepRapid l is followed successively by:Wafer-covering PI (polyimides, Polyimide) layer-is introduced to expose PI layersLight-PI layers are developed and-splash-proofing sputtering metalization layer-covering photoresist-is toasted is carried out to photoresistExposure-carrying out developing to photoresist-is electroplated copper post-stripping photoresist-metal layer etching-backflow and sunkProduct soldered ball;
As shown in Fig. 2 be bare chip modular construction schematic diagram of the prior art, comprising:Bare chip sheetBody 1, copper post 2, soldered ball 3 and PI layers 4.Wherein, bare chip body 1 includes aluminium pad 11, silicon chip12 and chip passivation layer 13;Chip passivation layer 13 and aluminium pad 11 are laid on silicon chip 12 successively,And chip passivation layer 13 corresponds to the position of aluminium pad 11, the opening of the area of aluminium pad 11 is less than provided with area.PI layers 4 are layed in bare chip body 1, the position of aluminium pad 11 that PI layers 4 correspond in bare chip body 1Provided with through through hole, soldered ball 3 is deposited in copper post 2, and copper post 2 is placed in through hole, and copper post 2 is supportedIt is held in the aluminium pad 11 in bare chip body 1.
It is not difficult to find out, in the prior art, stress of the PI layers that chip surface is covered mainly as copper postCushion and exist, and being gradually reduced with copper post diameter, the tangential stress influence to copper post intensity dayGradually protrude, so as to bring the encapsulation relevant issues such as yield and reliability.
The content of the invention
It is an object of the invention to provide a kind of preparation method of upside-down mounting welding core and bare chip component so thatUpside-down mounting welding core copper post obtains further protection, effectively raises the encapsulation yield and reliability of chip.
In order to solve the above technical problems, embodiments of the present invention provide a kind of making of upside-down mounting welding coreMethod, is comprised the steps of:Enter row metal in the predeterminated position for the bare chip for having completed metal sputtering processesChange layer etching;Wherein, predeterminated position is the region beyond copper post position to be electroplated on bare chip;In naked coreThe predeterminated position cover film protective layer of piece, and cured film protective layer;In copper post position to be electroplated platingCopper post.
Embodiments of the present invention additionally provide a kind of bare chip component, comprising:Bare chip body, copper post,First passivation layer and thinfilm protective coating;First passivation layer and thinfilm protective coating are layed in bare chip successivelyBody;The aluminium pad position that first passivation layer and thinfilm protective coating correspond in bare chip body, which is equipped with, to be passed throughThe through hole worn;Copper post is placed in each through hole, and copper post is held in the aluminium pad in bare chip body.
Embodiment of the present invention in terms of existing technologies, completes the bare chip of metal sputtering processesPredeterminated position carry out metal layer etching;Wherein, predeterminated position is copper post position to be electroplated on bare chipRegion in addition;In the predeterminated position cover film protective layer of bare chip, and cured film protective layer;Electroplate copper post in copper post position to be electroplated.In this way, equivalent on bare chip in the prior artExtra protective layer is added, effectively to alleviate copper post periphery tangential stress to potential caused by copper postInjury, so as to strengthen the protection to upside-down mounting welding core copper post, improves the encapsulation yield of chip and reliableProperty.
In addition, carrying out metal layer etching in the predeterminated position for having completed the bare chip of metal sputtering processesIn step, following sub-step is included:Covered in the first surface for having completed the bare chip of metal sputtering processesPhotoresist;Exposed, development removes the photoresist on predeterminated position;Metal layer erosion is carried out to bare chipCarve.So, so as to more accurately etch the metal layer on predeterminated position, and it is usedEquipment is identical with equipment of the prior art, it is not necessary to increase extra equipment cost.
In addition, in the predeterminated position cover film protective layer of bare chip, and the step of cured film protective layerIn, include following sub-step:Remove the photoresist of copper post position to be electroplated;In the first surface of bare chipCover film protective layer;Exposed, development removes the thinfilm protective coating of copper post position to be electroplated, and solidifiesThinfilm protective coating.So, so as to more accurately lay thinfilm protective coating on predeterminated position, withThe protection to upside-down mounting welding core copper post is realized, and used equipment is identical with equipment of the prior art,Extra equipment cost need not be increased.
In addition, removing the thinfilm protective coating of copper post position to be electroplated, and the step of cured film protective layerAfterwards, also comprise the steps of:Photoresist is covered in the first surface of bare chip;Light is carried out to bare chipExposure, and the photoresist of copper shore position to be electroplated is developed, so that in order in plating copper post,The position that copper post is electroplated is more accurate, it is possible to increase the encapsulation yield and reliability of chip.
In addition, the thickness range interval of PI layers of polyimides is [5 μm, 10 μm], so as to be flip chip bondingChip copper post provides preferable protection, and is easy to encapsulation of the chip in subsequent process.
In addition, the baking time of baking is 2 hours, baking temperature is 350 DEG C, so that in order to polyamidesThe solidification that PI layers of imines is moderate, so as to effectively avoid liquid crystal pollution, PI layers of decomposition of polyimides etc.Problem, provides the foundation for the encapsulation yield and reliability of raising chip.
Brief description of the drawings
Fig. 1 is the process flow diagram of upside-down mounting welding core in the prior art;
Fig. 2 is the structural representation of bare chip component in the prior art;
Fig. 3 is a kind of flow of the preparation method of upside-down mounting welding core in first embodiment of the inventionFigure;
Fig. 4 (a) to Fig. 4 (m) is a kind of upside-down mounting welding core in first embodiment of the inventionPreparation method in each stage bare chip component structural representation;
Fig. 5 is a kind of structural representation of bare chip component in second embodiment of the invention.
Embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to this hairBright each embodiment is explained in detail.However, it will be understood by those skilled in the art thatIn each embodiment of the invention, in order that reader more fully understands the application and to propose many technologies thinSection.But, even if many variations and modification without these ins and outs and based on following embodiment,Each claim of the application technical scheme claimed can also be realized.
The first embodiment of the present invention is related to a kind of flow chart of the preparation method of upside-down mounting welding core, specificallyFlow is as shown in Figure 3.In present embodiment, for ease of understanding, herein in connection with Fig. 4 (a) to Fig. 4 (m)In the structural representation of each stage bare chip component be described.
Step 101, metal layer erosion is carried out in the predeterminated position for having completed the bare chip of metal sputtering processesCarve.Wherein, predeterminated position is the region beyond copper post position to be electroplated on bare chip.
Specifically, photoresist is covered in the first surface for having completed the bare chip of metal sputtering processes, willPhotoresist on predeterminated position is removed, so as to carry out metal layer etching to bare chip.Such as, completeThe first surface covering photoresist of the bare chip of metal sputtering processes, is carried out high-strength through light shield to bare chipLight (e.g., ultraviolet) exposes, wherein, predeterminated position is covered by light tight region on light shield.AndAfterwards, whole bare chip is put into developer solution and developed, then the unexposed photoetching on predeterminated positionGlue is that developed liquid is removed, and obtains leaving the bare chip of photoresist in copper post position to be electroplated, consequently facilitatingMetal layer etching is carried out to the predeterminated position of bare chip.
It is to have completed metal sputtering processes as shown in Fig. 4 (a) to Fig. 4 (e), in Fig. 4 (a)It is to cover light in the first surface for having completed the bare chip of metal sputtering processes in bare chip, Fig. 4 (b)It is the bare chip after photoresist is exposed in photoresist, Fig. 4 (c), is to naked core in Fig. 4 (d)It is naked after metal layer is etched in bare chip obtained by photoresist is developed on piece, Fig. 4 (e)Chip.
Step 102, in the predeterminated position cover film protective layer of bare chip, and cured film protective layer.
Due in a step 101, it is necessary to covered with one layer of photoresist on the surface of bare chip, and retainThe photoresist of copper post position to be electroplated, in order to when metallizing etching, only enter row metal to predeterminated positionChange layer etching.Shown in reference picture 4 (e), copper post position to be electroplated is still covered with one layer of photoresist, thereforeIn a step 102, it is necessary to which the photoresist in advance being covered copper post position to be electroplated is removed, then just existThe first surface cover film protective layer of bare chip, exposed, development removes the thin of copper post position to be electroplatedFilm protective layer, and cured film protective layer.That is shown in Fig. 4 (f) to Fig. 4 (h), Fig. 4 (f) is willPhotoresist that copper post position to be electroplated is covered remove after bare chip, Fig. 4 (g) is the of bare chipBare chip after one surface cover film protective layer.Fig. 4 (h) is to copper post position to be electroplated on bare chipThe thinfilm protective coating at place is exposed obtained by development, removes the thinfilm protective coating of copper post position to be electroplatedBare chip.
Wherein, the mode of cured film protective layer can be:Curing agent is toasted or covered to bare chipDeng.And in the present embodiment, thinfilm protective coating is PI layers of polyimides, the side of cured film protective layerFormula is:Bare chip is toasted, so that equipment and prior art used in present embodimentIn equipment it is identical, it is not necessary to increase extra equipment cost.
It is noted that in present embodiment, to provide preferable protection to upside-down mounting welding core copper post,And be easy to encapsulation of the chip in subsequent process, the thickness range interval that PI layers of polyimides for [5 μm,10μm].Also, baking requirement is:Baking time is 2 hours;Temperature is 350 DEG C, to gatherThe solidification of polyimide PI layer is moderate, so as to effectively avoid liquid crystal pollution, PI layers of decomposition of polyimidesThe problems such as, provided the foundation for the encapsulation yield and reliability of raising chip.
Step 103, copper post is electroplated in copper post position to be electroplated.
Wherein, the dimensions for the copper post electroplated is selected according to the actual requirement of client.
It is noted that in present embodiment, between step 102 and step 103, be additionally provided with asLower step:Photoresist is covered in the first surface of bare chip;Light exposure is carried out to bare chip, and will be treatedThe photoresist of electro-coppering shore position is developed, so that in order to which when electroplating copper post, copper post is electroplatedPosition it is more accurate, it is possible to increase the encapsulation yield and reliability of chip.That is Fig. 4 (i) to Fig. 4 (j)Shown, Fig. 4 (i) is the bare chip after the first surface covering photoresist of bare chip, and Fig. 4 (j) isBare chip is carried out obtained by light exposure develops, the light on copper post position to be electroplated on bare chip is removedPhotoresist.
In present embodiment, when electroplating copper post in copper post position to be electroplated, also after copper post has been electroplated,Electronickelling and tin successively in copper post, are electroless nickel layer and tin layers in copper post shown in such as Fig. 4 (k)Bare chip afterwards.Also, after electroplating operations are completed, in addition it is also necessary to which the remaining photoresist on bare chip is goneRemove, to obtain a clean bare chip, shown in such as Fig. 4 (l), in order to the encapsulation for raising chipYield and reliability provide basis.
It is noted that in the present embodiment, remove and also need to carry out high temperature reflux after photoresist,Make the tin layers formation tin ball (shown in such as Fig. 4 (m)) in copper post, in order to the upside-down mounting core in subsequent stepPiece is encapsulated.
It is not difficult to find out, it is extra equivalent to being added on bare chip in the prior art in present embodimentProtective layer, effectively to alleviate copper post periphery tangential stress to the potential injury caused by copper post so thatThe protection to upside-down mounting welding core copper post is strengthened, the encapsulation yield and reliability of chip is improved.
The step of various methods are divided above, be intended merely to describe clear, one is can be merged into when realizingStep is split to some steps, is decomposed into multiple steps, as long as comprising identical logical relation,All in the protection domain of this patent;To adding inessential modification in algorithm or in flow or drawingEnter inessential design, but do not change the core design of its algorithm and flow all in the protection model of the patentIn enclosing.
Second embodiment of the present invention is related to a kind of bare chip component, as shown in Figure 5.Bare chip componentComprising:Bare chip body 1, deposition have copper post 2, the first passivation layer 4 and the thinfilm protective coating of soldered ball 35.Wherein, bare chip body 1 includes aluminium pad 11, silicon chip 12 and chip passivation layer 13, chip passivationLayer 13 and aluminium pad 11 are layed on silicon chip 12 successively, and chip passivation layer 13 corresponds to aluminium pad 11Position, provided with area be less than the area of aluminium pad 11 opening.
The concrete structure of bare chip component is:First passivation layer 4 and thinfilm protective coating 5 are layed in successivelyBare chip body 1;The aluminium that first passivation layer 4 and thinfilm protective coating 5 correspond in bare chip body 1The position of pad 11 is equipped with the through hole run through;Copper post 2 is placed in each through hole, and copper post 2 is held in bare chipAluminium pad 11 in body 1.
Wherein, nickel dam is provided between soldered ball 3 and copper post 2.First passivation layer 4 and thinfilm protective coating 5Composition material can be with identical.Such as, the first passivation layer 4 and thinfilm protective coating 5 are polyimides PILayer.However, be not limited thereto herein, in practical operation, the first passivation layer 4 and film protectionThe composition material of layer 5 can also be different.
It is not difficult to find out, the bare chip component in present embodiment adds volume for prior artOuter protective layer, effectively to alleviate copper post periphery tangential stress to the potential injury caused by copper post, fromAnd the protection to upside-down mounting welding core copper post is strengthened, improve the encapsulation yield and reliability of chip.
The step of various methods are divided above, be intended merely to describe clear, one is can be merged into when realizingStep is split to some steps, is decomposed into multiple steps, as long as comprising identical logical relation,All in the protection domain of this patent;To adding inessential modification in algorithm or in flow or drawingEnter inessential design, but do not change the core design of its algorithm and flow all in the protection model of the patentIn enclosing.
It will be understood by those skilled in the art that the respective embodiments described above are to realize that the present invention's is specificEmbodiment, and in actual applications, can to it, various changes can be made in the form and details, without inclinedFrom the spirit and scope of the present invention.

Claims (11)

CN201610158122.2A2016-03-182016-03-18The preparation method and bare chip component of a kind of upside-down mounting welding corePendingCN107204294A (en)

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CN201610158122.2ACN107204294A (en)2016-03-182016-03-18The preparation method and bare chip component of a kind of upside-down mounting welding core

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
CN201610158122.2ACN107204294A (en)2016-03-182016-03-18The preparation method and bare chip component of a kind of upside-down mounting welding core

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CN107204294Atrue CN107204294A (en)2017-09-26

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN110265334A (en)*2019-06-272019-09-20伊犁师范大学A kind of manufacturing device and its manufacturing method of integrated circuit
CN118555905A (en)*2024-08-012024-08-27合肥国家实验室Method for protecting welding spot in flip chip and superconducting quantum chip

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CN1431681A (en)*2002-01-032003-07-23台湾积体电路制造股份有限公司Method for encapsulation in chip level by use of electroplating mask of elastic body
US7005752B2 (en)*2003-10-202006-02-28Texas Instruments IncorporatedDirect bumping on integrated circuit contacts enabled by metal-to-insulator adhesion
US7250362B2 (en)*2003-09-092007-07-31Advanced Semiconductor Engineering Inc.Solder bump structure and method for forming the same
CN101026109A (en)*2006-02-172007-08-29富士通株式会社Semiconductor device and manufacturing method for the same
CN103632985A (en)*2012-08-212014-03-12英飞凌科技股份有限公司Method for manufacturing a metal pad structure of a die, a die arrangement and a chip arrangement
CN105023906A (en)*2014-04-162015-11-04矽品精密工业股份有限公司Substrate with electrical connection structure and manufacturing method thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN1431681A (en)*2002-01-032003-07-23台湾积体电路制造股份有限公司Method for encapsulation in chip level by use of electroplating mask of elastic body
US7250362B2 (en)*2003-09-092007-07-31Advanced Semiconductor Engineering Inc.Solder bump structure and method for forming the same
US7005752B2 (en)*2003-10-202006-02-28Texas Instruments IncorporatedDirect bumping on integrated circuit contacts enabled by metal-to-insulator adhesion
CN101026109A (en)*2006-02-172007-08-29富士通株式会社Semiconductor device and manufacturing method for the same
CN103632985A (en)*2012-08-212014-03-12英飞凌科技股份有限公司Method for manufacturing a metal pad structure of a die, a die arrangement and a chip arrangement
CN105023906A (en)*2014-04-162015-11-04矽品精密工业股份有限公司Substrate with electrical connection structure and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN110265334A (en)*2019-06-272019-09-20伊犁师范大学A kind of manufacturing device and its manufacturing method of integrated circuit
CN118555905A (en)*2024-08-012024-08-27合肥国家实验室Method for protecting welding spot in flip chip and superconducting quantum chip

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