CN107195723B - A kind of avalanche photosensitive device and preparation method thereof - Google Patents
A kind of avalanche photosensitive device and preparation method thereofDownload PDFInfo
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- CN107195723B CN107195723BCN201710523020.0ACN201710523020ACN107195723BCN 107195723 BCN107195723 BCN 107195723BCN 201710523020 ACN201710523020 ACN 201710523020ACN 107195723 BCN107195723 BCN 107195723B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
- H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
- H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
- H10F30/225—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier working in avalanche mode, e.g. avalanche photodiodes
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
- H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
- H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
- H10F30/223—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PIN barrier
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/121—The active layers comprising only Group IV materials
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/10—Semiconductor bodies
- H10F77/14—Shape of semiconductor bodies; Shapes, relative sizes or dispositions of semiconductor regions within semiconductor bodies
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Abstract
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an avalanche photosensitive device and a preparation method thereof.
Background
Avalanche photosensor refers to a photosensor used in laser communication. After a reverse bias is applied to a PN junction of a photodiode made of silicon or silicon nitride, incident light is absorbed by the PN junction to form a photocurrent, and an avalanche phenomenon, i.e., a phenomenon in which the photocurrent is multiplied, is generated by increasing the reverse bias.
However, the avalanche photosensitive device with the PN structure has a tunnel circuit multiplication process, which generates large shot noise, so that the multiplication region adopts a material with a wider forbidden bandwidth, the light absorption region adopts a material with a narrower forbidden bandwidth to form an abrupt heterojunction, and photo-generated holes are accumulated to influence the corresponding speed of the device, and at this time, the temperature is reduced by inserting a graded layer in the middle of the abrupt heterojunction to form a PIN structure.
Therefore, the avalanche photosensitive device with the PIN structure has unique advantages in low-light and single-photon detection.
Disclosure of Invention
In order to overcome the above problems, the present invention is directed to provide an avalanche photo sensor and a method for fabricating the same, in which P-type deep trenches and N-type deep trenches are formed in a silicon substrate in an alternating arrangement, and transition regions are formed in the substrate around the bottoms and sidewalls of the P-type deep trenches and the N-type deep trenches, thereby forming a PIN structure.
In order to achieve the above object, the present invention provides an avalanche photosensitive device on a semiconductor substrate, comprising:
a P-type deep trench and an N-type deep trench in the semiconductor substrate;
p-type diffusion transition layers are arranged around the side wall and the bottom of the P-type deep groove;
and N-type diffusion transition layers are arranged around the side wall and the bottom of the N-type deep groove, so that transition regions are formed between the P-type deep groove and the N-type deep groove and in the semiconductor substrate at the bottom of the P-type deep groove and at the bottom of the N-type deep groove, and a P-I-N structure is formed.
Preferably, the P-type deep trench is filled with a P-type polysilicon material, and the N-type deep trench is filled with an N-type polysilicon material.
Preferably, the number of the P-type deep trenches is multiple, the number of the N-type deep trenches is multiple, the P-type deep trenches and the N-type deep trenches are alternately arranged, the P-type deep trenches are electrically connected, and the N-type deep trenches are electrically connected.
Preferably, the P-type deep trenches are electrically connected using a first metal layer, and the N-type deep trenches are electrically connected using a second metal layer.
Preferably, the plurality of P-type deep grooves and the first metal layer form a first comb tooth structure, the plurality of N-type deep grooves and the second metal layer form a second comb tooth structure, and teeth of the first comb tooth structure and teeth of the second comb tooth structure are alternately arranged.
In order to achieve the above object, the present invention also provides a method for manufacturing an avalanche photosensitive device, comprising:
step 01: etching a first deep groove and a second deep groove in a semiconductor substrate;
step 02: forming a P-type heavily doped material in the first deep groove and an N-type heavily doped material in the second deep groove, so that the first deep groove forms the P-type heavily doped deep groove and the second deep groove forms the N-type heavily doped deep groove;
step 03: the method comprises the steps of adopting heating treatment to enable P-type impurities of P-type heavily doped materials to diffuse towards the periphery of the side wall and the bottom of a first deep groove, enabling N-type impurities of N-type heavily doped materials to diffuse towards the periphery of the side wall and the bottom of a second deep groove, forming a P-type diffusion transition layer at the bottom and the periphery of the first deep groove, forming an N-type diffusion transition layer at the bottom and the periphery of the second deep groove, enabling the P-type heavily doped deep groove to be converted into a P-type deep groove, enabling the N-type heavily doped deep groove to be converted into an N-type deep groove, and forming transition regions between the P-type deep groove and the N-type deep groove and between the.
Preferably, thestep 02 specifically includes: depositing filling materials into the first deep groove and the second deep groove, then performing P-type ion implantation into the filling materials of the first deep groove to form a P-type heavily doped groove, and performing N-type ion implantation into the filling materials of the second deep groove to form an N-type heavily doped groove.
Preferably, in thestep 01, a plurality of first deep trenches and second deep trenches are formed, and the first deep trenches and the second deep trenches are alternately arranged.
Preferably, thestep 03 is followed by the step 04: a first metal layer is formed across and in contact with the tops of all of the P-type deep trenches, and a second metal layer is formed across and in contact with the tops of all of the N-type deep trenches.
Preferably,step 04 specifically includes: forming metal silicides on the partial top of the P-type deep groove and the partial top of the N-type deep groove, and then forming contact holes on all the metal silicides; and finally, forming the first metal layer on the contact hole of the P-type deep groove, and forming the second metal layer on the contact hole of the N-type deep groove.
According to the avalanche photosensitive device and the preparation method thereof, the P-type deep grooves and the N-type deep grooves which are alternately distributed are formed in the silicon substrate, and the diffusion transition regions are formed in the substrate around the bottoms and the side walls of the P-type deep grooves and the N-type deep grooves by using a diffusion process, so that PIN junctions are formed, and when incident light enters, the distance between the PIN structures of the incident light is increased, so that the absorption of the incident light is increased.
Drawings
Figure 1 is a schematic top view of an avalanche photo sensor in accordance with a preferred embodiment of the present invention
FIG. 2 is a schematic cross-sectional view of an avalanche photo-sensor in accordance with a preferred embodiment of the present invention
FIG. 3 illustrates a method for fabricating an avalanche photo sensor in accordance with a preferred embodiment of the present invention
FIGS. 4-7 are schematic diagrams of steps of a method of fabricating the avalanche photosensitive device of FIG. 3
Detailed Description
In order to make the contents of the present invention more comprehensible, the present invention is further described below with reference to the accompanying drawings. The invention is of course not limited to this particular embodiment, and general alternatives known to those skilled in the art are also covered by the scope of the invention.
The present invention will be described in further detail with reference to examples 1 to 7. It should be noted that the drawings are in a simplified form and are not to precise scale, and are only used for conveniently and clearly achieving the purpose of assisting in describing the embodiment.
Referring to FIGS. 1-2, FIG. 2 is a schematic cross-sectional view of the dashed path of FIG. 1; an avalanche photosensitive device of this embodiment includes: a P-typedeep trench 01 and an N-typedeep trench 02 in thesemiconductor substrate 00; in this embodiment, thesemiconductor substrate 00 is a silicon substrate, a P-type polysilicon material is filled in the P-typedeep trench 01, and an N-type polysilicon material is filled in the N-typedeep trench 02. It should be noted that the deep trench referred to in the present invention is a trench with an aspect ratio substantially larger than 1.
A P-typediffusion transition layer 03 is arranged around the side wall and the bottom of the P-typedeep groove 01;
an N-typediffusion transition layer 04 is arranged around the side wall and the bottom of the N-typedeep groove 02, so that transition regions are formed between the P-typedeep groove 01 and the N-typedeep groove 02 and in thesemiconductor substrate 00 at the bottom of the N-typedeep groove 02 and at the bottom of the P-typedeep groove 01, and a P-I-N structure is formed.
As shown in fig. 1, a plurality of P-typedeep trenches 01, a plurality of N-typedeep trenches 02 are formed, the P-typedeep trenches 01 and the N-typedeep trenches 02 are alternately arranged, the P-typedeep trenches 01 are electrically connected to each other, and the N-typedeep trenches 02 are electrically connected to each other. In this embodiment, the P-typedeep trench 01 is electrically connected by thefirst metal layer 06, and the N-typedeep trench 02 is electrically connected by thesecond metal layer 08. As shown in fig. 2, fig. 2 is cut along the dotted line of fig. 1 for convenience of representation.Metal silicides deep trench 01 and the top of part of the N-typedeep trench 02, a contact hole T1 is arranged on themetal silicide 05 of all the P-typedeep trenches 01, and a contact hole T2 is arranged on themetal silicide 07 of all the N-typedeep trenches 02; thefirst metal layer 06 is connected to the contact hole T1 of the P-typedeep trench 01, and thesecond metal layer 08 is connected to the contact hole T2 of the N-typedeep trench 02.
Preferably, the plurality of P-typedeep grooves 01 and thefirst metal layer 06 form a first comb structure, the plurality of N-typedeep grooves 02 and thesecond metal layer 08 form a second comb structure, and the teeth of the first comb structure and the teeth of the second comb structure are alternately arranged, so that the distance between the PIN structures of incident light is increased, the absorption of the incident light is increased, and the detection sensitivity is improved.
Referring to fig. 3, the method for fabricating the avalanche photosensitive device of the present embodiment includes:
step 01: referring to fig. 4, a first deep trench G1 and a second deep trench G2 are etched in asemiconductor substrate 00;
specifically, but not limited to, a plurality of first deep trenches G1 and second deep trenches G2 may be etched in thesilicon substrate 00 by using photolithography and etching processes, and the first deep trenches G1 and the second deep trenches G2 are alternately arranged.
Step 02: referring to fig. 5, a P-type heavily doped material is formed in the first deep trench G1, and an N-type heavily doped material is formed in the second deep trench G2, so that the first deep trench G1 forms a P-type heavily doped deep trench 01 ', and the second deep trench G2 forms an N-type heavily doped deep trench 02';
specifically, polysilicon materials are deposited into the first deep trench G1 and the second deep trench G2, and then P-type ion implantation is performed into the polysilicon material of the first deep trench G1 to form a P-type heavily doped trench 01 ', and N-type ion implantation is performed into the polysilicon material of the second deep trench G2 to form an N-type heavily doped trench 02'.
Step 03: referring to fig. 6, by using a heating process, P-type impurities of a P-type heavily doped material are diffused to the periphery of the sidewall and the bottom of the first deep trench G1, N-type impurities of an N-type heavily doped material are diffused to the periphery of the sidewall and the bottom of the second deep trench G2, so that a P-typediffusion transition layer 03 is formed at the bottom and the periphery of the first deep trench G1, an N-typediffusion transition layer 04 is formed at the bottom and the periphery of the second deep trench G2, and the P-type heavily doped deep trench 01 'is converted into the P-typedeep trench 01, the N-type heavily doped deep trench 02' is converted into the N-typedeep trench 02, and transition regions are formed between the P-typedeep trench 01 and the N-typedeep trench 02 and at the bottom of the semiconductor.
Step 04: referring to fig. 7, afirst metal layer 06 is formed across and in contact with the tops of all P-typedeep trenches 01, and asecond metal layer 08 is formed across and in contact with the tops of all N-typedeep trenches 02.
Specifically,metal silicides deep trench 01 and a part of the top of the N-typedeep trench 02, then, a contact hole T1 is formed on all themetal silicides 05 of the P-typedeep trench 01, and a contact hole T2 is formed on all themetal silicides 07 of the N-typedeep trench 02; finally, afirst metal layer 06 is formed on the contact hole T1 of the P-typedeep trench 01, and a second metal layer M2 is formed on the contact hole T2 of the N-typedeep trench 02.
Although the present invention has been described with reference to preferred embodiments, it is to be understood that the present invention is not limited to the disclosed embodiments, but rather, may be embodied in many different forms and modifications without departing from the spirit and scope of the present invention as defined by the appended claims.
Claims (4)
1. An avalanche photosensitive device is positioned on a semiconductor substrate and is characterized by comprising a P-type deep groove and an N-type deep groove which are positioned in the semiconductor substrate; wherein,
p-type diffusion transition layers are arranged around the side wall and the bottom of the P-type deep groove;
n-type diffusion transition layers are arranged on the side wall and the periphery of the bottom of the N-type deep groove, so that transition regions are formed in the semiconductor substrate between the P-type deep groove and the N-type deep groove, the semiconductor substrate at the bottom of the P-type deep groove and the semiconductor substrate at the bottom of the N-type deep groove to form a P-I-N structure;
the P-type deep groove is filled with a P-type polysilicon material, and the N-type deep groove is filled with an N-type polysilicon material; the number of the P-type deep grooves is multiple, the number of the N-type deep grooves is multiple, the P-type deep grooves and the N-type deep grooves are alternately arranged, the P-type deep grooves are electrically connected, and the N-type deep grooves are electrically connected; wherein,
electrically connecting the P-type deep grooves by adopting a first metal layer, and electrically connecting the N-type deep grooves by adopting a second metal layer; the top of the part of the P-type deep groove and the top of the part of the N-type deep groove are respectively provided with metal silicides (05, 07), the metal silicide (05) of all the P-type deep grooves is provided with a contact hole T1, and the metal silicide (07) of all the N-type deep grooves is provided with a contact hole T2; a first metal layer (06) is connected to the contact hole T1 of the P-type deep groove, and a second metal layer (08) is connected to the contact hole T2 of the N-type deep groove;
after the P-type polycrystalline silicon material and the N-type polycrystalline silicon material are deposited polycrystalline silicon materials, performing P-type ion implantation and N-type ion implantation respectively to form a P-type heavily doped material and an N-type heavily doped material, and performing heating treatment to form the P-type heavily doped material and the N-type heavily doped material; when the P-type diffusion transition layer and the N-type diffusion transition layer are subjected to heating treatment, P-type impurities of the P-type heavily doped material and N-type impurities of the N-type heavily doped material are formed by diffusion;
further comprising: MOS (metal oxide semiconductor) tube and N formed on the front surface of the substrate+A layer formed on the entire back surface of the substrate+Layer, and MOS transistor and N formed on the layer+A through hole in the substrate outside the layer, wherein one end of the through hole is connected with the source electrode or the drain electrode of the MOS tube, and the other end of the through hole is connected with the P on the back surface of the substrate+And (3) a layer.
2. The avalanche photosensitive device of claim 1, wherein a plurality of said P-type deep trenches and said first metal layer form a first comb tooth structure, a plurality of said N-type deep trenches and said second metal layer form a second comb tooth structure, and wherein the teeth of said first comb tooth structure and the teeth of said second comb tooth structure alternate with each other.
3. A method of fabricating an avalanche photosensitive device, comprising:
step 01: etching a first deep groove and a second deep groove in a semiconductor substrate;
step 02: forming MOS tube and N on the front surface of the substrate+A layer; forming a P-type heavily doped material in the first deep groove and an N-type heavily doped material in the second deep groove, so that the first deep groove forms the P-type heavily doped deep groove and the second deep groove forms the N-type heavily doped deep groove;
step 03: forming P on the whole back of the substrate+A layer; adopting heating treatment to diffuse P-type impurities of a P-type heavily doped material to the periphery of the side wall and the bottom of the first deep groove, diffuse N-type impurities of an N-type heavily doped material to the periphery of the side wall and the bottom of the second deep groove, so that a P-type diffusion transition layer is formed at the bottom and the periphery of the first deep groove, an N-type diffusion transition layer is formed at the bottom and the periphery of the second deep groove, the P-type heavily doped deep groove is converted into a P-type deep groove, the N-type heavily doped deep groove is converted into an N-type deep groove, and transition regions are formed between the P-type deep groove and the N-type deep groove and between the P-type deep groove and the;
step 04: in the MOS transistor and N+A through hole is formed in the substrate outside the layer, one end of the through hole is connected with the source electrode or the drain electrode of the MOS tube, and the other end of the through hole is connected with the P on the back surface of the substrate+A layer; forming a first metal layer (06) across and in contact with all P-type deep trench tops, and forming a second metal layer (08) across and in contact with all N-type deep trench tops;
wherein, the step 02 specifically comprises: depositing filling materials into the first deep groove and the second deep groove, then performing P-type ion implantation into the filling materials of the first deep groove to form a P-type heavily doped groove, and performing N-type ion implantation into the filling materials of the second deep groove to form an N-type heavily doped groove;
wherein, the step 04 specifically comprises: forming metal silicides (05, 07) on the partial tops of the P-type deep trenches and the partial tops of the N-type deep trenches, and then forming contact holes on all the metal silicides (05, 07); finally, the first metal layer (06) is formed on the contact hole of the P-type deep groove, and the second metal layer (08) is formed on the contact hole of the N-type deep groove.
4. The method as claimed in claim 3, wherein in the step 01, a plurality of first deep trenches and second deep trenches are formed, and the first deep trenches and the second deep trenches are alternately arranged.
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| CN111785807B (en)* | 2020-08-11 | 2022-10-18 | 今上半导体(信阳)有限公司 | PIN photoelectric device and manufacturing method thereof |
| CN114335230B (en)* | 2021-12-29 | 2024-03-15 | 上海集成电路研发中心有限公司 | Avalanche photodiode and manufacturing method thereof |
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| JP5558916B2 (en)* | 2009-06-26 | 2014-07-23 | キヤノン株式会社 | Method for manufacturing photoelectric conversion device |
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| CN1322014A (en)* | 2000-04-29 | 2001-11-14 | 双汉科技股份有限公司 | Manufacturing method of photodiode complementary metal oxide semiconductor image sensor |
| CN1507079A (en)* | 2002-12-10 | 2004-06-23 | �Ҵ���˾ | Method for making avalanche trench optical detector and detector |
| CN1819280A (en)* | 2004-11-01 | 2006-08-16 | 国际商业机器公司 | Trench photodetector and making method thereof |
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