技术领域technical field
本公开涉及集成电路。更具体地，本发明的一些实施例一种具有低的输入电流总谐波失真的电源控制系统和方法。This disclosure relates to integrated circuits. More specifically, some embodiments of the present invention provide a power supply control system and method with low input current total harmonic distortion.
背景技术Background technique
本发明的某些实施例涉及集成电路。更具体地，本发明的一些实施例提供了用于电源控制器以减小电源的总谐波失真(Total Harmonic Distortion，THD)的系统和方法。仅通过示例，本发明的一些实施例已经被应用于准谐振开关电源。但是，应该认识到，本发明具有更广泛的应用范围。Certain embodiments of the invention relate to integrated circuits. More specifically, some embodiments of the present invention provide systems and methods for a power supply controller to reduce the Total Harmonic Distortion (THD) of the power supply. By way of example only, some embodiments of the invention have been applied to quasi-resonant switching power supplies. However, it should be appreciated that the invention has broader applicability.
根据本公开的控制方法，可以消除环路控制中误差放大器的补偿电容上的电压纹波对THD的负面影响，同时能实现内置环路补偿电容控制结构的THD优化，达到与外置环路补偿电容控制结构的THD相同甚至更优。According to the control method of the present disclosure, the negative impact of the voltage ripple on the compensation capacitor of the error amplifier in the loop control on THD can be eliminated, and at the same time, the THD optimization of the built-in loop compensation capacitor control structure can be realized to achieve the same effect as the external loop compensation The THD of the capacitive control structure is the same or even better.
图1示出了传统BUCK(降压)准谐振开关电源的简化示意图。在根据图1的架构中，AC(交流电)输入连接到整流桥以提供输入电压Vin用于功率转换系统的操作，通过对功率开关S1的不断导通及关断来达到所需的输出。例如，当开关S1闭合(例如，导通)时，输入电压Vin与输出电压Vo的电压差给电感器充电，电感电流的峰值Iin_peak由S1的导通时间Ton决定：Figure 1 shows a simplified schematic diagram of a traditional BUCK (step-down) quasi-resonant switching power supply. In the architecture according to FIG. 1 , the AC (Alternating Current) input is connected to the rectifier bridge to provide the input voltageVin for the operation of the power conversion system, and the required output is achieved by continuously turning on and off the power switch S1. For example, when the switch S1 is closed (for example, turned on), the voltage difference between the input voltage Vin and the output voltage Vo charges the inductor, and the peak value Iin_peak of the inductor current is determined by the conduction time Ton of S1:
当开关S1闭合断开(例如，关断)后，电感器退磁，退磁结束后MOS(Metal OxideSemiconductor，金属氧化物半导体)晶体管再次导通，因此电感充电电流与放电电流相等，得出等式2：When the switch S1 is closed and disconnected (for example, turned off), the inductor is demagnetized, and the MOS (Metal OxideSemiconductor, metal oxide semiconductor) transistor is turned on again after the demagnetization is completed, so the charging current of the inductor is equal to the discharging current, and Equation 2 is obtained :
Ton×(Vin-Vo)＝Toff×Vo (等式2)Ton ×(Vin −Vo )=Toff ×Vo (Equation 2)
等式2变形可得：Vin-Vo＝Vin×(1-D) (等式3)Equation 2 can be transformed into: Vin −Vo =Vin ×(1-D) (Equation 3)
其中D代表与内部开关相关联的占空比。例如，D按下式被确定：where D represents the duty cycle associated with the internal switch. For example, D is determined as follows:
其中，Toff代表关断时间段(在此期间开关是断开的(例如，被关断))。且占空比D小于1。where Toff represents the off-time period (during which the switch is off (eg, turned off)). And the duty ratio D is less than 1.
则输入电流的平均值Iin_ave可以根据下式来确定：Then the average value Iin_ave of the input current can be determined according to the following formula:
等式5变形可得：Equation 5 can be transformed into:
根据等式6可知，输入电流的平均值Iin_ave与S1的导通时间Ton成正比。According to Equation 6, it can be seen that the average value Iin_ave of the input current is proportional to the on-time Ton of S1.
图2示出了传统的BUCK架构的PFC(Power Factor Correction，功率因数校正)系统控制器的简化示意图。外部电阻器上的电压被通过端子(例如，端子CS)传递到系统控制器，以在与内部功率开关相关联的不同开关周期内进行信号处理。在系统控制器内部，通过CS端的电压信号采样输出电流的大小产生电压信号VIo_s，与参考电压Vref_ea一起送入误差放大器。FIG. 2 shows a simplified schematic diagram of a PFC (Power Factor Correction, power factor correction) system controller of a traditional BUCK architecture. The voltage across the external resistor is passed to the system controller through a terminal (eg, terminal CS) for signal processing during the different switching cycles associated with the internal power switches. Inside the system controller, the voltage signal at the CS terminal is used to sample the magnitude of the output current to generate a voltage signal VIo_s , which is sent to the error amplifier together with the reference voltage Vref_ea .
在系统外部的补偿电容Ccomp上产生电压Vcomp；通过FB检测退磁结束时刻导通开关S1。在S1的导通时间Ton内，由固定的斜坡电流或者由开关S1的占空比D所控制的斜坡电流给电容充电产生斜坡电压。例如，斜坡电流可以在幅度上与(1-D)×D近似成比例，从而使得与占空比(例如，D)和导通时间段(例如，Ton)的持续时间相关的乘积(1-D)×D×Ton保持近似恒定。例如，斜坡电流Iramp按下式被确定：The voltage Vcomp is generated on the compensation capacitor Ccomp outside the system; the switch S1 is turned on by detecting the end of demagnetization through FB. During the on-time Ton of S1 , the capacitor is charged by a fixed ramp current or a ramp current controlled by the duty cycle D of the switch S1 to generate a ramp voltage. For example, theramp current may be approximately proportional in magnitude to (1-D)×D such that the product (1 -D)×D×Ton remains approximately constant. For example, the ramp current Iramp is determined as follows:
其中，k1代表系数参数(例如，常数)。where k1 represents a coefficient parameter (eg, a constant).
当斜坡电压高于comp端电压Vcomp时，开关S1关断，因此Vcomp决定了从S1导通到关断的时间，即Ton时间。如果电压Vcomp在一个工频周期内完全恒定，那么输入电流Iin_ave就能完全跟随输入电压Vin，实现最优的THD。When the slope voltage is higher than the comp terminal voltage Vcomp , the switch S1 is turned off, so Vcomp determines the time from S1 on to off, that is, the Ton time. If the voltage Vcomp is completely constant within a power frequency cycle, then the input current Iin_ave can completely follow the input voltage Vin to achieve optimal THD.
但是实际环路补偿电容Ccomp上的电压Vcomp不是恒定的，随着输入电压Vin的工频波动，输出电流和电压VIo_s也会波动，导致补偿电容上的电压Vcomp存在工频纹波。However, the voltage Vcomp on the actual loop compensation capacitor Ccomp is not constant. With the power frequency fluctuation of the input voltage Vin , the output current and voltage VIo_s will also fluctuate, resulting in a power frequency ripple on the voltage Vcomp on the compensation capacitor Wave.
图3示出了传统的BUCK准谐振开关电源的工作波形的关键局部示意图。采样输出电流后的电压信号VIo_s、参考电压Vref_ea、电压Vcomp、输入电压Vin与输入电流Iin_ave波形如下图3所示。FIG. 3 shows a key partial schematic diagram of the working waveform of the traditional BUCK quasi-resonant switching power supply. The waveforms of the voltage signal VIo_s , the reference voltage Vref_ea , the voltage Vcomp , the input voltage Vin and the input current Iin_ave after sampling the output current are shown in FIG. 3 .
采样输出电流后的电压信号VIo_s与参考电压Vref_ea做差积分在外部补偿电容Ccomp上产生电压Vcomp，在一个工频周期内左半周期的Vcomp值高于右半周期的Vcomp值，即工频左半周期内开关S1的Ton时间大于右半周期，导致输入电流Iin_ave左半周期和右半周期不对称且无法完全跟随输入电压Vin波形，引起输入电流的畸变。After sampling the output current, the voltage signal VIo_s and the reference voltage Vref_ea are differentially integrated to generate a voltage Vcomp on the external compensation capacitor Ccomp . In a power frequency cycle, the value of Vcomp in the left half cycle is higher than that in the right half cycle. value, that is, the Ton time of the switch S1 in the left half cycle of the power frequency is longer than the right half cycle, resulting in the asymmetry of the left half cycle and the right half cycle of the input current Iin_ave and the inability to completely follow the input voltage Vin waveform, causing distortion of the input current.
传统的内置补偿电容结构由于内部电容不够大，误差放大器输出端的补偿电容上电压波动较大，THD较差。因此，非常期望改善电压波动的技术。Because the internal capacitance of the traditional built-in compensation capacitor structure is not large enough, the voltage fluctuation on the compensation capacitor at the output end of the error amplifier is relatively large, and the THD is poor. Therefore, techniques for improving voltage fluctuations are highly desired.
本发明的内置补偿电容结构可以完全消除误差放大器输出的补偿电容上电压波动对Ton时间的影响，使内置补偿电容结构的THD比传统的外置补偿电容结构更优。The built-in compensation capacitor structure of the present invention can completely eliminate the influence of the voltage fluctuation on the compensation capacitor output by the error amplifier on the Ton time, so that the THD of the built-in compensation capacitor structure is better than that of the traditional external compensation capacitor structure.
发明内容Contents of the invention
本发明的某些实施例涉及集成电路。更具体地，本发明的一些实施例提供了用于减少输入电流总谐波失真的系统和方法。仅通过示例，本发明的一些实施例已经被应用到功率变换系统。但是，应该认识到，本发明具有更广泛的应用范围。例如，根据本公开的方法可以适用于Buck、Boost、Buck-Boost以及反激(flyback)架构的PFC控制器。Certain embodiments of the invention relate to integrated circuits. More specifically, some embodiments of the present invention provide systems and methods for reducing input current total harmonic distortion. Merely by way of example, some embodiments of the invention have been applied to power conversion systems. However, it should be appreciated that the invention has broader applicability. For example, the method according to the present disclosure can be applied to PFC controllers of Buck, Boost, Buck-Boost and flyback architectures.
根据一个实施例，提供了一种电源控制系统，包括：积分和采样组件，被配置为接收采样电压和参考电压，并且至少部分地基于采样电压和参考电压来生成第一信号和第二信号，其中采样电压是对电源控制系统的输出电流进行采样获得的，并且第一信号被输入到第一端子以生成补偿电压来对电源控制系统的输出电流进行补偿；调制组件，配置为接收基于第二信号的第二电压以及斜坡电压，并且基于第二电压和斜坡电压来生成调制信号；逻辑控制组件，被配置为接收调制信号，并且基于调制信号来生成驱动信号；以及驱动组件，被配置为基于驱动信号来导通栅极。According to one embodiment, there is provided a power supply control system comprising: an integrating and sampling component configured to receive a sampled voltage and a reference voltage, and to generate a first signal and a second signal based at least in part on the sampled voltage and the reference voltage, The sampling voltage is obtained by sampling the output current of the power control system, and the first signal is input to the first terminal to generate a compensation voltage to compensate the output current of the power control system; the modulating component is configured to receive the output current based on the second The second voltage of the signal and the slope voltage, and generate a modulation signal based on the second voltage and the slope voltage; the logic control component is configured to receive the modulation signal, and generate a drive signal based on the modulation signal; and the drive component is configured to be based on drive signal to turn on the gate.
根据另一实施例，提供了一种电源控制系统，包括：积分和采样组件，被配置为接收采样电压和参考电压，并且至少部分地基于采样电压和参考电压来生成第一信号，其中采样电压是对电源控制系统的输出电流进行采样获得的；调制组件，被配置为接收基于第一信号的第一电压以及斜坡电压，并且基于第一电压和斜坡电压来生成调制信号；逻辑控制组件，被配置为接收调制信号，并且基于调制信号来生成驱动信号；以及驱动组件，被配置为基于驱动信号来导通栅极。According to another embodiment, a power supply control system is provided, comprising: an integrating and sampling component configured to receive a sampled voltage and a reference voltage, and to generate a first signal based at least in part on the sampled voltage and the reference voltage, wherein the sampled voltage is obtained by sampling the output current of the power control system; the modulation component is configured to receive the first voltage and the slope voltage based on the first signal, and generate a modulation signal based on the first voltage and the slope voltage; the logic control component is configured to configured to receive a modulation signal and generate a drive signal based on the modulation signal; and a drive component configured to turn on the gate based on the drive signal.
根据又一实施例，提供了一种电源控制方法，包括：接收采样电压和参考电压，并且至少部分地基于采样电压和参考电压来生成第一信号，其中采样电压是对电源控制系统的输出电流进行采样获得的；接收基于第一信号的第一电压以及斜坡电压，并且基于第一电压和斜坡电压来生成调制信号；接收调制信号，并且基于调制信号来生成驱动信号；以及基于驱动信号来导通栅极。According to yet another embodiment, a power supply control method is provided, comprising: receiving a sampling voltage and a reference voltage, and generating a first signal based at least in part on the sampling voltage and the reference voltage, wherein the sampling voltage is an output current to a power supply control system Obtained by sampling; receiving the first voltage based on the first signal and the slope voltage, and generating a modulation signal based on the first voltage and the slope voltage; receiving the modulation signal, and generating a driving signal based on the modulation signal; and generating a driving signal based on the driving signal pass gate.
根据实施例，可以实现一个或多个有益效果。参考下面的详细描述和附图，将完全明白本发明的这些有益效果、以及各种附加目的、特征、和优点。Depending on the embodiment, one or more beneficial effects may be achieved. These benefits, as well as various additional objects, features, and advantages of the present invention will become fully apparent with reference to the following detailed description and accompanying drawings.
附图说明Description of drawings
图1示出了传统BUCK准谐振开关电源的简化示意图。Figure 1 shows a simplified schematic diagram of a conventional BUCK quasi-resonant switching power supply.
图2示出了传统的系统控制器的简化示意图。Figure 2 shows a simplified schematic diagram of a conventional system controller.
图3示出了传统的BUCK准谐振开关电源的工作波形的关键局部示意图。FIG. 3 shows a key partial schematic diagram of the working waveform of the traditional BUCK quasi-resonant switching power supply.
图4A示出了根据本公开的实施例的系统控制器的示例性框图。FIG. 4A shows an exemplary block diagram of a system controller according to an embodiment of the present disclosure.
图4B示出了根据本公开的实施例的、图4A中的系统控制器的积分及采样组件的示例性框图。4B shows an exemplary block diagram of the integrating and sampling components of the system controller in FIG. 4A, according to an embodiment of the disclosure.
图5示出了根据本公开的实施例的、图4A中的系统控制器的工作波形的关键局部示意图。FIG. 5 shows a key partial schematic diagram of operating waveforms of the system controller in FIG. 4A according to an embodiment of the present disclosure.
图6示出了根据本公开的实施例的、内置补偿电容的BUCK准谐振开关电源的示例性框图。FIG. 6 shows an exemplary block diagram of a BUCK quasi-resonant switching power supply with a built-in compensation capacitor according to an embodiment of the present disclosure.
图7A示出了根据本公开的另一实施例的系统控制器的示例性框图。FIG. 7A shows an exemplary block diagram of a system controller according to another embodiment of the present disclosure.
图7B示出了根据本公开的实施例的、图7A中的系统控制器的积分及采样组件的示例性框图。7B shows an exemplary block diagram of the integrating and sampling components of the system controller in FIG. 7A, according to an embodiment of the disclosure.
图8示出了根据本公开的实施例的、图7A中的系统控制器的工作波形的关键局部示意图。FIG. 8 shows a key partial schematic diagram of operating waveforms of the system controller in FIG. 7A according to an embodiment of the present disclosure.
图9示出了根据本公开的实施例的系统控制方法的示例性流程图。FIG. 9 shows an exemplary flowchart of a system control method according to an embodiment of the present disclosure.
具体实施方式detailed description
下面将详细描述本发明的各个方面的特征和示例性实施例。在下面的详细描述中，提出了许多具体细节，以便提供对本发明的全面理解。但是，对于本领域技术人员来说很明显的是，本发明可以在不需要这些具体细节中的一些细节的情况下实施。下面对实施例的描述仅仅是为了通过示出本发明的示例来提供对本发明的更好的理解。本发明决不限于下面所提出的任何具体配置和算法，而是在不脱离本发明的精神的前提下覆盖了元素、部件和算法的任何修改、替换和改进。在附图和下面的描述中，没有示出公知的结构和技术，以便避免对本发明造成不必要的模糊。Features and exemplary embodiments of various aspects of the invention will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is only to provide a better understanding of the present invention by showing examples of the present invention. The present invention is by no means limited to any specific configurations and algorithms presented below, but covers any modification, substitution and improvement of elements, components and algorithms without departing from the spirit of the invention. In the drawings and the following description, well-known structures and techniques have not been shown in order to avoid unnecessarily obscuring the present invention.
图4A示出了根据本公开的实施例的系统控制器的示例性框图。该图仅作为示例，其不应该不适当地限制权利要求的范围。本领域的普通技术人员应该理解很多变化、替代和修改。FIG. 4A shows an exemplary block diagram of a system controller according to an embodiment of the present disclosure. This diagram is an example only, which should not unduly limit the scope of the claims. Those of ordinary skill in the art would appreciate many changes, substitutions and modifications.
在一个示例中，系统控制器包括斜坡信号生成组件、欠压锁定(UVLO)组件(例如，UVLO)、调制组件(例如，比较器)、逻辑控制器、积分及采样组件、驱动组件(例如，栅极驱动器)、退磁检测组件、以及输出电流采样组件。In one example, the system controller includes a ramp signal generation component, an undervoltage lockout (UVLO) component (eg, UVLO), a modulation component (eg, a comparator), a logic controller, an integrating and sampling component, a driving component (eg, gate driver), demagnetization detection components, and output current sampling components.
根据一个实施例，UVLO组件检测来自Vcc端子的信号并且输出信号(例如，por)。例如，如果来自Vcc端子的信号在幅度上大于第一预定阈值，则系统控制器开始正常地操作。如果来自Vcc端子的信号在幅度上小于第二预定阈值，则系统控制器被关闭。According to one embodiment, the UVLO component detects a signal from the Vcc terminal and outputs a signal (eg, por). For example, if the signal from the Vcc terminal is greater than a first predetermined threshold in magnitude, the system controller begins to operate normally. If the signal from the Vcc terminal is less than a second predetermined threshold in magnitude, the system controller is shut down.
外部电阻器上的电压被通过端子(例如，端子CS)传递到系统控制器，以在与内部功率开关相关联的不同开关周期内进行信号处理。在系统控制器内部，耦接至CS端的输出电流采样组件采样输出电流以产生电压信号VIo_s，与参考电压Vref_ea一起送入积分及采样组件。积分及采样组件基于电压信号VIo_s和参考电压Vref_ea生成第一信号和第二信号。其中采样电压是对所述电源控制系统的输出电流进行采样获得的，并且第一信号被输入到第一端子(例如，comp端子)以生成补偿电压来对电源控制系统的输出电流进行补偿。例如，comp端子可以将误差放大器的输出与外部组件连接以进行补偿。根据一个实施例，第一信号在系统外部的补偿电容Ccomp上产生电压Vcomp1，第二信号在积分及采样组件内生成用于调节Ton时间的电压Vcomp2。The voltage across the external resistor is passed to the system controller through a terminal (eg, terminal CS) for signal processing during the different switching cycles associated with the internal power switches. Inside the system controller, the output current sampling component coupled to the CS terminal samples the output current to generate a voltage signal VIo_s , which is sent to the integrating and sampling component together with the reference voltage Vref_ea . The integrating and sampling component generates a first signal and a second signal based on the voltage signal VIo_s and the reference voltage Vref_ea . The sampling voltage is obtained by sampling the output current of the power control system, and the first signal is input to the first terminal (eg, comp terminal) to generate a compensation voltage to compensate the output current of the power control system. For example, the comp terminal can interface the output of the error amplifier with external components for compensation. According to one embodiment, the first signal generates a voltage Vcomp1 on the compensation capacitor Ccomp outside the system, and the second signal generates a voltage Vcomp2 used to adjust the Ton time in the integrating and sampling component.
根据一个实施例，例如来自斜坡信号生成组件的Iramp流到斜坡信号生成器。在另一示例中，调制组件接收斜坡信号并且输出调制信号。在另一示例中，逻辑控制器处理调制信号并且将控制信号输出到驱动组件。在另一示例中，调制信号与脉冲宽度调制(PWM)信号相对应。在又一示例中，脉冲宽度调制(PWM)控制器还包括过电压保护(OVP)检测器，在另一示例中，驱动组件发送驱动信号到GATE端，以影响GATE的导通和关断。According to one embodiment, Iramp eg from the ramp signal generation component flows to the ramp signal generator. In another example, the modulation component receives a ramp signal and outputs a modulated signal. In another example, the logic controller processes the modulation signal and outputs the control signal to the drive assembly. In another example, the modulation signal corresponds to a pulse width modulation (PWM) signal. In yet another example, the pulse width modulation (PWM) controller further includes an over voltage protection (OVP) detector. In another example, the driving component sends a driving signal to the GATE terminal to affect the turn-on and turn-off of the GATE.
例如，电流Iramp经过斜坡信号生成组件产生斜坡电压之后，调制组件将斜坡电压与电压Vcomp2做比较，并且基于比较结果输出调制信号到逻辑控制组件。逻辑控制组件至少部分地基于调制信号来决定GATE的关断时刻；逻辑控制组件还通过FB电压检测退磁结束来决定GATE的导通时刻。例如，退磁检测组件检测来自FB端子的反馈信号并且将触发信号输出到逻辑控制器以开始下一周期(例如，与下一开关周期相对应)。For example, after the current Iramp generates a ramp voltage through the ramp signal generating component, the modulating component compares the ramp voltage with the voltage Vcomp2 and outputs a modulating signal to the logic control component based on the comparison result. The logic control component determines the turn-off time of the GATE based at least in part on the modulation signal; the logic control component also determines the turn-on time of the GATE by detecting the end of demagnetization through the FB voltage. For example, the demagnetization detection component detects the feedback signal from the FB terminal and outputs a trigger signal to the logic controller to start the next cycle (eg, corresponding to the next switching cycle).
图4B示出了根据本公开的实施例的、图4A中的系统控制器的积分及采样组件的示例性框图。该图仅作为示例，其不应该不适当地限制权利要求的范围。本领域的普通技术人员应该理解很多变化、替代和修改。4B shows an exemplary block diagram of the integrating and sampling components of the system controller in FIG. 4A, according to an embodiment of the disclosure. This diagram is an example only, which should not unduly limit the scope of the claims. Those of ordinary skill in the art would appreciate many changes, substitutions and modifications.
根据一个实施例，积分及采样组件包括低通滤波组件、误差放大组件、比较器、以及单触发电路。根据一个实施例，低通滤波组件包括第一电阻器R1和第一电容器C1。According to one embodiment, the integration and sampling component includes a low-pass filter component, an error amplification component, a comparator, and a one-shot circuit. According to one embodiment, the low-pass filtering component comprises a first resistor R1 and a first capacitor C1.
经过采样输出电流后产生的电压信号VIo_s经过R1、C1滤波滤除其高频波动后，与参考电压Vref_ea一起送入比较器比较。经滤波后的电压信号VIo_sf与参考电压Vref_ea一起送进EA(Error Amplifier)做差积分，以在耦合到误差放大器的输出外部补偿电容Ccomp上产生电压Vcomp1。After sampling the output current, the voltage signal VIo_s is filtered by R1 and C1 to filter out its high-frequency fluctuations, and then sent to the comparator for comparison with the reference voltage Vref_ea . The filtered voltage signal VIo_sf and the reference voltage Vref_ea are sent to an EA (Error Amplifier) for differential integration to generate a voltage Vcomp1 on the output external compensation capacitor Ccomp coupled to the error amplifier.
在滤波后的电压信号VIo_sf高于或者低于参考电压Vref_ea的瞬间，单次触发电路产生采样信号sample1或sample2。在sample1或者sample2信号为高时EA的输出电流接近为零，此时Vcomp1电压最平缓，用sample1或者sample2信号采样电压Vcomp1在电容上以产生电压Vcomp2，并在非采样的时间内保持此电压，将电压Vcomp2送入PWM比较器与斜坡信号一起产生开关S1的Ton时间。At the instant when the filtered voltage signal VIo_sf is higher or lower than the reference voltage Vref_ea , the one-shot circuit generates a sampling signal sample1 or sample2 . When the sample1 or sample2 signal is high, the output current of the EA is close to zero, and the Vcomp1 voltage is the most gentle at this time. Use the sample1 or sample2 signal to sample the voltage Vcomp1 on the capacitor to generate a voltage Vcomp2 , and keep it during the non-sampling time This voltage, feeds the voltage Vcomp2 into the PWM comparator together with the ramp signal to generate the Ton time of the switch S1.
图5示出了根据本公开的实施例的、图4A中的系统控制器的工作波形的关键局部示意图。该图仅作为示例，其不应该不适当地限制权利要求的范围。本领域的普通技术人员应该理解很多变化、替代和修改。FIG. 5 shows a key partial schematic diagram of operating waveforms of the system controller in FIG. 4A according to an embodiment of the present disclosure. This diagram is an example only, which should not unduly limit the scope of the claims. Those of ordinary skill in the art would appreciate many changes, substitutions and modifications.
采样输出电流后的电压信号VIo_s经过滤波后产生的电压信号VIo_sf基本跟随输入电压变化呈正弦波形(例如，如波形501所示)。在每个工频周期内，电压VIo_sf会出现一次从低于Vref_ea到高于Vref_ea的时刻产生采样信号sample1，或者出现一次从高于Vref_ea到低于Vref_ea的时刻产生采样信号sample2(例如，如波形502所示).用sample1信号采样电压Vcomp1产生的电压Vcomp2如波形503所示。After sampling the output current, the voltage signal VIo_s is filtered to generate a voltage signal VIo_sf that basically follows the change of the input voltage and presents a sinusoidal waveform (for example, as shown in waveform 501 ). In each power frequency cycle, the voltage VIo_sf will generate a sampling signal sample1 at a time from lower than Vref_ea to higher than Vref_ea , or generate a sampling signal sample2 at a time from higher than Vref_ea to lower than Vref_ea (For example, as shown in the waveform 502 ). The voltage Vcomp2 generated by sampling the voltage Vcomp1 with the sample1 signal is shown in the waveform 503 .
系统工作稳定后，在每个工频周期sample1或者sample2信号为高电平时，采样电压Vcomp1产生的Vcomp2电压都完全恒定，由电压Vcomp2产生PWM信号就能够消除电压Vcomp1波动所引起的Ton变化。在另一示例中，退磁检测组件在触发信号中生成脉冲以开始下一周期(未示出)。After the system works stably, when the sample1 or sample2 signal is at a high level in each power frequency cycle, the Vcomp2 voltage generated by the sampling voltage Vcomp1 is completely constant, and the PWM signal generated by the voltage Vcomp2 can eliminate the fluctuation caused by the fluctuation of the voltage Vcomp1 Ton changes. In another example, the demagnetization detection component generates a pulse in the trigger signal to start the next cycle (not shown).
图6示出了根据本公开的实施例的、内置补偿电容的BUCK准谐振开关电源的示例性框图。其结构与参考图1描述的准谐振开关电源类似，但是控制器不存在comp端子和连接到该端子的外部comp电容器。该图仅作为示例，其不应该不适当地限制权利要求的范围。本领域的普通技术人员应该理解很多变化、替代和修改。FIG. 6 shows an exemplary block diagram of a BUCK quasi-resonant switching power supply with a built-in compensation capacitor according to an embodiment of the present disclosure. Its structure is similar to the quasi-resonant switching power supply described with reference to Figure 1, but the controller does not have a comp terminal and an external comp capacitor connected to this terminal. This diagram is an example only, which should not unduly limit the scope of the claims. Those of ordinary skill in the art would appreciate many changes, substitutions and modifications.
在对输入电流的THD有较高要求的应用场合，为了输入电流Iin_ave能完全跟随输入电压Vin变化，环路补偿电容Ccomp需要取值较大，所以目前PFC系统的电容Ccomp一般都是外置。In applications that have high requirements on the THD of the input current, in order for the input current Iin_ave to completely follow the change of the input voltage Vin , the loop compensation capacitor Ccomp needs to have a larger value, so the capacitor Ccomp of the current PFC system is generally It is external.
根据优选的实施例，本发明在每个工频周期的固定时刻采样误差放大器补偿电容Ccomp电压的方式可以消除误差放大器补偿电容上电压纹波对THD的不利影响，那么内置补偿电容结构的系统THD也就可以做到和上述外置补偿电容结构同样低。内置补偿电容的BUCK准谐振开关电源如上图6所示，与外置补偿电容结构相比可以省去一个comp端子和外部comp电容器，使得系统结构更简单、成本更低。According to a preferred embodiment, the method of sampling the voltage of the error amplifier compensation capacitor Ccomp at a fixed moment in each power frequency cycle can eliminate the adverse effect of the voltage ripple on the error amplifier compensation capacitor on THD, so the system with built-in compensation capacitor structure The THD can also be as low as the above-mentioned external compensation capacitor structure. The BUCK quasi-resonant switching power supply with built-in compensation capacitor is shown in Figure 6 above. Compared with the external compensation capacitor structure, a comp terminal and an external comp capacitor can be omitted, making the system structure simpler and lower in cost.
图7A示出了根据本公开的另一实施例的系统控制器的示例性框图。该图仅作为示例，其不应该不适当地限制权利要求的范围。本领域的普通技术人员应该理解很多变化、替代和修改。FIG. 7A shows an exemplary block diagram of a system controller according to another embodiment of the present disclosure. This diagram is an example only, which should not unduly limit the scope of the claims. Those of ordinary skill in the art would appreciate many changes, substitutions and modifications.
首先通过CS端的电压信号采样输出电流的大小产生电压VIo_s，与参考电压Vref_ea一起送入积分及采样组件，完全由积分及采样组件产生调节Ton时间的Vcomp4；电流Iramp经过斜坡信号生成组件产生斜坡电压之后与电压Vcomp4做比较，从而决定GATE的关断时刻，再通过FB电压检测退磁结束来决定GATE的导通时刻。First, the voltage signal at the CS terminal is used to sample the magnitude of the output current to generate a voltage VIo_s , which is sent to the integration and sampling component together with the reference voltage Vref_ea , and the integration and sampling component generates Vcomp 4 to adjust the Ton time; the current Iramp passes through the ramp After the signal generation component generates a ramp voltage, it is compared with the voltage Vcomp 4 to determine the turn-off time of the GATE, and then the turn-on time of the GATE is determined by detecting the end of demagnetization through the FB voltage.
图7B示出了根据本公开的实施例的、图7A中的系统控制器的积分及采样组件的示例性框图。该图仅作为示例，其不应该不适当地限制权利要求的范围。本领域的普通技术人员应该理解很多变化、替代和修改。7B shows an exemplary block diagram of the integrating and sampling components of the system controller in FIG. 7A, according to an embodiment of the disclosure. This diagram is an example only, which should not unduly limit the scope of the claims. Those of ordinary skill in the art would appreciate many changes, substitutions and modifications.
采样输出电流后产生的电压信号VIo_s经过R1、C1滤波滤除其高频波动后，与参考电压Vref_ea一起送入比较器比较，之后在滤波后的电压信号VIo_sf高于或者低于参考电压Vref_ea的瞬间产生采样信号sample1或sample2；滤波后的电压信号VIo_sf与参考电压Vref_ea一起送进EA，用定频、固定占空比控制信号DS(例如，10kHz频率、3％占空比)采样积分在内部补偿电容C3上产生电压Vcomp3，在sample1或者sample2信号为高时误差放大器的输出电流接近为零，此时电压Vcomp3最平缓，用sample1或者sample2信号采样电压Vcomp3在电容器C2上产生电压Vcomp4并在非采样的时间内将此电压保持住，将电压Vcomp4送入PWM比较器与斜坡信号一起产生开关S1的Ton时间。The voltage signal VIo_s generated after sampling the output current is filtered by R1 and C1 to filter out its high-frequency fluctuations, and then sent to the comparator for comparison with the reference voltage Vref_ea , and then the filtered voltage signal VIo_sf is higher or lower than the reference voltage The sampling signal sample1 or sample2 is generated at the moment of the voltage Vref_ea ; the filtered voltage signal VIo_sf is sent to EA together with the reference voltage Vref_ea , and the control signal DS with a fixed frequency and a fixed duty ratio (for example, 10kHz frequency, 3% duty Ratio) Sampling integration generates a voltage Vcomp 3 on the internal compensation capacitor C3. When the sample1 or sample2 signal is high, the output current of the error amplifier is close to zero. At this time, the voltage Vcomp 3 is the most gentle, and the sample1 or sample2 signal is used to sample the voltage VComp 3 generates voltage Vcomp 4 on capacitor C2 and holds this voltage during the non-sampling time, and sends voltage Vcomp 4 to PWM comparator together with ramp signal to generate the Ton time of switch S1.
图8示出了根据本公开的实施例的、图7A中的系统控制器的工作波形的关键局部示意图。图中电压Vcomp4由sample1信号采样电压Vcomp3产生。该图仅作为示例，其不应该不适当地限制权利要求的范围。本领域的普通技术人员应该理解很多变化、替代和修改。FIG. 8 shows a key partial schematic diagram of operating waveforms of the system controller in FIG. 7A according to an embodiment of the present disclosure. In the figure, the voltage Vcomp 4 is generated by the sample1 signal sampling voltage Vcomp 3 . This diagram is an example only, which should not unduly limit the scope of the claims. Those of ordinary skill in the art would appreciate many changes, substitutions and modifications.
传统的内置补偿电容结构由于内部电容不够大，误差放大器输出端的补偿电容上电压波动较大，THD较差；而本发明的内置补偿电容结构可以完全消除误差放大器输出的补偿电容上电压波动对Ton时间的影响，使内置补偿电容结构的THD比传统的外置补偿电容结构更优。The traditional built-in compensation capacitor structure is not large enough, the voltage fluctuation on the compensation capacitor at the output of the error amplifier is relatively large, and the THD is relatively poor; and the built-in compensation capacitor structure of the present invention can completely eliminate the impact of voltage fluctuation on the compensation capacitor output by the error amplifier on T The impact of theon time makes the THD of the built-in compensation capacitor structure better than that of the traditional external compensation capacitor structure.
Boost、Buck-Boost以及反激架构的PFC电源控制结构中也有误差放大器及环路补偿电容，如果在Boost、Buck-Boost以及反激架构的PFC电源控制的环路补偿部分使用本发明所描述的控制方法，也可以同样实现更低的THD。There are also error amplifiers and loop compensation capacitors in the PFC power supply control structure of Boost, Buck-Boost and flyback architecture. If the loop compensation part of the PFC power supply control of Boost, Buck-Boost and flyback architecture is used Control method, can also achieve lower THD.
图9示出了根据本公开的实施例的系统控制方法900的示例性流程图。该图仅作为示例，其不应该不适当地限制权利要求的范围。本领域的普通技术人员应该理解很多变化、替代和修改。FIG. 9 shows an exemplary flowchart of a system control method 900 according to an embodiment of the present disclosure. This diagram is an example only, which should not unduly limit the scope of the claims. Those of ordinary skill in the art would appreciate many changes, substitutions and modifications.
方法900开始于步骤901，接收采样电压和参考电压，并且至少部分地基于采样电压和参考电压来生成第一信号，其中采样电压是对电源控制系统的输出电流进行采样获得的。The method 900 starts at step 901 by receiving a sampling voltage and a reference voltage, wherein the sampling voltage is obtained by sampling an output current of a power control system, and generating a first signal based at least in part on the sampling voltage and the reference voltage.
方法随后继续到步骤902，接收基于第一信号的第一电压以及斜坡电压，并且基于第一电压和斜坡电压来生成调制信号。The method then continues to step 902, receiving a first voltage based on the first signal and a ramp voltage, and generating a modulation signal based on the first voltage and the ramp voltage.
在步骤903，接收调制信号，并且基于调制信号来生成驱动信号；以及基于驱动信号来导通栅极。In step 903, a modulation signal is received, and a driving signal is generated based on the modulation signal; and the gate is turned on based on the driving signal.
例如，本发明的各种实施例的一些或所有组件均被使用一个或多个软件组件、一个或多个硬件组件、和/或软件和硬件组件的一个或多个组合，单独和/或至少与另一组件结合实现。在另一示例中，本发明的各种实施例的一些或所有组件均被单独和/或至少与另一组件结合实现在一个或多个电路中，这些电路诸如是一个或多个模拟电路和/或一个或多个数字电路。在又一示例中，本发明的各种实施例和/或示例可以被结合。For example, some or all of the components of various embodiments of the invention are implemented using one or more software components, one or more hardware components, and/or one or more combinations of software and hardware components, individually and/or at least Implemented in conjunction with another component. In another example, some or all of the components of various embodiments of the invention are implemented alone and/or at least in combination with another component in one or more circuits, such as one or more analog circuits and and/or one or more digital circuits. In yet another example, various embodiments and/or examples of the invention may be combined.
尽管描述了本发明的具体实施例，但是本领域技术人员将理解的是其他实施例相当于所描述的实施例。因此，将理解的是，本发明不限于具体示出的实施例，而仅受所附权利要求的范围的限制。While specific embodiments of the invention have been described, those skilled in the art will appreciate that other embodiments are equivalent to the described embodiments. It is to be understood, therefore, that the invention is not to be limited to the particular illustrated embodiments, but is only limited by the scope of the appended claims.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710049687.1ACN106685207B (en) | 2017-01-23 | 2017-01-23 | Power control system and method with low input current total harmonic distortion |
| TW106105793ATWI625921B (en) | 2017-01-23 | 2017-02-21 | Power supply control system and method with low input current total harmonic distortion |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710049687.1ACN106685207B (en) | 2017-01-23 | 2017-01-23 | Power control system and method with low input current total harmonic distortion |
| Publication Number | Publication Date |
|---|---|
| CN106685207Atrue CN106685207A (en) | 2017-05-17 |
| CN106685207B CN106685207B (en) | 2019-04-05 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710049687.1AActiveCN106685207B (en) | 2017-01-23 | 2017-01-23 | Power control system and method with low input current total harmonic distortion |
| Country | Link |
|---|---|
| CN (1) | CN106685207B (en) |
| TW (1) | TWI625921B (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107484305A (en)* | 2017-09-30 | 2017-12-15 | 上海晶丰明源半导体股份有限公司 | Switching device, method of controlling switch and the LED drive system being applicable |
| CN107529254A (en)* | 2017-09-30 | 2017-12-29 | 上海晶丰明源半导体股份有限公司 | Switching device and the LED drive system being applicable, driving method |
| CN107682955A (en)* | 2017-09-30 | 2018-02-09 | 上海晶丰明源半导体股份有限公司 | Controller, demagnetization detection method and the LED drive system being applicable |
| CN108336903A (en)* | 2018-03-13 | 2018-07-27 | 杰华特微电子（杭州）有限公司 | Control circuit and control method for reduction voltage circuit |
| CN110266182A (en)* | 2019-05-20 | 2019-09-20 | 杭州电子科技大学 | A PFC Output Voltage Adaptive Follower Controller |
| CN113991997A (en)* | 2021-10-27 | 2022-01-28 | 深圳市必易微电子股份有限公司 | Noise suppression circuit and suppression method |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI695572B (en)* | 2019-09-28 | 2020-06-01 | 立錡科技股份有限公司 | Inductor current emulator circuit and inductor current emulation method |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130181635A1 (en)* | 2012-01-13 | 2013-07-18 | Texas Instruments Incorporated | LED Driver with Primary Side Sensing |
| CN103296877A (en)* | 2013-06-07 | 2013-09-11 | 无锡华润矽科微电子有限公司 | Harmonic distortion optimization method and circuit of power factor controller |
| CN103475225A (en)* | 2012-06-06 | 2013-12-25 | 比亚迪股份有限公司 | Switching power supply system and lineal pressure compensation device for switching power supply |
| CN103841734A (en)* | 2014-03-28 | 2014-06-04 | 绍兴光大芯业微电子有限公司 | Drive circuit structure capable of improving total harmonic distortion |
| CN104967328A (en)* | 2015-07-15 | 2015-10-07 | 昂宝电子（上海）有限公司 | Systems and methods for regulating output current of a power conversion system |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103368400B (en)* | 2012-03-31 | 2015-02-18 | 昂宝电子（上海）有限公司 | System and method for constant voltage control and constant current control |
| CN102790531B (en)* | 2012-07-24 | 2015-05-27 | 昂宝电子（上海）有限公司 | System for electric current control of power supply alternation system |
| CN103280971B (en)* | 2013-05-28 | 2016-01-13 | 成都芯源系统有限公司 | Buck-boost converter and controller and control method thereof |
| TWI488416B (en)* | 2013-08-09 | 2015-06-11 | Delta Electronics Inc | Control method for inhibiting harmonic distortion of input current |
| CN108809100B (en)* | 2014-04-18 | 2020-08-04 | 昂宝电子（上海）有限公司 | System and method for regulating output current of a power conversion system |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130181635A1 (en)* | 2012-01-13 | 2013-07-18 | Texas Instruments Incorporated | LED Driver with Primary Side Sensing |
| CN103475225A (en)* | 2012-06-06 | 2013-12-25 | 比亚迪股份有限公司 | Switching power supply system and lineal pressure compensation device for switching power supply |
| CN103296877A (en)* | 2013-06-07 | 2013-09-11 | 无锡华润矽科微电子有限公司 | Harmonic distortion optimization method and circuit of power factor controller |
| CN103841734A (en)* | 2014-03-28 | 2014-06-04 | 绍兴光大芯业微电子有限公司 | Drive circuit structure capable of improving total harmonic distortion |
| CN104967328A (en)* | 2015-07-15 | 2015-10-07 | 昂宝电子（上海）有限公司 | Systems and methods for regulating output current of a power conversion system |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107484305A (en)* | 2017-09-30 | 2017-12-15 | 上海晶丰明源半导体股份有限公司 | Switching device, method of controlling switch and the LED drive system being applicable |
| CN107529254A (en)* | 2017-09-30 | 2017-12-29 | 上海晶丰明源半导体股份有限公司 | Switching device and the LED drive system being applicable, driving method |
| CN107682955A (en)* | 2017-09-30 | 2018-02-09 | 上海晶丰明源半导体股份有限公司 | Controller, demagnetization detection method and the LED drive system being applicable |
| CN107484305B (en)* | 2017-09-30 | 2023-07-07 | 上海晶丰明源半导体股份有限公司 | Switching device, switching control method and LED driving system suitable for switching device |
| CN107529254B (en)* | 2017-09-30 | 2024-01-26 | 上海晶丰明源半导体股份有限公司 | Switching device, and applicable LED driving system and driving method |
| CN107682955B (en)* | 2017-09-30 | 2024-03-08 | 上海晶丰明源半导体股份有限公司 | Controller, demagnetization detection method and applicable LED driving system |
| CN108336903A (en)* | 2018-03-13 | 2018-07-27 | 杰华特微电子（杭州）有限公司 | Control circuit and control method for reduction voltage circuit |
| CN110266182A (en)* | 2019-05-20 | 2019-09-20 | 杭州电子科技大学 | A PFC Output Voltage Adaptive Follower Controller |
| CN113991997A (en)* | 2021-10-27 | 2022-01-28 | 深圳市必易微电子股份有限公司 | Noise suppression circuit and suppression method |
| CN113991997B (en)* | 2021-10-27 | 2024-03-01 | 深圳市必易微电子股份有限公司 | Noise suppression circuit and suppression method |
| Publication number | Publication date |
|---|---|
| TW201828577A (en) | 2018-08-01 |
| CN106685207B (en) | 2019-04-05 |
| TWI625921B (en) | 2018-06-01 |
| Publication | Publication Date | Title |
|---|---|---|
| CN106685207A (en) | Power supply control system and method with low input current total harmonic distortion | |
| CN109247042B (en) | AC/DC PFC converter, conversion method and LED driver | |
| TWI542134B (en) | System controller and method for adjusting the power conversion system | |
| US10819224B2 (en) | Power factor correction circuit, control method and controller | |
| US8089255B2 (en) | Power factor correction power supply unit, and control circuit and control method used in the same | |
| CN207399028U (en) | For the control unit and electric device of dc-dc converter | |
| US8749212B2 (en) | Method and apparatus to control a power factor correction circuit | |
| CN102368661B (en) | Switching power supply with power factor correction and its control device and method | |
| CN207884484U (en) | Control unit and switch converters | |
| US8350548B2 (en) | Frequency control circuit and method for a non-constant frequency voltage regulator | |
| US7990127B2 (en) | Method and apparatus for AC to DC power conversion with reduced harmonic current | |
| US7436685B2 (en) | Piecewise on-time modulation apparatus and method for a power factor corrector | |
| CN102664517B (en) | Power factor correction circuit | |
| CN103219901A (en) | Alternating current/direct current (AC/DC) converter control circuit and AC/DC converter using same | |
| US7990745B2 (en) | Apparatus for controlling H-bridge DC-AC inverter | |
| CN110445376B (en) | Hysteretic control DC/DC converter device and operation method thereof | |
| US20150102786A1 (en) | Pfc control circuit, active pfc circuit and pfc control method | |
| TWI815214B (en) | Quasi-resonant switching power supply and its control chip and control method | |
| TW201308842A (en) | Buck converter and its control circuit and control method | |
| TW201729526A (en) | Switching regulator with ripple-based constant ON-time (RBCOT) and control circuit and control method thereof | |
| CN117134608B (en) | LLC resonant converter current control circuit and control method thereof | |
| TWI633744B (en) | Control device and control method of Boost PFC converter for quasi-resonant working mode | |
| TWI447554B (en) | Dual-mode power factor correction circuit | |
| US20120014142A1 (en) | Power conversion apparatus for correcting power factor | |
| US12334804B2 (en) | Switching power converting apparatus |
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | Address after:201203 Shanghai Pudong New Area Zhangjiang High-tech Park, No. 168 Huatuo Road, Building 3 Commercial Center Patentee after:Angbao Integrated Circuit Co.,Ltd. Country or region after:China Address before:201203 Shanghai Pudong New Area Zhangjiang High-tech Park, No. 168 Huatuo Road, Building 3 Commercial Center Patentee before:On-Bright Electronics (Shanghai) Co.,Ltd. Country or region before:China | |
| CP03 | Change of name, title or address |