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CN106648551A - Hybrid graphics processor command processing system - Google Patents

Hybrid graphics processor command processing system
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Publication number
CN106648551A
CN106648551ACN201611139590.1ACN201611139590ACN106648551ACN 106648551 ACN106648551 ACN 106648551ACN 201611139590 ACN201611139590 ACN 201611139590ACN 106648551 ACN106648551 ACN 106648551A
Authority
CN
China
Prior art keywords
instruction
stainer
module
graphics command
graphics
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201611139590.1A
Other languages
Chinese (zh)
Inventor
马城城
田泽
张骏
刘晖
张琛
黎小玉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xian Aeronautics Computing Technique Research Institute of AVIC
Original Assignee
Xian Aeronautics Computing Technique Research Institute of AVIC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xian Aeronautics Computing Technique Research Institute of AVICfiledCriticalXian Aeronautics Computing Technique Research Institute of AVIC
Priority to CN201611139590.1ApriorityCriticalpatent/CN106648551A/en
Publication of CN106648551ApublicationCriticalpatent/CN106648551A/en
Pendinglegal-statusCriticalCurrent

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Abstract

The invention belongs to the field of computer graphics, and particularly relates to a hybrid graphics processor command processing system. The system comprises a hybrid command storage module (1) on the host side, as well as a command distributing module (2), a stainer command processing module (3) and a graphics command processing module (4) on the graphics processor side. According to the system, through host storage of hybrid graphics commands and stainer commands, graphics processor resources can be flexibly controlled by a host.

Description

A kind of mixed graph processor instruction processing system
Technical field
The invention belongs to area of computer graphics, more particularly to a kind of mixed graph processor instruction processing system.
Background technology
Realized using programmable stainer mode more than Modern Graphic processor, and main frame interaction adopts graphics command form,Presently disclosed research is both for stainer instruction research mostly, and such as PTX is that discovery has to whole figure processor instructionThe data of processing structure.
The content of the invention
The purpose of the present invention is:
Present invention generally provides a kind of mixed graph processor instruction processing system, it is stipulated that the instruction that graphic process unit is realizedProcessing system.
The present invention solution be:
A kind of mixed graph processor instruction processing system, it is characterised in that include:
The mixed instruction memory module (1) of host side, the instruction distribution module (2) at graphic process unit end, stainer instructionProcessing module (3), graphics command processing module (4);
Mixed instruction memory module (1) mixing storage graphics command and stainer instruction, and send an instruction to instruction pointSend out module (2);
Instruct distribution module (2) to receive the instruction that mixed instruction memory module (1) sends, and instruction is divided into into stainer and refer toOrder and graphics command, and graphics command is sent to into graphics command processing module (4), stainer instruction is sent to into stainer and is referred toMake processing module (3);
Stainer command process module (3) receives the stainer of instruction distribution module (2) transmission and instructs and perform, and will dyeDevice instruction execution result is sent to graphics command processing module (4);
Graphics command processing module (4) receives the stainer instruction execution result of stainer command process module (3);Also connectReceive the graphics command that instruction distribution module (2) sends simultaneously to perform, run in graphics command processing module (4) processing procedure needs byDuring the graphics command that stainer is performed, the graphics command for needing to be performed by stainer is sent to into stainer instruction and processes mouldBlock (3) is performed, and implementing result is returned to graphics command processing module (4) by stainer command process module (3).
It is an advantage of the invention that:A kind of mixed graph processor instruction processing system that the present invention is provided, by combination chartShape instruction, the main frame storage of stainer instruction so that main frame can flexibly control figure processor resource.
Description of the drawings
Fig. 1 is method of the present invention module map.
Specific embodiment
In order that the objects, technical solutions and advantages of the present invention become more apparent, with reference to embodiments, to the present inventionIt is further elaborated.It should be appreciated that specific embodiment described herein is not used to only to explain the present inventionLimit the present invention.
Below in conjunction with the accompanying drawings technical scheme is described in further detail with specific embodiment.
As shown in figure 1, a kind of mixed graph processor instruction processing system of the embodiment of the present invention, including:
The mixed instruction memory module (1) of host side, the instruction distribution module (2) at graphic process unit end, stainer instructionProcessing module (3), graphics command processing module (4);
Mixed instruction memory module (1) mixing storage graphics command and stainer instruction, and send an instruction to instruction pointSend out module (2);
Instruct distribution module (2) to receive the instruction that mixed instruction memory module (1) sends, and instruction is divided into into stainer and refer toOrder and graphics command, and graphics command is sent to into graphics command processing module (4), stainer instruction is sent to into stainer and is referred toMake processing module (3);
Stainer command process module (3) receives the stainer of instruction distribution module (2) transmission and instructs and perform, and will dyeDevice instruction execution result is sent to graphics command processing module (4);
Graphics command processing module (4) receives the stainer instruction execution result of stainer command process module (3);Also connectReceive the graphics command that instruction distribution module (2) sends simultaneously to perform, run in graphics command processing module (4) processing procedure needs byDuring the graphics command that stainer is performed, the graphics command for needing to be performed by stainer is sent to into stainer instruction and processes mouldBlock (3) is performed, and implementing result is returned to graphics command processing module (4) by stainer command process module (3).
Finally it should be noted that:Above example only to illustrate technical scheme, rather than a limitation;AlthoughThe present invention is explained with reference to the foregoing embodiments, it will be understood by those within the art that:It still may be usedTo modify to the technical scheme described in foregoing embodiments, or equivalent is carried out to which part technical characteristic;And these modification or replace, do not make appropriate technical solution essence depart from various embodiments of the present invention technical scheme spirit andScope.

Claims (1)

CN201611139590.1A2016-12-122016-12-12Hybrid graphics processor command processing systemPendingCN106648551A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
CN201611139590.1ACN106648551A (en)2016-12-122016-12-12Hybrid graphics processor command processing system

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
CN201611139590.1ACN106648551A (en)2016-12-122016-12-12Hybrid graphics processor command processing system

Publications (1)

Publication NumberPublication Date
CN106648551Atrue CN106648551A (en)2017-05-10

Family

ID=58824683

Family Applications (1)

Application NumberTitlePriority DateFiling Date
CN201611139590.1APendingCN106648551A (en)2016-12-122016-12-12Hybrid graphics processor command processing system

Country Status (1)

CountryLink
CN (1)CN106648551A (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US20050225554A1 (en)*2004-04-122005-10-13Bastos Rui MScalable shader architecture
CN102147722A (en)*2011-04-082011-08-10深圳中微电科技有限公司Multithreading processor realizing functions of central processing unit and graphics processor and method
CN102509326A (en)*2010-10-062012-06-20微软公司Target independent rasterization
CN102640115A (en)*2009-09-032012-08-15先进微装置公司A processing unit that enables asyncronous task dispatch
CN103080899A (en)*2010-07-132013-05-01超威半导体公司Dynamic enabling and disabling of SIMD units in a graphics processor
CN103620641A (en)*2011-06-302014-03-05英特尔公司Maximizing parallel processing in graphics processors
US20150116335A1 (en)*2013-10-252015-04-30Futurewei Technologies, Inc.System and Method for Distributed Virtualization of GPUs in Desktop Cloud
US20150347107A1 (en)*2014-05-302015-12-03Apple Inc.Unified Intermediate Representation

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US20050225554A1 (en)*2004-04-122005-10-13Bastos Rui MScalable shader architecture
CN102640115A (en)*2009-09-032012-08-15先进微装置公司A processing unit that enables asyncronous task dispatch
CN103080899A (en)*2010-07-132013-05-01超威半导体公司Dynamic enabling and disabling of SIMD units in a graphics processor
CN102509326A (en)*2010-10-062012-06-20微软公司Target independent rasterization
CN102147722A (en)*2011-04-082011-08-10深圳中微电科技有限公司Multithreading processor realizing functions of central processing unit and graphics processor and method
CN103620641A (en)*2011-06-302014-03-05英特尔公司Maximizing parallel processing in graphics processors
US20150116335A1 (en)*2013-10-252015-04-30Futurewei Technologies, Inc.System and Method for Distributed Virtualization of GPUs in Desktop Cloud
US20150347107A1 (en)*2014-05-302015-12-03Apple Inc.Unified Intermediate Representation

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
马城城 等: "基于GPU FPGA芯片原型的VxWorks下驱动软件开发", 《计算机技术与发展》*

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Legal Events

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PB01Publication
PB01Publication
SE01Entry into force of request for substantive examination
SE01Entry into force of request for substantive examination
RJ01Rejection of invention patent application after publication

Application publication date:20170510

RJ01Rejection of invention patent application after publication

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