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CN106526929A - GOA (gate driver on array) circuit, array substrate and liquid crystal panel - Google Patents

GOA (gate driver on array) circuit, array substrate and liquid crystal panel
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Publication number
CN106526929A
CN106526929ACN201611254293.1ACN201611254293ACN106526929ACN 106526929 ACN106526929 ACN 106526929ACN 201611254293 ACN201611254293 ACN 201611254293ACN 106526929 ACN106526929 ACN 106526929A
Authority
CN
China
Prior art keywords
stv
goa
holding wire
array base
holding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201611254293.1A
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Chinese (zh)
Inventor
张春倩
张启沛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Technology Co LtdfiledCriticalWuhan China Star Optoelectronics Technology Co Ltd
Priority to CN201611254293.1ApriorityCriticalpatent/CN106526929A/en
Publication of CN106526929ApublicationCriticalpatent/CN106526929A/en
Pendinglegal-statusCriticalCurrent

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Abstract

The invention provides a GOA (gate driver on array) circuit which comprises a GOA unit and at least one STV (vertical start pulse) signal wire. The STV signal wires are connected with the GOA unit, and an electrostatic protection device is arranged between the STV signal wires and the GOA or a source grounding signal wire of an array substrate. The invention further provides the array substrate and a liquid crystal panel. The array substrate comprises the GOA circuit. The liquid crystal panel comprises the GOA circuit. Compared with the prior art, the GOA circuit, the array substrate and the liquid crystal panel have the advantages that the electrostatic protection device is arranged between the STV signal wires and the GOA unit or a grounding end of the GOA circuit, accordingly, the problem of damage to existing STV signal wires due to static electricity can be solved, and forward and reverse scanning failure of existing GOA circuits or failure of existing GOA units can be avoided.

Description

A kind of GOA circuits and array base palte, liquid crystal panel
Technical field
The present invention relates to a kind of display technology field, particularly a kind of GOA circuits and liquid crystal panel.
Background technology
Liquid crystal display is very conventional technology in modern display.In the manufacture process of liquid crystal panel or use processIn can usually produce electrostatic, damage by static electricity can cause the abnormal of panel even to fail, therefore to the design of electrostatic defending in panelIt is very important in design.
At present, GOA technologies are used widely in TFT-LCD manufactures field, GOA (Gate Driver onArray, array base palte row drive) technology refers to and for the gate drivers (Gate Driver) of TFT-LCD to be integrated in array base palteOn, form the turntable driving of counter plate.
Yet with its circuit connection and the complexity of technique, the yields of GOA circuits is very low, wherein, affects its non-defective unitOne principal element of rate is accumulation of static electricity and ESD (Electro-Static discharge, Electro-static Driven Comb), existingIn the manufacture process of GOA circuits, due to STV (Vertical Start Pluse, frame unbalanced pulse signal) holding wire it is longer,Substantial amounts of electric charge is accumulated in plasma gas-phase deposit environment easily, and it is easy when these electric charges are discharged to the inside of GOA unitCause GOA unit by the generation of electrostatic breakdown phenomenon, the GOA unit short circuit for causing, make GOA circuits cannot normal work, so as toCause the display device cannot normal display picture.STV holding wires can also be injured when there is damage by static electricity, causing GOA to fail, itsIn be easiest to be wounded is then outermost STV holding wires.
The content of the invention
For overcoming the deficiencies in the prior art, the present invention provides a kind of GOA circuits and liquid crystal panel, so as to prevent in useThe problem of the GOA circuit malfunctions that electrostatic is caused to the damage by static electricity of STV holding wires.
The invention provides a kind of GOA circuits, at least one STV signal being connected including GOA unit and with GOA unitLine, is provided with electrostatic protection apparatus between the STV holding wires and the source ground holding wire of GOA unit or array base palte.
Further, electrostatic protection apparatus, the electrostatic protection apparatus are provided between the STV holding wires and GOA unitIt is by drawing at least one standby STV holding wire being connected with GOA unit by cross-over mode on STV holding wires.
Further, the STV is provided with more than two, is arranged on outermost and array base palte source ground holding wireAt least one standby STV holding wire being connected with GOA unit by cross-over mode is drawn on an adjacent STV holding wire.
Further, electrostatic protection apparatus are provided between the STV holding wires and the source ground holding wire of array base palte,The electrostatic protection apparatus include nesa coating, and the nesa coating is led with STV holding wires and source ground holding wireLead to and formed electric capacity, by first on array base palte between the nesa coating, STV holding wires and source ground holding wirePassivation layer insulate.
Further, at least one via on the nesa coating Jing array base paltes is connected with source ground holding wireConducting.
Further, the first passivation layer via hole and organic photoresistance film layer mistake on the nesa coating Jing array base paltesHole is connected conducting with source ground holding wire.
Further, the STV holding wires are provided with least two, are arranged on outermost adjacent with source ground holding wireA STV holding wire Jing nesa coating and source ground holding wire turn on.
Present invention also offers a kind of array base palte, including described GOA circuits.
Present invention also offers a kind of liquid crystal panel, including described GOA circuits.
The present invention compared with prior art, by setting between the earth terminal of STV holding wires and GOA unit or GOA circuitsPut electrostatic protection apparatus, so as to solve the problems, such as damage by static electricity STV holding wires, prevent GOA circuits it is positive and negative sweep failure or GOA it is mono-The problem of unit's failure.
Description of the drawings
Fig. 1 is the structural representation of the embodiment of the present invention 1.
Fig. 2 is the structural representation of the embodiment of the present invention 2.
Fig. 3 is the profile of the embodiment of the present invention 2.
Specific embodiment
With reference to the accompanying drawings and examples the present invention is described in further detail.
STV holding wires 1 general in prior art are generally arranged at the outermost of GOA circuits, are so highly susceptible to quietElectric burn.
In the present invention, STV holding wires 1 include but is not limited to this, and defined herein STV holding wires are only for the purposes of to the present inventionMiddle position relationship is described, and the inventive point of the present invention is only to need to arrange electrostatic on an outermost STV holding wirePreventer.
A kind of GOA circuits of the present invention, at least one STV holding wire being connected including GOA unit and with GOA unit,Electrostatic protection apparatus are provided between the STV holding wires 1 and the source ground holding wire 2 of GOA unit or array base palte.
It is illustrated in figure 1 the GOA circuits of the embodiment of the present invention 1, figure acceptance of the bid shows two STV holding wires 1, wherein oneFor STV_D2U signal input lines 8 (for being scanned from bottom to up, i.e., counter to sweep), another is STV_U2D signal input lines 9(for being scanned from top to bottom, i.e., just sweeping), it is electric that the STV_U2D signal input lines 9 in the STV holding wires 1 are arranged on GOAOutermost in road is adjacent with source ground holding wire (GND) 2 of array base palte, is arranged on outermost and source ground signalAt least one standby STV letter being connected with GOA unit by cross-over mode is drawn on the adjacent STV_U2D signal input lines 9 of line 2Number line (STV_U2D signal input lines) 3, so as to space signal input can be provided when outermost STV holding wires wound,Can prevent GOA circuits it is positive and negative sweep failure live GOA unit failure problem.
It is illustrated in figure 2 the GOA circuits of the embodiment of the present invention 2, figure acceptance of the bid shows two STV holding wires 1, wherein oneFor STV_D2U signal input lines 8 (for being scanned from bottom to up, i.e., counter to sweep), another is STV_U2D signal input lines 9(for being scanned from top to bottom, i.e., just sweeping), it is electric that the STV_U2D signal input lines 9 in the STV holding wires 1 are arranged on GOAOutermost in road is adjacent with source ground holding wire (GND) 2 of array base palte, and the STV_U2D signal input lines 9 are connect with source electrodeElectrostatic protection apparatus are provided between earth signal line (GND) 2, and the electrostatic protection apparatus include nesa coating 4, as shown in figure 3,The nesa coating 4 is connected with STV_U2D signal input lines 9 and source ground holding wire 2 and turns on and formed electric capacity 10, instituteState between nesa coating 4, STV_U2D signal input lines 9 and source ground holding wire 2 by the first passivation on array base palteLayer 12 insulate, and is located between ILD (inter-level dielectric) in the via of insulating barrier 13 in source ground holding wire 2, insulating barrier 13 between ILDOn gate insulator 14;By the electric charge accumulated on outermost STV holding wires 1 is led by source ground holding wire 2Go out, so as to protect to STV holding wires, prevent the damage by static electricity that accumulation of static electricity is caused.
In example 2, the nesa coating 4 is connected with the source ground holding wire (GND) 2 of array base palte through holeConducting, specifically, as shown in figure 3, the first passivation layer via hole 6 on 4 the first passivation layers of Jing (PV layers) 12 of nesa coating andOrganic photoresistance film layer via 7 of organic photoresistance film layer (PLN layers) 15 is connected conducting with the source ground holding wire 2 of array base palte.
A kind of array base palte and liquid crystal panel of the present invention, includes above-mentioned GOA circuits, due to above rightGOA circuit parts are described, and here is not being repeated.
Although illustrating and describing the present invention with reference to specific embodiment, it should be appreciated by those skilled in the art that:In the case of without departing from the spirit and scope of the present invention limited by claim and its equivalent, can here carry out form andVarious change in details.

Claims (9)

CN201611254293.1A2016-12-302016-12-30GOA (gate driver on array) circuit, array substrate and liquid crystal panelPendingCN106526929A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
CN201611254293.1ACN106526929A (en)2016-12-302016-12-30GOA (gate driver on array) circuit, array substrate and liquid crystal panel

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
CN201611254293.1ACN106526929A (en)2016-12-302016-12-30GOA (gate driver on array) circuit, array substrate and liquid crystal panel

Publications (1)

Publication NumberPublication Date
CN106526929Atrue CN106526929A (en)2017-03-22

Family

ID=58335664

Family Applications (1)

Application NumberTitlePriority DateFiling Date
CN201611254293.1APendingCN106526929A (en)2016-12-302016-12-30GOA (gate driver on array) circuit, array substrate and liquid crystal panel

Country Status (1)

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CN (1)CN106526929A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN108508663A (en)*2018-03-142018-09-07深圳市华星光电技术有限公司Array substrate, display panel and display device
CN109375442A (en)*2018-12-202019-02-22深圳市华星光电半导体显示技术有限公司Display panel and display device
CN111223456A (en)*2019-11-062020-06-02深圳市华星光电半导体显示技术有限公司Grid drive circuit of display panel, display panel and display device
WO2020253302A1 (en)*2019-06-182020-12-24京东方科技集团股份有限公司Electrode structure, capacitor, goa circuit, array substrate, and display panel and device
WO2021103145A1 (en)*2019-11-252021-06-03深圳市华星光电半导体显示技术有限公司Goa circuit and display panel comprising the goa circuit
CN115308942A (en)*2022-08-302022-11-08惠科股份有限公司Array substrate and display panel
CN115542593A (en)*2022-08-302022-12-30惠科股份有限公司Display panel

Citations (6)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN103227173A (en)*2013-04-102013-07-31京东方科技集团股份有限公司Array substrate, manufacturing method thereof and display device
CN203811938U (en)*2014-05-142014-09-03北京京东方光电科技有限公司 Display panel and display device
CN104090436A (en)*2014-06-262014-10-08京东方科技集团股份有限公司Gate line drive circuit of array substrate and display device
CN104882451A (en)*2015-05-252015-09-02京东方科技集团股份有限公司Array substrate and manufacturing method thereof, display panel and display apparatus
CN105093751A (en)*2015-08-182015-11-25京东方科技集团股份有限公司ESD preventing GOA layout design
US20160284293A1 (en)*2014-07-172016-09-29Shenzhen China Star Optoelectronics Technology Co., Ltd.Self-compensating gate driving circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN103227173A (en)*2013-04-102013-07-31京东方科技集团股份有限公司Array substrate, manufacturing method thereof and display device
CN203811938U (en)*2014-05-142014-09-03北京京东方光电科技有限公司 Display panel and display device
CN104090436A (en)*2014-06-262014-10-08京东方科技集团股份有限公司Gate line drive circuit of array substrate and display device
US20160284293A1 (en)*2014-07-172016-09-29Shenzhen China Star Optoelectronics Technology Co., Ltd.Self-compensating gate driving circuit
CN104882451A (en)*2015-05-252015-09-02京东方科技集团股份有限公司Array substrate and manufacturing method thereof, display panel and display apparatus
CN105093751A (en)*2015-08-182015-11-25京东方科技集团股份有限公司ESD preventing GOA layout design

Cited By (11)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN108508663A (en)*2018-03-142018-09-07深圳市华星光电技术有限公司Array substrate, display panel and display device
CN109375442A (en)*2018-12-202019-02-22深圳市华星光电半导体显示技术有限公司Display panel and display device
CN109375442B (en)*2018-12-202021-08-06深圳市华星光电半导体显示技术有限公司Display panel and display device
WO2020253302A1 (en)*2019-06-182020-12-24京东方科技集团股份有限公司Electrode structure, capacitor, goa circuit, array substrate, and display panel and device
US11803088B2 (en)2019-06-182023-10-31Beijing Boe Technology Development Co., Ltd.Electrode structure, capacitor, goa circuit, array substrate, display panel and display device
CN111223456A (en)*2019-11-062020-06-02深圳市华星光电半导体显示技术有限公司Grid drive circuit of display panel, display panel and display device
WO2021103145A1 (en)*2019-11-252021-06-03深圳市华星光电半导体显示技术有限公司Goa circuit and display panel comprising the goa circuit
US11521528B2 (en)2019-11-252022-12-06Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.GOA circuit and display panel including same
CN115308942A (en)*2022-08-302022-11-08惠科股份有限公司Array substrate and display panel
CN115542593A (en)*2022-08-302022-12-30惠科股份有限公司Display panel
CN115542593B (en)*2022-08-302023-08-25惠科股份有限公司display panel

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DateCodeTitleDescription
C06Publication
PB01Publication
SE01Entry into force of request for substantive examination
SE01Entry into force of request for substantive examination
RJ01Rejection of invention patent application after publication
RJ01Rejection of invention patent application after publication

Application publication date:20170322


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