技术领域technical field
本发明涉及信道编码技术领域，具体涉及一种应用于NAND闪存上的极化码纠错方案。The invention relates to the technical field of channel coding, in particular to a polar code error correction scheme applied to NAND flash memory.
背景技术Background technique
在当今数字技术飞速发展的时代，快闪存储器(NAND闪存)因其非易失性和可擦除性，加之小体积，高速写入/擦除的性能以及更加低廉的每比特价格备受欢迎。目前存储市场上极为火爆的固态硬盘即采用NAND闪存作为存储介质。通过在每个闪存单元中存储多个比特信息，每单元多层型(MLC)NAND闪存因为其极具吸引力的存储密度统治了全球市场。然而密度上的扩大导致该类型闪存受到存储可靠性问题的限制日益加深。因此我们需要选取合适的纠错码(ECC)来解决这一问题。In today's era of rapid development of digital technology, flash memory (NAND flash memory) is popular because of its non-volatility and erasability, combined with small size, high-speed write/erase performance and lower price per bit . At present, the extremely popular solid-state hard disk in the storage market uses NAND flash memory as the storage medium. Multilayer-per-cell (MLC) NAND flash dominates the global market due to its attractive storage density by storing multiple bits of information in each flash cell. However, the increase in density has caused this type of flash memory to be increasingly limited by storage reliability issues. So we need to choose a suitable error correction code (ECC) to solve this problem.
传统的ECC方案采用的是BCH编码、低密度奇偶校验码(LDPC)或两者混合的编码方案。它们是存在局限性的。BCH码受限于其线性性质与判决特点，纠错能力较弱，尤其在低信噪比情况下无法满足实际应用需求；LDPC码的性能十分优良，但是其较长的译码延迟在目前追求高速吞吐性能的存储领域是不合时宜的。The traditional ECC scheme adopts BCH coding, low-density parity-check code (LDPC) or a mixed coding scheme of the two. They are limited. BCH code is limited by its linearity and decision characteristics, and its error correction ability is weak, especially in the case of low signal-to-noise ratio, it cannot meet the actual application requirements; The field of storage with high throughput performance is anachronistic.
发明内容Contents of the invention
为了满足实际应用需求，并减少译码延迟，本发明提出了一种基于极化码(PolarCode)的高效多方案ECC技术，我们称之为“预检测方案”。该技术可以通过对当前NAND闪存的电压扩散情况做出判断，针对不同的电压分布状态，选取相应的极化码译码器(硬判决译码器、量化软判决译码器和纯软判决译码器)来达到译码速度和性能需求上的平衡。In order to meet practical application requirements and reduce decoding delay, the present invention proposes an efficient multi-scheme ECC technology based on Polar Code, which we call "pre-detection scheme". This technology can judge the voltage diffusion of the current NAND flash memory, and select the corresponding polar code decoder (hard decision decoder, quantized soft decision decoder and pure soft decision decoder) for different voltage distribution states. encoder) to achieve a balance between decoding speed and performance requirements.
技术方案：Technical solutions:
一种应用于NAND闪存上的极化码纠错方案，包括步骤：A polar code error correction scheme applied to NAND flash memory, comprising steps:
1)对用户数据进行预处理：用户数据经过文件系统，编码器和映射三步转化为电压信息储存在NAND闪存当中；1) Preprocessing user data: user data is converted into voltage information and stored in NAND flash memory through three steps of file system, encoder and mapping;
2)电压探测器判断当前闪存的电压扩散情况，并依据电压扩散情况决定使用对应的译码器译码；译码器包括硬判决译码器、量化软判决译码器以及纯软判决译码器。2) The voltage detector judges the voltage diffusion of the current flash memory, and decides to use the corresponding decoder to decode according to the voltage diffusion; the decoder includes a hard-decision decoder, a quantized soft-decision decoder, and a pure soft-decision decoder device.
所述用户数据进行预处理具体为：用户数据首先经过文件系统转换为不同格式的二进制比特流，之后通过极化码编码器转变为相应的码字，再将二进制比特流通过格雷码映射到对应的目标电压上。The preprocessing of the user data is specifically as follows: the user data is first converted into binary bit streams of different formats through the file system, and then converted into corresponding codewords through the polar code encoder, and then the binary bit stream is mapped to the corresponding on the target voltage.
所述步骤2)具体为：Described step 2) specifically is:
所述硬判决译码器采用两次电压比较获取电压所在区间，得到对于所存储比特的观测值，产生对数似然比的符号位；并根据对数似然比的符号位信息进行位运算产生译码结果；所述两次电压比较具体为：第一次先判断最低有效位LSB，在此基础上进行第二次判断得到最高有效位MSB；The hard-decision decoder uses two voltage comparisons to obtain the interval of the voltage, obtains the observed value of the stored bit, and generates the sign bit of the log likelihood ratio; and performs bit operations according to the sign bit information of the log likelihood ratio Generate a decoding result; the two voltage comparisons are specifically: the least significant bit LSB is first judged for the first time, and the second judgment is performed on this basis to obtain the most significant bit MSB;
所述量化软判决译码器先行计算重叠区域的边界值，在硬判决比较的基础上，增加电压比较次数，获得电压值所在区间信息，计算得到重叠区域对应的对数似然比；并根据对数似然比进行迭代计算得到译码结果；The quantized soft-decision decoder first calculates the boundary value of the overlapping area, increases the number of voltage comparisons on the basis of the hard-decision comparison, obtains the interval information of the voltage value, and calculates the log likelihood ratio corresponding to the overlapping area; and according to The logarithmic likelihood ratio is iteratively calculated to obtain the decoding result;
所述纯软判决译码器根据电压信息通过概率分布密度函数的估计值计算得到对数似然比；并根据对数似然比进行迭代计算得到译码结果。The pure soft-decision decoder calculates the log likelihood ratio through the estimated value of the probability distribution density function according to the voltage information; and performs iterative calculation according to the log likelihood ratio to obtain the decoding result.
采用所述硬判决译码器时首先将感知到的电压信息和阈值电压V1做比较，得到最低有效位LSB的结果；若LSB＝0则与V0比较；若LSB＝1则与V2比较，得到最高有效位MSB的结果。When using the hard decision decoder, atfirst the perceived voltage information is compared with the threshold voltage V1 to obtain the result of the least significant bit LSB; if LSB=0 then compare with V0; if LSB=1 then compare with V2 Compare to get the most significant bit MSB of the result.
所述量化软判决译码器根据不同的性能需求，对重叠区域进行进一步的划分，对电压进行多次比较。The quantized soft-decision decoder further divides the overlapping area and compares the voltages multiple times according to different performance requirements.
有益效果：本发明针对于传统译码方案中的单一形式作出了改进。当前方案中，大多数均采用“量化软判决方案”。我们提出的硬判决方案和纯软判决方案解决了单一方案在速度和性能上不能兼顾的问题。硬判决方案码字的每一个比特的观测量中所包含的信息量仅为1bit。采用这些1bit信息来产生硬判决译码器所需要LLR的符号位，使译码器在二进制状态下通过位运算来进行译码，极大地提升译码速度；纯软判决方案采用信息量最大的LLR作为译码器输入，保证了恶劣情况下仍有合理的比特错误率，延长了闪存使用寿命。Beneficial effects: the present invention improves the single form in the traditional decoding scheme. Most of the current schemes adopt the "quantized soft decision scheme". The hard-decision scheme and the pure soft-decision scheme we propose solve the problem that the speed and performance of a single scheme cannot be balanced. The amount of information contained in the observation amount of each bit of the codeword of the hard decision scheme is only 1 bit. These 1-bit information are used to generate the sign bit of the LLR required by the hard-decision decoder, so that the decoder can decode through bit operations in the binary state, which greatly improves the decoding speed; the pure soft-decision scheme uses the largest amount of information The LLR is used as the input of the decoder, which ensures a reasonable bit error rate under severe conditions and prolongs the service life of the flash memory.
附图说明Description of drawings
图1展示了整个系统的功能框图和提出的多策略ECC方案。Figure 1 shows the functional block diagram of the entire system and the proposed multi-strategy ECC scheme.
图2展示了2-比特NAND闪存中的目标电压与实际电压分布。虚线所示为目标电压，即存储对应信息的理论电压值。由于电荷流失、单元间干扰等多种原因，闪存中实际的电压分布呈现高斯分布的态势。Figure 2 shows the target and actual voltage distributions in 2-bit NAND flash memory. The dotted line shows the target voltage, that is, the theoretical voltage value for storing corresponding information. Due to various reasons such as charge loss and inter-cell interference, the actual voltage distribution in the flash memory presents a Gaussian distribution.
图3展示了在采用格雷码映射和直接映射方案的对比。Figure 3 shows the comparison between Gray code mapping and direct mapping schemes.
图4展示在硬判决方案下如何将存储的电压信息转化为对码字的估计。Figure 4 shows how the stored voltage information is transformed into an estimate of the codeword under the hard decision scheme.
图5展示量化软判决译码器中对于电压区间的划分。FIG. 5 shows the division of voltage intervals in a quantized soft-decision decoder.
具体实施方式detailed description
下面结合附图对本发明作更进一步的说明。The present invention will be further described below in conjunction with the accompanying drawings.
本发明包括步骤：The present invention comprises steps:
1)用户数据存储阶段预处理1) User data storage stage preprocessing
不同用户在不同操作系统中的数据在最终存储前，都会在其文件系统中转换为不同格式的二进制数字信息。为了保证这些被存储的信息可以被完整地恢复，我们向其中添加冗余信息来抗干扰。因此文件系统输出的二进制比特将在被分段后首先通过极化码编码器(Polar Encoder)转变为相应的码字。The data of different users in different operating systems will be converted into binary digital information in different formats in their file systems before final storage. In order to ensure that the stored information can be completely restored, we add redundant information to it to resist interference. Therefore, the binary bits output by the file system will first be converted into corresponding codewords through a polar code encoder (Polar Encoder) after being segmented.
对于2-比特/单元的MLC闪存而言，比特流c将被两比特一组映射到对应的目标电压上(详见图3)。具体的映射方式采用格雷码(Gray Code)，其相邻码字间的汉明距离(Hamming Distance)为1；而电压判断出错也只发生在相邻状态。故采用这种映射方式可以获得最大的编码增益。For a 2-bit/cell MLC flash memory, the bit stream c will be mapped to the corresponding target voltage in groups of two bits (see FIG. 3 for details). The specific mapping method adopts Gray code (Gray Code), and the Hamming distance (Hamming Distance) between adjacent code words is 1; and voltage judgment errors only occur in adjacent states. Therefore, the maximum coding gain can be obtained by using this mapping method.
至此，原始的用户信息经过文件系统、编码器和映射三步后已经转化为电信息储存在了NAND闪存当中，预处理工作完成。So far, the original user information has been converted into electrical information and stored in NAND flash memory after three steps of file system, encoder and mapping, and the preprocessing work is completed.
2)电压感知与原始电信号处理2) Voltage sensing and raw electrical signal processing
电压探测器将首先判断当前闪存的电压扩散情况，从而决定使用对应的译码器。对于硬判决译码器，采用类似于牛顿二分法利用格雷码(Gray Code)映射相邻两状态仅一个比特位有区别的特性，通过两次电压比较，第一次先判断最低有效位(LSB)，在此基础上进行第二次判断得到最高有效位(MSB)，得到的MSB与LSB值即为所存储比特的观测值(详见图4)，产生对数似然比(LLR)的符号位；对于量化软判决译码器，需要先行计算重叠区域的边界值，在硬判决比较的基础上，增加电压比较次数，获得电压值所在区间信息后，计算该区域对应的LLR；对于纯软判决译码器，在得到电压信息后，The voltage detector will first judge the voltage spread of the current flash memory, so as to decide to use the corresponding decoder. For the hard-decision decoder, similar to Newton's dichotomy method, Gray Code (Gray Code) is used to map the characteristics of only one bit difference between two adjacent states. After two voltage comparisons, the least significant bit (LSB) is first judged first. ), on this basis, the second judgment is made to obtain the most significant bit (MSB), and the obtained MSB and LSB values are the observed values of the stored bits (see Figure 4 for details), and the resulting log-likelihood ratio (LLR) sign bit; for the quantized soft-decision decoder, it is necessary to calculate the boundary value of the overlapping area first, and increase the number of voltage comparisons on the basis of the hard-decision comparison, and calculate the LLR corresponding to the area after obtaining the interval information of the voltage value; for pure Soft-decision decoder, after obtaining the voltage information,
直接通过对于概率分布密度函数(PDF)的估计值进行计算来获取需要的LLR。The required LLR is obtained directly by calculating the estimated value of the probability distribution density function (PDF).
3)处理得到的似然比信息送入对应译码器译码3) The likelihood ratio information obtained by processing is sent to the corresponding decoder for decoding
译码器得到对应的LLR后，会进行相应的迭代计算。硬判决译码器仅需要LLR的符号位信息在二进制域内进行位运算产生译码结果，速度最快，性能最低；量化软判决与纯软判决译码器的构造上并没有区别，其性能区别在于输入译码器的LLR与原始信息的匹配程度。After the decoder obtains the corresponding LLR, it performs corresponding iterative calculations. The hard-decision decoder only needs the sign bit information of the LLR to perform bit operations in the binary domain to generate the decoding result, which is the fastest and the lowest in performance; there is no difference in the structure of the quantized soft-decision decoder and the pure soft-decision decoder, and their performance is different It depends on how well the LLR of the input decoder matches the original information.
针对用户数据存储阶段预处理，参照图1的上半部分。我们假设原始信息(即文件系统输出的二进制比特流)为x,被分为n段，则有：For the preprocessing of the user data storage stage, refer to the upper part of Figure 1. We assume that the original information (that is, the binary bit stream output by the file system) is x, which is divided into n segments, then:
每段信息通过编码器后变为码字ci，则编码器输出的二进制比特流为：Each piece of information becomes a code word ci after passing through the encoder, then the binary bit stream output by the encoder is:
如图4，采用硬判决译码器时将首先将感知到的电压和阈值电压V1做比较，得到LSB的结果。若LSB＝0则与V0比较；若LSB＝1则与V2比较，得到MSB结果；将模拟信息转化为数字信息。其中，LSB(Least Significant Bit)为最低有效位，MSB(Most Significant Bit)为最高有效位；V0和V1分别为MSB在LSB为0和1时的判决门限。As shown in Figure 4, when a hard-decision decoder is used, the perceived voltage will be compared with the threshold voltage V1 to obtain the LSB result. If LSB=0, compare it with V0 ; if LSB=1, compare it with V2 to get the MSB result; convert the analog information into digital information. Among them, LSB (Least Significant Bit) is the least significant bit, MSB (Most Significant Bit) is the most significant bit; V0 and V1 are the judgment thresholds of MSB when LSB is 0 and 1, respectively.
即：三个门限将电压分布分为4个区域，分别对应四种不同的存储信息；逐比特来看：That is: the three thresholds divide the voltage distribution into four areas, corresponding to four different storage information; bit by bit:
V1为LSB门限，即感知电压＜V1，LSB＝0；感知电压>V1，LSB＝1；V1 is the LSB threshold, that is, the sensed voltage<V1 , LSB=0; the sensed voltage>V1 , LSB=1;
V0、V2为MSB门限；V0 and V2 are MSB thresholds;
LSB＝0时感知电压＜V0，MSB＝0，感知电压>V0，MSB＝1；When LSB=0, the sensing voltage<V0 , MSB=0, sensing voltage>V0 , MSB=1;
LSB＝1时感知电压＜V2，MSB＝1，感知电压>V2，MSB＝0。When LSB=1, the sensed voltage<V2 , MSB=1, when the sensed voltage>V2 , MSB=0.
可以看到，硬判决方案中，码字的每一个比特的观测量中所包含的信息量也仅为1bit。我们采用这些1bit信息来产生硬判决译码器所需要LLR的符号位，使译码器在二进制状态下通过位运算来进行译码。It can be seen that, in the hard decision scheme, the amount of information contained in the observation amount of each bit of the codeword is only 1 bit. We use these 1-bit information to generate the sign bit of the LLR required by the hard-decision decoder, so that the decoder can decode through bit operations in the binary state.
如图5，随着使用时间增长，电压分布逐渐“扩散”，两个相邻的电压状态会发生重叠，此时硬判决方案会带来较大的偏差。我们需要增加电压比较的次数来增加输入译码器的信息量。As shown in Figure 5, as the use time increases, the voltage distribution gradually "spreads", and two adjacent voltage states will overlap. At this time, the hard decision scheme will bring a large deviation. We need to increase the number of voltage comparisons to increase the amount of information input to the decoder.
我们首先根据量化软判决译码器重叠边界计算方程计算出三组重叠边界的边界电压。根据不同的性能需求，我们可以对重叠区域进行进一步的划分，对电压进行多次比较，获得更加准确的信息。We first calculate the boundary voltages of the three sets of overlapping boundaries according to the overlapping boundary calculation equation of the quantized soft-decision decoder. According to different performance requirements, we can further divide the overlapping area and compare the voltage multiple times to obtain more accurate information.
量化软判决译码器重叠边界计算方程Computation Equation of Overlapping Boundary in Quantized Soft Decision Decoder
其中，和μk分别为高斯分布p(k)的方差和均值；Bl(k)和Br(k)是重叠区域的下界和上界。in, and μk are the variance and mean of the Gaussian distribution p(k) , respectively; Bl(k) and Br(k) are the lower and upper bounds of the overlapping region.
经过之前两个步骤，我们已经将整个电压分布划分为n个不同的区间[R1,R2,…，Rn]，并且已知读取到的电压位于某一个区间Ri中，则我们可以通过量化软判决译码器对应区域LLR计算方程来分别计算出两个比特的LLR。After the previous two steps, we have divided the entire voltage distribution into n different intervals [R1 , R2 ,…, Rn ], and we know that the read voltage is located in a certain interval Ri , then we The LLRs of the two bits can be calculated respectively by quantizing the LLR calculation equation of the corresponding area of the soft-decision decoder.
量化软判决译码器对应区域LLR计算方程Quantized Soft Decision Decoder Corresponding Area LLR Calculation Equation
对于纯软判决译码器，我们不再对电压区间进行划分。为了得到最高的输入信息量，我们直接在感知到的电压x处分别求出四个概率密度，即p(0)(x),p(1)(x),p(2)(x),p(3)(x)，根据纯软判决译码器在读取电压为x时的LLR计算方程计算LLR。For pure soft-decision decoders, we no longer divide the voltage intervals. In order to obtain the highest amount of input information, we directly calculate four probability densities at the perceived voltage x, namely p(0) (x), p(1) (x), p(2) (x), p(3) (x), calculate the LLR according to the LLR calculation equation of the pure soft decision decoder when the read voltage is x.
纯软判决译码器在读取电压为x时的LLR计算方程The LLR Calculation Equation of Pure Soft Decision Decoder When the Reading Voltage is x
通过对接收到的码字观测量中的每一个比特求LLR，我们得到了译码器的输入信息。将这些信息输入译码器，即可得到对存储信息的估计：By calculating the LLR for each bit in the received codeword observation, we get the input information of the decoder. Input this information into the decoder to get an estimate of the stored information:
在比特错误率(Bit Error Rate，BER)允许的情况下，我们可以认为：When the bit error rate (Bit Error Rate, BER) is allowed, we can think that:
本发明首次在NAND闪存中采用极化码作为纠错码(ECC)，并且针对不同的使用阶段提供了三种不同的译码方案来满足性能需要。在本发明中译码器并不局限于极化码，只要是采用软信息作为输入的译码器均适用。针对不同电压分布状态产生的是信息量不同的LLR，因为输入信息量不同，所以才会有不同的译码增益；采用LLR的符号位译码(硬判决译码器)无法通用，需要特别设计；量化软判据和纯软判决采用的是LLR，是可以适配其它译码器。The present invention adopts polar codes as error correction codes (ECC) in NAND flash memory for the first time, and provides three different decoding schemes for different use stages to meet performance requirements. In the present invention, the decoder is not limited to polar codes, and any decoder that uses soft information as input is applicable. For different voltage distribution states, LLRs with different amounts of information are generated. Because the amount of input information is different, there will be different decoding gains; the sign bit decoding (hard decision decoder) using LLRs cannot be used universally and requires special design ; Quantization soft criterion and pure soft decision use LLR, which can be adapted to other decoders.
在本发明中，选择哪个译码器需要根据具体情况来分析；三种译码器能够提供不同的译码性能，相对应的电压扩散情况要看具体应用中对于性能的不同要求，在仿真环境下，一般采用信噪比作为判决条件；但是实际应用过程中只要能够达到性能要求，则会尽量采用架构最简单的译码器。In the present invention, which decoder to choose needs to be analyzed according to the specific situation; the three kinds of decoders can provide different decoding performances, and the corresponding voltage diffusion depends on the different requirements for performance in specific applications. In the simulation environment In general, the signal-to-noise ratio is generally used as the decision condition; however, as long as the performance requirements can be met in the actual application process, the decoder with the simplest structure will be used as much as possible.
本发明具有很强的通用性，对于市场上的SLC,MLC以及TLC产品均可作为解决方案使用。映射过程中仍采用格雷码，比特分组长度对应于1-bit，2-bit与3-bit。电压读取逻辑仍可MLC的方式进行相应的缩减与扩展，以满足SLC于TLC产品的要求。The invention has strong versatility and can be used as a solution for SLC, MLC and TLC products on the market. The Gray code is still used in the mapping process, and the length of the bit group corresponds to 1-bit, 2-bit and 3-bit. The voltage reading logic can still be reduced and expanded in the form of MLC to meet the requirements of SLC and TLC products.
以上所述仅是本发明的优选实施方式，应当指出：对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。The above is only a preferred embodiment of the present invention, it should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications are also possible. It should be regarded as the protection scope of the present invention.
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