Movatterモバイル変換


[0]ホーム

URL:


CN105914135A - Forming method of semiconductor device - Google Patents

Forming method of semiconductor device
Download PDF

Info

Publication number
CN105914135A
CN105914135ACN201610377444.6ACN201610377444ACN105914135ACN 105914135 ACN105914135 ACN 105914135ACN 201610377444 ACN201610377444 ACN 201610377444ACN 105914135 ACN105914135 ACN 105914135A
Authority
CN
China
Prior art keywords
layer
semiconductor device
substrate
hole
protective layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610377444.6A
Other languages
Chinese (zh)
Inventor
王健鹏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Original Assignee
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huahong Grace Semiconductor Manufacturing CorpfiledCriticalShanghai Huahong Grace Semiconductor Manufacturing Corp
Priority to CN201610377444.6ApriorityCriticalpatent/CN105914135A/en
Publication of CN105914135ApublicationCriticalpatent/CN105914135A/en
Pendinglegal-statusCriticalCurrent

Links

Classifications

Landscapes

Abstract

The invention provides a forming method of a semiconductor device. The method comprises the steps of: providing a substrate structure, wherein the substrate structure comprises a protection layer and a top substrate arranged on the surface of the protection layer; forming a functional layer on the surface of the top substrate; forming a through hole penetrating through the functional layer and the top substrate; and the through hole is formed, removing the protection layer. The substrate structure comprises the protection layer, so that after the through hole is formed, the substrate structure is thinned by the removing of the protection layer. In the substrate structure thinning process, the surface of the top substrate is provided with the protection layer, so that the protection layer is capable of preventing the edge of the through hole arranged in the functional layer and the top substrate from being damaged, and the fracturing rate is lowered. In addition, in the through hole forming process, the substrate structure is not thinned, so that the substrate structure is capable of providing a process platform with a good support capability, and the fracturing rate is lowered.

Description

The forming method of semiconductor device
Technical field
The present invention relates to field of semiconductor manufacture, particularly relate to the forming method of a kind of semiconductor device.
Background technology
In the semiconductor device, it usually needs form the through hole running through functional layer on substrate and substrate, withRealize corresponding function, such as, quasiconductor sieves, silicon through hole (Through Silicon Via, TSV)Structure etc..
Quasiconductor sieves is a kind of parts in MEMS.Quasiconductor sieves need formation to pass throughWear the through hole of functional layer on substrate and substrate.
MEMS (Micro Electromechanical System, MEMS) is a kind of important halfConductor device, MEMS refers to that size is several millimeters or even less high-tech device, its internal junctionStructure, typically in micron even nanometer scale, is an independent intelligence system.MEMS is mainly by passingSensor, action device (executor) and micro-energy three parts composition.MEMS relate to physics,Quasiconductor, optics, electronic engineering, chemistry, material engineering, mechanical engineering, medical science, information engineering andThe multiple subject such as biological engineering and engineering, for intelligence system, consumer electronics, wearable device, intelligenceWide purposes has been opened up in the fields such as energy household, the synthetic biology of Systems biotechnology and microflow control technique.
Meanwhile, the substrate of semiconductor device needs thinning, and at present, the thickness of substrate can be thinned to200 μm~500 μm.
But, prior art is while organic semiconductor device, and the fragment rate of semiconductor device is higher.
Summary of the invention
The problem that the present invention solves is to provide the forming method of a kind of semiconductor device, in organic semiconductor device structureWhile reduce the fragment rate of semiconductor device.
For solving the problems referred to above, the present invention provides the forming method of a kind of semiconductor device, including: provideSubstrat structure, described substrat structure includes protective layer and is positioned at the top layer substrate of protective layer;DescribedTop layer substrate surface forms functional layer;Formed and run through described functional layer and the through hole of top layer substrate;Formed logicalKong Hou, removes protective layer.
Optionally, described substrat structure is substrat structure on insulator.
Optionally, described protective layer includes at the bottom of back lining and is positioned at the insulating barrier of back lining basal surface;DescribedInsulating barrier is at the bottom of back lining and between top layer substrate.
Optionally, on described insulator, substrat structure is silicon-on-insulator or germanium on insulator.
Optionally, the method forming described through hole includes: form patterned covering on described functional layer surfaceFilm layer;With described patterned mask layer as mask, use anisotropy dry carving technology etching functional layer andTop layer substrate, until exposing protective layer, forms through hole.
Optionally, described through hole also extends through protective layer.
Optionally, the method forming described through hole includes: form patterned covering on described functional layer surfaceFilm layer;With described patterned mask layer as mask, employing anisotropy dry carving technology etching functional layer,Top layer substrate and protective layer, until cutting through protective layer, form through hole.
Optionally, the method removing described protective layer includes: use the first etching technics to remove at the bottom of back lining;After removing at the bottom of back lining, the second etching technics is used to remove insulating barrier.
Optionally, the method removing described protective layer includes: make at the bottom of back lining and top by removing insulating barrierLayer substrate separates, to remove protective layer.
Optionally, the thickness of described top layer substrate is 10 μm~100 μm.
Compared with prior art, technical scheme has the advantage that
The forming method of the semiconductor device that the present invention provides, owing to described substrat structure includes protective layer,Therefore after forming through hole, it is possible to by removing protective layer with organic semiconductor device structure.In organic semiconductor device structureDuring, top layer substrate surface has protective layer, and therefore, described protective layer can be protected and be positioned at functional layerDo not sustain damage with the through hole edge in top layer substrate, thus reduce fragment rate.It addition, forming through holeTime, described substrat structure is not thinned so that described substrat structure can provide the work of excellent support abilitySkill platform, it is to avoid fragment occurs.While organic semiconductor device structure, i.e. reduce the fragment of semiconductor deviceRate.
Accompanying drawing explanation
Fig. 1 to Fig. 3 is the structural representation of a kind of semiconductor device forming process;
Fig. 4 to Fig. 6 is the structural representation of another kind of semiconductor device forming process;
Fig. 7 to Figure 10 is the structural representation of semiconductor device forming process in one embodiment of the invention;
Figure 11 to Figure 12 is the structural representation of semiconductor device forming process in another embodiment of the present invention.
Detailed description of the invention
As described in background, the fragment rate of the semiconductor device formed in prior art is higher.
Fig. 1 to Fig. 3 is the structural representation of a kind of semiconductor device forming process.
With reference to Fig. 1, it is provided that Semiconductor substrate 100, described Semiconductor substrate 100 has the first relative tableFace and second surface;Functional layer 110 is formed at first surface.
With reference to Fig. 2, form the first through hole 120 running through functional layer 110 and Semiconductor substrate 100.
With reference to Fig. 3, after forming the first through hole 120, use grinding technics along the thinning quasiconductor of second surfaceSubstrate 100.
In said method, owing to being initially formed the first through hole running through functional layer 110 and Semiconductor substrate 100120, rear thinning Semiconductor substrate 100, and second surface is constantly exposed in the grinding environment of grinding technics,Therefore causing during thinning Semiconductor substrate 100, the first through hole 120 is at the edge of second surfaceThe edge that by the mechanicals efforts in grinding technics, can cause the first through hole 120 forms damage.FirstThe damage at through hole 120 edge easily further expands in technical process, thus causes semiconductor deviceThere is fragment.
To this end, Fig. 4 to Fig. 6 proposes the structural representation of another kind of semiconductor device forming process.
It is the schematic diagram formed on the basis of Fig. 1 with reference to Fig. 4, Fig. 4, is formed and run through the of functional layer 110Two through holes 220.
With reference to Fig. 5, after forming the second through hole 220, use grinding technics along the thinning quasiconductor of second surfaceSubstrate 100.
With reference to Fig. 6, after thinning Semiconductor substrate 100, cut through quasiconductor lining along described second through hole 220The end 100, described second through hole 220 is made to extend in Semiconductor substrate 100.
But, during the thinning Semiconductor substrate of second surface 100, described grinding technics depends onBy mechanicals efforts by thinning for Semiconductor substrate 100, when Semiconductor substrate 100 is thinned to a certain degree,Described Semiconductor substrate 100 is born the ability of mechanicals efforts and is reduced, and is susceptible to fragment.
Secondly, when cutting through Semiconductor substrate 100 along the second through hole 220, described Semiconductor substrate 100Being thinned, caused during cutting through Semiconductor substrate 100, Semiconductor substrate 100 can not carryFor the technique platform of excellent support ability, easily during technological operation, there is fragment.
On this basis, the present invention provides the forming method of a kind of semiconductor device, including: substrate is providedStructure, described substrat structure includes protective layer and is positioned at the top layer substrate of protective layer;At described top layerSubstrate surface forms functional layer;Formed and run through described functional layer and the through hole of top layer substrate;After forming through hole,Remove protective layer.
Owing to described substrat structure includes protective layer, after therefore forming through hole, it is possible to by removing protective layerWith organic semiconductor device structure.During organic semiconductor device structure, top layer substrate surface has protective layer, because ofThis, described protective layer can protect the through hole edge being positioned in functional layer and top layer substrate not sustain damage,Thus reduce fragment rate.It addition, when forming through hole, described substrat structure is not thinned so that describedSubstrat structure can provide the technique platform of excellent support ability, it is to avoid fragment occurs.
Understandable, below in conjunction with the accompanying drawings for enabling the above-mentioned purpose of the present invention, feature and advantage to become apparent fromThe specific embodiment of the present invention is described in detail.
Fig. 7 to Figure 10 is the structural representation of semiconductor device forming process in one embodiment of the invention.
With reference to Fig. 7, it is provided that substrat structure, described substrat structure includes protective layer and is positioned at protective layerTop layer substrate 320.
The thickness of described top layer substrate 320 is 10 μm~100 μm, as 10 μm, 20 μm, 50 μm, 80 μm,100μm。
In the present embodiment, described substrat structure is substrat structure on insulator, substrate knot on described insulatorStructure can be silicon-on-insulator or germanium on insulator.
When described substrat structure is substrat structure on insulator, described protective layer includes at the bottom of back lining 300Be positioned at the insulating barrier 310 on 300 surfaces at the bottom of back lining, described insulating barrier 310 is positioned at 300 He at the bottom of back liningBetween top layer substrate 320.
Accordingly, at the bottom of top layer substrate 320 and back lining, the material of 300 is silicon or germanium.When described top layer serves as a contrastWhen at the end 320 and back lining, the material of 300 is silicon, the material of described insulating barrier 310 is silicon oxide;WhenWhen at the bottom of described top layer substrate 320 and back lining, the material of 300 is germanium, the material of described insulating barrier 310 isGermanium oxide.
It should be noted that in other embodiments, described protective layer is single layer structure, accordingly, and instituteThe material stating protective layer is oxide, such as silicon oxide or germanium oxide.
When described protective layer is single layer structure, the forming process of described substrat structure is: provide top layer liningThe end, described top layer substrate has relative first surface and second surface;Formed at described first surface and protectSheath.
The technique forming protective layer at first surface includes adhesion process, coating process or depositing operation.InstituteState top layer substrate to be formed by carrying out thinning to the initial substrate provided.
With reference to Fig. 8, form functional layer 330 on described top layer substrate 320 surface.
Described functional layer 330 is monofilm or multilayer film.
Can also be formed with semiconductor structure in described functional layer 330, described semiconductor structure is PMOSTransistor, nmos pass transistor, resistance or electric capacity.
When described protective layer is single layer structure, form functional layer at described second surface.
With reference to Fig. 9, form the through hole 340 running through described functional layer 330 and top layer substrate 320.
The method forming described through hole 340 includes: form patterned covering on described functional layer 330 surfaceFilm layer (not shown);With described patterned mask layer as mask, use anisotropy dry carving technology etchingFunctional layer 330 and top layer substrate 320, until exposing protective layer, form through hole 340.
Concrete, in the present embodiment, with described patterned mask layer as mask, use anisotropic dryCarving technology etching functional layer 330 and top layer substrate 320 are until exposing the surface of insulating barrier 310.
It should be noted that in other embodiments, it is also possible to it is: with described patterned mask layer beMask, use wet-etching technology etching functional layer and top layer substrate until exposing protective layer, shapeBecome through hole.
When forming through hole 340, described substrat structure is not thinned so that described substrat structure can carryTechnique platform for excellent support ability, it is to avoid fragment occurs.
With reference to Figure 10, after forming through hole 340, remove protective layer.
In the present embodiment, the method removing described protective layer includes: use the first etching technics to remove bottomSubstrate 300 (with reference to Fig. 9);After removing at the bottom of back lining 300, the second etching technics is used to remove insulating barrier310 (with reference to Fig. 9).
First etching technics and the second etching technics are wet-etching technology or dry etch process.
Due at the bottom of back lining 300 and insulating barrier 310 in different steps, etch removal respectively, therefore makeObtain in the first etching technics and the second etching technics separate.During at the bottom of removal back lining 300,First etching technics can select first etching gas corresponding with the material of 300 at the bottom of back lining.RemovingDuring insulating barrier 310, the second etching technics can select corresponding with the material of insulating barrier 310Two etching gas.Make at the bottom of back lining 300 and insulating barrier 310 all can readily be removed.
In another embodiment, the method removing described protective layer includes: make the end by removing insulating barrierLayer substrate separates with top layer substrate, to remove protective layer.
When making to separate with top layer substrate at the bottom of back lining to remove protective layer by removal insulating barrier, due to onlyNeed insulating barrier performs etching the purpose that just can reach to remove protective layer so that technique is simplified.
In other embodiments, when described protective layer is single layer structure, use dry carving technology or wet etching workSkill removes described protective layer in one step.
Removing after protective layer, the thickness of substrat structure is 10 μm~100 μm, as 10 μm, 20 μm, 50 μm,80μm、100μm。
Owing to described substrat structure includes protective layer, after therefore forming through hole 340, it is possible to protected by removalSheath is with organic semiconductor device structure.During organic semiconductor device structure, top layer substrate 320 surface has guarantorSheath, therefore, described protective layer can protect the through hole being positioned in functional layer 330 and top layer substrate 320Edge does not sustains damage, thus reduces fragment rate.
The method for forming semiconductor devices that the present embodiment provides, reduces half while organic semiconductor device structureThe fragment rate of conductor device.
It should be noted that in the present embodiment, semiconductor device is quasiconductor sieves.Implement at otherIn example, described semiconductor device can be other semiconductor device.Accordingly, it is also desirable in functional layerWith formation through hole in top layer substrate.
Figure 11 to Figure 12 is the structural representation of semiconductor device forming process in another embodiment of the present invention.
The present embodiment is with the difference of previous embodiment: described through hole also extends in protective layer and runs throughProtective layer.About the part that the present embodiment is identical with previous embodiment, no longer describe in detail.
It is the schematic diagram formed on the basis of Fig. 8 with reference to Figure 11, Figure 11, is formed and run through described functional layer330, the through hole 440 of top layer substrate 320 and protective layer.
Concrete, through hole 440 runs through functional layer 330, top layer substrate 320, insulating barrier 310 and back liningThe end 300.
The method forming described through hole 440 includes: form patterned covering on described functional layer 330 surfaceFilm layer (not shown);With described patterned mask layer as mask, use anisotropy dry carving technology etchingFunctional layer 330, top layer substrate 320 and protective layer, until cutting through protective layer, form through hole 440.
It should be noted that in other embodiments, it is also possible to it is: with described patterned mask layer beMask, use wet-etching technology etching functional layer, top layer substrate and protective layer until cutting through protective layer,Form through hole.
With reference to Figure 12, after forming through hole 440, remove protective layer.
Concrete, after forming through hole 440, remove at the bottom of insulating barrier 310 and back lining 300.
In the present embodiment, the method removing described protective layer includes: use the first etching technics to remove bottomSubstrate 300 (with reference to Figure 11);After removing at the bottom of back lining 300, the second etching technics is used to remove insulating barrier310 (with reference to Figure 11).
First etching technics and the second etching technics, with reference to previous embodiment, no longer describe in detail.
In other embodiments, the method removing described protective layer includes: make bottom by removing insulating barrierSubstrate separates with top layer substrate, to remove protective layer.
When making to separate with top layer substrate at the bottom of back lining by removal insulating barrier, during to remove protective layer, due toHave only to insulating barrier performs etching the purpose that just can reach to remove protective layer so that technique is simplified.
In other embodiments, when described protective layer is single layer structure, use dry carving technology or wet etching workSkill removes described protective layer in one step.
After removing protective layer, the thickness of substrat structure is 10 μm~100 μm.
Although present disclosure is as above, but the present invention is not limited to this.Any those skilled in the art,Without departing from the spirit and scope of the present invention, all can make various changes or modifications, therefore the guarantor of the present inventionThe scope of protecting should be as the criterion with claim limited range.

Claims (10)

CN201610377444.6A2016-05-312016-05-31Forming method of semiconductor devicePendingCN105914135A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
CN201610377444.6ACN105914135A (en)2016-05-312016-05-31Forming method of semiconductor device

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
CN201610377444.6ACN105914135A (en)2016-05-312016-05-31Forming method of semiconductor device

Publications (1)

Publication NumberPublication Date
CN105914135Atrue CN105914135A (en)2016-08-31

Family

ID=56741852

Family Applications (1)

Application NumberTitlePriority DateFiling Date
CN201610377444.6APendingCN105914135A (en)2016-05-312016-05-31Forming method of semiconductor device

Country Status (1)

CountryLink
CN (1)CN105914135A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN109712990A (en)*2019-01-022019-05-03长江存储科技有限责任公司A kind of three-dimensional storage and preparation method thereof

Citations (6)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5702963A (en)*1990-12-311997-12-30Kopin CorporationMethod of forming high density electronic circuit modules
CN1258226C (en)*2002-08-072006-05-31夏普株式会社 Manufacturing method of semiconductor device and semiconductor device
TWI299888B (en)*2006-05-032008-08-11Touch Micro System TechMethod of fabricating micro connectors
US20090253249A1 (en)*2008-04-072009-10-08Sony CorporationMethod of manufacturing semiconductor device
JP2012186229A (en)*2011-03-032012-09-27Univ Of TokyoManufacturing method for single-crystal silicon thin film, manufacturing method for single-crystal silicon thin-film device, manufacturing method for solar cell device, single-crystal silicon thin film, and single-crystal silicon thin-film device and solar cell device including the single-crystal silicon thin film
CN104051421A (en)*2013-03-132014-09-17稳懋半导体股份有限公司 Semiconductor wafer structure combined with substrate through hole and metal bump and its manufacturing method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5702963A (en)*1990-12-311997-12-30Kopin CorporationMethod of forming high density electronic circuit modules
CN1258226C (en)*2002-08-072006-05-31夏普株式会社 Manufacturing method of semiconductor device and semiconductor device
TWI299888B (en)*2006-05-032008-08-11Touch Micro System TechMethod of fabricating micro connectors
US20090253249A1 (en)*2008-04-072009-10-08Sony CorporationMethod of manufacturing semiconductor device
JP2012186229A (en)*2011-03-032012-09-27Univ Of TokyoManufacturing method for single-crystal silicon thin film, manufacturing method for single-crystal silicon thin-film device, manufacturing method for solar cell device, single-crystal silicon thin film, and single-crystal silicon thin-film device and solar cell device including the single-crystal silicon thin film
CN104051421A (en)*2013-03-132014-09-17稳懋半导体股份有限公司 Semiconductor wafer structure combined with substrate through hole and metal bump and its manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN109712990A (en)*2019-01-022019-05-03长江存储科技有限责任公司A kind of three-dimensional storage and preparation method thereof

Similar Documents

PublicationPublication DateTitle
US8324047B1 (en)Method and structure of an integrated CMOS and MEMS device using air dielectric
US7563633B2 (en)Microelectromechanical systems encapsulation process
JP4879749B2 (en) Surface treatment of multilayer wafers formed from layers made of materials selected from semiconductor materials
US9090452B2 (en)Mechanism for forming MEMS device
CN103420327B (en) A method of interface protection applied to patterned SOI material etching process
US9761557B2 (en)CMOS-MEMS integration by sequential bonding method
US10541135B2 (en)Source and drain formation using self-aligned processes
US11167982B2 (en)Semiconductor arrangement and formation thereof
Tasdemir et al.A deep etching mechanism for trench-bridging silicon nanowires
Tu et al.A silicon-on-insulator complementary-metal-oxide-semiconductor compatible flexible electronics technology
CN105914135A (en)Forming method of semiconductor device
US10584029B2 (en)Method for producing thin MEMS chips on SOI substrate and micromechanical component
CN105439081B (en)The forming method of MEMS
CN104347381A (en)Method of manufacturing semiconductor device
WO2016173268A1 (en)Method for forming cavity of sensor chip, method for manufacturing sensor chip, chip and electronic device
CN103311117A (en)Method for corroding Si substrate of sample by wet method
TWI282587B (en)Method of performing double-sided process
CN109075036A (en)It is used to form the manufacturing method of the structure of three dimensional monolithic integrated circuit
CN111627981A (en)In-situ TEM electrical chip easy to expand and process and manufacturing method thereof
CN106477514B (en) MEMS devices and methods of forming them
CN106409673A (en)Method for forming amorphous carbon film and method for manufacturing micro electro mechanical system device
CN106033706A (en)Semiconductor device and method for manufacturing the same
CN104909331B (en)A kind of wafer selectivity bonding method
CN103021812A (en)Method for preparing III-VOI structure
JP2016082130A (en)Substrate device and manufacturing method thereof

Legal Events

DateCodeTitleDescription
C06Publication
PB01Publication
C10Entry into substantive examination
SE01Entry into force of request for substantive examination
RJ01Rejection of invention patent application after publication
RJ01Rejection of invention patent application after publication

Application publication date:20160831


[8]ページ先頭

©2009-2025 Movatter.jp