A kind of fpga chip and preparation method thereofTechnical field
The present invention relates to fpga chip design field, particularly relate to a kind of fpga chip based on 3D nonvolatile memory and preparation method thereof.
Background technology
FPGA and field programmable gate array, it is a kind of semi-custom circuit in special circuit field, has both solved the deficiency of custom circuit, overcomes again the shortcoming that original programming device gate circuit number is limited.A kind of existing fpga chip implementation as shown in Figure 1, adopt static RAM (SRAM) as programming unit (programbit), and the configuration information of bit stream (bitstream) form is present in outside nonvolatile memory.Power at every turn and all need to be programmed into by configuration information in corresponding programming unit from the nonvolatile memory of outside, this fpga chip cost is low, and implementation is simple, but there is potential safety hazard, and outside configuration information easily suffers illegally to steal.
Another kind of fpga chip implementation as shown in Figure 2, fpga chip inside is integrated with nonvolatile memory (such as Flash), power at every turn and directly configuration information is programmed in corresponding programming unit from the nonvolatile memory of inside, fail safe is higher, program speed is also faster, but due to processing compatibility and the scaleability problem of Flash, realizing cost can promote greatly, and is difficult to meet Large Copacity Program Appliance.The stacking fpga chip of another kind of 3D as shown in Figure 3, non-volatile memory chip as one independently chip comprise storage array and peripheral realizing circuit, and form a packaged chip with fpga chip by multi-chip package technology, this FPGA implementation can meet Large Copacity Program Appliance, but cost is also very high, and there is the problem of thermal stability.
Along with process node is more and more less, the micro processing procedure of memory chip faces the limit.In order to obtain higher storage density and reading speed, Ge great production firm drops into the exploitation of 3D memory process gradually one after another.The feature of 3D memory technology is not realized by the stacking of chip or 3D encapsulation, but what adopt with regard to memory cell is 3D technique.Such as, traditional plane N AND flash memories, its memory cell floating transistor is planar transistor, all sources and drain terminal are positioned at same plane, and the employing of 3DNAND memory cell is stereo crystal pipe, its source and drain terminal are respectively in different planes, and thus storage density is higher, but the density of storage chip even can reach hundreds of GB magnitude.As shown in Figure 4, be the basic structure of 3D novel memory devices, the storage array that vertical matrix type module is have employed stereo crystal pipe, is vertically the peripheral circuit part of 3D novel memory devices below storage array.
Therefore, those skilled in the art is devoted to exploitation a kind of fpga chip based on 3D nonvolatile memory and its implementation, solves multiple problems that 3D nonvolatile memory occurs in the integrated process of fpga chip.
Summary of the invention
Because the above-mentioned defect of prior art, technical problem to be solved by this invention is how integrated 3D nonvolatile memory on existing fpga chip, particularly, 3D nonvolatile memory array is realized on silicon chip, and except realizing the peripheral circuit of 3D nonvolatile memory on silicon substrate, fpga logic circuit can also be realized.
For achieving the above object, the invention provides a kind of fpga chip, comprise 3D nonvolatile memory, the peripheral circuit of fpga logic circuit and described 3D nonvolatile memory is on same silicon substrate.
Further, described 3D nonvolatile memory is the one in 3DNAND flash memories, 3D phase transition storage, 3D magnetic memory, 3D ferroelectric memory, 3D resistance-variable storing device.
Further, the storage array of described 3D nonvolatile memory is configured to the configuration information storing FPGA or the programming unit be configured to as FPGA, or is configured to the memory block of serving as FPGA.
Further, described peripheral circuit comprises decoding circuit, read/write circuit, control circuit, output input circuit.
Present invention also offers a kind of manufacture method of fpga chip, comprise the following steps:
Same silicon substrate makes the peripheral circuit of fpga logic circuit and described 3D nonvolatile memory.
Further, described 3D nonvolatile memory is the one in 3DNAND flash memories, 3D phase transition storage, 3D magnetic memory, 3D ferroelectric memory, 3D resistance-variable storing device.
Further, the storage array of described 3D nonvolatile memory for store FPGA configuration information or for the programming unit as FPGA, or for serving as the memory block of FPGA.
Further, described peripheral circuit comprises decoding circuit, read/write circuit, control circuit, output input circuit.
This fpga chip implementation method of the present invention considerably increases silicon chip utilance, improves chip integration, reduces FPGA and realize cost.
Be described further below with reference to the technique effect of accompanying drawing to design of the present invention, concrete structure and generation, to understand object of the present invention, characteristic sum effect fully.
Accompanying drawing explanation
Fig. 1 is a kind of existing fpga chip implementation schematic diagram;
Fig. 2 is another kind of existing fpga chip implementation schematic diagram;
Fig. 3 is the stacking fpga chip implementation schematic diagram of another kind of existing 3D;
Fig. 4 is a kind of basic structure schematic diagram of 3D novel memory devices;
Fig. 5 is the 3 dimensional drawing of a preferred embodiment of the present invention and longitudinal surface chart.
Embodiment
The present invention proposes a kind of fpga chip implementation method made based on 3D nonvolatile memory, and the basic block diagram that chip realizes as shown in Figure 5.Wherein, left side is fpga chip 3 dimensional drawing of the present invention, and right side is the longitdinal cross-section diagram of fpga chip of the present invention.In order to realize the storage array of 3D nonvolatile memory (NVM) on silicon chip.The storage array of described 3D nonvolatile memory can be 3DNAND flash memory storage array, 3D phase transition storage storage array, 3D magnetic memory storage array, 3D ferro-electric memory array, 3D resistance-variable storing device storage array etc.The storage array of 3D nonvolatile memory of the present invention can store the configuration information (configurationcontext) of FPGA, also as the programming unit of FPGA, the memory block (memoryblock) etc. of FPGA can also can be served as.On silicon substrate outside realizing 3D non-volatile memory peripheral circuit (such as, decoding circuit, read/write circuit, control circuit, output input circuit etc.), also will realize fpga logic circuit.Wherein, on silicon substrate, the area of logical circuit is greater than or equals the area of the 3D Nonvolatile storage array on silicon chip.This fpga chip implementation method based on 3D nonvolatile memory of the present invention, a chips is integrated with 3D nonvolatile memory and FPGA, takes full advantage of silicon area, improve chip integration greatly, thus reduce FPGA realize cost.
By fpga chip of the present invention compared with traditional fpga chip, as following table:
As can be seen from the above table, the various aspects of performance of fpga chip of the present invention is all well a lot of than traditional fpga chip.First, on program speed, because 3D nonvolatile memory and FPGA are on same chips, the FPGA compared in Fig. 1 and Fig. 3 wants fast many.Secondly, in storage density, much larger than traditional nonvolatile memory storage density of 3D nonvolatile memory.On chip area, the fpga chip of this employing of the present invention 3D memory process compares traditional fpga chip based on plane nonvolatile memory and three-dimensional stacked fpga chip area is much smaller, therefore realizes cost also much lower.Due to the scalability that 3D nonvolatile memory is superior, this fpga chip based on 3D nonvolatile memory of the present invention along with process reduces also can convergent-divergent further.
More than describe preferred embodiment of the present invention in detail.Should be appreciated that the ordinary skill of this area just design according to the present invention can make many modifications and variations without the need to creative work.Therefore, all technical staff in the art, all should by the determined protection range of claims under this invention's idea on the basis of existing technology by the available technical scheme of logical analysis, reasoning, or a limited experiment.