A kind of multinuclear isomery CPU-GPU system architecture based on intelligent flash buffer memoryTechnical field
The present invention relates to a kind of multinuclear isomery CPU-GPU system architecture based on intelligent flash buffer memory
Background technology
CPU and central processing unit are one piece of ultra-large integrated circuit, are arithmetic core and the control core of a computing machine.Mainly comprise arithmetical unit (ALU) and the large parts of controller (CU) two.In addition, the bus of the data also comprising several registers and cache memory and realize contacting between them, control and state.It and internal storage and input-output apparatus are collectively referred to as the large core component of robot calculator three.GPU and graphic process unit are a kind of specially at the microprocessor of personal computer, workstation, game machine and some mobile device epigraph operation.
Heterogeneous Computing mainly refers to the account form of the computing unit composition system using dissimilar instruction set and architectural framework.Common computing unit classification comprises the processors such as CPU, GPU.Heterogeneous Computing obtains more concerns in recent years, mainly because the traditional approach being improved computing power by lifting cpu clock frequency and number of cores encounters heat radiation and energy consumption bottleneck.And although the dedicated computing unit frequency of operation such as GPU are lower, have more interior check figure and computation capability, ratio and the performance/power dissipation ratio of overall performance/chip area are all very high, are far from being fully used.
The design of CPU allows it compare and is good at process irregular data structure and uncertain access mode, and recursive algorithm, the intensive code of branch and single-threading program.This kind of program task has the steps such as complicated instruction scheduling, circulation, branch, Logic judgment and execution.And GPU is good at processing rule data structure and measurable access mode.The strong point of both set, reaches the optimization of overall performance by Heterogeneous Computing.
Intelligent flash buffer memory is a read-only buffer memory.When unmodified data block because the pressure in space is eliminated out buffer area high-speed cache, these data blocks are just moved in flash cache; If need again these data, database will be retracted these data blocks again from flash cache.Flash cache utilizes the I/O speed of flash memory device, more much higher than the memory property based on disk; There is enough CPU, can flash cache be used.
The invention provides a kind of multinuclear isomery CPU-GPU system architecture based on intelligent flash buffer memory.The feature of framework, for having independently parallel C PU and parallel GPU, has respective storage subsystem, all may have access to the storer of the other side; GPU is connected to chipset by I/O bus, and then is connected with CPU by I/O bridge; CPU is made up of ALU, register file and intelligent flash buffer memory and bus interface.
Summary of the invention
The object of the present invention is to provide a kind of multinuclear isomery CPU-GPU system architecture based on intelligent flash buffer memory.The present invention includes following characteristics:
Invention technical scheme
1. based on a multinuclear isomery CPU-GPU system architecture for intelligent flash buffer memory, the feature of framework:
1) there is independently parallel C PU and parallel GPU, have respective storage subsystem, all may have access to the storer of the other side;
2) GPU is connected to chipset by I/O bus, and then is connected with CPU by I/O bridge;
3) CPU is made up of ALU, register file and intelligent flash buffer memory and bus interface.
Accompanying drawing explanation
Accompanying drawing 1 is the multinuclear isomery CPU-GPU system architecture based on intelligent flash buffer memory.
Embodiment
1. based on a multinuclear isomery CPU-GPU system architecture for intelligent flash buffer memory, the feature of framework:
1) there is independently parallel C PU and parallel GPU, have respective storage subsystem, all may have access to the storer of the other side;
2) GPU is connected to chipset by I/O bus, and then is connected with CPU by I/O bridge;
3) CPU is made up of ALU, register file and intelligent flash buffer memory and bus interface.