技术领域technical field
本发明涉及一种页面管理的方法，尤其涉及一种基于嵌入式系统混合主存的页面管理方法。The invention relates to a page management method, in particular to a page management method based on mixed main memory of an embedded system.
背景技术Background technique
大数据时代，随着多核系统和新型应用程序的出现和普及，计算机系统模型已经逐渐从计算驱动演化为数据驱动。因此，大容量的内存是保证整个计算机系统性能的关键。然而，传统的基于DRAM的内存密度很难做到很大。研究表明，未来DRAM工艺的密度不会小于22nm。此外，DRAM的工作机制决定了其必须在一定的间隔内(2ms)对其进行刷新。这些额外的刷新操作独立于数据的存储，但是其能量消耗在大多数应用中会占据整个DRAM能量消耗的70％以上。造成的结果是，传统DRAM内存的能量消耗至少占整个计算机系统的40％。In the era of big data, with the emergence and popularity of multi-core systems and new applications, computer system models have gradually evolved from computing-driven to data-driven. Therefore, large-capacity memory is the key to ensuring the performance of the entire computer system. However, traditional DRAM-based memory density is difficult to achieve very large. Studies have shown that the density of the future DRAM process will not be less than 22nm. In addition, the working mechanism of DRAM determines that it must be refreshed within a certain interval (2ms). These additional refresh operations are independent of data storage, but their energy consumption accounts for more than 70% of the entire DRAM energy consumption in most applications. As a result, traditional DRAM memory consumes at least 40% of the energy consumed by the entire computer system.
嵌入式系统是面向特定应用的，软硬件可剪裁的计算机系统。由于其本身固有的特点，对存储器的面积和能量消耗有严格的要求。因此，传统DRAM的密度小和功耗大的特点严重限制了大容量DRAM内存应用在嵌入式系统之中。而相变存储器(Phase ChangeMemory,PCM)的出现为嵌入式系统中大容量内存提供了新的机遇。Embedded systems are application-specific computer systems with tailorable hardware and software. Due to its inherent characteristics, there are strict requirements on the area and energy consumption of the memory. Therefore, the characteristics of low density and high power consumption of traditional DRAM severely limit the application of large-capacity DRAM memory in embedded systems. The appearance of Phase Change Memory (PCM) provides new opportunities for large-capacity memory in embedded systems.
PCM是一种以硫族化物(如Ge2Sb2Te5，Ge4Sb1Te5)作为存储介质的非易失性半导体存储器，当系统掉电后，其存储单元内部的数据不会丢失。硫族化物是一种相变材料，在不同的电压之下会呈现出结晶和非结晶状态。结晶状态具有较低的电阻值而在非结晶状态具有较高的电阻值。利用该特性，可以分别存储计算机系统中的二进制1和0。此外，为了更大的增加PCM的密度以减小芯片面积。工业界利用相变材料高阻态和低阻态之间的其它电阻状态来实现在一个存储单元内存储多个二进制位。该PCM工艺称之位Multi-Level Cell(MLC)，与之对应，一个SLC只能存储一位数据。由于MLC的特性复杂，而且写操作速度比SLC慢很多，目前的研究以SLC为主。与传统DRAM相比，PCM存储器作为内存具有以下优点：PCM is a non-volatile semiconductor memory that uses chalcogenides (such as Ge2Sb2Te5, Ge4Sb1Te5) as a storage medium. When the system is powered off, the data inside the storage unit will not be lost. Chalcogenides are phase-change materials that exhibit crystalline and amorphous states under different voltages. The crystalline state has a lower resistance value and the amorphous state has a higher resistance value. Using this property, binary 1s and 0s in computer systems can be stored separately. In addition, in order to increase the density of PCM more to reduce the chip area. The industry utilizes other resistance states between the high resistance state and the low resistance state of phase change materials to store multiple binary bits in a memory cell. The PCM process is called Multi-Level Cell (MLC). Correspondingly, one SLC can only store one bit of data. Due to the complex characteristics of MLC, and the write operation speed is much slower than SLC, the current research is mainly based on SLC. Compared with traditional DRAM, PCM memory has the following advantages as memory:
(1)高密度：不同于传统基于电容阵列的DRAM，PCM以相变材料作为存储介质，其各个存储单元之间的距离可以做到非常小，研究表明，PCM的密度可以在未来短时间内突破16nm。早在2012年，三星公司就研制出20nm支撑的8GB相变存储器。而且，MLC PCM的存储单元密度会更大。(1) High density: Unlike traditional DRAM based on capacitor arrays, PCM uses phase-change materials as storage media, and the distance between each storage unit can be very small. Studies have shown that the density of PCM can be improved in a short time in the future. Breakthrough 16nm. As early as 2012, Samsung developed an 8GB phase-change memory supported by 20nm. Moreover, the memory cell density of MLC PCM will be higher.
(2)低能耗：由于PCM以电阻值差异存储数据，因此，不存在传统DRAM中的刷新操作，极大地减少了存储器的能量消耗。此外，PCM内部没有机械传动装置，进一步减少能耗。(2) Low energy consumption: Since PCM stores data with differences in resistance values, there is no refresh operation in traditional DRAM, which greatly reduces the energy consumption of the memory. In addition, there are no mechanical transmissions inside the PCM, further reducing energy consumption.
(3)非易失：PCM存储单元的内容在系统掉电后会保持不变。因此，如果将PCM作为主存，在系统重新上电后会延续掉电之前系统状态而继续执行。有效的减小系统的启动时间，保证了数据的安全性和一致性。(3) Non-volatile: The contents of the PCM storage unit will remain unchanged after the system is powered off. Therefore, if the PCM is used as the main memory, after the system is powered on again, the system state before the power failure will be continued and the execution will continue. Effectively reduce system startup time and ensure data security and consistency.
(4)抗干扰：传统DRAM内存需要采用电容作为存储单元，而电容都会存在耐压的问题，如果电压超过额定电压，电容器就会损坏。而PCM不会存在这样的问题。(4) Anti-interference: traditional DRAM memory needs to use capacitors as storage units, and capacitors will have withstand voltage problems. If the voltage exceeds the rated voltage, the capacitor will be damaged. And PCM will not have such a problem.
鉴于PCM以上优点，将其作为嵌入式系统大容量主存是一个很好的选择。然而，目前PCM存储器仍然存在不足，主要表现在以下几个方面：In view of the above advantages of PCM, it is a good choice to use it as a large-capacity main memory of an embedded system. However, there are still deficiencies in PCM memory at present, mainly in the following aspects:
(1)有限的写次数：当PCM存储单元写入一定量的数据之后，会变的不稳定，以至于读出的数据和写入的数据不同。存储单元通常情况下，PCM存储单元的写次数限制大约为107-108。(1) Limited write times: When a certain amount of data is written into the PCM storage unit, it will become unstable, so that the read data is different from the written data. Memory cells Typically, PCM memory cells have a write count limit of approximately 107-108.
(2)写延迟长：由于晶体材料状态改变需要维持较长的时间。因此，相对于传统DRAM，PCM向存储单元中写入数据需要更长的时间。(2) Long writing delay: it needs to be maintained for a long time due to the state change of the crystal material. Therefore, it takes a longer time for PCM to write data into memory cells than traditional DRAM.
(3)较高的动态能耗：PCM的写操作由于需要经过强电流加热和快速促灭使晶体材料状态发生改变，使得写操作的功耗比读操作大大提高。在对PCM存储单元进行数据写入时，会比传统DRAM消耗更多的能量。(3) Higher dynamic energy consumption: The write operation of PCM needs to undergo strong current heating and rapid quenching to change the state of the crystal material, so that the power consumption of the write operation is greatly higher than that of the read operation. When writing data to PCM memory cells, it consumes more energy than traditional DRAM.
下表显示了PCM，DRAM与NAND Flash的各种参数对比：The following table shows the comparison of various parameters of PCM, DRAM and NAND Flash:
为了同时发挥PCM和DRAM两者优点的同时能有有效的避免各自缺点，学术界提出了PCM和DRAM的混合主存架构(Hybrid Main Memory Architecture)。在该架构中，PCM和DRAM位于两个并列的线性地址空间中。操作系统会区分这两个空间并将大多数的写操作位于DRAM完成而读操作在PCM中完成。该架构能够同时利用DRAM低的写延迟和动态功耗的优点和PCM高密度和静态功耗的优点，同时又能有效避免两者缺点。In order to take advantage of the advantages of both PCM and DRAM while effectively avoiding their respective shortcomings, the academic community has proposed a hybrid main memory architecture (Hybrid Main Memory Architecture) of PCM and DRAM. In this architecture, PCM and DRAM reside in two parallel linear address spaces. The operating system differentiates between these two spaces and places most writes in DRAM and reads in PCM. This architecture can simultaneously utilize the advantages of low write delay and dynamic power consumption of DRAM and the advantages of high density and static power consumption of PCM, while effectively avoiding the disadvantages of both.
在该架构中，为了避免在PCM中产生过多的写操作，需要在传统操作系统页面管理的基础上增加页面迁移策略。将位于PCM中经常被写的页面(write-hot page)迁移到DRAM中，而将DRAM中很少被写的页面迁移到PCM中以更加高效利用DRAM空间。然而，如何预测未来页面的写特点是一件非常困难的事情。尽管今年来学术界对混合主存的页面管理的研究很多，但是普遍存在以下缺点：In this architecture, in order to avoid excessive write operations in the PCM, a page migration strategy needs to be added on the basis of traditional operating system page management. The frequently written pages (write-hot pages) located in the PCM are migrated to the DRAM, and the pages rarely written in the DRAM are migrated to the PCM to utilize the DRAM space more efficiently. However, how to predict the writing characteristics of future pages is a very difficult thing. Although there have been many researches on the page management of mixed main memory in the academic circle this year, the following shortcomings are common:
(1)始终将读频繁的页面放置和迁移到PCM中：(1) Always place and migrate frequently read pages to PCM:
在写密集型的应用中，该策略是可行的；然而，在读密集型的应用中，DRAM存储空间得不到有效的使用，而且由于页面缺失的问题导致的PCM写次数会大大增加。In write-intensive applications, this strategy is feasible; however, in read-intensive applications, the DRAM storage space is not effectively used, and the number of PCM writes due to the page missing problem will greatly increase.
(2)在页面管理策略运行之前需要用户确定很多参数的值：(2) Before the page management strategy runs, the user needs to determine the values of many parameters:
如PCM页面的写次数超过多少时迁移到DRAM；对于不同的应用程序，这些参数的值往往很难确定。For example, when the number of writes of PCM pages exceeds how many times, it is migrated to DRAM; for different applications, the values of these parameters are often difficult to determine.
(3)不能有效的预测写频繁的页：(3) Cannot effectively predict frequently written pages:
当策略检测到一个PCM页面频繁被写后，将其迁移到DRAM，但该页面此后不再被写会造成错误的迁移；或者当策略检测到一个DARM页面很少被写后，将其迁移到PCM，但该页面此后经常被写也会造成错误的迁移。When the policy detects that a PCM page is frequently written, it will be migrated to DRAM, but the page will no longer be written, which will cause a wrong migration; or when the policy detects that a DARM page is rarely written, it will be migrated to PCM, but the page is often written thereafter and can also cause false migrations.
发明内容Contents of the invention
为了弥补现有技术存在的缺陷和不足，本发明提出了一种基于嵌入式系统混合主存的页面管理方法，该方法针对嵌入式系统中的PCM/DRAM混合主存，能够极大地延长混合主存的寿命，减小应用程序的执行延迟以及减小整个内存系统的能耗。In order to make up for the defects and deficiencies in the prior art, the present invention proposes a page management method based on the mixed main memory of the embedded system. The lifetime of the memory is reduced, the execution delay of the application program is reduced, and the energy consumption of the entire memory system is reduced.
为了达到以上目的，本发明的技术方案如下：In order to achieve the above object, technical scheme of the present invention is as follows:
一种基于嵌入式系统混合主存的页面管理方法，所述嵌入式系统混合主存为嵌入式系统PCM/DRAM混合主存，嵌入式系统的CPU发送访问页面的请求，若CPU的请求数据或者指令不在缓存中，则执行访问主存进行页面管理，包括以下步骤：A kind of page management method based on embedded system mixed main memory, described embedded system mixed main memory is embedded system PCM/DRAM mixed main memory, and the CPU of embedded system sends the request of access page, if the request data of CPU or If the instruction is not in the cache, execute access to the main memory for page management, including the following steps:
步骤(1)：构建存在于混合主存中页面的CLOCK链表和存储的数据为从CLOCK链表中移出内存的页面的元数据的LRU链表；Step (1): Construct the CLOCK linked list of the page existing in the mixed main memory and the LRU linked list whose stored data is the metadata of the page removed from the CLOCK linked list;
步骤(2)：判断请求被访问的页面是否存储在嵌入式系统的混合主存中，若存储在嵌入式系统的混合主存中，则访问CLOCK链表，并判断CLOCK链表中的页面的类型进行页面标识位的更改操作或页面迁移操作；若没有存储在嵌入式系统的主存中，则进入步骤(3)；Step (2): determine whether the page requested to be accessed is stored in the mixed main memory of the embedded system, if stored in the mixed main memory of the embedded system, then access the CLOCK linked list, and judge the type of the page in the CLOCK linked list to perform The change operation of the page identification bit or the page migration operation; if it is not stored in the main memory of the embedded system, then enter step (3);
步骤(3)：获取一个空闲页面作为被访问页面的存储空间，并访问LRU链表，再调用页面插入算法将被访问页面插入到混合主存中。Step (3): Obtain a free page as the storage space of the accessed page, access the LRU linked list, and call the page insertion algorithm to insert the accessed page into the mixed main memory.
所述步骤(2)中的标识位包括：访问位、写位和建议位。The identification bits in the step (2) include: access bits, write bits and suggestion bits.
所述步骤(2)中被访问页面命中的类型，包括最近被访问的页面和经常被访问的页面，分别存储于CLOCK链表T1和CLOCK链表T2中。The hit types of the accessed pages in the step (2), including recently accessed pages and frequently accessed pages, are stored in CLOCK linked list T1 and CLOCK linked list T2 respectively.
所述经常被访问的页面的判断过程为：The judging process of the frequently visited pages is as follows:
如果从页面的访问位变为1开始，到变为0之前对该页面再次进行访问，则该页面为经常被访问的页面。If the page is accessed again from the time when the access bit of the page becomes 1 until it becomes 0, the page is a frequently accessed page.
所述最近被访问的页面的判断过程为：The judging process of the recently visited page is:
如果命中的某一个页面的访问位为1，则该页面为最近被访问的页面。If the access bit of a hit page is 1, the page is the most recently accessed page.
当被访问页面命中的类型是位于CLOCK链表T1的最近被访问的页面时，判断被访问页面的访问位是否为1，若被访问页面的访问位是1，则将该页面迁移至链表T2的尾端，页面访问结束；When the hit type of the accessed page is the most recently accessed page located in the CLOCK linked list T1, judge whether the access bit of the accessed page is 1, if the accessed bit of the accessed page is 1, then migrate the page to the linked list T2 Tail end, end of page access;
若被访问页面的访问位是0，则判断被访问页面的请求是否写操作，若是，则将被访问页面的写位和访问位均设置为1，页面访问结束；否则，仅将被访问页面的访问位设置为1，页面访问结束。If the access bit of the accessed page is 0, it is judged whether the request of the accessed page is a write operation, if so, the write bit and the access bit of the accessed page are both set to 1, and the page access ends; otherwise, only the accessed page The access bit of the page is set to 1, and the page access ends.
当被访问页面命中的类型是位于CLOCK链表T2的经常被访问的页面时，判断被访问页面的请求是否写操作，若被访问页面的请求不是写操作，则仅将被访问页面的访问位设置为1，页面访问结束；When the type of the accessed page hit is a frequently accessed page located in the CLOCK linked list T2, judge whether the request of the accessed page is a write operation, if the request of the accessed page is not a write operation, only the access bit of the accessed page is set If it is 1, the page visit ends;
若被访问页面的请求是写操作，则判断被访问页面的写位和访问位是否均设置为1，若不是，则被访问页面的写位和访问位均设置为1，页面访问结束；若访问页面的写位和访问位均已经为1，则判断被访问页面是否存储在PCM中，若被访问页面存储在PCM中，则将被访问页面迁移到DARM中，否则将被访问页面的建议位设置为1，页面访问结束。If the request of the accessed page is a write operation, it is judged whether the write bit and the access bit of the accessed page are all set to 1, if not, the write bit and the access bit of the accessed page are both set to 1, and the page access ends; if Both the write bit and the access bit of the accessed page are 1, then judge whether the accessed page is stored in PCM, if the accessed page is stored in PCM, then migrate the accessed page to DARM, otherwise the suggested page bit is set to 1, the page access ends.
所述步骤(3)中的LRU链表，包括链表B1和链表B2；链表B1用来存放从链表T1中移出内存的页面；链表B2用来存放从链表T2中移出内存的页面。The LRU linked list in described step (3) comprises linked list B1 and linked list B2; Linked list B1 is used for depositing the page that moves out memory from linked list T1; Linked list B2 is used for storing the page that moves out memory from linked list T2.
所述步骤(3)的过程包括：The process of described step (3) comprises:
步骤(3.1)：当被访问页面命中链表B1，则分配给链表T1的目标容量大小加1，再调用页面插入算法将被访问页面插入到混合主存中，并链接到T1中，访问结束；Step (3.1): When the accessed page hits the linked list B1, add 1 to the target capacity allocated to the linked list T1, and then call the page insertion algorithm to insert the accessed page into the mixed main memory and link it to T1, and the access ends;
步骤(3.2)：当被访问页面命中链表B2，则分配给链表T1的目标容量大小减1，再调用页面插入算法将被访问页面插入到混合主存中，并链接到T2中，访问结束；Step (3.2): When the accessed page hits the linked list B2, the target capacity allocated to the linked list T1 is reduced by 1, and then the page insertion algorithm is called to insert the accessed page into the mixed main memory and link it to T2, and the access ends;
步骤(3.3)：当被访问页面在链表B1和链表B2中都不命中时，则链表T1的容量大小不变，然后再调用页面插入算法将被访问页面插入到混合主存中，并链接到T1中，访问结束。Step (3.3): When the accessed page does not hit in both the linked list B1 and the linked list B2, the capacity of the linked list T1 remains unchanged, and then call the page insertion algorithm to insert the accessed page into the mixed main memory and link to In T1, the visit ends.
所述步骤(3)中的链表T1，链表T2，链表B1和链表B2大小满足如下条件：Linked list T1 in described step (3), linked list T2, linked list B1 and linked list B2 size satisfy following condition:
|T1|+|T2|≤S (1)|T1|+|T2|≤S (1)
|T1|+|B1|≤S (2)|T1|+|B1|≤S (2)
|T2|+|B2|≤2S (3)|T2|+|B2|≤2S (3)
0≤|T1|+|T2|+|B1|+|B2|≤2S (4)0≤|T1|+|T2|+|B1|+|B2|≤2S (4)
其中，S的值为混合主存的总大小，以页为单位，每个页大小为4KB；|T1|、|T2|、|B1|和|B2|分别表示链表T1，链表T2，链表B1和链表B2的容量大小。Among them, the value of S is the total size of the mixed main memory, in units of pages, and the size of each page is 4KB; |T1|, |T2|, |B1| and |B2| represent the linked list T1, the linked list T2, and the linked list B1 respectively And the capacity of the linked list B2.
本发明的有益效果是：The beneficial effects of the present invention are:
1)降低了整个主存系统的能耗；1) Reduce the energy consumption of the entire main memory system;
2)延长了PCM存储器的使用寿命；2) prolong the service life of PCM memory;
3)减少了应用程序的执行时间；3) Reduce the execution time of the application;
4)本发明的该方法能够有效的减小PCM/DRAM混合储存下对PCM的写次数；高效的预测PCM中写频繁的页面并对其进行迁移；当内存满后，根据应用程序的内存访问模式，有效预测未来较少使用的内存页面，并将其移除内存；4) The method of the present invention can effectively reduce the number of writes to PCM under PCM/DRAM hybrid storage; efficiently predict and migrate frequently written pages in PCM; when the memory is full, according to the memory access of the application program mode, which effectively predicts less used memory pages in the future and removes them from memory;
5)同时，为确保策略的自适应性，在运行之前都不需要用户确定与应用程序有关的任何参数，本发明的该方法运用在操作系统层面上。5) At the same time, in order to ensure the adaptability of the strategy, the user does not need to determine any parameters related to the application program before running, and the method of the present invention is applied on the operating system level.
附图说明Description of drawings
图1为本发明的页面管理方法采用的混合主存架构；Fig. 1 is the hybrid main memory architecture adopted by the page management method of the present invention;
图2为本发明提出的页面管理方法数据结构；Fig. 2 is the page management method data structure that the present invention proposes;
图3为页面管理策略总流程图；Fig. 3 is a general flowchart of the page management strategy;
图4为页面插入算法流程图；Figure 4 is a flow chart of the page insertion algorithm;
图5为页面迁移算法流程图；Figure 5 is a flow chart of the page migration algorithm;
图6为页面替换算法流程图；Figure 6 is a flow chart of the page replacement algorithm;
图7为本发明提出的页面管理方法与CLOCK、LRU-WPAM和CLOCK-DWF管理方法的平均内存访问延迟；Fig. 7 is the average memory access delay of the page management method proposed by the present invention and the CLOCK, LRU-WPAM and CLOCK-DWF management methods;
图8为本发明提出的页面管理方法与CLOCK、LRU-WPAM和CLOCK-DWF管理方法的平均PCM写次数；Fig. 8 is the average PCM writing times of the page management method proposed by the present invention and the CLOCK, LRU-WPAM and CLOCK-DWF management methods;
图9为本发明提出的页面管理方法与CLOCK、LRU-WPAM和CLOCK-DWF管理方法的平均页面迁移次数；Fig. 9 is the page management method that the present invention proposes and the average page migration times of CLOCK, LRU-WPAM and CLOCK-DWF management method;
图10为本发明提出的页面管理方法与CLOCK、LRU-WPAM和CLOCK-DWF管理方法的平均内存能耗。FIG. 10 shows the average memory energy consumption of the page management method proposed by the present invention and the CLOCK, LRU-WPAM and CLOCK-DWF management methods.
具体实施方式detailed description
下面结合附图对本发明提出的基于嵌入式系统混合主存的页面管理方法作进一步的详细描述：Below in conjunction with accompanying drawing, the page management method based on embedded system hybrid main memory that the present invention proposes is described in further detail:
图1显示了本发明提出的基于嵌入式系统混合主存的页面管理方法所应用的混合主存架构。在该架构中，DRAM和PCM同时作为主存的一部分，但是由于各自的物理属性不同，所以分别设有不同的内存控制器-DRAM Controller以及PCM Controller。而在相对上层的操作系统层面，DRAM和PCM处于同一个地址空间中，被操作系统按照统一的页面方式进行管理。本发明即在该操作系统层面设计页面管理策略。当CPU进行访存时，首先需要查找L1Cache，如果L1Cache不命中，则查找L2Cache。在这里L2Cache作为最后一级的缓存，即LLC(Last Level Cache)。当LLC也不命中的时候，将会发生主存的访问操作。同样，当页面从LLC移出时，也会发生主存的访问操作。FIG. 1 shows the mixed main memory architecture applied by the page management method based on the mixed main memory of the embedded system proposed by the present invention. In this architecture, DRAM and PCM are part of the main memory at the same time, but due to their different physical properties, different memory controllers - DRAM Controller and PCM Controller are respectively provided. At the relatively upper operating system level, DRAM and PCM are in the same address space, and are managed by the operating system in a unified page manner. The present invention designs the page management strategy at the operating system level. When the CPU fetches memory, it first needs to find the L1Cache, and if the L1Cache misses, it needs to find the L2Cache. Here L2Cache is used as the last level of cache, that is, LLC (Last Level Cache). When the LLC also hits, a main memory access operation will occur. Likewise, accesses to main memory occur when pages are moved out of the LLC.
图2显示了本发明提出的基于嵌入式系统混合主存的页面管理方法所用的数据结构。所用的数据结构主要包含四个链表。其中，T1用来存放在内存中最近访问的页面；T2用来存放内存中经常被访问的页面；B1用来存放最近从T1中移出内存的页面；B2用来存放最近从T2中移出内存的页面。如果混合主存的总大小为S，其中混合主存的总大小以page为单位，则自适应页面管理策略所能够管理的页面总数为2S页，其中，T1和T2总共可以管理S个实际在主存的页，而B1和B2总共可以管理S各历史访问的页面。此外，为了策略能够更好地工作，T1，T2，B1，B2满足如下不等式：Fig. 2 shows the data structure used in the page management method based on the mixed main memory of the embedded system proposed by the present invention. The data structure used mainly consists of four linked lists. Among them, T1 is used to store the most recently accessed pages in memory; T2 is used to store frequently accessed pages in memory; B1 is used to store pages recently removed from T1; B2 is used to store pages recently removed from T2 page. If the total size of the mixed main memory is S, and the total size of the mixed main memory is in pages, the total number of pages that can be managed by the adaptive page management strategy is 2S pages, where T1 and T2 can manage a total of S actual pages The main memory pages, and B1 and B2 can manage the pages accessed by each history of S in total. In addition, in order for the strategy to work better, T1, T2, B1, B2 satisfy the following inequality:
|T1|+|T2|≤S (1)|T1|+|T2|≤S (1)
|T1|+|B1|≤S (2)|T1|+|B1|≤S (2)
|T2|+|B2|≤2S (3)|T2|+|B2|≤2S (3)
0≤|T1|+|T2|+|B1|+|B2|≤2S (4)0≤|T1|+|T2|+|B1|+|B2|≤2S (4)
公式(1)表示：T1和T2链表的总长度不大于混合主存(PCM+DRAM)的总大小。Formula (1) shows: the total length of the T1 and T2 linked lists is not greater than the total size of the mixed main memory (PCM+DRAM).
公式(2)表示：T1和B1链表的总长度不大于混合主存(PCM+DRAM)的总大小。这样做的目的保证了所有T1和B1中的页面都能够迁移到T2中。Formula (2) indicates: the total length of the T1 and B1 linked lists is not greater than the total size of the mixed main memory (PCM+DRAM). The purpose of this is to ensure that all pages in T1 and B1 can be migrated to T2.
公式(3)表示：T2和B2链表的总长度不大于混合2倍的混合主存(PCM+DRAM)的总大小。这样做的目的保证了所有T1和B1中的页面都能够迁移到T2中。此外还保证了本发明提出的策略总共可以管理两倍的混合主存总大小。Formula (3) shows: the total length of the T2 and B2 linked lists is not greater than the total size of the mixed main memory (PCM+DRAM) which is mixed twice. The purpose of this is to ensure that all pages in T1 and B1 can be migrated to T2. In addition, it is guaranteed that the strategy proposed by the present invention can manage twice the total size of the mixed main memory.
公式(4)表示：T1，T2，B1和B2链表的总长度不超过混合主存(PCM+DRAM)的总大小的两倍。该公式的意思是，本发明提出的策略总共可以管理2倍的混合主存总大小。Formula (4) shows: the total length of the T1, T2, B1 and B2 linked lists is not more than twice the total size of the mixed main memory (PCM+DRAM). This formula means that the strategy proposed by the present invention can manage 2 times the total size of the mixed main memory in total.
公式(5)表示：如果T1和T2的总大小没有达到最大，即混合主存没有发生页面的替换，则B1和B2链表都为空。Formula (5) indicates: if the total size of T1 and T2 does not reach the maximum, that is, no page replacement occurs in the mixed main memory, then both the B1 and B2 linked lists are empty.
公式(6)表示：如果T1，T2，B1和B2链表的总长度大小大于混合主存总大小S，那么可以推断T1和T2的总大小为S。Formula (6) indicates: if the total length of T1, T2, B1 and B2 linked lists is greater than the total size S of the mixed main memory, then it can be inferred that the total size of T1 and T2 is S.
其中，T1，T2，B1和B2链表的长度是以链表元素个数为单位；混合主存总大小S是以页面个数为单位。Among them, the length of the T1, T2, B1 and B2 linked lists is in the unit of the number of linked list elements; the total size S of the mixed main memory is in the unit of the number of pages.
将操作系统管理的所有在主存中的页面分为两个循环链表，该循环链表为CLOCK链表。一个链表中的元素为最近被访问的页，存储在链表T1中，即这些页面被访问的次数很少，但是在该时间点之前较短的时间内被访问过。一个链表中的元素为经常被访问的页，存储在链表T2，即这些页面虽然可能很久没有被CPU访问过，但是在之前经常被CPU访问。为了利用历史信息来预测未来页面的访问模式，建立两个单项链表，该单链表为LRU链表，分别为B1和B2。B1链表中的每个元素是从T1中移出内存的页面的元数据，B2链表中的每个元素是从T2中移出内存的页面的元数据。其中，元数据指的是描述页面信息的数据，包括页面标识符，页面指针以及页面有关的标志位；如果页面在内存中，则页面指针指向页面在内存中的具体地址。Divide all the pages in the main memory managed by the operating system into two circular linked lists, and the circular linked list is a CLOCK linked list. The elements in a linked list are recently accessed pages, which are stored in the linked list T1, that is, these pages are accessed rarely, but were accessed in a short period of time before this point in time. The elements in a linked list are frequently accessed pages, which are stored in the linked list T2, that is, although these pages may not have been accessed by the CPU for a long time, they were often accessed by the CPU before. In order to use historical information to predict future page access patterns, two single-item linked lists are established, which are LRU linked lists, respectively B1 and B2. Each element in the B1 linked list is the metadata of the page moved out of the memory from T1, and each element in the B2 linked list is the metadata of the page moved out of the memory from T2. Wherein, metadata refers to data describing page information, including a page identifier, a page pointer, and flag bits related to the page; if the page is in the memory, the page pointer points to the specific address of the page in the memory.
对T1中的每个页，设置一个访问位(reference bit)和写位(dirty bit)。当一个新的页面进入内存时，首先用T1链接该页面并且reference bit和dirty bit都清零。当页面在T1中被访问时，reference bit为1；当页面在T1中被写访问时，dirty bit设置为1。由此看出，reference bit代表最近的访问信息，而dirty bit代表最近的写信息。同样，对T2中的每个页，设置reference bit和dirty bit。其意义与在T1中的意义相同。当页面从T1迁移到T2后，reference bit和dirty bit都清零。除此之外，在T2中还设置建议位(suggestbit)。当T2中的一个DRAM页的reference bit和dirty bit都为1时，表明该页可能为写频繁页。如果再次在该页面中发生写操作，则将该页面的suggest bit设置为1。当suggest bit为1时，表明当该页面下次被加载到内存时，应该放到DARM中。当页面从T2中被替换到B2中时，保留suggest bit位不变。T1，T2，B1，B2及其标志位的可视化描述如附图2所示。For each page in T1, an access bit (reference bit) and a write bit (dirty bit) are set. When a new page enters the memory, first link the page with T1 and clear the reference bit and dirty bit. When the page is accessed in T1, the reference bit is 1; when the page is written and accessed in T1, the dirty bit is set to 1. It can be seen from this that the reference bit represents the latest access information, and the dirty bit represents the latest write information. Similarly, for each page in T2, set the reference bit and dirty bit. Its meaning is the same as in T1. When the page is migrated from T1 to T2, the reference bit and dirty bit are both cleared. Besides, a suggest bit (suggestbit) is also set in T2. When both the reference bit and the dirty bit of a DRAM page in T2 are 1, it indicates that the page may be a frequently written page. If a write operation occurs in the page again, the suggest bit of the page is set to 1. When the suggest bit is 1, it indicates that when the page is loaded into memory next time, it should be put into DARM. When the page is replaced from T2 to B2, the suggest bit remains unchanged. The visual description of T1, T2, B1, B2 and their flags is shown in Figure 2.
本发明提出的方法中，关于页面在T1和T2之间的迁移过程为：如果T1中的一个页面的reference bit为1，在其变为0之前，再次在该页面中发生一个内存读或者写操作，表明该页为经常被访问页面，则将其迁移到T2的尾端。In the method proposed by the present invention, the page migration process between T1 and T2 is as follows: if the reference bit of a page in T1 is 1, before it becomes 0, another memory read or write occurs in this page operation, indicating that the page is frequently accessed, it will be migrated to the end of T2.
图3显示了自适应的页面替换策略总的流程图。它以一个内存访问请求作为开端。如果这个请求的页面在混合主存中，说明页命中。命中的情况下，如果该页面的referencebit已经为1，说明其最近经常被访问，应该将其迁移到T2中。否则，该页面的reference bit为0，在该情况下，如果页面请求为读操作，则仅仅将其reference bit设置为1，否则页面请求为写操作，应该将其reference bit和dirty bit同时设置为1。到此为止，页面命中T1的页面访问过程结束。Figure 3 shows the overall flowchart of the adaptive page replacement strategy. It starts with a memory access request. If the requested page is in mixed main memory, it indicates a page hit. In the case of a hit, if the referencebit of the page is already 1, it means that it has been frequently accessed recently, and it should be migrated to T2. Otherwise, the reference bit of the page is 0. In this case, if the page request is a read operation, only its reference bit is set to 1; otherwise, the page request is a write operation, and its reference bit and dirty bit should be set to 1. So far, the page access process of page hit T1 ends.
在页面命中T2的情况下，此时，如果该页面的访问类型为读操作，则简单的将其reference bit设置为1。然而，如果操作为写操作，则检查页面中目前的dirty bit和reference bit是否都为1，如果不是，将其都设置为1。如果是，说明该页为写频繁页，则检查页面是否在DRAM中，如果是，则将它的suggest bit设置为1。如果在PCM中，则调用页面迁移过程，将它迁移到DRAM中进行存储。到此为止，页面命中T2的页面访问过程结束。In the case of a page hitting T2, at this time, if the access type of the page is a read operation, simply set its reference bit to 1. However, if the operation is a write operation, check whether the current dirty bit and reference bit in the page are both 1, and if not, set them both to 1. If yes, it means that the page is a frequently written page, then check whether the page is in the DRAM, and if so, set its suggest bit to 1. If it is in PCM, call the page migration process to migrate it to DRAM for storage. So far, the page access process of page hit T2 ends.
在页面不在内存的情况下，需要检查是否命中历史链表，即B1或者B2。如果命中B1，说明之前不应该将此页面从T1中删除，即，分配给T1的目标大小太小了，应该对其进行加1。同理，如果命中B2，说明之前不应该将此页面从T2中删除，即，分配给T2中的目标大小太小了，应该对T2的目标大小进行加1(对T1的目标大小减1)。如果页面都不命中，则目标大小都不需要做任何改变。最后调用页面插入算法将新页面插入到混合主存中。到此为止，针对页面不命中的页面访问过程到此结束。其中，新页面是指CPU正在访问的页面，并且不在混合主存中的页数据。该页面数据可能位于外存中或者由CPU直接产生。In the case that the page is not in the memory, it is necessary to check whether it hits the history linked list, that is, B1 or B2. If B1 is hit, it means that this page should not be deleted from T1 before, that is, the target size allocated to T1 is too small, and it should be increased by 1. Similarly, if B2 is hit, it means that this page should not be deleted from T2 before, that is, the target size allocated to T2 is too small, and 1 should be added to the target size of T2 (1 should be subtracted from the target size of T1) . If none of the pages are hit, no change in the target size is required. Finally, the page insertion algorithm is called to insert the new page into the mixed main memory. So far, the page access process for page misses ends here. Wherein, the new page refers to a page being accessed by the CPU and page data not in the mixed main memory. The page data may be located in external memory or directly generated by the CPU.
图4显示了自适应的页面插入过程流程图。内存访问请求的页不在内存时，需要将该新页面x插入到内存中。此时，可以有三种不同情况下的页面插入过程。Figure 4 shows a flow chart of the adaptive page insertion process. When the page requested by the memory access is not in the memory, the new page x needs to be inserted into the memory. At this point, there can be three page insertion processes in different situations.
(1)第一种情况的页面插入过程，是页面x在B1中，表明该页面是一个不会经常被访问的页面。此时，混合主存中获取一个空闲的页面(如果没有空闲页面，则调用页面替换算法获得一个空闲页面)，利用该空闲页面作为新页面x的存储空间，并链接到T1链表的尾端。(1) The page insertion process in the first case is that page x is in B1, indicating that the page is a page that will not be frequently accessed. At this time, obtain a free page in the mixed main memory (if there is no free page, call the page replacement algorithm to obtain a free page), use the free page as the storage space of the new page x, and link it to the end of the T1 linked list.
(2)第二种情况下的页面插入过程，如果页面x即不在B1中，也不在B2中。则根据局部性原理，如果对x的访问是写操作，则未来该页面可能经常被写。因此，需要从内存中获取一个空闲的DRAM页面来存储x(如果内存中没有空闲DRAM页面，则调用页面替换过程获取一个空闲的DRAM页面)，利用该页面作为新页面x的存储空间，并链接到T1链表的尾端。相反，如果对x的内存访问为读操作，则从混合主存中获取一个DRAM页面或者PCM页面(如果混合主存已满，则调用页面替换算法获取一个空闲的DRAM页或者PCM页面)，作为x的存储空间，并链接到T1链表的尾端。(2) The page insertion process in the second case, if page x is neither in B1 nor in B2. According to the principle of locality, if the access to x is a write operation, the page may be frequently written in the future. Therefore, it is necessary to obtain a free DRAM page from the memory to store x (if there is no free DRAM page in the memory, call the page replacement process to obtain a free DRAM page), use this page as the storage space for the new page x, and link to the end of the T1 linked list. Conversely, if the memory access to x is a read operation, a DRAM page or PCM page is obtained from the mixed main memory (if the mixed main memory is full, the page replacement algorithm is called to obtain a free DRAM page or PCM page), as The storage space of x is linked to the end of the T1 linked list.
(3)第三种情况下，页面x在B2中。此时，需要检查页面x在B2中的suggest bit。如果该位为1，则需要从混合主存中获取一个空闲的DRAM页面(如果没有空闲的DRAM页，则调用页面替换算法获得一个空闲的DRAM页面)，利用该页面作为新页面x的存储空间，并链接到T2链表的尾端。相反，如果对x的内存访问为读操作，则从混合主存中获取一个DRAM页面或者PCM页面(如果混合主存已满，则调用页面替换算法获取一个空闲的DRAM页或者PCM页面)，作为x的存储空间，并链接到T2链表的尾端。(3) In the third case, page x is in B2. At this point, it is necessary to check the suggest bit of page x in B2. If this bit is 1, you need to obtain a free DRAM page from the mixed main memory (if there is no free DRAM page, call the page replacement algorithm to obtain a free DRAM page), use this page as the storage space for the new page x , and linked to the end of the T2 linked list. Conversely, if the memory access to x is a read operation, a DRAM page or PCM page is obtained from the mixed main memory (if the mixed main memory is full, the page replacement algorithm is called to obtain a free DRAM page or PCM page), as The storage space of x is linked to the end of the T2 linked list.
对于以上三种情况下插入到内存中的页面，都将其页面的所有标志位设置为0。For the pages inserted into the memory in the above three cases, all flag bits of the pages are set to 0.
图5显示了页面迁移过程的流程图。通过一系列的实验验证，对于写操作，写频率高的页面未来一段时间内更趋向于被写。因此，本发明提出的自适应页面管理方法的页面迁移过程仅仅发生在T2。这样有效的提高了页面迁移的效率，并有效的减少了错误迁移的产生。所谓错误的迁移，是指，原来在PCM中的页面，发生了很多次的写操作后，将其迁移到DRAM中，但是，在DRAM中却很少再次被写。同理，原来在DRAM中的页面，很少被写，将其迁移到PCM中，但是，在PCM中却发生了多次的写操作。这些都是错误的迁移。理论上，错误的迁移是无法避免的。当T2中需要有一个PCM页面p需要迁移到DRAM页面中时，利用Hdram指针查找一个dirty bit为0的DRAM页面q将其作为与p之间进行相互页面迁移的页面。在利用Hdram进行页面查找的过程中。如果所遇到的DRAM或者PCM页面dirty bit为1，则将其设置为0。在页面的迁移过程中，要注意的是，两个页面p和q在T2链表中的相对位置保持不变，仅仅是其存储介质发生转变。Figure 5 shows a flowchart of the page migration process. Through a series of experiments, it has been verified that for write operations, pages with high write frequency tend to be written in the future. Therefore, the page migration process of the adaptive page management method proposed by the present invention only occurs at T2. In this way, the efficiency of page migration is effectively improved, and the generation of wrong migration is effectively reduced. The so-called erroneous migration refers to that the pages in the PCM are migrated to the DRAM after many write operations, but are rarely written again in the DRAM. In the same way, the pages in the original DRAM are seldom written, and they are migrated to the PCM. However, many write operations have occurred in the PCM. These are all wrong migrations. In theory, wrong migrations are unavoidable. When there is a PCM page p in T2 that needs to be migrated to a DRAM page, use the Hdram pointer to find a DRAM page q with a dirty bit of 0 and use it as a page for mutual page migration with p. In the process of page search using Hdram . If the encountered DRAM or PCM page dirty bit is 1, set it to 0. During the page migration process, it should be noted that the relative positions of the two pages p and q in the T2 linked list remain unchanged, only their storage medium changes.
图6显示了页面替换过程的流程图。因此。本发明提出的页面管理方法中的页面替换算法需要在不需要设置任何用户定义参数的情况下，灵活的基于“recency”(访问时间)和“frequency”(访问频率)选择页面进行替换。T1和T2链表分别代表最近访问的页面和最常访问的页面。当需要进行页面替换时，通过对比T1链表的实际大小是否大于为其设置的目标大小，即TargetSize。如果大于TargetSize，则需要从T1中替换一个页面。在页面替换过程中，如果指定需要替换DRAM页面，则利用T1中的Hdram指针选择reference bit和dirtybit同时为0的冷页进行替换，在查找该类型页面的过程中，如果reference bit和dirtybit不同时为0，则将其都设置为0，并将指针指向下一个页面。而如果不指定需要替换DRAM页，则利用T1中的Hreplace指针选择reference bit为0的页进行替换，在查找该类型页面的过程中，如果reference bit不为0，则将其设置为0，并将指针指向下一个页面。Figure 6 shows a flowchart of the page replacement process. therefore. The page replacement algorithm in the page management method proposed by the present invention needs to flexibly select pages for replacement based on "recency" (access time) and "frequency" (access frequency) without setting any user-defined parameters. The T1 and T2 linked lists represent the most recently accessed pages and the most frequently accessed pages, respectively. When page replacement is required, check whether the actual size of the T1 linked list is larger than the target size set for it, that is, TargetSize. If larger than TargetSize, a page needs to be replaced from T1. During the page replacement process, if it is specified that a DRAM page needs to be replaced, use the Hdram pointer in T1 to select a cold page whose reference bit and dirty bit are both 0 for replacement. In the process of searching for this type of page, if the reference bit and dirty bit are not If both are 0, set them both to 0 and point the pointer to the next page. And if it is not specified that the DRAM page needs to be replaced, use the Hreplace pointer in T1 to select the page whose reference bit is 0 for replacement. In the process of searching for this type of page, if the reference bit is not 0, then set it to 0. and point the pointer to the next page.
当T1链表的实际大小不大于为其设置的大小TargetSize时，则需要从T2中替换出一个页面到外存中。该过程和从T1中替换一个页面的过程类似，在此不做赘述。When the actual size of the T1 linked list is not larger than the TargetSize set for it, a page needs to be replaced from T2 to the external memory. This process is similar to the process of replacing a page from T1, and will not be repeated here.
本发明解决的是混合主存下操作系统层面的页面管理问题，通过提出一种基于嵌入式系统混合主存的页面管理方法来有效的减少PCM的写次数，PCM与DRAM之间的页面迁移次数，在内存大小固定的情况下提高页面的命中率。The invention solves the page management problem of the operating system level under the mixed main memory, and effectively reduces the number of writes of the PCM and the number of page migrations between the PCM and the DRAM by proposing a page management method based on the mixed main memory of the embedded system , to improve the page hit rate in the case of fixed memory size.
通过修改Linux内核，实现本发明提出的页面管理策略并在GEM5+NVMain+FlashSim综合仿真器中进行了验证。其中，GEM5能够运行Linux操作系统，NVMain能够精确的仿真DRAM和PCM的各项物理特性。而FlashSim能够仿真最前最先进的Flash存储技术。By modifying the Linux kernel, the page management strategy proposed by the present invention is realized and verified in the GEM5+NVMain+FlashSim comprehensive simulator. Among them, GEM5 can run the Linux operating system, and NVMain can accurately simulate the physical characteristics of DRAM and PCM. And FlashSim can simulate the most advanced Flash memory technology.
本发明的基于嵌入式系统混合主存的页面管理方法AIMR相对于其他其它页面管理方法CLOCK、LRU-WPAM和CLOCK-DWF的实验结果，如图7-10所示。结果显示，相比于目前存在的混合主存页面管理策略，本发明提出的自适应的页面管理策略能够极大地延长混合主存的使用寿命，减小应用程序的执行延迟以及减小整个内存系统的能耗。Compared with other page management methods CLOCK, LRU-WPAM and CLOCK-DWF, the AIMR page management method based on the mixed main memory of the embedded system of the present invention is shown in Fig. 7-10. The results show that compared with the currently existing hybrid main memory page management strategy, the adaptive page management strategy proposed by the present invention can greatly prolong the service life of the hybrid main memory, reduce the execution delay of the application program and reduce the overall memory system energy consumption.
上述虽然结合附图对本发明的具体实施方式进行了描述，但并非对本发明保护范围的限制，所属领域技术人员应该明白，在本发明的技术方案的基础上，本领域技术人员不需要付出创造性劳动即可做出的各种修改或变形仍在本发明的保护范围以内。Although the specific implementation of the present invention has been described above in conjunction with the accompanying drawings, it does not limit the protection scope of the present invention. Those skilled in the art should understand that on the basis of the technical solution of the present invention, those skilled in the art do not need to pay creative work Various modifications or variations that can be made are still within the protection scope of the present invention.
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| CN201510315621.3ACN104899154B (en) | 2015-06-10 | 2015-06-10 | The page management method hosted is mixed based on embedded system |
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| CN201510315621.3ACN104899154B (en) | 2015-06-10 | 2015-06-10 | The page management method hosted is mixed based on embedded system |
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